This project implements a Flappy Bird-style game on the Terasic DE2-115 FPGA development board. The game utilizes FPGA peripherals such as VGA for graphical rendering, onboard push buttons for user input, and a seven-segment display for score tracking. Designed using Verilog in Quartus Prime, the project showcases real-time systems, finite state machines (FSMs), and optimized resource usage.
- VGA Display (640x480 resolution):
- Bird: Pink block
- Obstacles: Purple pillars with randomly placed holes
- Background: Dark purple
- Game Mechanics:
- Player controls the bird’s vertical position by pressing a button to make it flap.
- Bird must navigate through gaps in the obstacles to score points.
- Collisions with pillars or the screen boundaries result in game over.
- Pause Feature: A toggle switch (Switch 17) pauses the game, turning the screen black and white.
- Input Control:
- Push buttons handle the bird’s flapping motion.
- Debounced signals ensure stable input.
- Score Tracking:
- Scores are displayed on the seven-segment display in real-time.
- High scores can be stored and retrieved.
The project follows a modular design:
- Master Controller Module:
- Manages game state transitions (start, play, pause, game over).
- Handles initialization and resets.
- Game Controller Module:
- Implements bird movement, obstacle generation, collision detection, and score updates.
- Uses a random number generator to determine the positions of gaps in obstacles.
- Seven-Segment Display Controller Module:
- Updates and displays the player’s current score and high score.
- VGA Controller Module:
- Generates VGA signals to render the game elements (bird, obstacles, and background).
- Handles black-and-white rendering during the pause state.
- Random Number Generator Module:
- Creates random positions for the gaps in the obstacles to enhance gameplay.
- Hardware:
- Terasic DE2-115 FPGA Development Board
- VGA Monitor
- Onboard Push Buttons
- Toggle Switches
- Software:
- Quartus Prime (HDL Development)
- ModelSim (Simulation)
- Python (Pixel Data Visualization)
- Fully functional Verilog code.
- Simulation results using ModelSim.
- Working demonstration on Terasic DE2-115 board.
- Weerakoon A. B. – 2020/E/169
Enjoy playing Flappy Bird on your FPGA board! 🎮