diff --git a/AR/07_memory/07_memory.tex b/AR/07_memory/07_memory.tex new file mode 100644 index 0000000..6b7e81f --- /dev/null +++ b/AR/07_memory/07_memory.tex @@ -0,0 +1,67 @@ +% Source: CPTR 280 Computer Organization and Assembly Language Fall 2023 +% File: "07 Memory (key).pdf" +% Author: James Foster, pogil@jgfoster.net + +% comment out for student version +% \ifdefined\Student\relax\else\def\Teacher{}\fi + +\documentclass[12pt]{article} + +\title{Activity 7: Memory} +\author{James Foster} +\newcommand{\activityeditor}{James Foster} +\newcommand{\activitysource}{\url{pogil@jgfoster.net}} +\date{Fall 2023} + +\input{../../cspogil.sty} +\usepackage{graphicx} +\usepackage{tabularx} + +\begin{document} + + \begin{center} + \maketitle + \rolenames + \end{center} + + \keyquestions{ + \item Model 1, Question \#10 + \item Model 2, Question \#14 + \item Model 3, Question \#21 + } + + \newpage + \maketitle + + In previous activities, we explored combinational logic circuits where outputs depend only on current inputs. + However, computers need to remember information—they need memory. This activity introduces sequential logic circuits, + where outputs depend on both current inputs and previous states. We'll build up from the simplest memory element (a flip-flop that stores one bit) + to more complex circuits that can store and retrieve multiple bits using addresses. Understanding how memory works at the hardware level is fundamental to + grasping how computers store programs, data, and maintain state during execution. + + \guides{ + \item Students will be able to explain how a flip-flop maintains state using feedback. + \item Students will be able to distinguish between level-triggered and edge-triggered D flip-flops. + \item Students will be able to describe how addressable memory uses select lines to read or write specific memory locations. + \item Students will be able to trace the flow of data through memory circuits. + }{ + \item Analyzing circuit diagrams to understand data storage and retrieval. + \item Comparing different types of flip-flops and their timing characteristics. + \item Collaborating to trace signals through sequential circuits and build understanding collectively. + }{ + No additional notes + }{ + \item \url{https://www.codehiddenlanguage.com/} + } + + \input{feedback.tex} + \newpage + \input{flip_flop.tex} + \newpage + \input{level_trigger_d_flip_flop.tex} + \newpage + \input{edge_triggered_d_flip_flop.tex} + \newpage + \input{addressable_memory.tex} + +\end{document} \ No newline at end of file diff --git a/AR/07_memory/addressable_memory.tex b/AR/07_memory/addressable_memory.tex new file mode 100644 index 0000000..391c964 --- /dev/null +++ b/AR/07_memory/addressable_memory.tex @@ -0,0 +1,70 @@ +\model{Addressable Memory} + + The latch from Model D has two inputs for each bit, a write line and a data line. If you were going to build many such latches + (think millions or billions), it would be nice to have a way to let them share the write and data lines and do the selection with fewer lines. + For example, a thousand separate locations could be identified with only 10 lines and a billion locations could be identified with 30 lines. + Think of each location as having a unique integer address. + + {\it\large Refer to Model 5 above as your team develops consensus answers + to the questions below.} + + \quest{10 min} + + \Q Consider the following 3-to-8 decoder. It has eight latches below (not shown), but only a single data in line and write line. A three-bit address is added on the left. + \vspace{10pt} + \begin{center} + \includegraphics[width=0.6\textwidth]{figures/decoder_fig13.png} + \par\vspace{5pt} + {\small Figure 13} + \end{center} + \begin{enumerate} + \item If the write line is 1 and each of the address lines (A0, A1, and A2) are 0, what are the output values for the 4-input AND gates labeled 7 to 0? + \vspace{10pt} + \begin{center} + \begin{tabular}{|c|c|c|c|c|c|c|c|} + \hline + 7 & 6 & 5 & 4 & 3 & 2 & 1 & 0 \\ + \hline + \ans[0.2in]{0} & \ans[0.2in]{0} & \ans[0.2in]{0} & \ans[0.2in]{0} & \ans[0.2in]{0} & \ans[0.2in]{0} & \ans[0.2in]{0} & \ans[0.2in]{1} \\ + \hline + \end{tabular} + \end{center} + + \item If the write line is 1 and each of the address lines are 1, what are the values for the 4-input AND gates labeled 7 to 0? + \vspace{10pt} + \begin{center} + \begin{tabular}{|c|c|c|c|c|c|c|c|} + \hline + 7 & 6 & 5 & 4 & 3 & 2 & 1 & 0 \\ + \hline + \ans[0.2in]{1} & \ans[0.2in]{0} & \ans[0.2in]{0} & \ans[0.2in]{0} & \ans[0.2in]{0} & \ans[0.2in]{0} & \ans[0.2in]{0} & \ans[0.2in]{0} \\ + \hline + \end{tabular} + \end{center} + + \item Generalize the relationship between the address lines and the AND gates. + \begin{answer}[0.75in] + The address lines make up a binary number equal to the AND gate number. + \end{answer} + \end{enumerate} + + \Q Just like it would be nice to have a single data-in line for many latches, it would be nice to have a single data-out line. + An 8-input OR gate would have a 1 output if any of the latches had a 1 output. How could you modify Figure 13 to select which latch to read? + (After thinking about it, see Figure 14 for a hint!) + \begin{answer}[1.5in] + Have each 4-input AND gate receive three inputs from the address lines (as before) but have the fourth input for each be the output of the respective flip-flop. + So the output of the AND gate would be 1 if the address selected that gate and the flip-flop had a 1 as well. + \end{answer} + + \vspace{10pt} + \begin{center} + \includegraphics[width=0.7\textwidth]{figures/addressable_memory_fig14.png} + \par\vspace{5pt} + {\small Figure 14} + \end{center} + + \vspace{10pt} + Figure 14 shows an addressable 8-bit array of memory. The address control lines specify which bit to read or write. There is a single data-in line that can be used to store to memory (if the write control line is enabled) and read from memory. + Instead of storing eight bits these circuits could be stacked eight high to store eight bytes. The address and write control lines would be shared, and the data lines would be unique for each bit of the byte (so 20 lines total). + Instead of having only eight locations (with a three-bit address), these circuits could be expanded to have (say) a 16-bit address and 65,536 locations (64 KiB of RAM). + We now have addressable memory! diff --git a/AR/07_memory/edge_triggered_d_flip_flop.tex b/AR/07_memory/edge_triggered_d_flip_flop.tex new file mode 100644 index 0000000..6554e8f --- /dev/null +++ b/AR/07_memory/edge_triggered_d_flip_flop.tex @@ -0,0 +1,24 @@ + \model{Edge-Triggered D-Type Flip-Flop} + + \quest{10 min} + + \Q What simple change would be required to have the flip-flop in Model C remember\key\\[-2.5mm] the data value when the write line is 0 (instead of 1)? + \begin{answer}[1in] + Add an inverter to the input so that it is interpreted as 1 instead of 0. + \end{answer} + + \Q The following figure shows two level-trigger D-type flip-flops, along with two inputs (write and data), and one output. + Connect the inputs so that the first flip-flop latches the data value when the write line is 0 (the switch is open). + Connect the second flip-flop so that it latches the output of the first flip-flop when the write line is 1. Connect the output of the second flip-flop to the LED on the right. + \vspace{10pt} + \begin{center} + \ifdefined\Teacher + \includegraphics[width=0.6\textwidth]{figures/edge_triggered_fig12_solution.png} + \else + \includegraphics[width=0.6\textwidth]{figures/edge_triggered_fig12.png} + \fi + \par\vspace{5pt} + {\small Figure 12} + \end{center} + + This circuit is an edge-triggered D-type flip-flop that latches a value only when the write line has a positive transition from 0 to 1. Note that Figure 12 is slightly different from that shown on page 229 of the text, but the behavior is the same (which do you like better and why?). diff --git a/AR/07_memory/feedback.tex b/AR/07_memory/feedback.tex new file mode 100644 index 0000000..b7d1b6b --- /dev/null +++ b/AR/07_memory/feedback.tex @@ -0,0 +1,63 @@ +\model{Feedback} + + Recall that a relay consists of a coil of wire around a ferromagnetic material (such as iron) with a switch that is pulled toward + the coil when electricity flows because the coil becomes magnetic. The switch connects an input signal or wire to one of two output + terminals depending on whether electricity is flowing. + + \vspace{10pt} + \begin{center} + \includegraphics[width=0.35\textwidth]{figures/oscillating_relay.png} + \par\vspace{5pt} + {\small Figure 1: Oscillating Relay} + \end{center} + + {\it\large Refer to Model 1 above as your team develops consensus answers + to the questions below.} + + \quest{10 min} + + \Q When the switch is open, does electricity flow through the circuit? + \hfill\ans[1in]{no} + + \Q When the switch is initially closed, does electricity start to flow through the circuit? + \begin{answer}[0.5in] + yes + \end{answer} + + \Q What happens to the coil on the relay soon after step 2? + \hfill\ans{It becomes magnetized} + + \Q What happens to the bar on the relay soon after step 3? + \hfill\ans{It switches (drops down) to the other pole} + + \Q What happens to the circuit after step 4? + \hfill\ans{Electricity stops flowing} + + \Q What happens to the coil soon after step 5? + \hfill\ans{It becomes demagnetized} + + \Q What happens to the bar soon after step 6? + \hfill\ans{It switches (up) to the top pole} + + \Q What happens to the circuit after step 7? + \hfill\ans{Electricity starts flowing again} + + \Q Summarize what happens when the switch is closed (steps 2-8). + \begin{answer}[0.75in] + The relay switches back and forth continuously. + \end{answer} + + \Q Recall that an inverter switches a 0 to 1 and a 1 to 0. What is the output of the\key\\[-2.5mm] following circuit? + \vspace{10pt} + \begin{center} + \includegraphics[width=0.3\textwidth]{figures/inverter_feedback.png} + \par\vspace{5pt} + {\small Figure 2: Inverter Feedback} + \end{center} + + \begin{answer}[0.75in] + It continuously switches between on and off. + \end{answer} + + \vspace{10pt} + Feedback occurs when the output of a circuit is ``fed back'' into the input of the circuit. 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gate is 1 only when both inputs are 0. + If either input is 1 then the output is 0.\\ + + {\it\large Refer to Model 2 above as your team develops consensus answers + to the questions below.} + + \quest{10 min} + + \Q Complete Figure 3 by showing both switches open and highlight (in red if you can) any portion of the circuit with high voltage (assuming both inputs to the left NOR are both 0). + \vspace{10pt} + \begin{center} + \ifdefined\Teacher + \includegraphics[width=0.5\textwidth]{figures/flipflop_fig3_solution.png} + \else + \includegraphics[width=0.5\textwidth]{figures/flipflop_fig3.png} + \fi + \par\vspace{5pt} + {\small Figure 3} + \end{center} + + \Q With the circuit in the state shown in Figure 3, imagine that Switch 1 is closed. Complete Figure 4 highlighting any portion of the circuit with high voltage. + \vspace{10pt} + \begin{center} + \ifdefined\Teacher + \includegraphics[width=0.5\textwidth]{figures/flipflop_fig4_solution.png} + \else + \includegraphics[width=0.5\textwidth]{figures/flipflop_fig4.png} + \fi + \par\vspace{5pt} + {\small Figure 4} + \end{center} + + \Q With the circuit in the state shown in Figure 4, imagine that Switch 1 is opened. Complete Figure 5 highlighting any portion of the circuit with high voltage. + \vspace{10pt} + \begin{center} + \ifdefined\Teacher + \includegraphics[width=0.5\textwidth]{figures/flipflop_fig5_solution.png} + \else + \includegraphics[width=0.5\textwidth]{figures/flipflop_fig5.png} + \fi + \par\vspace{5pt} + {\small Figure 5} + \end{center} + + \Q Both Figures 3 and 5 have both switches open. How are they different?\key\\[-2.5mm] + \begin{answer}[0.75in] + The light is off in Figure 3 and on in Figure 5. + \end{answer} + + \Q With the circuit in the state shown in Figure 5 (Switch 1 is open), imagine that Switch 2 is closed. Complete Figure 6 highlighting any portion of the circuit with high voltage. + \vspace{10pt} + \begin{center} + \ifdefined\Teacher + \includegraphics[width=0.5\textwidth]{figures/flipflop_fig6_solution.png} + \else + \includegraphics[width=0.5\textwidth]{figures/flipflop_fig6.png} + \fi + \par\vspace{5pt} + {\small Figure 6} + \end{center} + + \Q With the circuit in the state shown in Figure 6, imagine that Switch 2 is opened. Complete Figure 7 highlighting any portion of the circuit with high voltage. + \vspace{10pt} + \begin{center} + \ifdefined\Teacher + \includegraphics[width=0.5\textwidth]{figures/flipflop_fig7_solution.png} + \else + \includegraphics[width=0.5\textwidth]{figures/flipflop_fig7.png} + \fi + \par\vspace{5pt} + {\small Figure 7} + \end{center} \ No newline at end of file diff --git a/AR/07_memory/level_trigger_d_flip_flop.tex b/AR/07_memory/level_trigger_d_flip_flop.tex new file mode 100644 index 0000000..faa96bb --- /dev/null +++ b/AR/07_memory/level_trigger_d_flip_flop.tex @@ -0,0 +1,53 @@ +\model{Level-Trigger D-Type Flip-Flop} + + \quest{10 min} + + \Q Recall that an AND gate has an output of 1 only if both inputs are 1. In Figure 8 enter the value 0 for Write, Data, and output (Q). Highlight the lines that have high voltage for this state to exist. + \vspace{10pt} + \begin{center} + \ifdefined\Teacher + \includegraphics[width=0.5\textwidth]{figures/level_trigger_fig8_solution.png} + \else + \includegraphics[width=0.5\textwidth]{figures/level_trigger_fig8.png} + \fi + \par\vspace{5pt} + {\small Figure 8} + \end{center} + + \Q With the circuit in the state shown in Figure 8, imagine that Data changes from 0 to 1. Highlight the lines in Figure 9 that have high voltage and update Q. + \vspace{10pt} + \begin{center} + \ifdefined\Teacher + \includegraphics[width=0.5\textwidth]{figures/level_trigger_fig9_solution.png} + \else + \includegraphics[width=0.5\textwidth]{figures/level_trigger_fig9.png} + \fi + \par\vspace{5pt} + {\small Figure 9} + \end{center} + + \Q With the circuit in the state shown in Figure 9, imagine that Write changes from 0 to 1. Highlight the lines in Figure 10 that have high voltage and update Q. + \vspace{10pt} + \begin{center} + \ifdefined\Teacher + \includegraphics[width=0.4\textwidth]{figures/level_trigger_fig10_solution.png} + \else + \includegraphics[width=0.4\textwidth]{figures/level_trigger_fig10.png} + \fi + \par\vspace{5pt} + {\small Figure 10} + \end{center} + + \Q With the circuit in the state shown in Figure 10, imagine that Write changes from 1 to 0. Highlight the lines in Figure 11 that have high voltage and update Q. + \vspace{10pt} + \begin{center} + \ifdefined\Teacher + \includegraphics[width=0.6\textwidth]{figures/level_trigger_fig11_solution.png} + \else + \includegraphics[width=0.5\textwidth]{figures/level_trigger_fig11.png} + \fi + \par\vspace{5pt} + {\small Figure 11} + \end{center} + + We now have a circuit that latches onto (remembers) a data line only when the write line is 1. diff --git a/AR/08_automation_part_1/08_automation_part_1.tex b/AR/08_automation_part_1/08_automation_part_1.tex new file mode 100644 index 0000000..7a7d474 --- /dev/null +++ b/AR/08_automation_part_1/08_automation_part_1.tex @@ -0,0 +1,51 @@ +% Source: CPTR 280 Computer Organization and Assembly Language Fall 2023 +% File: "08 Automation (part 1) (key).pdf" +% Author: James Foster, pogil@jgfoster.net + +% comment out for student version +% \ifdefined\Student\relax\else\def\Teacher{}\fi + +\documentclass[12pt]{article} + +\title{Activity 8: Automation} +\author{James Foster} +\newcommand{\activityeditor}{James Foster} +\newcommand{\activitysource}{\url{pogil@jgfoster.net}} +\date{Fall 2023} + +\input{../../cspogil.sty} +\usepackage{graphicx} +\usepackage{tabularx} + +\begin{document} + + \begin{center} + \maketitle + \rolenames + \end{center} + + \keyquestions{ + \item Model 1, Question \#13 + \item Model 2, Question \#18 + } + + \newpage + \maketitle + + We have looked at basic logic gates and combined them into a circuit that can do 8-bit addition. Now we look at a programmable computer. + + \guides{ + \item given a simple instruction set, read, and write a program using machine code. + }{ + \item No additional process skills. + }{ + No additional notes + }{ + + } + + \input{infinite_addition.tex} + \newpage + \input{programable_computer.tex} + +\end{document} \ No newline at end of file diff --git a/AR/08_automation_part_1/figures/programmable_computer.png b/AR/08_automation_part_1/figures/programmable_computer.png new file mode 100644 index 0000000..8757a2d Binary files /dev/null and b/AR/08_automation_part_1/figures/programmable_computer.png differ diff --git a/AR/08_automation_part_1/figures/simple_addition.png b/AR/08_automation_part_1/figures/simple_addition.png new file mode 100644 index 0000000..70ea810 Binary files /dev/null and b/AR/08_automation_part_1/figures/simple_addition.png differ diff --git a/AR/08_automation_part_1/infinite_addition.tex b/AR/08_automation_part_1/infinite_addition.tex new file mode 100644 index 0000000..4ac20d2 --- /dev/null +++ b/AR/08_automation_part_1/infinite_addition.tex @@ -0,0 +1,109 @@ +\model{Infinite Addition} + + \vspace{10pt} + \begin{center} + \includegraphics[width=0.7\textwidth]{figures/simple_addition.png} + \par\vspace{5pt} + {\small Figure 1: Simple Addition} + \end{center} + + With digital logic circuits we can build various components: + \begin{itemize} + \item An oscillator with output that switches rapidly between 0 and 1; + \item A counter with 16-bit output that can be reset to all zeros and will increment on each ``clock tick'' (the oscillator has a change from 0 to 1); + \item Addressable memory that outputs an 8-bit value based on a 16-bit address (a separate control panel with various switches is used to manipulate memory and is not shown); + \item An adder that takes as input two 8-bit values and gives as output an 8-bit sum (carry in and out is ignored for now); + \item A latch that captures an input value at a clock tick (and can be reset); and, + \item Lights to show the current latch value. + \end{itemize} + + {\it\large Refer to Model 1 above as your team develops consensus answers + to the questions below.} + + \quest{25 min} + + \Q What is the size of the data path out of RAM? + \hfill\ans{8 bits} + + \Q What are the sizes of the data paths into and out of the Adder and Latch? + \hfill\ans[1in]{8 bits} + + \Q What is the size (number of bits) of the address path into RAM? + \hfill\ans[1.5in]{16 bits} + + \Q The range of values for a decimal digit is [0, 9]. What is the range of values for a hexadecimal digit? + \begin{answer}[0.5in] + [0, F] (yes, you could say [0, 15] but when we get to question 14 you should think of `F') + \end{answer} + + \Q How many bits are required to represent the full range of a single hexadecimal digit? (Hint: not 16!) + \begin{answer}[0.5in] + 4 bits + \end{answer} + + \Q How many hexadecimal digits can be represented on the address path into RAM? + \begin{answer}[0.5in] + 4 digits + \end{answer} + + \Q What happens to the Counter when you close the ``Clear'' switch? + \begin{answer}[0.5in] + The counter will be reset to all zeros. + \end{answer} + + \Q What happens to the Latch when you close the ``Clear'' switch? + \begin{answer}[0.5in] + The latch will be reset to all zeros. + \end{answer} + + \Q What happens to the Counter on a 0-to-1 clock tick? + \begin{answer}[0.5in] + The counter will increment by one. + \end{answer} + + \Q What happens to the Latch on a 1-to-0 clock tick? + \begin{answer}[0.5in] + The latch will capture the output of the adder. + \end{answer} + + \Q Describe the value on the data line coming out of RAM when the value on the address line into RAM is all zero bits (you might not be able to give an exact value). + \begin{answer}[0.5in] + The contents of location 0x0000 in RAM. + \end{answer} + + \Q Describe the value of the Counter + \begin{itemize} + \item after a clear, + \hfill\ans[1in]{0} + \item after one clock tick, + \hfill\ans[1in]{1} + \item and after N clock ticks. + \hfill\ans[1in]{N} + \end{itemize} + + \Q Describe the value of the Latch\key\\[-2.5mm] + \begin{itemize} + \item after a clear, + \hfill\ans[1in]{0} + + \item after one clock tick (hint: probably not 0 or 1), + \hfill\ans{The value of memory location 0x0000 (the sum of that and zero).} + + \item And after N clock ticks (hint: probably not N). + \hfill\ans{The sum of the first N memory locations.} + \end{itemize} + + \Q What is the maximum value of the Counter in hexadecimal (the convention for addresses)? (Hint: see question 6.) + \begin{answer}[0.5in] + 0xFFFF + \end{answer} + + \Q If the Counter is at the maximum value, what is the value after a clock tick? + \begin{answer}[0.5in] + 0 + \end{answer} + + \Q Does circuit ever stop? If, so, how? If not, why not? + \begin{answer}[0.5in] + No, the oscillator keeps running and incrementing the counter (which eventually wraps). + \end{answer} \ No newline at end of file diff --git a/AR/08_automation_part_1/programable_computer.tex b/AR/08_automation_part_1/programable_computer.tex new file mode 100644 index 0000000..8b3dd4b --- /dev/null +++ b/AR/08_automation_part_1/programable_computer.tex @@ -0,0 +1,133 @@ +\model{A Programmable Computer} + + \vspace{10pt} + \begin{center} + \includegraphics[width=0.85\textwidth]{figures/programmable_computer.png} + \par\vspace{5pt} + {\small Figure 2: Programmable Computer} + \end{center} + + Early computers were hard-wired to perform certain tasks, and this worked okay for well-defined tasks such as calculating logarithms or trigonometry functions. But building a new circuit for each new task is cumbersome and computer engineers looked for a more flexible approach. + + The circuit shown above demonstrates some enhancements. It has: + \begin{itemize} + \item a new memory module for code (having code in a separate module is less common now), + \item a decoder to interpret the instructions and set the appropriate control lines, + \item a control line to specify whether to read or write (store) memory, + \item a control line to stop the clock, + \item a control line to subtract instead of add, and + \item a separate control line to clear the latch (independent of the memory counter). + \end{itemize} + + \newpage + + {\it\large Refer to Model 2 above as your team develops consensus answers + to the questions below.} + + \quest{25 min} + + \Q The following table shows the five instructions supported by our computer. Convert the instruction codes from hexadecimal to binary and then identify what each bit means. + + \vspace{10pt} + \begin{center} + \begin{tabular}{|l|c|c|} + \hline + \textbf{Instruction} & \textbf{Hexadecimal Code} & \textbf{Binary Code} \\ + \hline + Add (data to latch) & 0x00 & 0000 0000 \\ + \hline + Clear (latch) & 0x01 & \ans[1in]{0000 0001} \\ + \hline + Subtract (data from latch) & 0x02 & \ans[1in]{0000 0010} \\ + \hline + Stop (the clock) & 0x04 & \ans[1in]{0000 0100} \\ + \hline + Store (latch to data) & 0x08 & \ans[1in]{0000 1000} \\ + \hline + \end{tabular} + \end{center} + + \begin{center} + \begin{tabular}{|c|c|c|c|c|} + \hline + \textbf{Bit} & 3 & 2 & 1 & 0 \\ + \hline + \textbf{Meaning} & \ans[0.6in]{Store} & \ans[0.6in]{Stop} & \ans[0.6in]{Subtract} & Clear \\ + \hline + \end{tabular} + \end{center} + + \vspace{5pt} + Note that bit 0 is the least significant (right-most) bit. + + \Q Describe the behavior of the decoder. How does it translate instruction codes\key\\[-2.5mm] to controls? (Hint: compare the binary code bits with the control lines coming from the decoder.) + \begin{answer}[0.5in] + It takes each bit from the instruction and puts it on a separate control line. Very simple! + \end{answer} + + \Q What is the relationship between a code address and a data address? + \begin{answer}[0.5in] + Always the same. + \end{answer} + + \Q If the instruction at memory address 0x100 in the memory module labeled Code is a Store, at what address in Data will it place a value? + \begin{answer}[0.5in] + Same: 0x100. + \end{answer} + + \newpage + + \Q Using the appropriate control panels, a programmer loaded five bytes of code and two bytes of data into memory. The remaining portions of both memory are undefined. Complete the ``Meaning'' column with the name of the instruction then ``execute'' the code showing what value is in the appropriate memory location and the latch after each instruction. Unspecified values should be indicated with a question mark (?). + \vspace{10pt} + \begin{center} + \begin{tabular}{|c|c|l|c|c|} + \hline + \textbf{Address} & \textbf{Code} & \textbf{Meaning} & \textbf{Data} & \textbf{Latch} \\ + \hline + 0x00 & 0x01 & \ans[1in]{Clear} & \ans[0.4in]{?} & \ans[0.4in]{0} \\ + \hline + 0x01 & 0x00 & \ans[1in]{Add} & 5 & \ans[0.4in]{5} \\ + \hline + 0x02 & 0x02 & \ans[1in]{Subtract} & 3 & \ans[0.4in]{2} \\ + \hline + 0x04 & 0x08 & \ans[1in]{Store} & \ans[0.4in]{2} & \ans[0.4in]{2} \\ + \hline + 0x08 & 0x04 & \ans[1in]{Stop} & \ans[0.4in]{?} & \ans[0.4in]{2} \\ + \hline + \end{tabular} + \end{center} + + \Q Write a program to calculate and store (11 + 6 -- 9) and then calculate and store (40 + 17). You need not use all memory. + + \vspace{10pt} + \begin{center} + \begin{tabular}{|c|c|l|c|c|} + \hline + \textbf{Address} & \textbf{Code} & \textbf{Meaning} & \textbf{Data} & \textbf{Latch} \\ + \hline + 0x00 & \ans[0.4in]{0x01} & \ans[1in]{Clear} & \ans[0.4in]{?} & \ans[0.4in]{0} \\ + \hline + 0x01 & \ans[0.4in]{0x00} & \ans[1in]{Add} & \ans[0.4in]{11} & \ans[0.4in]{11} \\ + \hline + 0x02 & \ans[0.4in]{0x00} & \ans[1in]{Add} & \ans[0.4in]{6} & \ans[0.4in]{17} \\ + \hline + 0x03 & \ans[0.4in]{0x02} & \ans[1in]{Subtract} & \ans[0.4in]{9} & \ans[0.4in]{8} \\ + \hline + 0x04 & \ans[0.4in]{0x08} & \ans[1in]{Store} & \ans[0.4in]{8} & \ans[0.4in]{8} \\ + \hline + 0x05 & \ans[0.4in]{0x01} & \ans[1in]{Clear} & \ans[0.4in]{?} & \ans[0.4in]{0} \\ + \hline + 0x06 & \ans[0.4in]{0x00} & \ans[1in]{Add} & \ans[0.4in]{40} & \ans[0.4in]{40} \\ + \hline + 0x07 & \ans[0.4in]{0x00} & \ans[1in]{Add} & \ans[0.4in]{17} & \ans[0.4in]{57} \\ + \hline + 0x08 & \ans[0.4in]{0x08} & \ans[1in]{Store} & \ans[0.4in]{57} & \ans[0.4in]{57} \\ + \hline + 0x09 & \ans[0.4in]{0x04} & \ans[1in]{Stop} & \ans[0.4in]{?} & \ans[0.4in]{57} \\ + \hline + 0x0A & \ans[0.4in]{?} & \ans[1in]{?} & \ans[0.4in]{?} & \\ + \hline + 0x0B & \ans[0.4in]{?} & \ans[1in]{?} & \ans[0.4in]{?} & \\ + \hline + \end{tabular} + \end{center} diff --git a/AR/09_automation_part_2/09_automation_part_2.tex b/AR/09_automation_part_2/09_automation_part_2.tex new file mode 100644 index 0000000..c97a378 --- /dev/null +++ b/AR/09_automation_part_2/09_automation_part_2.tex @@ -0,0 +1,52 @@ +% Source: CPTR 280 Computer Organization and Assembly Language Fall 2023 +% File: "09 Automation (part 2) (key).pdf" +% Author: James Foster, pogil@jgfoster.net + +% comment out for student version +% \ifdefined\Student\relax\else\def\Teacher{}\fi + +\documentclass[12pt]{article} + +\title{Activity 9: Addressable Memory} +\author{James Foster} +\newcommand{\activityeditor}{James Foster} +\newcommand{\activitysource}{\url{pogil@jgfoster.net}} +\date{Fall 2023} + +\input{../../cspogil.sty} +\usepackage{graphicx} +\usepackage{tabularx} + +\begin{document} + + \begin{center} + \maketitle + \rolenames + \end{center} + + \keyquestions{ + \item Model 1, Question \#5 + \item Model 2, Question \#11 + \item Model 3, Question \#20 + } + + \newpage + \maketitle + + We have looked a simple programmable computer. Now we add hardware and instructions for storing the code and the data in the same memory module. + + \guides{ + \item Do 16-bit math with 8-bit memory. + }{ + \item No additional process skills. + }{ + No additional notes + } + + \input{load_instruction.tex} + \newpage + \input{addressable_memory.tex} + \newpage + \input{multi_byte_numbers.tex} + +\end{document} \ No newline at end of file diff --git a/AR/09_automation_part_2/addressable_memory.tex b/AR/09_automation_part_2/addressable_memory.tex new file mode 100644 index 0000000..fa2dd60 --- /dev/null +++ b/AR/09_automation_part_2/addressable_memory.tex @@ -0,0 +1,79 @@ + \model{Addressable Memory} + + \vspace{10pt} + \begin{center} + \includegraphics[width=0.85\textwidth]{figures/addressable_memory.png} + \par\vspace{5pt} + {\small Figure 3: Addressable Memory} + \end{center} + + Figure 3 shows the final major enhancement to the computer we are building. + \begin{itemize} + \item To the 16-Bit Program Counter (PC) we have added a Set control line that allows us to set the next instruction address to a 16-bit value obtained from the bottom two 8-bit (address) latches. + \item The memory address for read/write is now specified by either the PC or the bottom two (address) latches based on a Select control line sent to the 2-1 Address Selector. + \item Instead of having separate memory for code and data, we now share the memory (reducing cost and increasing flexibility). + \item Instead of having a sequence of 8-bit instruction codes, we now have instructions made of an 8-bit opcode (operation code) followed by a 16-bit address (operand location). These values are read into the three latches shown in three consecutive clock ticks. + \item Not shown are the instruction Decoder (to the right of the arrow labeled ``Code''), the 8-Bit Adder and the 8-Bit Data Latch (to the right of the arrows labeled ``8-Bit Data''), and the control lines coming out from the Decoder (the endpoints are shown with the affected components). + \end{itemize} + + \newpage + + {\it\large Refer to Model 2 above as your team develops consensus answers + to the questions below.} + + \quest{15 min} + + \Q What was the previous instruction size? What is the new instruction size? By what factor has the overall size of the instructions increased? + \begin{answer}[0.5in] + Previous instruction size: 1; new instruction size: 3; instruction size grew by 3x. + \end{answer} + + \Q Assuming that we can still read only one byte per clock cycle and that the clock speed is the same, what is the impact on speed by the instruction size changes? + \begin{answer}[0.5in] + One-third the speed. + \end{answer} + + \Q In Figure 1, what happened to the counter on each clock tick? + \begin{answer}[0.5in] + Counter increases by one. + \end{answer} + + \Q In Figure 1, what can be done to change the value of the counter to something other than the next integer? What value(s) (if any) can be assigned to the program counter? + \begin{answer}[0.5in] + Clear will reset it to zero. + \end{answer} + + \Q What new control line is added to the program counter in Figure 3? What does it do? + \begin{answer}[0.5in] + Set0 will take the values from high and low latches and put it into the counter. + \end{answer} + + \Q What is the impact of allowing a ``Set'' instruction (``Jump'') for the Program\key\\[-2.5mm] Counter? + \begin{answer}[0.5in] + We can now specify an address for the next instruction, so loop or skip. + \end{answer} + + \Q In Figure 1, what determines which address in memory will be provided to the adder? + \begin{answer}[0.5in] + The counter. + \end{answer} + + \Q What new component is added in Figure 3 between the counter and the memory? + \begin{answer}[0.5in] + The 2-to-1 Address Selector and a Select control line. + \end{answer} + + \Q In Figure 3, what determines which address in memory will be provided as output? + \begin{answer}[0.5in] + The 2-to-1 Address Selector selects either the Counter or the High and Low Latches. + \end{answer} + + \Q What is the impact of allowing a load/add/store instruction to specify an address? + \begin{answer}[0.5in] + We can now select something other than the counter, so the data can be in a separate location from the code. + \end{answer} + + \Q A variation of the Jump command is a Conditional Jump where the change to the PC happens only on if some specified condition exists. What conditions would be interesting? + \begin{answer}[0.5in] + Zero, non-zero, carry on or off, value negative or positive. + \end{answer} \ No newline at end of file diff --git a/AR/09_automation_part_2/figures/8bit_adder.png b/AR/09_automation_part_2/figures/8bit_adder.png new file mode 100644 index 0000000..c05e3b0 Binary files /dev/null and b/AR/09_automation_part_2/figures/8bit_adder.png differ diff --git a/AR/09_automation_part_2/figures/add_with_carry.png b/AR/09_automation_part_2/figures/add_with_carry.png new file mode 100644 index 0000000..79bdc5d Binary files /dev/null and b/AR/09_automation_part_2/figures/add_with_carry.png differ diff --git a/AR/09_automation_part_2/figures/addressable_memory.png b/AR/09_automation_part_2/figures/addressable_memory.png new file mode 100644 index 0000000..707044a Binary files /dev/null and b/AR/09_automation_part_2/figures/addressable_memory.png differ diff --git a/AR/09_automation_part_2/figures/load_instruction.png b/AR/09_automation_part_2/figures/load_instruction.png new file mode 100644 index 0000000..a296d9b Binary files /dev/null and b/AR/09_automation_part_2/figures/load_instruction.png differ diff --git a/AR/09_automation_part_2/figures/programmable_computer_part2.png b/AR/09_automation_part_2/figures/programmable_computer_part2.png new file mode 100644 index 0000000..ca3013e Binary files /dev/null and b/AR/09_automation_part_2/figures/programmable_computer_part2.png differ diff --git a/AR/09_automation_part_2/load_instruction.tex b/AR/09_automation_part_2/load_instruction.tex new file mode 100644 index 0000000..4385a93 --- /dev/null +++ b/AR/09_automation_part_2/load_instruction.tex @@ -0,0 +1,78 @@ +\model{Load Instruction} + + \vspace{10pt} + \begin{center} + \includegraphics[width=0.7\textwidth]{figures/programmable_computer_part2.png} + \par\vspace{5pt} + {\small Figure 1: Programmable Computer} + \end{center} + + \vspace{10pt} + \begin{center} + \begin{tabular}{|l|c|c|} + \hline + \textbf{Instruction} & \textbf{Hexadecimal Code} & \textbf{Binary Code} \\ + \hline + Add (data to latch) & 0x00 & 0000 0000 \\ + \hline + Clear (latch) & 0x01 & 0000 0001 \\ + \hline + Subtract (data from latch) & 0x02 & 0000 0010 \\ + \hline + Stop (the clock) & 0x04 & 0000 0100 \\ + \hline + Store (latch to data) & 0x08 & 0000 1000 \\ + \hline + \end{tabular} + \end{center} + + Figure 1 (copied from the previous lesson) shows a simple programmable computer with the following characteristics: + \begin{itemize} + \item A counter with 16-bit output that will increment on each clock tick (it can be reset to zero with the Start control line), + \item Separate addressable memory for code and data that each output an 8-bit value based on the same 16-bit address (the value of the data memory can be set to the current data latch value by the Store control line), + \item An 8-bit adder that calculates the sum (or difference based on the Subtract control line) of the latch and the value from memory, + \item A latch that captures the result of the adder on each clock tick (or is cleared based on the Clear sum control line), and + \item A decoder that takes each 8-bit instruction and sets the control lines appropriately. + \end{itemize} + + \newpage + + {\it\large Refer to Model 1 above as your team develops consensus answers + to the questions below.} + + \quest{15 min} + + \Q In Figure 1, the data path into the latch comes from what component? + \hfill\ans[1in]{Adder} + + \Q In Figure 1, what two instructions are required to get the value of a single memory location into the latch? + (Hint: what would you add to a value to get the same value?) + \begin{answer}[0.5in] + Clear, Add + \end{answer} + + Figure 2 adds a new control line and a new component to our computer. + + \vspace{10pt} + \begin{center} + \includegraphics[width=0.5\textwidth]{figures/load_instruction.png} + \par\vspace{5pt} + {\small Figure 2: Load Instruction} + \end{center} + + \Q What are the new elements? + \hfill\ans{A 2-to-1 Selector and a Selection control line} + + \vspace{10pt} + A 2-to-1 Selector will pass on one of two inputs based on a control line. In this configuration, if the control line is 0, + then the value from the adder will be passed to the latch. If the control line is 1, then the value from memory will be passed to the latch. + + \Q How does this circuit simplify loading a value from memory into the latch? + \begin{answer}[0.5in] + Now it takes only one instruction. + \end{answer} + + \Q Suggest a name and a code for this instruction. (Hint: see the name of Figure 2\key\\[-2.5mm] and the pattern of hexadecimal codes used for previous instructions.) + \begin{answer}[0.5in] + Load (0x10) + \end{answer} \ No newline at end of file diff --git a/AR/09_automation_part_2/multi_byte_numbers.tex b/AR/09_automation_part_2/multi_byte_numbers.tex new file mode 100644 index 0000000..99ab6dc --- /dev/null +++ b/AR/09_automation_part_2/multi_byte_numbers.tex @@ -0,0 +1,117 @@ +\model{Multi-Byte Numbers} + + {\it\large Refer to Model 3 above as your team develops consensus answers + to the questions below.} + + \quest{20 min} + + \Q Consider the expression with two unsigned integers: (1100 0001$_2$ + 0100 0011$_2$). + \begin{itemize} + \item What is the binary sum? + \hfill\ans{1 0000 0100} + \item How many bits are required for the answer? + \hfill\ans{9} + \end{itemize} + + \Q Consider the 8-Bit Adder shown in Figure 4. + \vspace{10pt} + \begin{center} + \includegraphics[width=0.3\textwidth]{figures/8bit_adder.png} + \par\vspace{5pt} + {\small Figure 4: 8-Bit Adder} + \end{center} + \begin{itemize} + \item What are the data path widths (number of bits) for A, B, and Sum? + \hfill\ans[1.5in]{8, 8, and 8} + + \item What are the data path widths for Carry In and Carry Out? + \hfill\ans[1in]{1 and 1} + + \item How is this 8-Bit Adder different from the one shown in Figure 1? + \begin{answer}[0.75in] + It has a carry in and carry out. + \end{answer} + + \item If you were to use this 8-Bit Adder in the circuit shown in Figure 1, what value would you need for Carry In? + What circuit component (from an earlier lesson) would you attach to the Carry In line to do proper math? + \begin{answer}[1in] + Carry in should always be zero; this can be achieved with ground. + \end{answer} + + \item What component would you add to the Carry Out line to ignore the overflow bit? + \begin{answer}[0.75in] + Carry out could be attached to ground. + \end{answer} + + \item If the carry lines are ignored for simple 8-bit addition, why do they exist? + \begin{answer}[0.75in] + So that we can do complex addition (say, 16-bit values). + \end{answer} + \end{itemize} + + \vspace{-40pt} + + \Q Consider the expression with two unsigned hexadecimal integers: (2345$_{16}$ + 3456$_{16}$)\key\\[-2.5mm] + \begin{itemize} + \item How many bits are required for each number? + \begin{answer}[0.5in] + 4 bits for each digit, so 16-bits for each number. + \end{answer} + + \item How many bits are required to represent the sum? + \begin{answer}[0.5in] + The value 579B$_{16}$ is also just 16 bits. + \end{answer} + + \item Describe how you would use an 8-Bit Adder to perform this operation. + \begin{answer}[1.5in] + Add the low-order bytes: 45$_{16}$ + 56$_{16}$ = 9B$_{16}$ \\ + Add the high-order bytes: 23$_{16}$ + 34$_{16}$ = 57$_{16}$ \\ + Combine the high-order and low-order bytes to get the result of 579B$_{16}$ + \end{answer} + \end{itemize} + + \Q Consider the expression with two unsigned hexadecimal integers: (2385$_{16}$ + 3496$_{16}$). + \begin{itemize} + \item How would you use the Carry In line to add the low-order 8 bits (85$_{16}$ + 96$_{16}$)? + \begin{answer}[0.75in] + The carry-in value should be zero. + \end{answer} + + \item How would you use the Carry In line to add the high-order 8 bits? + \begin{answer}[1in] + The carry-in value for the high-order addition should be the (saved) carry out for the low-order addition. + \end{answer} + + \item Suggest a name for this new kind of Add command. + \begin{answer}[0.75in] + Add with carry. + \end{answer} + \end{itemize} + + \Q What does the circuit in Figure 1 use to hold intermediate 8-bit sums? + \begin{answer}[0.75in] + An 8-bit latch. + \end{answer} + + \Q What has been added in Figure 5 compared to Figure 4? + \vspace{10pt} + \begin{center} + \includegraphics[width=0.35\textwidth]{figures/add_with_carry.png} + \par\vspace{5pt} + {\small Figure 5: Add with Carry} + \end{center} + + \begin{answer}[0.75in] + A Use Carry control line and a carry buffer or latch. + \end{answer} + + \Q If we used 0x20 as the code for the Add with Carry instruction, how would it differ from the Add instruction code? + \begin{answer}[1in] + It has a 1 in bit 5 (the 6th bit from the right), while all other are 0. + \end{answer} + + \Q If we attached bit 5 of the instruction decoder to the ``Use Carry'' control line, what logic gate(s) would provide the desired behavior? + \begin{answer}[1in] + An AND gate would have a 1 out if both the carry latch and the use carry control line are 1. + \end{answer} \ No newline at end of file diff --git a/AR/10_characters/10_characters.tex b/AR/10_characters/10_characters.tex new file mode 100644 index 0000000..714ceec --- /dev/null +++ b/AR/10_characters/10_characters.tex @@ -0,0 +1,63 @@ +% Source: CPTR 280 Computer Organization and Assembly Language Fall 2023 +% File: "10 Characters (key).pdf" +% Author: James Foster, pogil@jgfoster.net + +% comment out for student version +% \ifdefined\Student\relax\else\def\Teacher{}\fi + +\documentclass[12pt]{article} + +\title{Activity 10: Characters} +\author{James Foster} +\newcommand{\activityeditor}{James Foster} +\newcommand{\activitysource}{\url{pogil@jgfoster.net}} +\date{Fall 2023} + +\input{../../cspogil.sty} +\usepackage{graphicx} +\usepackage{tabularx} + +\begin{document} + + \begin{center} + \maketitle + \rolenames + \end{center} + + \keyquestions{ + \item Model 1, Question \#5 + \item Model 3, Question \#15 + \item Model 4, Question \#35 + } + + \newpage + \maketitle + + In our discussion of encoding (lesson 1) we noted that characters (including letters, numbers, and punctuation) could be represented as a glyph (using ink on paper), as a gesture (using American Sign Language), as a combination of short and long tones (Morse Code), or as raised dots on paper (Braille). At the end of the lesson on subtraction (lesson 6) we noted that anything that can be mapped to discrete values, like the form of the British invasion (``one if by land, two if by sea''), could be encoded as binary numbers. + + In this lesson we look at encoding printable characters as numeric codes. + + \guides{ + \item Identify the range of codes used for ASCII; + \item Describe the types of characters included in Unicode; and, + \item Describe the difference between a character codepoint and an encoding. + }{ + \item Translate characters to and from ASCII given a chart. + }{ + No additional notes + }{ + \item Figure 1: \url{https://en.wikipedia.org/wiki/File:ASCII-Table-wide.svg} + \item Figure 2: \url{https://en.wikipedia.org/wiki/ISO/IEC_8859-1} + \item Unicode: \url{https://en.wikipedia.org/wiki/Unicode} + \item UTF-8: \url{https://en.wikipedia.org/wiki/UTF-8} + } + + \input{character_codes.tex} + \newpage + \input{ascii.tex} + \newpage + \input{code_pages.tex} + \newpage + \input{unicode.tex} + +\end{document} \ No newline at end of file diff --git a/AR/10_characters/ascii.tex b/AR/10_characters/ascii.tex new file mode 100644 index 0000000..c103288 --- /dev/null +++ b/AR/10_characters/ascii.tex @@ -0,0 +1,37 @@ +\model{ASCII} + + \vspace{10pt} + \begin{center} + \includegraphics[width=0.9\textwidth]{figures/ascii_table.png} + \par\vspace{5pt} + {\small Figure 1: ASCII Table} + \end{center} + + The American Standard Code for Information Interchange (ASCII) was formalized in 1967 and is the standard set of character codes to represent + English letters (uppercase and lowercase), Arabic numerals, basic punctuation, and a number of control codes. + + {\it\large Refer to Model 2 above as your team develops consensus answers + to the questions below.} + + \quest{5 min} + + \Q How many codes are defined in ASCII? What is the range (start to end) of values? + \begin{answer}[0.2in] + 128 codes in the range of 0 to 127 (0x00 to 0x7F). + \end{answer} + + \Q How many bits are required to represent one ASCII code? + \hfill\ans{7 bits} + + \Q What are the hexadecimal codes for ``ASCII''? + \hfill\ans{41 53 43 49 49} + + \Q What characters are represented by the hexadecimal codes 54 61 62 6C 65? + \begin{answer}[0.2in] + T a b l e + \end{answer} + + \Q Give an example of a control character (0x00 to 0x20 and 0x7F) that would commonly appear in regular text. + \begin{answer}[0.2in] + Line feed (0x0A), carriage return (0x0D), or space (0x20) + \end{answer} diff --git a/AR/10_characters/character_codes.tex b/AR/10_characters/character_codes.tex new file mode 100644 index 0000000..0181a4d --- /dev/null +++ b/AR/10_characters/character_codes.tex @@ -0,0 +1,44 @@ +\model{Character Codes} + + Four our purposes, a character is a letter, number, punctuation, or other symbol used in writing. Each character is an abstraction that can be represented in print + (ink on paper or pixels on a screen) using a glyph from a font. So `A' and `A' are the same character represented with a different font (Times New Roman and Arial respectively). + The same character can also be represented as a gesture (using American Sign Language), as a combination of short and long tones (Morse Code), or as raised dots on paper (Braille). + + A number is written as a sequence of digits (characters) in a base such as decimal, octal, or hexadecimal (see lesson 3). A character such as `F' can be used as a letter + (in the name ``Foster'') or as a digit (in the hexadecimal number ``0xFF'').\\ + + {\it\large Refer to Model 1 above as your team develops consensus answers + to the questions below.} + + \quest{5 min} + + \Q How many digits (characters) are in the number 99324? + \hfill\ans{5 digits} + + \Q How many bits are required to specify codes for the decimal digits (0-9)? (Hint: not ten!) + \begin{answer}[0.5in] + 4 bits + \end{answer} + + \Q How many bits are required to specify codes for the uppercase English letters (A-Z)? + \begin{answer}[0.5in] + 5 bits + \end{answer} + + \Q How many bits are required to specify codes for the uppercase English letters (A-Z), the lowercase English letters (a-z), and the decimal digits (0-9)? + \begin{answer}[0.5in] + 6 bits + \end{answer} + + \vspace{-20pt} + + \Q How many bits are required to specify codes for the uppercase English letters (A-Z),\key\\[-2.5mm] the lowercase English letters (a-z), the decimal digits (0-9), and a dozen or so punctuation characters? + \begin{answer}[0.5in] + 7 bits + \end{answer} + + \Q How many bits are in a byte? + \hfill\ans{8 bits} + + \Q How many unique codes (values) can be stored in 8 bits? + \hfill\ans{256 values} \ No newline at end of file diff --git a/AR/10_characters/code_pages.tex b/AR/10_characters/code_pages.tex new file mode 100644 index 0000000..bf150b8 --- /dev/null +++ b/AR/10_characters/code_pages.tex @@ -0,0 +1,96 @@ +\model{Code Pages} + + While ASCII was fine in America (it is, after the American Standard \ldots), other countries had reason to need character encoding as well. + Even English-speaking countries, like England, would want to use a currency symbol (`\pounds') that is not provided in ASCII.\\ + + {\it\large Refer to Model 3 above as your team develops consensus answers + to the questions below.} + + \quest{10 min} + + \Q Are there any codes are available in a byte that are not used by ASCII (hint: see questions 7 \& 8)? If so, how many? What is their range? + \begin{answer}[0.5in] + Yes, there are 128 codes in the range 128 to 255 (0x80 to 0xFF). + \end{answer} + + \vspace{10pt} + In the closing decades of the 20th century codes were defined for a variety of geographical regions. ISO/IEC 8859 defined fifteen code sets or ``Parts'' that each keep ASCII in the lower half of the 8-bit range and in the upper half add just under 100 region-specific characters. + + \vspace{10pt} + \begin{center} + \begin{tabular}{|c|c|} + \hline + Part 1 & Latin-1 Western European \\ + \hline + Part 2 & Latin-2 Central European \\ + \hline + Part 3 & Latin-3 South European \\ + \hline + Part 4 & Latin-4 North European \\ + \hline + Part 5 & Latin/Cyrillic \\ + \hline + Part 6 & Latin/Arabic \\ + \hline + Part 7 & Latin/Greek \\ + \hline + Part 8 & Latin/Hebrew \\ + \hline + Part 9 & Latin-5 Turkish \\ + \hline + Part 10 & Latin-6 Nordic \\ + \hline + Part 11 & Latin/Thai \\ + \hline + Part 13 & Latin-7 Baltic Rim \\ + \hline + Part 14 & Latin-8 Celtic \\ + \hline + Part 15 & Latin-9 \\ + \hline + Part 16 & Latin-10 South-Eastern European \\ + \hline + \end{tabular} + \end{center} + + \newpage + Part 1 has characters for the following Western European languages: Danish, Dutch, English, Faeroese, Finnish, French, German, + Icelandic, Irish, Italian, Norwegian, Portuguese, Rhaeto-Romantic, Scottish Gaelic, Spanish, Catalan, and Swedish and is shown in the Figure 2. + + \vspace{10pt} + \begin{center} + \includegraphics[width=0.85\textwidth]{figures/iso_8859_1.png} + \par\vspace{5pt} + {\small Figure 2: ISO 8859-1} + \end{center} + + \Q What does the inclusion of Hebrew (Part 8) in this list say about the number of characters in the Hebrew alphabet? + What is a rough estimate of the upper limit? + \begin{answer}[0.5in] + The total number of characters in the Hebrew alphabet is well under 100. + \end{answer} + + \Q While the code page approach allows many languages to be represented, each\key\\[-2.5mm] Part can use the same code for a different character, + so 0xAA is `\={E}' in Part 4 and `\v{S}' in Part 10. So, while documents written in Part 8 (Hebrew) can be read by other users in Israel, + the document would be gibberish to someone in the United States (using Part 1), even if that person was fluent in Hebrew because the computer + would present the wrong character for a particular code. When using Code Pages, what information needs to accompany every string of text (document, email, etc.)? + \begin{answer}[0.5in] + Every string of text must be accompanied by the Code Page used to interpret it. + \end{answer} + + \Q Because each Part uses ASCII for the first 128 values, (American) English can be shared with another language (that is, Part 6 supports English and Arabic while Part 8 + supports English and Hebrew). But a computer can generally run in only one mode at a time (using a specific Part to describe its character set). What problem does this present? + \begin{answer}[0.5in] + A document cannot have text from different Code Pages, such as Arabic and Hebrew. + \end{answer} + + \Q China, Japan, and Korea had as much or more need for computer support as many of the countries supported by ISO/IEC 8859 (Japan was---and is---more technologically advanced than, say, Turkey or Thailand), + yet there was no eight-bit encoding for their alphabets. What characteristic of their alphabets would make 8-bit encoding impossible? + \begin{answer}[0.5in] + Instead of having less than 100 characters in their alphabets, they have several thousand characters. + \end{answer} + + \Q Because memory is typically addressed in units of a byte, data is typically coded into multiples of a byte. How many bits are in two bytes? What is the range of values that can be encoded in two bytes? + \begin{answer}[0.5in] + Two bytes contain sixteen bits and can hold values from 0 to 65535 (0x0000 to 0xFFFF). + \end{answer} \ No newline at end of file diff --git a/AR/10_characters/figures/ascii_table.png b/AR/10_characters/figures/ascii_table.png new file mode 100644 index 0000000..99199b0 Binary files /dev/null and b/AR/10_characters/figures/ascii_table.png differ diff --git a/AR/10_characters/figures/hieroglyph.png b/AR/10_characters/figures/hieroglyph.png new file mode 100644 index 0000000..5604e37 Binary files /dev/null and b/AR/10_characters/figures/hieroglyph.png differ diff --git a/AR/10_characters/figures/iso_8859_1.png b/AR/10_characters/figures/iso_8859_1.png new file mode 100644 index 0000000..8e01859 Binary files /dev/null and b/AR/10_characters/figures/iso_8859_1.png differ diff --git a/AR/10_characters/figures/utf8_encoding.png b/AR/10_characters/figures/utf8_encoding.png new file mode 100644 index 0000000..8b898ac Binary files /dev/null and b/AR/10_characters/figures/utf8_encoding.png differ diff --git a/AR/10_characters/unicode.tex b/AR/10_characters/unicode.tex new file mode 100644 index 0000000..995b2ba --- /dev/null +++ b/AR/10_characters/unicode.tex @@ -0,0 +1,185 @@ +\model{Unicode} + + Unicode was created to provide a unique, unified, universal (notice the repetition of `u'!) encoding of all characters in common use in all modern languages. The goal was to support any text used in a recently published newspaper or magazine, + and this was expected to be far below $2^{14}$ or 16,384 so would fit comfortably in 16 bits. Not surprisingly, more and more characters were added and Unicode 14.0 (March 2020) specifies 143,859 characters, each with its own unique number or codepoint. + A codepoint is denoted as U+0000 through U+10FFFF (``U+'' plus the code point value in hexadecimal, prepended with leading zeros as necessary to result in a minimum of four digits, e.g., U+00F7 for the division sign, $\div$, versus U+13254 for the Egyptian hieroglyph designating a reed shelter or a winding wall: + \includegraphics[height=1em]{figures/hieroglyph.png}). + + The first 256 codepoints match ISO/IEC 8859 Part 1 Latin-1 Western European (introduced above), so the first 128 codepoints match ASCII.\\ + + {\it\large Refer to Model 4 above as your team develops consensus answers + to the questions below.} + + \quest{30 min} + + \Q How many unique codes can be represented in 2 bytes (feel free to use a calculator)? Is two bytes sufficient to represent a full Unicode character? + \begin{answer}[0.5in] + Two bytes can represent 65,536 codes which is not enough to represent all codepoints. + \end{answer} + + \Q Computer manufacturers tend to use powers of two for words (processor byte sizes). This allows backwards compatibility (a single four-byte register holds exactly + two 16-bit values, while a three-byte register could hold only one 16-bit value). The following shows the history of Intel's CPU architecture: + \begin{enumerate} + \item 8-bit words in the Intel 8008 (1972) + \item 16-bit words in the Intel 8086 (1978) + \item 32-bit words in the Intel 30368 (1985) + \item 64-bit words in the Intel Pentium 4 (2004) + \end{enumerate} + + Which word size from the above list would be the most compact form to hold any Unicode codepoint? + \begin{answer}[0.75in] + 32-bit (four-byte) words would be needed to hold the maximum codepoint. + \end{answer} + + \Q Given a document containing approximately 10,000 ASCII characters, about how kilobytes (thousand bytes) will the file size be if stored as one-byte characters? + \begin{answer}[0.75in] + A file with 10,000 8-bit characters size will be about 10 KB. + \end{answer} + + \Q Unicode's ``Base Multilingual Plane'' (BMP) uses codepoints from U+0000 to U+FFFF and contains characters for almost all modern languages, including Chinese, Japanese, and Korean characters. + How many bytes are required to represent a character in the BMP? + \begin{answer}[0.5in] + U+0000 to U+FFFF requires 16 bits or 2 bytes. + \end{answer} + + \Q If each codepoint were saved as a two-byte value, about how big (in KB) would a file be that had approximately 10,000 characters? If those characters all happened to be in the ASCII range, how much space would be ``wasted'' with zero-filled bytes? + \begin{answer}[1in] + A file with 10,000 16-bit characters would take 20 KB of which half would be zero bytes if the characters were all ASCII. + \end{answer} + + \Q If each codepoint were saved as a four-byte value, about how big (in KB) would a file be that had approximately 10,000 characters? If those characters all happened to be in the ASCII range, how much space would be ``wasted'' with zero-filled bytes? + \begin{answer}[1in] + A file with 10,000 32-bit characters would take 40 KB of which three-quarters would be zero bytes if the characters were all ASCII. + \end{answer} + + \vspace{10pt} + If four bytes were used to store each character, a great deal of space would be wasted, particularly in the United States where most text is ASCII (but also in the rest of the world where the BMP requires only two bytes). + Unicode defines various encodings that can be used to store character's codepoint in memory. Note that there is a difference between a codepoint (the number for a character) and the encoding of the codepoint (how it is represented in memory). + + As discussed in Lesson 1, a common way to get more codes from a limited range is to use an escape code. An escape code indicates that the subsequent item is to be interpreted in an alternate manner. For example, in Braille, one code isn't an actual character but is used to indicate that the character that follows is uppercase (instead of the default of lowercase). + + \Q If an `a' takes one Braille space, how many spaces does an `A' take? If approximately 2\% of text is uppercase, about how many spaces would be taken by a document with 10,000 characters? + \begin{answer}[0.5in] + In Braille the `A' character would take 2 spaces and a document with 10,000 characters would take about 10,200 spaces. + \end{answer} + + \Q If you were given an offset into a Braille document for a letter that might be uppercase, what would you need to do to determine if it was uppercase or lowercase? + \begin{answer}[0.5in] + You would need to check the previous character to see if it was the escape code. + \end{answer} + + \Q What is the range of codes used by the BMP (hint: see question 22)? + \begin{answer}[0.5in] + U+0000 to U+FFFF + \end{answer} + + \Q What is the range of codes for all of Unicode (hint: see the beginning of this section)? + \begin{answer}[0.5in] + U+0000 to U+10FFFF + \end{answer} + + \Q What is the range of codes not in the BMP? + \begin{answer}[0.5in] + U+10000 to U+10FFFF + \end{answer} + + \Q What is the size of the non-BMP range in hexadecimal? (Hint: max -- min + 1) + \begin{answer}[0.5in] + 0x100000 + \end{answer} + + \Q How many bits are required to represent the non-BMP range (not codepoints)? + \begin{answer}[0.5in] + The values 0x0 to 0xFFFFF can be represented in 20 bits. + \end{answer} + + \Q Unicode reserves 2048 codepoints in the BMP (from 0xD800 to 0xDFFF) that are not used as characters but as surrogates for characters outside the BMP. Convert the minimum and maximum surrogate codepoints to binary: + \begin{answer}[1in] + 0xD800 = 1101 1000 0000 0000 \\ + 0xDFFF = 1101 1111 1111 1111 + \end{answer} + + \Q What bit values and positions indicates that a codepoint is not a character but a surrogate? + \begin{answer}[0.5in] + The pattern ``1101 1'' as the top (high order) five bits. + \end{answer} + + \Q In a two-byte word, how many bits does that leave for the surrogate (non-BMP) codepoint? + \begin{answer}[0.5in] + Eleven of the 16 bits are left. + \end{answer} + + \Q If a non-BMP codepoint were stored in two surrogate words, we could use\key\\[-2.5mm] one bit to indicate whether this is the first (0) or second (1) surrogate word. How many bits per surrogate does that leave for the non-BMP codepoint? If two surrogates are used to encode a non-BMP codepoint, how many bits are available? How does this compare to the number of bits needed (see question 31)? + \begin{answer}[1.5in] + With the five bits to indicate a surrogate and one bit to indicate which surrogate, this leaves ten bits for the non-BMP codepoint (per 16-bit word). Given two surrogate words, there are 20 bits available for the non-BMP range---which is exactly what is needed. + \end{answer} + + \vspace{10pt} + UTF-16 is a variable-length Unicode encoding that uses 16 bits for BMP codepoints (including ASCII), storing the codepoint as data, and 32 bits for non-BMP codepoints, breaking the codepoint over two surrogate words. It is used internally by Java, JavaScript, and (until recently) Microsoft Windows. + + A similar variable-length approach has been used to define UTF-8. + + \vspace{10pt} + \begin{center} + \includegraphics[width=0.8\textwidth]{figures/utf8_encoding.png} + \par\vspace{5pt} + {\small Figure 3: UTF-8 Encoding} + \end{center} + + \Q In UTF-8, how many bytes are required to encode the full range of ASCII? (Hint: see question 8.) + \begin{answer}[0.5in] + UTF-8 encodes all ASCII characters in one byte. + \end{answer} + + \Q Recall that ISO 8859-1 defines one-byte character codes that support much of Western Europe. In UTF-8, how many bytes are required to encode non-ASCII codes from ISO 8859-1? + \begin{answer}[0.5in] + UTF-8 requires two bytes for non-ASCII codes from ISO 8859-1. + \end{answer} + + \Q In UTF-8, how many bytes are required to encode the majority of BMP codepoints? + \begin{answer}[0.5in] + UTF-8 requires three bytes for most BMP codepoints. + \end{answer} + + \Q In UTF-8, how many bytes are required to encode non-BMP codepoints? + \begin{answer}[0.5in] + UTF-8 requires four bytes for non-BMP codepoints. + \end{answer} + + \Q Is there any size difference between encoded ASCII and the same characters in UTF-8? + \begin{answer}[0.5in] + No, in each case a character takes one byte. + \end{answer} + + \Q If most of your characters were ASCII, which (if any) would be more compact, UTF-8 or UTF-16? + \begin{answer}[0.5in] + UTF-8 would be more compact. + \end{answer} + + \Q If most of your characters were Western European, which (if any) would be more compact, UTF-8 or UTF-16? + \begin{answer}[0.5in] + Although the encodings would be different, the size would be essentially the same. + \end{answer} + + \Q If most of your characters were East Asian (Chinese, Japanese, or Korean), which (if any) would be more compact, UTF-8 or UTF-16? + \begin{answer}[0.5in] + UTF-16 would be more compact. + \end{answer} + + \Q In UTF-8, what distinguishes a single-byte character from a multi-byte character? + \begin{answer}[0.5in] + The single-byte character has a zero as the high-order bit while a multi-byte character has a one as the high-order bit in every byte. + \end{answer} + + \Q In UTF-8, what distinguishes the first byte of a multi-byte character from the subsequent bytes? + \begin{answer}[0.5in] + The first byte of a multi-byte character has a one as the second most significant bit while the remaining bytes in a multi-byte character have zero as the second most significant bit. + \end{answer} + + \Q If you were given an arbitrary byte offset into a UTF-8 encoded string, how would you determine the number of bytes? + \begin{answer}[0.5in] + If the high-order bit is zero, then it is a one-byte character. If the high-order bit is one, then it is a multi-byte character and you need to find the beginning. If the second most significant bit is one, then you are at the beginning of the character. If not, then move back one byte at a time till you find the first byte. From that byte you can determine the number of bytes by counting the number of consecutive high-order bits set to 1 (see Figure 3). + \end{answer} + + \vspace{10pt} + UTF-8 accounts for the vast majority of all web pages (over 95\%) and is the default for use in Microsoft Windows (as of 2019). \ No newline at end of file