Skip to content

hi,i am using system verilog language, and i have set this below in my setting json, but there is nothing happened,could you please give me some guide to make this work #17

@ezio1996

Description

@ezio1996

"[systemverilog]":{
"bracketLens.languageConfiguration": {
"word": [
{
"opening": "begin",
"closing": "end",
"headerMode": "smart",
"inters": []
}
],
"symbol": [
{
"opening": "{",
"closing": "}",
"headerMode": "smart",
"inters": []
},
]
}
}

this is my SV code:

class test_my extends uvm_test;

int value;

function new(string name = "test_my ");
    if (value==0) begin 
        `uvm_info("WHERE_PRINT","get one transaction, copy and print it:", UVM_LOW)    
    end 
    else if (value==1) begin
        `uvm_info("WHERE_PRINT","get one transaction, copy and print it:", UVM_LOW)
    end 
endfunction: new

endclass: test_my

Metadata

Metadata

Assignees

No one assigned

    Labels

    No labels
    No labels

    Projects

    No projects

    Milestone

    No milestone

    Relationships

    None yet

    Development

    No branches or pull requests

    Issue actions