How to handle "30525: Illegal instruction (hart 0) at PC 0x0000208c: 0x304022f3"?

[deeplearner92]

Upon executing the test code example given in the Simulation - Vicuna documentation (https://vicuna.readthedocs.io/en/latest/01_user/simulation.html), although I am able to get the outputs, I am getting an additional line "30525: Illegal instruction (hart 0) at PC 0x0000208c: 0x304022f3". Any idea to resolve this? I have set up the environment along with the paths correctly.

[AlfredoRodrigues4]

From what I've seen, to finish the simulation, they do an invalid operation, if we replace “asm volatile(”jr x0“);” with a “while(1);” the program doesn't give an error but it doesn't finish.

[Joao-Pedro-Cabral]

Hello, I think I know what's happening, the problem is because we set the SYSTEM opcode as one of the co-processor opcodes (because of the RVV CSRs).

However, when doing asm volatile(”jr x0“);, it causes an exception, which calls the interrupt handler that access the normal Machine CSRs.
So the problem arises when the ibex decoder redirects this CSR instruction to the vector core, which doesn't know how to handle generic CSR instructions, then generating an illegal instruction.