From dc50a50940730c210ccf6598ceefcaa50c4c1dc3 Mon Sep 17 00:00:00 2001 From: Abner Chang Date: Mon, 28 Jun 2021 17:43:46 +0800 Subject: [PATCH 01/17] Qemu/RiscvVirt: RISC-V OVMF platform. Cc: Daniel Schaefer --- Platform/Qemu/RiscvVirt/RiscvVirt.dec | 25 + Platform/Qemu/RiscvVirt/RiscvVirt.dsc | 636 ++++++++++++++++++ Platform/Qemu/RiscvVirt/RiscvVirt.fdf | 352 ++++++++++ Platform/Qemu/RiscvVirt/RiscvVirt.fdf.inc | 92 +++ Platform/Qemu/RiscvVirt/RiscvVirt.uni | 13 + Platform/Qemu/RiscvVirt/RiscvVirtPkgExtra.uni | 12 + Platform/Qemu/RiscvVirt/VarStore.fdf.inc | 78 +++ 7 files changed, 1208 insertions(+) create mode 100644 Platform/Qemu/RiscvVirt/RiscvVirt.dec create mode 100644 Platform/Qemu/RiscvVirt/RiscvVirt.dsc create mode 100644 Platform/Qemu/RiscvVirt/RiscvVirt.fdf create mode 100644 Platform/Qemu/RiscvVirt/RiscvVirt.fdf.inc create mode 100644 Platform/Qemu/RiscvVirt/RiscvVirt.uni create mode 100644 Platform/Qemu/RiscvVirt/RiscvVirtPkgExtra.uni create mode 100644 Platform/Qemu/RiscvVirt/VarStore.fdf.inc diff --git a/Platform/Qemu/RiscvVirt/RiscvVirt.dec b/Platform/Qemu/RiscvVirt/RiscvVirt.dec new file mode 100644 index 00000000000..ee0197d1398 --- /dev/null +++ b/Platform/Qemu/RiscvVirt/RiscvVirt.dec @@ -0,0 +1,25 @@ +## @file RISC-V RiscvVirt RISC-V platformm +# This Package provides RiscvVirt modules and libraries. +# +# Copyright (c) 2021, Hewlett Packard Enterprise Development LP. All rights reserved.
+# +# SPDX-License-Identifier: BSD-2-Clause-Patent +# +## + +[Defines] + DEC_SPECIFICATION = 0x0001001b + PACKAGE_NAME = RiscvVirt + PACKAGE_UNI_FILE = RiscvVirt.uni + PACKAGE_GUID = 389803d8-8c14-4839-8d7d-fc5b553aa3de + PACKAGE_VERSION = 1.0 + +[Includes] + +[LibraryClasses] + +[Guids] + gUefiRiscVPlatformRiscvVirtPkgTokenSpaceGuid = {0x27A81261, 0x6D02, 0x4471, { 0x99, 0xA8, 0x84, 0x7F, 0x62, 0x11, 0x16, 0x4A }} + +[UserExtensions.TianoCore."ExtraFiles"] + RiscvVirtPkgExtra.uni diff --git a/Platform/Qemu/RiscvVirt/RiscvVirt.dsc b/Platform/Qemu/RiscvVirt/RiscvVirt.dsc new file mode 100644 index 00000000000..e871e2152ef --- /dev/null +++ b/Platform/Qemu/RiscvVirt/RiscvVirt.dsc @@ -0,0 +1,636 @@ +## @file +# RISC-V EFI on RiscvVirt RISC-V platform +# +# Copyright (c) 2021, Hewlett Packard Enterprise Development LP. All rights reserved.
+# +# SPDX-License-Identifier: BSD-2-Clause-Patent +# +## + +################################################################################ +# +# Defines Section - statements that will be processed to create a Makefile. +# +################################################################################ +[Defines] + PLATFORM_NAME = RiscvVirt + PLATFORM_GUID = 39DADB39-1B21-4867-838E-830B6149B9E0 + PLATFORM_VERSION = 0.1 + DSC_SPECIFICATION = 0x0001001c + OUTPUT_DIRECTORY = Build/$(PLATFORM_NAME) + SUPPORTED_ARCHITECTURES = RISCV64 + BUILD_TARGETS = DEBUG|RELEASE|NOOPT + SKUID_IDENTIFIER = DEFAULT + FLASH_DEFINITION = Platform/Qemu/RiscvVirt/RiscvVirt.fdf + + # + # Enable below options may cause build error or may not work on + # the initial version of RISC-V package + # Defines for default states. These can be changed on the command line. + # -D FLAG=VALUE + # + DEFINE SECURE_BOOT_ENABLE = FALSE + DEFINE DEBUG_ON_SERIAL_PORT = TRUE + + # + # Network definition + # + DEFINE NETWORK_SNP_ENABLE = FALSE + DEFINE NETWORK_IP6_ENABLE = FALSE + DEFINE NETWORK_TLS_ENABLE = FALSE + DEFINE NETWORK_HTTP_BOOT_ENABLE = FALSE + DEFINE NETWORK_ISCSI_ENABLE = FALSE + +[BuildOptions] + GCC:RELEASE_*_*_CC_FLAGS = -DMDEPKG_NDEBUG +!ifdef $(SOURCE_DEBUG_ENABLE) + GCC:*_*_RISCV64_GENFW_FLAGS = --keepexceptiontable +!endif + +################################################################################ +# +# SKU Identification section - list of all SKU IDs supported by this Platform. +# +################################################################################ +[SkuIds] + 0|DEFAULT + +################################################################################ +# +# Library Class section - list of all Library Classes needed by this Platform. +# +################################################################################ + +!include MdePkg/MdeLibs.dsc.inc + +[LibraryClasses] + PcdLib|MdePkg/Library/BasePcdLibNull/BasePcdLibNull.inf + PrintLib|MdePkg/Library/BasePrintLib/BasePrintLib.inf + BaseMemoryLib|MdePkg/Library/BaseMemoryLib/BaseMemoryLib.inf + BaseLib|MdePkg/Library/BaseLib/BaseLib.inf + SafeIntLib|MdePkg/Library/BaseSafeIntLib/BaseSafeIntLib.inf + SynchronizationLib|MdePkg/Library/BaseSynchronizationLib/BaseSynchronizationLib.inf + CpuLib|MdePkg/Library/BaseCpuLib/BaseCpuLib.inf + PerformanceLib|MdePkg/Library/BasePerformanceLibNull/BasePerformanceLibNull.inf + PeCoffLib|MdePkg/Library/BasePeCoffLib/BasePeCoffLib.inf + CacheMaintenanceLib|MdePkg/Library/BaseCacheMaintenanceLib/BaseCacheMaintenanceLib.inf + UefiDecompressLib|MdePkg/Library/BaseUefiDecompressLib/BaseUefiDecompressLib.inf + UefiHiiServicesLib|MdeModulePkg/Library/UefiHiiServicesLib/UefiHiiServicesLib.inf + HiiLib|MdeModulePkg/Library/UefiHiiLib/UefiHiiLib.inf + CapsuleLib|MdeModulePkg/Library/DxeCapsuleLibNull/DxeCapsuleLibNull.inf + DxeServicesLib|MdePkg/Library/DxeServicesLib/DxeServicesLib.inf + DxeServicesTableLib|MdePkg/Library/DxeServicesTableLib/DxeServicesTableLib.inf + PeCoffGetEntryPointLib|MdePkg/Library/BasePeCoffGetEntryPointLib/BasePeCoffGetEntryPointLib.inf + IoLib|MdePkg/Library/BaseIoLibIntrinsic/BaseIoLibIntrinsic.inf + OemHookStatusCodeLib|MdeModulePkg/Library/OemHookStatusCodeLibNull/OemHookStatusCodeLibNull.inf + SerialPortLib|MdeModulePkg/Library/BaseSerialPortLib16550/BaseSerialPortLib16550.inf + PlatformHookLib|MdeModulePkg/Library/BasePlatformHookLibNull/BasePlatformHookLibNull.inf + UefiLib|MdePkg/Library/UefiLib/UefiLib.inf + UefiBootServicesTableLib|MdePkg/Library/UefiBootServicesTableLib/UefiBootServicesTableLib.inf + UefiRuntimeServicesTableLib|MdePkg/Library/UefiRuntimeServicesTableLib/UefiRuntimeServicesTableLib.inf + UefiDriverEntryPoint|MdePkg/Library/UefiDriverEntryPoint/UefiDriverEntryPoint.inf + UefiApplicationEntryPoint|MdePkg/Library/UefiApplicationEntryPoint/UefiApplicationEntryPoint.inf + DevicePathLib|MdePkg/Library/UefiDevicePathLibDevicePathProtocol/UefiDevicePathLibDevicePathProtocol.inf + FileHandleLib|MdePkg/Library/UefiFileHandleLib/UefiFileHandleLib.inf + SecurityManagementLib|MdeModulePkg/Library/DxeSecurityManagementLib/DxeSecurityManagementLib.inf + UefiUsbLib|MdePkg/Library/UefiUsbLib/UefiUsbLib.inf + CustomizedDisplayLib|MdeModulePkg/Library/CustomizedDisplayLib/CustomizedDisplayLib.inf + SortLib|MdeModulePkg/Library/BaseSortLib/BaseSortLib.inf + UefiBootManagerLib|MdeModulePkg/Library/UefiBootManagerLib/UefiBootManagerLib.inf + VariablePolicyLib|MdeModulePkg/Library/VariablePolicyLib/VariablePolicyLibRuntimeDxe.inf + FdtLib|EmbeddedPkg/Library/FdtLib/FdtLib.inf + VariablePolicyHelperLib|MdeModulePkg/Library/VariablePolicyHelperLib/VariablePolicyHelperLib.inf + +# RISC-V Platform Library + TimeBaseLib|EmbeddedPkg//Library/TimeBaseLib/TimeBaseLib.inf + RealTimeClockLib|EmbeddedPkg//Library/VirtualRealTimeClockLib/VirtualRealTimeClockLib.inf + +# RISC-V Core Library + RiscVOpensbiLib|Silicon/RISC-V/ProcessorPkg/Library/RiscVOpensbiLib/RiscVOpensbiLib.inf + +!ifdef $(SOURCE_DEBUG_ENABLE) + PeCoffExtraActionLib|SourceLevelDebugPkg/Library/PeCoffExtraActionLibDebug/PeCoffExtraActionLibDebug.inf + DebugCommunicationLib|SourceLevelDebugPkg/Library/DebugCommunicationLibSerialPort/DebugCommunicationLibSerialPort.inf +!else + PeCoffExtraActionLib|MdePkg/Library/BasePeCoffExtraActionLibNull/BasePeCoffExtraActionLibNull.inf + DebugAgentLib|MdeModulePkg/Library/DebugAgentLibNull/DebugAgentLibNull.inf +!endif + + DebugPrintErrorLevelLib|MdePkg/Library/BaseDebugPrintErrorLevelLib/BaseDebugPrintErrorLevelLib.inf + +!if $(SECURE_BOOT_ENABLE) == TRUE + IntrinsicLib|CryptoPkg/Library/IntrinsicLib/IntrinsicLib.inf + OpensslLib|CryptoPkg/Library/OpensslLib/OpensslLib.inf + TpmMeasurementLib|SecurityPkg/Library/DxeTpmMeasurementLib/DxeTpmMeasurementLib.inf + AuthVariableLib|SecurityPkg/Library/AuthVariableLib/AuthVariableLib.inf +!else + TpmMeasurementLib|MdeModulePkg/Library/TpmMeasurementLibNull/TpmMeasurementLibNull.inf + AuthVariableLib|MdeModulePkg/Library/AuthVariableLibNull/AuthVariableLibNull.inf +!endif + VarCheckLib|MdeModulePkg/Library/VarCheckLib/VarCheckLib.inf + +!if $(HTTP_BOOT_ENABLE) == TRUE + HttpLib|MdeModulePkg/Library/DxeHttpLib/DxeHttpLib.inf +!endif + +# ACPI not supported yet. + #S3BootScriptLib|MdeModulePkg/Library/PiDxeS3BootScriptLib/DxeS3BootScriptLib.inf + SmbusLib|MdePkg/Library/BaseSmbusLibNull/BaseSmbusLibNull.inf + OrderedCollectionLib|MdePkg/Library/BaseOrderedCollectionRedBlackTreeLib/BaseOrderedCollectionRedBlackTreeLib.inf + +[LibraryClasses.common] +!if $(SECURE_BOOT_ENABLE) == TRUE + BaseCryptLib|CryptoPkg/Library/BaseCryptLib/BaseCryptLib.inf +!endif + RiscVCpuLib|Silicon/RISC-V/ProcessorPkg/Library/RiscVCpuLib/RiscVCpuLib.inf + RiscVEdk2SbiLib|Silicon/RISC-V/ProcessorPkg/Library/RiscVEdk2SbiLib/RiscVEdk2SbiLib.inf + RiscVPlatformTimerLib|Platform/SiFive/U5SeriesPkg/Library/RiscVPlatformTimerLib/RiscVPlatformTimerLib.inf + MachineModeTimerLib|Silicon/RISC-V/ProcessorPkg/Library/RiscVReadMachineModeTimer/EmulatedMachineModeTimerLib/EmulatedMachineModeTimerLib.inf + CpuExceptionHandlerLib|Silicon/RISC-V/ProcessorPkg/Library/RiscVExceptionLib/CpuExceptionHandlerDxeLib.inf + + # Flattened Device Tree (FDT) access library + FdtLib|EmbeddedPkg/Library/FdtLib/FdtLib.inf + + # PCI Libraries + PciLib|MdePkg/Library/BasePciLibPciExpress/BasePciLibPciExpress.inf + PciExpressLib|OvmfPkg/Library/BaseCachingPciExpressLib/BaseCachingPciExpressLib.inf + PciExpressLib|MdePkg/Library/BasePciExpressLib/BasePciExpressLib.inf + PciCapLib|OvmfPkg/Library/BasePciCapLib/BasePciCapLib.inf + PciCapPciSegmentLib|OvmfPkg/Library/BasePciCapPciSegmentLib/BasePciCapPciSegmentLib.inf + PciCapPciIoLib|OvmfPkg/Library/UefiPciCapPciIoLib/UefiPciCapPciIoLib.inf + + # Virtio Support + VirtioLib|OvmfPkg/Library/VirtioLib/VirtioLib.inf + VirtioMmioDeviceLib|OvmfPkg/Library/VirtioMmioDeviceLib/VirtioMmioDeviceLib.inf + QemuFwCfgLib|OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgLibMmio.inf + QemuFwCfgS3Lib|OvmfPkg/Library/QemuFwCfgS3Lib/BaseQemuFwCfgS3LibNull.inf + QemuFwCfgSimpleParserLib|OvmfPkg/Library/QemuFwCfgSimpleParserLib/QemuFwCfgSimpleParserLib.inf + QemuLoadImageLib|OvmfPkg/Library/GenericQemuLoadImageLib/GenericQemuLoadImageLib.inf + + # PCI support + PciPcdProducerLib|OvmfPkg/Fdt/FdtPciPcdProducerLib/FdtPciPcdProducerLib.inf + PciSegmentLib|MdePkg/Library/BasePciSegmentLibPci/BasePciSegmentLibPci.inf + PciHostBridgeLib|OvmfPkg/Fdt/FdtPciHostBridgeLib/FdtPciHostBridgeLib.inf + PciHostBridgeUtilityLib|OvmfPkg/Library/PciHostBridgeUtilityLib/PciHostBridgeUtilityLib.inf + +[LibraryClasses.common.SEC] +!ifdef $(DEBUG_ON_SERIAL_PORT) + DebugLib|MdePkg/Library/BaseDebugLibSerialPort/BaseDebugLibSerialPort.inf +!else + DebugLib|MdePkg/Library/BaseDebugLibNull/BaseDebugLibNull.inf +!endif + + ReportStatusCodeLib|MdeModulePkg/Library/PeiReportStatusCodeLib/PeiReportStatusCodeLib.inf + ExtractGuidedSectionLib|MdePkg/Library/BaseExtractGuidedSectionLib/BaseExtractGuidedSectionLib.inf + +!ifdef $(SOURCE_DEBUG_ENABLE) + DebugAgentLib|SourceLevelDebugPkg/Library/DebugAgent/SecPeiDebugAgentLib.inf +!endif + + MemoryAllocationLib|MdePkg/Library/PeiMemoryAllocationLib/PeiMemoryAllocationLib.inf + Edk2OpensbiPlatformWrapperLib|Platform/RISC-V/PlatformPkg/Library/Edk2OpensbiPlatformWrapperLib/Edk2OpensbiPlatformWrapperLib.inf + RiscVSpecialPlatformLib|Platform/RISC-V/PlatformPkg/Library/RiscVSpecialPlatformLibNull/RiscVSpecialPlatformLibNull.inf +# +# OpenSBI Platform Library +# + RiscVOpensbiPlatformLib|Platform/RISC-V/PlatformPkg/Library/OpensbiPlatformLib/OpensbiPlatformLib.inf + +[LibraryClasses.common.PEI_CORE] + HobLib|MdePkg/Library/PeiHobLib/PeiHobLib.inf + PeiServicesTablePointerLib|Silicon/RISC-V/ProcessorPkg/Library/PeiServicesTablePointerLibOpenSbi/PeiServicesTablePointerLibOpenSbi.inf + RiscVFirmwareContextLib|Silicon/RISC-V/ProcessorPkg/Library/RiscVFirmwareContextSscratchLib/RiscVFirmwareContextSscratchLib.inf + PeiServicesLib|MdePkg/Library/PeiServicesLib/PeiServicesLib.inf + MemoryAllocationLib|MdePkg/Library/PeiMemoryAllocationLib/PeiMemoryAllocationLib.inf + ReportStatusCodeLib|MdeModulePkg/Library/PeiReportStatusCodeLib/PeiReportStatusCodeLib.inf + OemHookStatusCodeLib|MdeModulePkg/Library/OemHookStatusCodeLibNull/OemHookStatusCodeLibNull.inf + PeCoffGetEntryPointLib|MdePkg/Library/BasePeCoffGetEntryPointLib/BasePeCoffGetEntryPointLib.inf +!ifdef $(DEBUG_ON_SERIAL_PORT) + DebugLib|MdePkg/Library/BaseDebugLibSerialPort/BaseDebugLibSerialPort.inf +!else + DebugLib|MdePkg/Library/BaseDebugLibNull/BaseDebugLibNull.inf +!endif + PeCoffLib|MdePkg/Library/BasePeCoffLib/BasePeCoffLib.inf + PeiCoreEntryPoint|Platform/RISC-V/PlatformPkg/Library/PeiCoreEntryPoint/PeiCoreEntryPoint.inf + PlatformSecPpiLib|Platform/SiFive/U5SeriesPkg/Library/PlatformSecPpiLib/PlatformSecPpiLib.inf + +[LibraryClasses.common.PEIM] + HobLib|MdePkg/Library/PeiHobLib/PeiHobLib.inf + PeiServicesTablePointerLib|Silicon/RISC-V/ProcessorPkg/Library/PeiServicesTablePointerLibOpenSbi/PeiServicesTablePointerLibOpenSbi.inf + RiscVFirmwareContextLib|Silicon/RISC-V/ProcessorPkg/Library/RiscVFirmwareContextSscratchLib/RiscVFirmwareContextSscratchLib.inf + PeiServicesLib|MdePkg/Library/PeiServicesLib/PeiServicesLib.inf + MemoryAllocationLib|MdePkg/Library/PeiMemoryAllocationLib/PeiMemoryAllocationLib.inf + PeimEntryPoint|MdePkg/Library/PeimEntryPoint/PeimEntryPoint.inf + ReportStatusCodeLib|MdeModulePkg/Library/PeiReportStatusCodeLib/PeiReportStatusCodeLib.inf + OemHookStatusCodeLib|MdeModulePkg/Library/OemHookStatusCodeLibNull/OemHookStatusCodeLibNull.inf + PeCoffGetEntryPointLib|MdePkg/Library/BasePeCoffGetEntryPointLib/BasePeCoffGetEntryPointLib.inf +!ifdef $(DEBUG_ON_SERIAL_PORT) + DebugLib|MdePkg/Library/BaseDebugLibSerialPort/BaseDebugLibSerialPort.inf +!else + DebugLib|MdePkg/Library/BaseDebugLibNull/BaseDebugLibNull.inf +!endif + PeCoffLib|MdePkg/Library/BasePeCoffLib/BasePeCoffLib.inf + PeiResourcePublicationLib|MdePkg/Library/PeiResourcePublicationLib/PeiResourcePublicationLib.inf + ExtractGuidedSectionLib|MdePkg/Library/PeiExtractGuidedSectionLib/PeiExtractGuidedSectionLib.inf +!ifdef $(SOURCE_DEBUG_ENABLE) + DebugAgentLib|SourceLevelDebugPkg/Library/DebugAgent/SecPeiDebugAgentLib.inf +!endif + FirmwareContextProcessorSpecificLib|Platform/RISC-V/PlatformPkg/Library/FirmwareContextProcessorSpecificLib/FirmwareContextProcessorSpecificLib.inf + +# +# RISC-V core libraries +# + RiscVCoreplexInfoLib|Platform/RISC-V/PlatformPkg/Library/PeiCoreInfoHobLibNull/PeiCoreInfoHobLib.inf + +[LibraryClasses.common.DXE_CORE] + TimerLib|Silicon/RISC-V/ProcessorPkg/Library/RiscVTimerLib/BaseRiscVTimerLib.inf + HobLib|MdePkg/Library/DxeCoreHobLib/DxeCoreHobLib.inf + DxeCoreEntryPoint|MdePkg/Library/DxeCoreEntryPoint/DxeCoreEntryPoint.inf + MemoryAllocationLib|MdeModulePkg/Library/DxeCoreMemoryAllocationLib/DxeCoreMemoryAllocationLib.inf + ReportStatusCodeLib|MdeModulePkg/Library/DxeReportStatusCodeLib/DxeReportStatusCodeLib.inf +!ifdef $(DEBUG_ON_SERIAL_PORT) + DebugLib|MdePkg/Library/BaseDebugLibSerialPort/BaseDebugLibSerialPort.inf +!else + DebugLib|MdePkg/Library/BaseDebugLibNull/BaseDebugLibNull.inf +!endif + ExtractGuidedSectionLib|MdePkg/Library/DxeExtractGuidedSectionLib/DxeExtractGuidedSectionLib.inf +!ifdef $(SOURCE_DEBUG_ENABLE) + DebugAgentLib|SourceLevelDebugPkg/Library/DebugAgent/DxeDebugAgentLib.inf +!endif + +[LibraryClasses.common.DXE_RUNTIME_DRIVER] + PcdLib|MdePkg/Library/DxePcdLib/DxePcdLib.inf + TimerLib|Silicon/RISC-V/ProcessorPkg/Library/RiscVTimerLib/BaseRiscVTimerLib.inf + HobLib|MdePkg/Library/DxeHobLib/DxeHobLib.inf + DxeCoreEntryPoint|MdePkg/Library/DxeCoreEntryPoint/DxeCoreEntryPoint.inf + MemoryAllocationLib|MdePkg/Library/UefiMemoryAllocationLib/UefiMemoryAllocationLib.inf + ReportStatusCodeLib|MdeModulePkg/Library/RuntimeDxeReportStatusCodeLib/RuntimeDxeReportStatusCodeLib.inf + ResetSystemLib|Platform/RISC-V/PlatformPkg/Library/ResetSystemLib/ResetSystemLib.inf + UefiRuntimeLib|MdePkg/Library/UefiRuntimeLib/UefiRuntimeLib.inf +!ifdef $(DEBUG_ON_SERIAL_PORT) + DebugLib|MdePkg/Library/BaseDebugLibSerialPort/BaseDebugLibSerialPort.inf +!else + DebugLib|MdePkg/Library/BaseDebugLibNull/BaseDebugLibNull.inf +!endif +!if $(SECURE_BOOT_ENABLE) == TRUE + BaseCryptLib|CryptoPkg/Library/BaseCryptLib/RuntimeCryptLib.inf +!endif + UefiBootManagerLib|MdeModulePkg/Library/UefiBootManagerLib/UefiBootManagerLib.inf + +[LibraryClasses.common.UEFI_DRIVER] + PcdLib|MdePkg/Library/DxePcdLib/DxePcdLib.inf + TimerLib|Silicon/RISC-V/ProcessorPkg/Library/RiscVTimerLib/BaseRiscVTimerLib.inf + HobLib|MdePkg/Library/DxeHobLib/DxeHobLib.inf + DxeCoreEntryPoint|MdePkg/Library/DxeCoreEntryPoint/DxeCoreEntryPoint.inf + MemoryAllocationLib|MdePkg/Library/UefiMemoryAllocationLib/UefiMemoryAllocationLib.inf + ReportStatusCodeLib|MdeModulePkg/Library/DxeReportStatusCodeLib/DxeReportStatusCodeLib.inf +!ifdef $(DEBUG_ON_SERIAL_PORT) + DebugLib|MdePkg/Library/BaseDebugLibSerialPort/BaseDebugLibSerialPort.inf +!else + DebugLib|MdePkg/Library/BaseDebugLibNull/BaseDebugLibNull.inf +!endif + UefiScsiLib|MdePkg/Library/UefiScsiLib/UefiScsiLib.inf + VariablePolicyLib|MdeModulePkg/Library/VariablePolicyLib/VariablePolicyLib.inf + +[LibraryClasses.common.DXE_DRIVER] + PcdLib|MdePkg/Library/DxePcdLib/DxePcdLib.inf + TimerLib|Silicon/RISC-V/ProcessorPkg/Library/RiscVTimerLib/BaseRiscVTimerLib.inf + HobLib|MdePkg/Library/DxeHobLib/DxeHobLib.inf + MemoryAllocationLib|MdePkg/Library/UefiMemoryAllocationLib/UefiMemoryAllocationLib.inf + ReportStatusCodeLib|MdeModulePkg/Library/DxeReportStatusCodeLib/DxeReportStatusCodeLib.inf + UefiScsiLib|MdePkg/Library/UefiScsiLib/UefiScsiLib.inf +!ifdef $(DEBUG_ON_SERIAL_PORT) + DebugLib|MdePkg/Library/BaseDebugLibSerialPort/BaseDebugLibSerialPort.inf +!else + DebugLib|MdePkg/Library/BaseDebugLibNull/BaseDebugLibNull.inf +!endif +!ifdef $(SOURCE_DEBUG_ENABLE) + DebugAgentLib|SourceLevelDebugPkg/Library/DebugAgent/DxeDebugAgentLib.inf +!endif + UefiBootManagerLib|MdeModulePkg/Library/UefiBootManagerLib/UefiBootManagerLib.inf + PlatformBootManagerLib|Platform/RISC-V/PlatformPkg/Library/PlatformBootManagerLib/PlatformBootManagerLib.inf + PlatformMemoryTestLib|Platform/RISC-V/PlatformPkg/Library/PlatformMemoryTestLibNull/PlatformMemoryTestLibNull.inf + PlatformUpdateProgressLib|Platform/RISC-V/PlatformPkg/Library/PlatformUpdateProgressLibNull/PlatformUpdateProgressLibNull.inf + +[LibraryClasses.common.UEFI_APPLICATION] + PcdLib|MdePkg/Library/DxePcdLib/DxePcdLib.inf + TimerLib|Silicon/RISC-V/ProcessorPkg/Library/RiscVTimerLib/BaseRiscVTimerLib.inf + HobLib|MdePkg/Library/DxeHobLib/DxeHobLib.inf + MemoryAllocationLib|MdePkg/Library/UefiMemoryAllocationLib/UefiMemoryAllocationLib.inf +!ifdef $(DEBUG_ON_SERIAL_PORT) + DebugLib|MdePkg/Library/BaseDebugLibSerialPort/BaseDebugLibSerialPort.inf +!else + DebugLib|MdePkg/Library/BaseDebugLibNull/BaseDebugLibNull.inf +!endif + ReportStatusCodeLib|MdeModulePkg/Library/DxeReportStatusCodeLib/DxeReportStatusCodeLib.inf + +################################################################################ +# +# Pcd Section - list of all EDK II PCD Entries defined by this Platform. +# +################################################################################ +[PcdsFeatureFlag] + gEfiMdeModulePkgTokenSpaceGuid.PcdDxeIplSupportUefiDecompress|FALSE + gEfiMdeModulePkgTokenSpaceGuid.PcdConOutGopSupport|TRUE + gEfiMdeModulePkgTokenSpaceGuid.PcdConOutUgaSupport|FALSE + +[PcdsFixedAtBuild] + gEfiMdeModulePkgTokenSpaceGuid.PcdStatusCodeUseMemory|FALSE + gEfiMdeModulePkgTokenSpaceGuid.PcdStatusCodeUseSerial|TRUE + gEfiMdeModulePkgTokenSpaceGuid.PcdStatusCodeMemorySize|1 + gEfiMdeModulePkgTokenSpaceGuid.PcdResetOnMemoryTypeInformationChange|FALSE + gEfiMdePkgTokenSpaceGuid.PcdMaximumGuidedExtractHandler|0x10 + gEfiMdeModulePkgTokenSpaceGuid.PcdMaxVariableSize|0x2000 + gEfiMdeModulePkgTokenSpaceGuid.PcdMaxHardwareErrorVariableSize|0x8000 + gEfiMdeModulePkgTokenSpaceGuid.PcdVariableStoreSize|0xe000 + + gEfiMdeModulePkgTokenSpaceGuid.PcdVpdBaseAddress|0x0 + + gEfiMdePkgTokenSpaceGuid.PcdReportStatusCodePropertyMask|0x07 + gEfiMdePkgTokenSpaceGuid.PcdDebugPrintErrorLevel|0x8000004F +!ifdef $(SOURCE_DEBUG_ENABLE) + gEfiMdePkgTokenSpaceGuid.PcdDebugPropertyMask|0x17 +!else + gEfiMdePkgTokenSpaceGuid.PcdDebugPropertyMask|0x2F +!endif + +!ifdef $(SOURCE_DEBUG_ENABLE) + gEfiSourceLevelDebugPkgTokenSpaceGuid.PcdDebugLoadImageMethod|0x2 +!endif + +!if $(SECURE_BOOT_ENABLE) == TRUE + # override the default values from SecurityPkg to ensure images from all sources are verified in secure boot + gEfiSecurityPkgTokenSpaceGuid.PcdOptionRomImageVerificationPolicy|0x04 + gEfiSecurityPkgTokenSpaceGuid.PcdFixedMediaImageVerificationPolicy|0x04 + gEfiSecurityPkgTokenSpaceGuid.PcdRemovableMediaImageVerificationPolicy|0x04 +!endif + + # + # F2 for UI APP + # + gEfiMdeModulePkgTokenSpaceGuid.PcdBootManagerMenuFile|{ 0x21, 0xaa, 0x2c, 0x46, 0x14, 0x76, 0x03, 0x45, 0x83, 0x6e, 0x8a, 0xb6, 0xf4, 0x66, 0x23, 0x31 } + + # Serial Port + gEfiMdeModulePkgTokenSpaceGuid.PcdSerialUseMmio|TRUE + gEfiMdeModulePkgTokenSpaceGuid.PcdSerialRegisterBase|0x10000000 + gEfiMdeModulePkgTokenSpaceGuid.PcdSerialBaudRate|9600 + gEfiMdeModulePkgTokenSpaceGuid.PcdSerialUseHardwareFlowControl|FALSE + #gEfiMdeModulePkgTokenSpaceGuid.PcdSerialLineControl|0x03 + #gEfiMdeModulePkgTokenSpaceGuid.PcdSerialFifoControl|0x07 + #gEfiMdeModulePkgTokenSpaceGuid.PcdSerialDetectCable|FALSE + gEfiMdeModulePkgTokenSpaceGuid.PcdSerialClockRate|3686400 + #gEfiMdeModulePkgTokenSpaceGuid.PcdSerialPciDeviceInfo|{0x14, 0x05, 0x84, 0x00, 0xFF} + gEfiMdeModulePkgTokenSpaceGuid.PcdSerialRegisterStride|1 + + #gEfiMdeModulePkgTokenSpaceGuid.PcdSerialBaudRate|115200 + #gEfiMdeModulePkgTokenSpaceGuid.PcdSerialClockRate|200000000 + +################################################################################ +# +# Pcd Dynamic Section - list of all EDK II PCD Entries defined by this Platform +# +################################################################################ + +[PcdsDynamicDefault] + gEfiMdeModulePkgTokenSpaceGuid.PcdEmuVariableNvStoreReserved|0 + gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableBase64|0 + gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingBase|0 + gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareBase|0 + gEfiMdeModulePkgTokenSpaceGuid.PcdPciDisableBusEnumeration|FALSE + gEfiMdeModulePkgTokenSpaceGuid.PcdVideoHorizontalResolution|800 + gEfiMdeModulePkgTokenSpaceGuid.PcdVideoVerticalResolution|600 + + gEfiMdePkgTokenSpaceGuid.PcdPlatformBootTimeOut|0 + + # Set video resolution for text setup. + gEfiMdeModulePkgTokenSpaceGuid.PcdSetupVideoHorizontalResolution|640 + gEfiMdeModulePkgTokenSpaceGuid.PcdSetupVideoVerticalResolution|480 + + gEfiMdeModulePkgTokenSpaceGuid.PcdSmbiosVersion|0x0208 + gEfiMdeModulePkgTokenSpaceGuid.PcdSmbiosDocRev|0x0 + +################################################################################ +# +# Components Section - list of all EDK II Modules needed by this Platform. +# +################################################################################ +[Components] + + # + # SEC Phase modules + # + Platform/RISC-V/PlatformPkg/Universal/Sec/SecMain.inf + + # + # PEI Phase modules + # + MdeModulePkg/Core/Pei/PeiMain.inf + MdeModulePkg/Universal/PCD/Pei/Pcd.inf { + + PcdLib|MdePkg/Library/BasePcdLibNull/BasePcdLibNull.inf + } + MdeModulePkg/Universal/ReportStatusCodeRouter/Pei/ReportStatusCodeRouterPei.inf + MdeModulePkg/Universal/StatusCodeHandler/Pei/StatusCodeHandlerPei.inf + MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf { + + NULL|MdeModulePkg/Library/LzmaCustomDecompressLib/LzmaCustomDecompressLib.inf + } + + Platform/RISC-V/PlatformPkg/Universal/Pei/PlatformPei/PlatformPei.inf { + + PcdLib|MdePkg/Library/PeiPcdLib/PeiPcdLib.inf + } + + Platform/RISC-V/PlatformPkg/Universal/FdtPeim/FdtPeim.inf + + # + # DXE Phase modules + # + MdeModulePkg/Core/Dxe/DxeMain.inf { + + NULL|MdeModulePkg//Library/LzmaCustomDecompressLib/LzmaCustomDecompressLib.inf + DevicePathLib|MdePkg/Library/UefiDevicePathLib/UefiDevicePathLib.inf + } + + MdeModulePkg/Universal/ReportStatusCodeRouter/RuntimeDxe/ReportStatusCodeRouterRuntimeDxe.inf + MdeModulePkg/Universal/StatusCodeHandler/RuntimeDxe/StatusCodeHandlerRuntimeDxe.inf + + MdeModulePkg/Universal/PCD/Dxe/Pcd.inf { + + PcdLib|MdePkg/Library/BasePcdLibNull/BasePcdLibNull.inf + } + + MdeModulePkg/Core/RuntimeDxe/RuntimeDxe.inf + +!if $(SECURE_BOOT_ENABLE) == TRUE + MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.inf { + + NULL|SecurityPkg/Library/DxeImageVerificationLib/DxeImageVerificationLib.inf + } +!else + MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.inf +!endif + + #UefiCpuPkg/CpuIo2Dxe/CpuIo2Dxe.inf + #MdeModulePkg/Bus/Pci/PciBusDxe/PciBusDxe.inf { + # + # PcdLib|MdePkg/Library/DxePcdLib/DxePcdLib.inf + #} + MdeModulePkg/Universal/Metronome/Metronome.inf + MdeModulePkg/Universal/BdsDxe/BdsDxe.inf + MdeModulePkg/Universal/ResetSystemRuntimeDxe/ResetSystemRuntimeDxe.inf { + + ResetSystemLib|MdeModulePkg/Library/BaseResetSystemLibNull/BaseResetSystemLibNull.inf + } + EmbeddedPkg/RealTimeClockRuntimeDxe/RealTimeClockRuntimeDxe.inf + + # + # RISC-V Platform module + # + Platform/SiFive/U5SeriesPkg/Universal/Dxe/TimerDxe/TimerDxe.inf + Platform/SiFive/U5SeriesPkg/Universal/Dxe/RamFvbServicesRuntimeDxe/FvbServicesRuntimeDxe.inf + + # + # RISC-V Core module + # + Silicon/RISC-V/ProcessorPkg/Universal/CpuDxe/CpuDxe.inf + Silicon/RISC-V/ProcessorPkg/Universal/SmbiosDxe/RiscVSmbiosDxe.inf + MdeModulePkg/Universal/ResetSystemRuntimeDxe/ResetSystemRuntimeDxe.inf + + MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteDxe.inf + MdeModulePkg/Universal/Variable/RuntimeDxe/VariableRuntimeDxe.inf { + + NULL|MdeModulePkg/Library/VarCheckUefiLib/VarCheckUefiLib.inf + } + MdeModulePkg/Universal/WatchdogTimerDxe/WatchdogTimer.inf + MdeModulePkg/Universal/MonotonicCounterRuntimeDxe/MonotonicCounterRuntimeDxe.inf + MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf + MdeModulePkg/Universal/Console/ConPlatformDxe/ConPlatformDxe.inf + MdeModulePkg/Universal/Console/ConSplitterDxe/ConSplitterDxe.inf + +# No graphic console supported yet. +# MdeModulePkg/Universal/Console/GraphicsConsoleDxe/GraphicsConsoleDxe.inf { +# +# PcdLib|MdePkg/Library/DxePcdLib/DxePcdLib.inf +# } + MdeModulePkg/Universal/Console/TerminalDxe/TerminalDxe.inf + MdeModulePkg/Universal/DevicePathDxe/DevicePathDxe.inf { + + DevicePathLib|MdePkg/Library/UefiDevicePathLib/UefiDevicePathLib.inf + PcdLib|MdePkg/Library/BasePcdLibNull/BasePcdLibNull.inf + } + MdeModulePkg/Universal/PrintDxe/PrintDxe.inf + MdeModulePkg/Universal/Disk/DiskIoDxe/DiskIoDxe.inf + MdeModulePkg/Universal/Disk/PartitionDxe/PartitionDxe.inf + MdeModulePkg/Universal/Disk/UnicodeCollation/EnglishDxe/EnglishDxe.inf + MdeModulePkg/Bus/Scsi/ScsiBusDxe/ScsiBusDxe.inf + MdeModulePkg/Bus/Scsi/ScsiDiskDxe/ScsiDiskDxe.inf + MdeModulePkg/Universal/HiiDatabaseDxe/HiiDatabaseDxe.inf + MdeModulePkg/Universal/SetupBrowserDxe/SetupBrowserDxe.inf + MdeModulePkg/Universal/DisplayEngineDxe/DisplayEngineDxe.inf + MdeModulePkg/Universal/MemoryTest/NullMemoryTestDxe/NullMemoryTestDxe.inf + MdeModulePkg/Universal/SerialDxe/SerialDxe.inf + + # + # SMBIOS Support + # + MdeModulePkg/Universal/SmbiosDxe/SmbiosDxe.inf + + # + # Network Support + # + !include NetworkPkg/Network.dsc.inc + + # + # Usb Support + # + MdeModulePkg/Bus/Pci/UhciDxe/UhciDxe.inf + MdeModulePkg/Bus/Pci/EhciDxe/EhciDxe.inf + MdeModulePkg/Bus/Pci/XhciDxe/XhciDxe.inf + MdeModulePkg/Bus/Usb/UsbBusDxe/UsbBusDxe.inf + MdeModulePkg/Bus/Usb/UsbKbDxe/UsbKbDxe.inf + MdeModulePkg/Bus/Usb/UsbMassStorageDxe/UsbMassStorageDxe.inf + + # + # PCI support + # + ArmPkg/Drivers/ArmPciCpuIo2Dxe/ArmPciCpuIo2Dxe.inf { + + NULL|OvmfPkg/Fdt/FdtPciPcdProducerLib/FdtPciPcdProducerLib.inf + } + MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciHostBridgeDxe.inf + MdeModulePkg/Bus/Pci/PciBusDxe/PciBusDxe.inf { + + NULL|OvmfPkg/Fdt/FdtPciPcdProducerLib/FdtPciPcdProducerLib.inf + } + OvmfPkg/VirtioPciDeviceDxe/VirtioPciDeviceDxe.inf + OvmfPkg/Virtio10Dxe/Virtio10.inf + + # + # Platform Driver + # + OvmfPkg/Fdt/VirtioFdtDxe/VirtioFdtDxe.inf + EmbeddedPkg/Drivers/FdtClientDxe/FdtClientDxe.inf + OvmfPkg/Fdt/HighMemDxe/HighMemDxe.inf + OvmfPkg/VirtioBlkDxe/VirtioBlk.inf + OvmfPkg/VirtioScsiDxe/VirtioScsi.inf + OvmfPkg/VirtioNetDxe/VirtioNet.inf + OvmfPkg/VirtioRngDxe/VirtioRng.inf + Silicon/RISC-V/ProcessorPkg/Universal/FdtDxe/FdtDxe.inf + + # + # FAT filesystem + GPT/MBR partitioning + UDF filesystem + # + #MdeModulePkg/Universal/Disk/DiskIoDxe/DiskIoDxe.inf + #MdeModulePkg/Universal/Disk/PartitionDxe/PartitionDxe.inf + #MdeModulePkg/Universal/Disk/UnicodeCollation/EnglishDxe/EnglishDxe.inf + FatPkg/EnhancedFatDxe/Fat.inf + MdeModulePkg/Universal/Disk/UdfDxe/UdfDxe.inf + + OvmfPkg/LinuxInitrdDynamicShellCommand/LinuxInitrdDynamicShellCommand.inf { + + gEfiShellPkgTokenSpaceGuid.PcdShellLibAutoInitialize|FALSE + + ShellLib|ShellPkg/Library/UefiShellLib/UefiShellLib.inf + SortLib|MdeModulePkg/Library/UefiSortLib/UefiSortLib.inf + } + + ShellPkg/Application/Shell/Shell.inf { + + ShellCommandLib|ShellPkg/Library/UefiShellCommandLib/UefiShellCommandLib.inf + NULL|ShellPkg/Library/UefiShellLevel2CommandsLib/UefiShellLevel2CommandsLib.inf + NULL|ShellPkg/Library/UefiShellLevel1CommandsLib/UefiShellLevel1CommandsLib.inf + NULL|ShellPkg/Library/UefiShellLevel3CommandsLib/UefiShellLevel3CommandsLib.inf + NULL|ShellPkg/Library/UefiShellDriver1CommandsLib/UefiShellDriver1CommandsLib.inf + NULL|ShellPkg/Library/UefiShellDebug1CommandsLib/UefiShellDebug1CommandsLib.inf + NULL|ShellPkg/Library/UefiShellInstall1CommandsLib/UefiShellInstall1CommandsLib.inf + NULL|ShellPkg/Library/UefiShellNetwork1CommandsLib/UefiShellNetwork1CommandsLib.inf + HandleParsingLib|ShellPkg/Library/UefiHandleParsingLib/UefiHandleParsingLib.inf + ShellLib|ShellPkg/Library/UefiShellLib/UefiShellLib.inf + FileHandleLib|MdePkg/Library/UefiFileHandleLib/UefiFileHandleLib.inf + SortLib|MdeModulePkg/Library/UefiSortLib/UefiSortLib.inf + PrintLib|MdePkg/Library/BasePrintLib/BasePrintLib.inf + BcfgCommandLib|ShellPkg/Library/UefiShellBcfgCommandLib/UefiShellBcfgCommandLib.inf + + + gEfiMdePkgTokenSpaceGuid.PcdDebugPropertyMask|0xFF + gEfiShellPkgTokenSpaceGuid.PcdShellLibAutoInitialize|FALSE + gEfiMdePkgTokenSpaceGuid.PcdUefiLibMaxPrintBufferSize|8000 + } + +!if $(SECURE_BOOT_ENABLE) == TRUE + SecurityPkg/VariableAuthenticated/SecureBootConfigDxe/SecureBootConfigDxe.inf +!endif + + MdeModulePkg/Application/UiApp/UiApp.inf + +[PcdsDynamicDefault.common] + # set PcdPciExpressBaseAddress to MAX_UINT64, which signifies that this + # PCD and PcdPciDisableBusEnumeration above have not been assigned yet + gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress|0xFFFFFFFFFFFFFFFF + + gEfiMdePkgTokenSpaceGuid.PcdPciIoTranslation|0x0 + +[PcdsFeatureFlag.common] + gUefiOvmfPkgTokenSpaceGuid.PcdQemuBootOrderPciTranslation|TRUE + gUefiOvmfPkgTokenSpaceGuid.PcdQemuBootOrderMmioTranslation|TRUE + diff --git a/Platform/Qemu/RiscvVirt/RiscvVirt.fdf b/Platform/Qemu/RiscvVirt/RiscvVirt.fdf new file mode 100644 index 00000000000..3a0a42de3b2 --- /dev/null +++ b/Platform/Qemu/RiscvVirt/RiscvVirt.fdf @@ -0,0 +1,352 @@ +# @file +# Flash definition file on RiscvVirt RISC-V platform +# +# TODO: (almost) nothing special here. DEDUPLICATE!!! +# +# Copyright (c) 2021, Hewlett Packard Enterprise Development LP. All rights reserved.
+# +# SPDX-License-Identifier: BSD-2-Clause-Patent +# +# Platform definitions +# +!include RiscvVirt.fdf.inc + +# +# Build the variable store and the firmware code as one unified flash device +# image. +# +[FD.RiscvVirt] +BaseAddress = $(FW_BASE_ADDRESS) +Size = $(FW_SIZE) +ErasePolarity = 1 +BlockSize = $(BLOCK_SIZE) +NumBlocks = $(FW_BLOCKS) + +$(SECFV_OFFSET)|$(SECFV_SIZE) +gUefiRiscVPlatformPkgTokenSpaceGuid.PcdRiscVSecFvBase|gUefiRiscVPlatformPkgTokenSpaceGuid.PcdRiscVSecFvSize +FV = SECFV + +$(PEIFV_OFFSET)|$(PEIFV_SIZE) +gUefiRiscVPlatformPkgTokenSpaceGuid.PcdRiscVPeiFvBase|gUefiRiscVPlatformPkgTokenSpaceGuid.PcdRiscVPeiFvSize +FV = PEIFV + +$(FVMAIN_OFFSET)|$(FVMAIN_SIZE) +gUefiRiscVPlatformPkgTokenSpaceGuid.PcdRiscVDxeFvBase|gUefiRiscVPlatformPkgTokenSpaceGuid.PcdRiscVDxeFvSize +FV = FVMAIN_COMPACT + +!include VarStore.fdf.inc + +################################################################################ + +[FV.SECFV] +BlockSize = 0x1000 +FvAlignment = 16 +ERASE_POLARITY = 1 +MEMORY_MAPPED = TRUE +STICKY_WRITE = TRUE +LOCK_CAP = TRUE +LOCK_STATUS = TRUE +WRITE_DISABLED_CAP = TRUE +WRITE_ENABLED_CAP = TRUE +WRITE_STATUS = TRUE +WRITE_LOCK_CAP = TRUE +WRITE_LOCK_STATUS = TRUE +READ_DISABLED_CAP = TRUE +READ_ENABLED_CAP = TRUE +READ_STATUS = TRUE +READ_LOCK_CAP = TRUE +READ_LOCK_STATUS = TRUE + +# +# SEC Phase modules +# +# The code in this FV handles the initial firmware startup, and +# decompresses the PEI and DXE FVs which handles the rest of the boot sequence. +# +INF Platform/RISC-V/PlatformPkg/Universal/Sec/SecMain.inf + +################################################################################ +[FV.PEIFV] +BlockSize = 0x10000 +FvAlignment = 16 +ERASE_POLARITY = 1 +MEMORY_MAPPED = TRUE +STICKY_WRITE = TRUE +LOCK_CAP = TRUE +LOCK_STATUS = TRUE +WRITE_DISABLED_CAP = TRUE +WRITE_ENABLED_CAP = TRUE +WRITE_STATUS = TRUE +WRITE_LOCK_CAP = TRUE +WRITE_LOCK_STATUS = TRUE +READ_DISABLED_CAP = TRUE +READ_ENABLED_CAP = TRUE +READ_STATUS = TRUE +READ_LOCK_CAP = TRUE +READ_LOCK_STATUS = TRUE + +APRIORI PEI { + INF MdeModulePkg/Universal/ReportStatusCodeRouter/Pei/ReportStatusCodeRouterPei.inf + INF MdeModulePkg/Universal/StatusCodeHandler/Pei/StatusCodeHandlerPei.inf + INF MdeModulePkg/Universal/PCD/Pei/Pcd.inf +} + +# +# PEI Phase modules +# +INF MdeModulePkg/Core/Pei/PeiMain.inf +INF MdeModulePkg/Universal/PCD/Pei/Pcd.inf +INF MdeModulePkg/Universal/ReportStatusCodeRouter/Pei/ReportStatusCodeRouterPei.inf +INF MdeModulePkg/Universal/StatusCodeHandler/Pei/StatusCodeHandlerPei.inf +INF MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf + +INF Platform/RISC-V/PlatformPkg/Universal/FdtPeim/FdtPeim.inf + +# RISC-V Platform PEI Driver +INF Platform/RISC-V/PlatformPkg/Universal/Pei/PlatformPei/PlatformPei.inf + +################################################################################ + +[FV.DXEFV] +BlockSize = 0x10000 +FvAlignment = 16 +ERASE_POLARITY = 1 +MEMORY_MAPPED = TRUE +STICKY_WRITE = TRUE +LOCK_CAP = TRUE +LOCK_STATUS = TRUE +WRITE_DISABLED_CAP = TRUE +WRITE_ENABLED_CAP = TRUE +WRITE_STATUS = TRUE +WRITE_LOCK_CAP = TRUE +WRITE_LOCK_STATUS = TRUE +READ_DISABLED_CAP = TRUE +READ_ENABLED_CAP = TRUE +READ_STATUS = TRUE +READ_LOCK_CAP = TRUE +READ_LOCK_STATUS = TRUE + +APRIORI DXE { + INF MdeModulePkg/Universal/DevicePathDxe/DevicePathDxe.inf + INF MdeModulePkg/Universal/PCD/Dxe/Pcd.inf + INF Platform/SiFive/U5SeriesPkg/Universal/Dxe/RamFvbServicesRuntimeDxe/FvbServicesRuntimeDxe.inf +} + +# +# DXE Phase modules +# +INF MdeModulePkg/Core/Dxe/DxeMain.inf + +INF MdeModulePkg/Universal/ReportStatusCodeRouter/RuntimeDxe/ReportStatusCodeRouterRuntimeDxe.inf +INF MdeModulePkg/Universal/StatusCodeHandler/RuntimeDxe/StatusCodeHandlerRuntimeDxe.inf +INF MdeModulePkg/Universal/PCD/Dxe/Pcd.inf + + +# +# PCI support +# +INF ArmPkg/Drivers/ArmPciCpuIo2Dxe/ArmPciCpuIo2Dxe.inf +INF MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciHostBridgeDxe.inf +INF MdeModulePkg/Bus/Pci/PciBusDxe/PciBusDxe.inf +INF OvmfPkg/VirtioPciDeviceDxe/VirtioPciDeviceDxe.inf +INF OvmfPkg/Virtio10Dxe/Virtio10.inf + +# +# Platform Driver +# +INF OvmfPkg/Fdt/VirtioFdtDxe/VirtioFdtDxe.inf +INF EmbeddedPkg/Drivers/FdtClientDxe/FdtClientDxe.inf +INF OvmfPkg/Fdt/HighMemDxe/HighMemDxe.inf +INF OvmfPkg/VirtioBlkDxe/VirtioBlk.inf +INF OvmfPkg/VirtioScsiDxe/VirtioScsi.inf +INF OvmfPkg/VirtioNetDxe/VirtioNet.inf +INF OvmfPkg/VirtioRngDxe/VirtioRng.inf +INF MdeModulePkg/Core/RuntimeDxe/RuntimeDxe.inf +INF MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.inf +#INF UefiCpuPkg/CpuIo2Dxe/CpuIo2Dxe.inf + +INF MdeModulePkg/Universal/Metronome/Metronome.inf +INF EmbeddedPkg/RealTimeClockRuntimeDxe/RealTimeClockRuntimeDxe.inf + +# RISC-V Platform Drivers +INF Platform/SiFive/U5SeriesPkg/Universal/Dxe/RamFvbServicesRuntimeDxe/FvbServicesRuntimeDxe.inf + +# RISC-V Core Drivers +INF Platform/SiFive/U5SeriesPkg/Universal/Dxe/TimerDxe/TimerDxe.inf +INF Silicon/RISC-V/ProcessorPkg/Universal/CpuDxe/CpuDxe.inf +INF Silicon/RISC-V/ProcessorPkg/Universal/SmbiosDxe/RiscVSmbiosDxe.inf + +INF MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteDxe.inf + +INF MdeModulePkg/Universal/Variable/RuntimeDxe/VariableRuntimeDxe.inf +!if $(SECURE_BOOT_ENABLE) == TRUE + INF SecurityPkg/VariableAuthenticated/SecureBootConfigDxe/SecureBootConfigDxe.inf +!endif + +INF MdeModulePkg/Universal/ResetSystemRuntimeDxe/ResetSystemRuntimeDxe.inf +INF MdeModulePkg/Universal/WatchdogTimerDxe/WatchdogTimer.inf +INF MdeModulePkg/Universal/MonotonicCounterRuntimeDxe/MonotonicCounterRuntimeDxe.inf +INF MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf +INF MdeModulePkg/Universal/Console/ConPlatformDxe/ConPlatformDxe.inf +INF MdeModulePkg/Universal/Console/ConSplitterDxe/ConSplitterDxe.inf +INF MdeModulePkg/Universal/Console/TerminalDxe/TerminalDxe.inf +INF MdeModulePkg/Universal/BdsDxe/BdsDxe.inf +INF MdeModulePkg/Universal/DevicePathDxe/DevicePathDxe.inf +INF MdeModulePkg/Universal/PrintDxe/PrintDxe.inf +INF MdeModulePkg/Universal/Disk/DiskIoDxe/DiskIoDxe.inf +INF MdeModulePkg/Universal/Disk/PartitionDxe/PartitionDxe.inf +INF MdeModulePkg/Universal/Disk/UnicodeCollation/EnglishDxe/EnglishDxe.inf +INF MdeModulePkg/Bus/Scsi/ScsiBusDxe/ScsiBusDxe.inf +INF MdeModulePkg/Bus/Scsi/ScsiDiskDxe/ScsiDiskDxe.inf +INF MdeModulePkg/Universal/HiiDatabaseDxe/HiiDatabaseDxe.inf +INF MdeModulePkg/Universal/SetupBrowserDxe/SetupBrowserDxe.inf +INF MdeModulePkg/Universal/DisplayEngineDxe/DisplayEngineDxe.inf +INF MdeModulePkg/Universal/MemoryTest/NullMemoryTestDxe/NullMemoryTestDxe.inf +INF FatPkg/EnhancedFatDxe/Fat.inf +INF MdeModulePkg/Universal/Disk/UdfDxe/UdfDxe.inf +INF Silicon/RISC-V/ProcessorPkg/Universal/FdtDxe/FdtDxe.inf + +!ifndef $(SOURCE_DEBUG_ENABLE) +INF MdeModulePkg/Universal/SerialDxe/SerialDxe.inf +!endif + +INF MdeModulePkg/Universal/SmbiosDxe/SmbiosDxe.inf + +INF OvmfPkg/LinuxInitrdDynamicShellCommand/LinuxInitrdDynamicShellCommand.inf +INF ShellPkg/Application/Shell/Shell.inf + +# +# Network modules +# +!if $(E1000_ENABLE) + FILE DRIVER = 5D695E11-9B3F-4b83-B25F-4A8D5D69BE07 { + SECTION PE32 = Intel3.5/EFIX64/E3507X2.EFI + } +!endif + +!include NetworkPkg/Network.fdf.inc + +# +# Usb Support +# +INF MdeModulePkg/Bus/Pci/UhciDxe/UhciDxe.inf +INF MdeModulePkg/Bus/Pci/EhciDxe/EhciDxe.inf +INF MdeModulePkg/Bus/Pci/XhciDxe/XhciDxe.inf +INF MdeModulePkg/Bus/Usb/UsbBusDxe/UsbBusDxe.inf +INF MdeModulePkg/Bus/Usb/UsbKbDxe/UsbKbDxe.inf +INF MdeModulePkg/Bus/Usb/UsbMassStorageDxe/UsbMassStorageDxe.inf + +INF MdeModulePkg/Application/UiApp/UiApp.inf + +################################################################################ + +[FV.FVMAIN_COMPACT] +FvAlignment = 16 +ERASE_POLARITY = 1 +MEMORY_MAPPED = TRUE +STICKY_WRITE = TRUE +LOCK_CAP = TRUE +LOCK_STATUS = TRUE +WRITE_DISABLED_CAP = TRUE +WRITE_ENABLED_CAP = TRUE +WRITE_STATUS = TRUE +WRITE_LOCK_CAP = TRUE +WRITE_LOCK_STATUS = TRUE +READ_DISABLED_CAP = TRUE +READ_ENABLED_CAP = TRUE +READ_STATUS = TRUE +READ_LOCK_CAP = TRUE +READ_LOCK_STATUS = TRUE +FvNameGuid = 27A72E80-3118-4c0c-8673-AA5B4EFA9613 + +FILE FV_IMAGE = 9E21FD93-9C72-4c15-8C4B-E77F1DB2D792 { + SECTION GUIDED EE4E5898-3914-4259-9D6E-DC7BD79403CF PROCESSING_REQUIRED = TRUE { + # + # These firmware volumes will have files placed in them uncompressed, + # and then both firmware volumes will be compressed in a single + # compression operation in order to achieve better overall compression. + # + SECTION FV_IMAGE = DXEFV + } + } + +[Rule.Common.SEC] + FILE SEC = $(NAMED_GUID) RELOCS_STRIPPED { + PE32 PE32 Align=4K $(INF_OUTPUT)/$(MODULE_NAME).efi + UI STRING ="$(MODULE_NAME)" Optional + VERSION STRING ="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER) + } + +[Rule.Common.PEI_CORE] + FILE PEI_CORE = $(NAMED_GUID) { + PE32 PE32 Align=4K $(INF_OUTPUT)/$(MODULE_NAME).efi + UI STRING ="$(MODULE_NAME)" Optional + VERSION STRING ="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER) + } + +[Rule.Common.PEIM] + FILE PEIM = $(NAMED_GUID) { + PEI_DEPEX PEI_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex + PE32 PE32 Align=4K $(INF_OUTPUT)/$(MODULE_NAME).efi + UI STRING="$(MODULE_NAME)" Optional + VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER) + } + +[Rule.Common.DXE_CORE] + FILE DXE_CORE = $(NAMED_GUID) { + PE32 PE32 Align=4K $(INF_OUTPUT)/$(MODULE_NAME).efi + UI STRING="$(MODULE_NAME)" Optional + VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER) + } + +[Rule.Common.DXE_DRIVER] + FILE DRIVER = $(NAMED_GUID) { + DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex + PE32 PE32 Align=4K $(INF_OUTPUT)/$(MODULE_NAME).efi + UI STRING="$(MODULE_NAME)" Optional + VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER) + } + +[Rule.Common.DXE_RUNTIME_DRIVER] + FILE DRIVER = $(NAMED_GUID) { + DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex + PE32 PE32 Align = 4K $(INF_OUTPUT)/$(MODULE_NAME).efi + UI STRING="$(MODULE_NAME)" Optional + VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER) + } + +[Rule.Common.UEFI_DRIVER] + FILE DRIVER = $(NAMED_GUID) { + DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex + PE32 PE32 Align=4K $(INF_OUTPUT)/$(MODULE_NAME).efi + UI STRING="$(MODULE_NAME)" Optional + VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER) + } + +[Rule.Common.UEFI_DRIVER.BINARY] + FILE DRIVER = $(NAMED_GUID) { + DXE_DEPEX DXE_DEPEX Optional |.depex + PE32 PE32 Align=4K |.efi + UI STRING="$(MODULE_NAME)" Optional + VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER) + } + +[Rule.Common.UEFI_APPLICATION] + FILE APPLICATION = $(NAMED_GUID) { + PE32 PE32 Align=4K $(INF_OUTPUT)/$(MODULE_NAME).efi + UI STRING="$(MODULE_NAME)" Optional + VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER) + } + +[Rule.Common.UEFI_APPLICATION.BINARY] + FILE APPLICATION = $(NAMED_GUID) { + PE32 PE32 Align=4K |.efi + UI STRING="$(MODULE_NAME)" Optional + VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER) + } + +[Rule.Common.USER_DEFINED.ACPITABLE] + FILE FREEFORM = $(NAMED_GUID) { + RAW ACPI |.acpi + RAW ASL |.aml + } diff --git a/Platform/Qemu/RiscvVirt/RiscvVirt.fdf.inc b/Platform/Qemu/RiscvVirt/RiscvVirt.fdf.inc new file mode 100644 index 00000000000..c40d80b3964 --- /dev/null +++ b/Platform/Qemu/RiscvVirt/RiscvVirt.fdf.inc @@ -0,0 +1,92 @@ +## @file +# Definitions of Flash definition file on RiscvVirt RISC-V platform +# +# Copyright (c) 2021, Hewlett Packard Enterprise Development LP. All rights reserved.
+# +# SPDX-License-Identifier: BSD-2-Clause-Patent +# +## +[Defines] +DEFINE BLOCK_SIZE = 0x1000 + +DEFINE FW_BASE_ADDRESS = 0x80000000 +DEFINE FW_SIZE = 0x00900000 +DEFINE FW_BLOCKS = 0x900 + +# +# 0x000000-0x7DFFFF code +# 0x7E0000-0x800000 variables +# +DEFINE CODE_BASE_ADDRESS = 0x80000000 +DEFINE CODE_SIZE = 0x00800000 +DEFINE CODE_BLOCKS = 0x800 +DEFINE VARS_BLOCKS = 0x20 + +# +# SEC + opensbi library is the root FW domain. +# The base address must be round up to log2. +# +DEFINE SECFV_OFFSET = 0x00000000 +DEFINE SECFV_SIZE = 0x00040000 +DEFINE ROOT_FW_DOMAIN_SIZE = $(SECFV_SIZE) + +# +# Other FV regions are in the second FW domain. +# The size of memory region must be power of 2. +# The base address must be aligned with the size. +# +# FW memory region +# +DEFINE PEIFV_OFFSET = 0x00400000 +DEFINE PEIFV_SIZE = 0x00180000 +DEFINE FVMAIN_OFFSET = 0x00580000 +DEFINE FVMAIN_SIZE = 0x00280000 + +# +# EFI Variable memory region. +# The total size of EFI Variable FD must include +# all of sub regions of EFI Variable +# +DEFINE VARS_OFFSET = 0x00800000 +DEFINE VARS_SIZE = 0x00007000 +DEFINE VARS_FTW_WORKING_OFFSET = 0x00807000 +DEFINE VARS_FTW_WORKING_SIZE = 0x00001000 +DEFINE VARS_FTW_SPARE_OFFSET = 0x00808000 +DEFINE VARS_FTW_SPARE_SIZE = 0x00018000 + +# +# Scratch area memory region +# +DEFINE SCRATCH_OFFSET = 0x00840000 +DEFINE SCRATCH_SIZE = 0x00010000 + +DEFINE FW_DOMAIN_SIZE = $(FVMAIN_OFFSET) + $(FVMAIN_SIZE) - $(PEIFV_OFFSET) +DEFINE VARIABLE_FW_SIZE = $(VARS_FTW_SPARE_OFFSET) + $(VARS_FTW_SPARE_SIZE) - $(VARS_OFFSET) + +SET gUefiRiscVPlatformPkgTokenSpaceGuid.PcdRootFirmwareDomainBaseAddress = $(CODE_BASE_ADDRESS) + $(SECFV_OFFSET) +SET gUefiRiscVPlatformPkgTokenSpaceGuid.PcdRootFirmwareDomainSize = $(ROOT_FW_DOMAIN_SIZE) +SET gUefiRiscVPlatformPkgTokenSpaceGuid.PcdFirmwareDomainBaseAddress = $(CODE_BASE_ADDRESS) + $(PEIFV_OFFSET) +SET gUefiRiscVPlatformPkgTokenSpaceGuid.PcdFirmwareDomainSize = $(FW_DOMAIN_SIZE) + +SET gUefiRiscVPlatformPkgTokenSpaceGuid.PcdVariableFdBaseAddress = $(FW_BASE_ADDRESS) + $(VARS_OFFSET) +SET gUefiRiscVPlatformPkgTokenSpaceGuid.PcdVariableFdSize = $(VARS_SIZE) + $(VARS_FTW_WORKING_SIZE) + $(VARS_FTW_SPARE_SIZE) +SET gUefiRiscVPlatformPkgTokenSpaceGuid.PcdVariableFdBlockSize = $(BLOCK_SIZE) +SET gUefiRiscVPlatformPkgTokenSpaceGuid.PcdVariableFirmwareRegionBaseAddress = $(CODE_BASE_ADDRESS) + $(VARS_OFFSET) +SET gUefiRiscVPlatformPkgTokenSpaceGuid.PcdVariableFirmwareRegionSize = $(VARIABLE_FW_SIZE) + +SET gUefiRiscVPlatformPkgTokenSpaceGuid.PcdOpenSbiStackSize = 8192 +SET gUefiRiscVPlatformPkgTokenSpaceGuid.PcdScratchRamBase = $(CODE_BASE_ADDRESS) + $(SCRATCH_OFFSET) +SET gUefiRiscVPlatformPkgTokenSpaceGuid.PcdScratchRamSize = $(SCRATCH_SIZE) +SET gUefiRiscVPlatformPkgTokenSpaceGuid.PcdTemporaryRamBase = $(CODE_BASE_ADDRESS) + $(FW_SIZE) +SET gUefiRiscVPlatformPkgTokenSpaceGuid.PcdTemporaryRamSize = 0x10000 + +# +# Device Tree is given by QEUM at the fixed address. +# +SET gUefiRiscVPlatformPkgTokenSpaceGuid.PcdDeviceTreeAddress = 0x1020 + +SET gUefiRiscVPkgTokenSpaceGuid.PcdRiscVMachineTimerFrequencyInHerz = 1000000 +# TODO: This can be dynamically configured in QEMU +SET gUefiRiscVPlatformPkgTokenSpaceGuid.PcdHartCount = 1 # Total cores on U540 platform +SET gUefiRiscVPlatformPkgTokenSpaceGuid.PcdBootHartId = 0 # Boot hart ID +SET gUefiRiscVPlatformPkgTokenSpaceGuid.PcdPeiCorePrivilegeMode = 1 # Set PeiCore to S-Mode diff --git a/Platform/Qemu/RiscvVirt/RiscvVirt.uni b/Platform/Qemu/RiscvVirt/RiscvVirt.uni new file mode 100644 index 00000000000..a92a2d7f30b --- /dev/null +++ b/Platform/Qemu/RiscvVirt/RiscvVirt.uni @@ -0,0 +1,13 @@ +// /** @file +// RiscvVirt Package Localized Strings and Content. +// +// Copyright (c) 2021, Hewlett Packard Enterprise Development LP. All rights reserved.
+// +// SPDX-License-Identifier: BSD-2-Clause-Patent +// +// **/ + + +#string STR_PACKAGE_ABSTRACT #language en-US "Provides RiscvVirt platform modules and libraries" + +#string STR_PACKAGE_DESCRIPTION #language en-US "This Package RiscvVirt platform modules and libraries." diff --git a/Platform/Qemu/RiscvVirt/RiscvVirtPkgExtra.uni b/Platform/Qemu/RiscvVirt/RiscvVirtPkgExtra.uni new file mode 100644 index 00000000000..8bfa52a7950 --- /dev/null +++ b/Platform/Qemu/RiscvVirt/RiscvVirtPkgExtra.uni @@ -0,0 +1,12 @@ +// /** @file +// RiscvVirt Package Localized Strings and Content. +// +// Copyright (c) 2021, Hewlett Packard Enterprise Development LP. All rights reserved.
+// +// SPDX-License-Identifier: BSD-2-Clause-Patent +// +// **/ + +#string STR_PROPERTIES_PACKAGE_NAME +#language en-US +"RiscvVirt board package" diff --git a/Platform/Qemu/RiscvVirt/VarStore.fdf.inc b/Platform/Qemu/RiscvVirt/VarStore.fdf.inc new file mode 100644 index 00000000000..ba93c17a168 --- /dev/null +++ b/Platform/Qemu/RiscvVirt/VarStore.fdf.inc @@ -0,0 +1,78 @@ +## @file +# FDF include file with Layout Regions that define an empty variable store. +# +# Copyright (c) 2021, Hewlett Packard Enterprise Development LP. All rights reserved.
+# Copyright (C) 2014, Red Hat, Inc. +# Copyright (c) 2006 - 2013, Intel Corporation. All rights reserved.
+# +# SPDX-License-Identifier: BSD-2-Clause-Patent +# +## + +$(VARS_OFFSET)|$(VARS_SIZE) +gUefiRiscVPlatformPkgTokenSpaceGuid.PcdPlatformFlashNvStorageVariableBase|gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize +# +# NV_VARIABLE_STORE +# +DATA = { + ## This is the EFI_FIRMWARE_VOLUME_HEADER + # ZeroVector [] + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + # FileSystemGuid: gEfiSystemNvDataFvGuid = + # { 0xFFF12B8D, 0x7696, 0x4C8B, + # { 0xA9, 0x85, 0x27, 0x47, 0x07, 0x5B, 0x4F, 0x50 }} + 0x8D, 0x2B, 0xF1, 0xFF, 0x96, 0x76, 0x8B, 0x4C, + 0xA9, 0x85, 0x27, 0x47, 0x07, 0x5B, 0x4F, 0x50, + # FvLength: 0x20000 + 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, + # Signature "_FVH" # Attributes + 0x5f, 0x46, 0x56, 0x48, 0xff, 0xfe, 0x04, 0x00, + # HeaderLength # CheckSum # ExtHeaderOffset #Reserved #Revision + 0x48, 0x00, 0x39, 0xF1, 0x00, 0x00, 0x00, 0x02, + # Blockmap[0]: 0x20 Blocks * 0x1000 Bytes / Block + 0x00, 0x08, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, + # Blockmap[1]: End + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + ## This is the VARIABLE_STORE_HEADER +!if $(SECURE_BOOT_ENABLE) == TRUE + # Signature: gEfiAuthenticatedVariableGuid = + # { 0xaaf32c78, 0x947b, 0x439a, + # { 0xa1, 0x80, 0x2e, 0x14, 0x4e, 0xc3, 0x77, 0x92 }} + 0x78, 0x2c, 0xf3, 0xaa, 0x7b, 0x94, 0x9a, 0x43, + 0xa1, 0x80, 0x2e, 0x14, 0x4e, 0xc3, 0x77, 0x92, +!else + # Signature: gEfiVariableGuid = + # { 0xddcf3616, 0x3275, 0x4164, + # { 0x98, 0xb6, 0xfe, 0x85, 0x70, 0x7f, 0xfe, 0x7d }} + 0x16, 0x36, 0xcf, 0xdd, 0x75, 0x32, 0x64, 0x41, + 0x98, 0xb6, 0xfe, 0x85, 0x70, 0x7f, 0xfe, 0x7d, +!endif + # Size: 0x7000 (gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize) - + # 0x48 (size of EFI_FIRMWARE_VOLUME_HEADER) = 0x6fb8 + # This can speed up the Variable Dispatch a bit. + 0xB8, 0x6F, 0x00, 0x00, + # FORMATTED: 0x5A #HEALTHY: 0xFE #Reserved: UINT16 #Reserved1: UINT32 + 0x5A, 0xFE, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 +} + +$(VARS_FTW_WORKING_OFFSET)|$(VARS_FTW_WORKING_SIZE) +gUefiRiscVPlatformPkgTokenSpaceGuid.PcdPlatformFlashNvStorageFtwWorkingBase|gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingSize +# +#NV_FTW_WROK +# +DATA = { + # EFI_FAULT_TOLERANT_WORKING_BLOCK_HEADER->Signature = gEdkiiWorkingBlockSignatureGuid = + # { 0x9e58292b, 0x7c68, 0x497d, { 0xa0, 0xce, 0x65, 0x0, 0xfd, 0x9f, 0x1b, 0x95 }} + 0x2b, 0x29, 0x58, 0x9e, 0x68, 0x7c, 0x7d, 0x49, + 0xa0, 0xce, 0x65, 0x0, 0xfd, 0x9f, 0x1b, 0x95, + # Crc:UINT32 #WorkingBlockValid:1, WorkingBlockInvalid:1, Reserved + 0x2c, 0xaf, 0x2c, 0x64, 0xFE, 0xFF, 0xFF, 0xFF, + # WriteQueueSize: UINT64 + 0xE0, 0x0F, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 +} + +$(VARS_FTW_SPARE_OFFSET)|$(VARS_FTW_SPARE_SIZE) +gUefiRiscVPlatformPkgTokenSpaceGuid.PcdPlatformFlashNvStorageFtwSpareBase|gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareSize +# +#NV_FTW_SPARE From 9c4ad356c4c62eb4721e44663c66f5b1e6bfa302 Mon Sep 17 00:00:00 2001 From: Sunil V L Date: Sun, 6 Mar 2022 13:51:08 +0530 Subject: [PATCH 02/17] Qemu/RiscvVirt: Add ACPI support for RISC-V Qemu Virt This patch adds required modules to qemu virt platform build. In qemu, ACPI tables are created by qemu itself and edk2 just installs them in proper way for OS consumption. Signed-off-by: Sunil V L --- Platform/Qemu/RiscvVirt/RiscvVirt.dsc | 16 ++++++++++++++++ Platform/Qemu/RiscvVirt/RiscvVirt.fdf | 6 ++++++ .../PlatformBootManagerLib/PlatformBootManager.c | 3 +++ .../PlatformBootManagerLib.inf | 2 ++ 4 files changed, 27 insertions(+) diff --git a/Platform/Qemu/RiscvVirt/RiscvVirt.dsc b/Platform/Qemu/RiscvVirt/RiscvVirt.dsc index e871e2152ef..5074755127e 100644 --- a/Platform/Qemu/RiscvVirt/RiscvVirt.dsc +++ b/Platform/Qemu/RiscvVirt/RiscvVirt.dsc @@ -383,6 +383,8 @@ #gEfiMdeModulePkgTokenSpaceGuid.PcdSerialBaudRate|115200 #gEfiMdeModulePkgTokenSpaceGuid.PcdSerialClockRate|200000000 + # ACPI + gEfiMdeModulePkgTokenSpaceGuid.PcdAcpiExposedTableVersions|0x20 ################################################################################ # @@ -529,6 +531,19 @@ MdeModulePkg/Universal/DisplayEngineDxe/DisplayEngineDxe.inf MdeModulePkg/Universal/MemoryTest/NullMemoryTestDxe/NullMemoryTestDxe.inf MdeModulePkg/Universal/SerialDxe/SerialDxe.inf + + # + # ACPI support + # + MdeModulePkg/Universal/Acpi/AcpiTableDxe/AcpiTableDxe.inf { + + NULL|EmbeddedPkg/Library/PlatformHasAcpiLib/PlatformHasAcpiLib.inf + } + ArmVirtPkg/PlatformHasAcpiDtDxe/PlatformHasAcpiDtDxe.inf + OvmfPkg/AcpiPlatformDxe/AcpiPlatformDxe.inf { + + NULL|OvmfPkg/Fdt/FdtPciPcdProducerLib/FdtPciPcdProducerLib.inf + } # # SMBIOS Support @@ -601,6 +616,7 @@ NULL|ShellPkg/Library/UefiShellLevel1CommandsLib/UefiShellLevel1CommandsLib.inf NULL|ShellPkg/Library/UefiShellLevel3CommandsLib/UefiShellLevel3CommandsLib.inf NULL|ShellPkg/Library/UefiShellDriver1CommandsLib/UefiShellDriver1CommandsLib.inf + NULL|ShellPkg/Library/UefiShellAcpiViewCommandLib/UefiShellAcpiViewCommandLib.inf NULL|ShellPkg/Library/UefiShellDebug1CommandsLib/UefiShellDebug1CommandsLib.inf NULL|ShellPkg/Library/UefiShellInstall1CommandsLib/UefiShellInstall1CommandsLib.inf NULL|ShellPkg/Library/UefiShellNetwork1CommandsLib/UefiShellNetwork1CommandsLib.inf diff --git a/Platform/Qemu/RiscvVirt/RiscvVirt.fdf b/Platform/Qemu/RiscvVirt/RiscvVirt.fdf index 3a0a42de3b2..d3afb085e48 100644 --- a/Platform/Qemu/RiscvVirt/RiscvVirt.fdf +++ b/Platform/Qemu/RiscvVirt/RiscvVirt.fdf @@ -141,6 +141,12 @@ INF MdeModulePkg/Universal/ReportStatusCodeRouter/RuntimeDxe/ReportStatusCodeRo INF MdeModulePkg/Universal/StatusCodeHandler/RuntimeDxe/StatusCodeHandlerRuntimeDxe.inf INF MdeModulePkg/Universal/PCD/Dxe/Pcd.inf +# +# ACPI +# +INF MdeModulePkg/Universal/Acpi/AcpiTableDxe/AcpiTableDxe.inf +INF OvmfPkg/AcpiPlatformDxe/AcpiPlatformDxe.inf +INF ArmVirtPkg/PlatformHasAcpiDtDxe/PlatformHasAcpiDtDxe.inf # # PCI support diff --git a/Platform/RISC-V/PlatformPkg/Library/PlatformBootManagerLib/PlatformBootManager.c b/Platform/RISC-V/PlatformPkg/Library/PlatformBootManagerLib/PlatformBootManager.c index 21667f4225d..8be269c1b69 100644 --- a/Platform/RISC-V/PlatformPkg/Library/PlatformBootManagerLib/PlatformBootManager.c +++ b/Platform/RISC-V/PlatformPkg/Library/PlatformBootManagerLib/PlatformBootManager.c @@ -8,6 +8,7 @@ SPDX-License-Identifier: BSD-2-Clause-Patent **/ +#include #include "PlatformBootManager.h" EFI_GUID mUefiShellFileGuid = { @@ -169,6 +170,8 @@ PlatformBootManagerBeforeConsole ( // EfiEventGroupSignal (&gEfiEndOfDxeEventGroupGuid); + EfiEventGroupSignal (&gRootBridgesConnectedEventGroupGuid); + // // Update the console variables. // diff --git a/Platform/RISC-V/PlatformPkg/Library/PlatformBootManagerLib/PlatformBootManagerLib.inf b/Platform/RISC-V/PlatformPkg/Library/PlatformBootManagerLib/PlatformBootManagerLib.inf index caefae3b2e6..b96f98f993d 100644 --- a/Platform/RISC-V/PlatformPkg/Library/PlatformBootManagerLib/PlatformBootManagerLib.inf +++ b/Platform/RISC-V/PlatformPkg/Library/PlatformBootManagerLib/PlatformBootManagerLib.inf @@ -31,6 +31,7 @@ MdePkg/MdePkg.dec MdeModulePkg/MdeModulePkg.dec Platform/RISC-V/PlatformPkg/RiscVPlatformPkg.dec + OvmfPkg/OvmfPkg.dec [LibraryClasses] BaseLib @@ -42,6 +43,7 @@ [Guids] gEfiEndOfDxeEventGroupGuid + gRootBridgesConnectedEventGroupGuid [Protocols] gEfiGenericMemTestProtocolGuid ## CONSUMES From 0c5b75404c186f3e19e30cda94de11b4198fc517 Mon Sep 17 00:00:00 2001 From: Sunil V L Date: Sun, 6 Mar 2022 13:58:05 +0530 Subject: [PATCH 03/17] Qemu/RiscvVirt: Add SMBIOS table support for QEMU RISC-V virt platform. Signed-off-by: Sunil V L --- Platform/Qemu/RiscvVirt/RiscvVirt.dsc | 8 +++++++- Platform/Qemu/RiscvVirt/RiscvVirt.fdf | 1 + 2 files changed, 8 insertions(+), 1 deletion(-) diff --git a/Platform/Qemu/RiscvVirt/RiscvVirt.dsc b/Platform/Qemu/RiscvVirt/RiscvVirt.dsc index 5074755127e..c61876f9486 100644 --- a/Platform/Qemu/RiscvVirt/RiscvVirt.dsc +++ b/Platform/Qemu/RiscvVirt/RiscvVirt.dsc @@ -385,6 +385,8 @@ #gEfiMdeModulePkgTokenSpaceGuid.PcdSerialClockRate|200000000 # ACPI gEfiMdeModulePkgTokenSpaceGuid.PcdAcpiExposedTableVersions|0x20 + # SMBIOS - prevent 32bit table installation + gEfiMdeModulePkgTokenSpaceGuid.PcdSmbiosEntryPointProvideMethod|0x2 ################################################################################ # @@ -548,7 +550,11 @@ # # SMBIOS Support # - MdeModulePkg/Universal/SmbiosDxe/SmbiosDxe.inf + MdeModulePkg/Universal/SmbiosDxe/SmbiosDxe.inf { + + NULL|OvmfPkg/Library/SmbiosVersionLib/DetectSmbiosVersionLib.inf + } + OvmfPkg/SmbiosPlatformDxe/SmbiosPlatformDxe.inf # # Network Support diff --git a/Platform/Qemu/RiscvVirt/RiscvVirt.fdf b/Platform/Qemu/RiscvVirt/RiscvVirt.fdf index d3afb085e48..75fbe294474 100644 --- a/Platform/Qemu/RiscvVirt/RiscvVirt.fdf +++ b/Platform/Qemu/RiscvVirt/RiscvVirt.fdf @@ -217,6 +217,7 @@ INF MdeModulePkg/Universal/SerialDxe/SerialDxe.inf !endif INF MdeModulePkg/Universal/SmbiosDxe/SmbiosDxe.inf +INF OvmfPkg/SmbiosPlatformDxe/SmbiosPlatformDxe.inf INF OvmfPkg/LinuxInitrdDynamicShellCommand/LinuxInitrdDynamicShellCommand.inf INF ShellPkg/Application/Shell/Shell.inf From 66f0634eb0e8aed8e8bf7d17f3a676be76134e59 Mon Sep 17 00:00:00 2001 From: Sunil V L Date: Sun, 6 Mar 2022 14:03:48 +0530 Subject: [PATCH 04/17] Qemu/RiscvVirt: Don't install DT when ACPI tables are present The firmware should install either DT or ACPI tables, not both. This patch detects that qemu has created ACPI tables and provide preference to ACPI in that case and avoids installing DT. Ideally, this should be given as choice to the user as in ARM platform. Signed-off-by: Sunil V L --- .../ProcessorPkg/Universal/FdtDxe/FdtDxe.c | 17 +++++++++++++---- .../ProcessorPkg/Universal/FdtDxe/FdtDxe.inf | 3 ++- 2 files changed, 15 insertions(+), 5 deletions(-) diff --git a/Silicon/RISC-V/ProcessorPkg/Universal/FdtDxe/FdtDxe.c b/Silicon/RISC-V/ProcessorPkg/Universal/FdtDxe/FdtDxe.c index 1e76249237a..9342fc107d9 100644 --- a/Silicon/RISC-V/ProcessorPkg/Universal/FdtDxe/FdtDxe.c +++ b/Silicon/RISC-V/ProcessorPkg/Universal/FdtDxe/FdtDxe.c @@ -17,6 +17,7 @@ #include #include #include +#include /** Fix up the device tree with booting hartid for the kernel @@ -126,9 +127,17 @@ InstallFdt ( IN EFI_SYSTEM_TABLE *SystemTable ) { - EFI_STATUS Status; - - Status = InstallFdtFromHob (); - + EFI_STATUS Status = EFI_SUCCESS; + UINTN FwCfgSize; + FIRMWARE_CONFIG_ITEM FwCfgItem; + + if (EFI_ERROR ( + QemuFwCfgFindFile ( + "etc/table-loader", + &FwCfgItem, + &FwCfgSize + ))) { + Status = InstallFdtFromHob (); + } return Status; } diff --git a/Silicon/RISC-V/ProcessorPkg/Universal/FdtDxe/FdtDxe.inf b/Silicon/RISC-V/ProcessorPkg/Universal/FdtDxe/FdtDxe.inf index ae6468f9f55..6df179a6274 100644 --- a/Silicon/RISC-V/ProcessorPkg/Universal/FdtDxe/FdtDxe.inf +++ b/Silicon/RISC-V/ProcessorPkg/Universal/FdtDxe/FdtDxe.inf @@ -26,7 +26,7 @@ MdeModulePkg/MdeModulePkg.dec MdePkg/MdePkg.dec Platform/RISC-V/PlatformPkg/RiscVPlatformPkg.dec - EmbeddedPkg/EmbeddedPkg.dec + OvmfPkg/OvmfPkg.dec [LibraryClasses] BaseLib @@ -38,6 +38,7 @@ RiscVCpuLib UefiBootServicesTableLib UefiDriverEntryPoint + QemuFwCfgLib [Sources] FdtDxe.c From 6daebc9af276422a3aee3d2204b4731d4b517e29 Mon Sep 17 00:00:00 2001 From: Sunil V L Date: Sun, 6 Mar 2022 14:23:22 +0530 Subject: [PATCH 05/17] RISC-V: Implement RISCV_EFI_BOOT_PROTOCOL RISC-V platforms need to support new RISCV_EFI_BOOT_PROTOCOL to communicate the boot hart id to the OS. This patch implements this protocol. Signed-off-by: Sunil V L --- Platform/Qemu/RiscvVirt/RiscvVirt.dsc | 1 + .../RISC-V/ProcessorPkg/Include/RiscVImpl.h | 17 ++++++++ .../RiscVFirmwareContextSscratchLib.inf | 2 +- .../RISC-V/ProcessorPkg/RiscVProcessorPkg.dec | 3 ++ .../ProcessorPkg/Universal/CpuDxe/CpuDxe.c | 43 +++++++++++++++++++ .../ProcessorPkg/Universal/CpuDxe/CpuDxe.inf | 3 ++ 6 files changed, 68 insertions(+), 1 deletion(-) diff --git a/Platform/Qemu/RiscvVirt/RiscvVirt.dsc b/Platform/Qemu/RiscvVirt/RiscvVirt.dsc index c61876f9486..3905e613435 100644 --- a/Platform/Qemu/RiscvVirt/RiscvVirt.dsc +++ b/Platform/Qemu/RiscvVirt/RiscvVirt.dsc @@ -292,6 +292,7 @@ VariablePolicyLib|MdeModulePkg/Library/VariablePolicyLib/VariablePolicyLib.inf [LibraryClasses.common.DXE_DRIVER] + RiscVFirmwareContextLib|Silicon/RISC-V/ProcessorPkg/Library/RiscVFirmwareContextSscratchLib/RiscVFirmwareContextSscratchLib.inf PcdLib|MdePkg/Library/DxePcdLib/DxePcdLib.inf TimerLib|Silicon/RISC-V/ProcessorPkg/Library/RiscVTimerLib/BaseRiscVTimerLib.inf HobLib|MdePkg/Library/DxeHobLib/DxeHobLib.inf diff --git a/Silicon/RISC-V/ProcessorPkg/Include/RiscVImpl.h b/Silicon/RISC-V/ProcessorPkg/Include/RiscVImpl.h index 261de698699..52d9bb81c02 100644 --- a/Silicon/RISC-V/ProcessorPkg/Include/RiscVImpl.h +++ b/Silicon/RISC-V/ProcessorPkg/Include/RiscVImpl.h @@ -27,6 +27,8 @@ typedef UINT64 RISC_V_REGS_PROTOTYPE; #else #endif +typedef struct _RISCV_EFI_BOOT_PROTOCOL RISCV_EFI_BOOT_PROTOCOL; + // // Structure for 128-bit value // @@ -84,4 +86,19 @@ typedef struct _RISCV_MACHINE_MODE_CONTEXT { TRAP_HANDLER_CONTEXT MModeHandler; /// Handler for machine mode. } RISCV_MACHINE_MODE_CONTEXT; +#define RISCV_EFI_BOOT_PROTOCOL_REVISION 0x00010000 +#define RISCV_EFI_BOOT_PROTOCOL_LATEST_VERSION \ + RISCV_EFI_BOOT_PROTOCOL_REVISION + +typedef EFI_STATUS +(EFIAPI *EFI_GET_BOOT_HARTID) ( + IN RISCV_EFI_BOOT_PROTOCOL *This, + OUT UINTN *BootHartId + ); + +typedef struct _RISCV_EFI_BOOT_PROTOCOL { + UINT64 Revision; + EFI_GET_BOOT_HARTID GetBootHartId; +} RISCV_EFI_BOOT_PROTOCOL; + #endif diff --git a/Silicon/RISC-V/ProcessorPkg/Library/RiscVFirmwareContextSscratchLib/RiscVFirmwareContextSscratchLib.inf b/Silicon/RISC-V/ProcessorPkg/Library/RiscVFirmwareContextSscratchLib/RiscVFirmwareContextSscratchLib.inf index 09e635fd1d1..036cfb0fe38 100644 --- a/Silicon/RISC-V/ProcessorPkg/Library/RiscVFirmwareContextSscratchLib/RiscVFirmwareContextSscratchLib.inf +++ b/Silicon/RISC-V/ProcessorPkg/Library/RiscVFirmwareContextSscratchLib/RiscVFirmwareContextSscratchLib.inf @@ -15,7 +15,7 @@ FILE_GUID = 3709E048-6794-427A-B728-BFE3FFD6D461 MODULE_TYPE = PEIM VERSION_STRING = 1.0 - LIBRARY_CLASS = RiscVFirmwareContextLib|PEIM PEI_CORE + LIBRARY_CLASS = RiscVFirmwareContextLib|PEIM PEI_CORE DXE_DRIVER # # VALID_ARCHITECTURES = RISCV64 diff --git a/Silicon/RISC-V/ProcessorPkg/RiscVProcessorPkg.dec b/Silicon/RISC-V/ProcessorPkg/RiscVProcessorPkg.dec index 177c1a710d8..af8b638b453 100644 --- a/Silicon/RISC-V/ProcessorPkg/RiscVProcessorPkg.dec +++ b/Silicon/RISC-V/ProcessorPkg/RiscVProcessorPkg.dec @@ -31,6 +31,9 @@ [Guids] gUefiRiscVPkgTokenSpaceGuid = { 0x4261e9c8, 0x52c0, 0x4b34, { 0x85, 0x3d, 0x48, 0x46, 0xea, 0xd3, 0xb7, 0x2c}} +[Protocols] + gUefiRiscVBootProtocolGuid = { 0xccd15fec, 0x6f73, 0x4eec, { 0x83, 0x95, 0x3e, 0x69, 0xe4, 0xb9, 0x40, 0xbf}} + [PcdsFixedAtBuild] # Processor Specific Data GUID HOB GUID gUefiRiscVPkgTokenSpaceGuid.PcdProcessorSpecificDataGuidHobGuid|{0x20, 0x72, 0xD5, 0x2F, 0xCF, 0x3C, 0x4C, 0xBC, 0xB1, 0x65, 0x94, 0x90, 0xDC, 0xF2, 0xFA, 0x93}|VOID*|0x00001000 diff --git a/Silicon/RISC-V/ProcessorPkg/Universal/CpuDxe/CpuDxe.c b/Silicon/RISC-V/ProcessorPkg/Universal/CpuDxe/CpuDxe.c index 8d4d406edf0..6f6a18db05c 100644 --- a/Silicon/RISC-V/ProcessorPkg/Universal/CpuDxe/CpuDxe.c +++ b/Silicon/RISC-V/ProcessorPkg/Universal/CpuDxe/CpuDxe.c @@ -7,6 +7,9 @@ **/ +#include +#include +#include #include "CpuDxe.h" // @@ -14,6 +17,27 @@ // STATIC BOOLEAN mInterruptState = FALSE; STATIC EFI_HANDLE mCpuHandle = NULL; +STATIC UINTN mBootHartId; + +EFI_STATUS +EFIAPI +RiscvGetBootHartId ( + IN RISCV_EFI_BOOT_PROTOCOL *This, + OUT UINTN *BootHartId + ) +{ + if((This == NULL) || (BootHartId == NULL)) { + return EFI_INVALID_PARAMETER; + } + + *BootHartId = mBootHartId; + return EFI_SUCCESS; +} + +RISCV_EFI_BOOT_PROTOCOL gRiscvBootProtocol = { + RISCV_EFI_BOOT_PROTOCOL_LATEST_VERSION, + RiscvGetBootHartId +}; EFI_CPU_ARCH_PROTOCOL gCpu = { CpuFlushCpuDataCache, @@ -285,6 +309,18 @@ InitializeCpu ( ) { EFI_STATUS Status; + EFI_RISCV_OPENSBI_FIRMWARE_CONTEXT *FirmwareContext; + + GetFirmwareContextPointer (&FirmwareContext); + ASSERT (FirmwareContext != NULL); + if (FirmwareContext == NULL) { + DEBUG ((DEBUG_ERROR, "Failed to get the pointer of EFI_RISCV_OPENSBI_FIRMWARE_CONTEXT\n")); + return EFI_NOT_FOUND; + } + DEBUG ((DEBUG_INFO, " %a: Firmware Context is at 0x%x.\n", __FUNCTION__, FirmwareContext)); + + mBootHartId = FirmwareContext->BootHartId; + DEBUG ((DEBUG_INFO, " %a: mBootHartId = 0x%x.\n", __FUNCTION__, mBootHartId)); // // Machine mode handler is initiated in CpuExceptionHandlerLibConstructor in @@ -296,6 +332,13 @@ InitializeCpu ( // DisableInterrupts (); + Status = gBS->InstallProtocolInterface (&ImageHandle, + &gUefiRiscVBootProtocolGuid, + EFI_NATIVE_INTERFACE, + &gRiscvBootProtocol + ); + + ASSERT_EFI_ERROR (Status); // // Install CPU Architectural Protocol // diff --git a/Silicon/RISC-V/ProcessorPkg/Universal/CpuDxe/CpuDxe.inf b/Silicon/RISC-V/ProcessorPkg/Universal/CpuDxe/CpuDxe.inf index a422c12e321..fb1d163149f 100644 --- a/Silicon/RISC-V/ProcessorPkg/Universal/CpuDxe/CpuDxe.inf +++ b/Silicon/RISC-V/ProcessorPkg/Universal/CpuDxe/CpuDxe.inf @@ -20,6 +20,7 @@ MdeModulePkg/MdeModulePkg.dec MdePkg/MdePkg.dec Silicon/RISC-V/ProcessorPkg/RiscVProcessorPkg.dec + Platform/RISC-V/PlatformPkg/RiscVPlatformPkg.dec [LibraryClasses] BaseLib @@ -31,6 +32,7 @@ TimerLib UefiBootServicesTableLib UefiDriverEntryPoint + RiscVFirmwareContextLib [Sources] CpuDxe.c @@ -38,6 +40,7 @@ [Protocols] gEfiCpuArchProtocolGuid ## PRODUCES + gUefiRiscVBootProtocolGuid ## PRODUCES [Pcd] gUefiRiscVPkgTokenSpaceGuid.PcdRiscVMachineTimerFrequencyInHerz From de432c4007af5d810f1bf2a97439e47e3fa6d2db Mon Sep 17 00:00:00 2001 From: Sunil V L Date: Sun, 6 Mar 2022 14:42:21 +0530 Subject: [PATCH 06/17] Qemu/RiscvVirt: Enable booting EDK2 in S-mode as payload of opensbi Currently, opensbi is integrated as a library in EDK2. Hence, it is always required to boot EDK2 in M-mode. This patch enables booting EDK2 in S-mode. A prior stage M-mode firmware like opensbi is mandatory in this case to boot edk2 in S-Mode. This enables working with latest opensbi without going through the process of integration with EDK2. Signed-off-by: Sunil V L --- Platform/Qemu/RiscvVirt/RiscvVirt.fdf.inc | 8 ++- .../Universal/Sec/Riscv64/SecEntry.S | 24 +++++++++ .../PlatformPkg/Universal/Sec/SecMain.c | 50 +++++++++++++++++++ .../PlatformPkg/Universal/Sec/SecMain.inf | 1 + 4 files changed, 82 insertions(+), 1 deletion(-) diff --git a/Platform/Qemu/RiscvVirt/RiscvVirt.fdf.inc b/Platform/Qemu/RiscvVirt/RiscvVirt.fdf.inc index c40d80b3964..54041dc3ce7 100644 --- a/Platform/Qemu/RiscvVirt/RiscvVirt.fdf.inc +++ b/Platform/Qemu/RiscvVirt/RiscvVirt.fdf.inc @@ -17,7 +17,7 @@ DEFINE FW_BLOCKS = 0x900 # 0x000000-0x7DFFFF code # 0x7E0000-0x800000 variables # -DEFINE CODE_BASE_ADDRESS = 0x80000000 +DEFINE CODE_BASE_ADDRESS = $(FW_BASE_ADDRESS) DEFINE CODE_SIZE = 0x00800000 DEFINE CODE_BLOCKS = 0x800 DEFINE VARS_BLOCKS = 0x20 @@ -90,3 +90,9 @@ SET gUefiRiscVPkgTokenSpaceGuid.PcdRiscVMachineTimerFrequencyInHerz = 1000000 SET gUefiRiscVPlatformPkgTokenSpaceGuid.PcdHartCount = 1 # Total cores on U540 platform SET gUefiRiscVPlatformPkgTokenSpaceGuid.PcdBootHartId = 0 # Boot hart ID SET gUefiRiscVPlatformPkgTokenSpaceGuid.PcdPeiCorePrivilegeMode = 1 # Set PeiCore to S-Mode + +!ifdef $(EDK2_PAYLOAD_OFFSET) + SET gUefiRiscVPlatformPkgTokenSpaceGuid.PcdEdk2InSMode = 1 # EDK2 in S-Mode +!else + SET gUefiRiscVPlatformPkgTokenSpaceGuid.PcdEdk2InSMode = 0 # EDK2 in M-Mode +!endif diff --git a/Platform/RISC-V/PlatformPkg/Universal/Sec/Riscv64/SecEntry.S b/Platform/RISC-V/PlatformPkg/Universal/Sec/Riscv64/SecEntry.S index 8a8701f1bd7..6e19237fc2d 100644 --- a/Platform/RISC-V/PlatformPkg/Universal/Sec/Riscv64/SecEntry.S +++ b/Platform/RISC-V/PlatformPkg/Universal/Sec/Riscv64/SecEntry.S @@ -29,6 +29,30 @@ .globl _start_warm ASM_FUNC (_ModuleEntryPoint) + li a5, FixedPcdGet32 (PcdEdk2InSMode) + beqz a5, edk2_M_mode + + /* Use Temp memory as the stack for calling to C code */ + li a4, FixedPcdGet32 (PcdTemporaryRamBase) + li a5, FixedPcdGet32 (PcdTemporaryRamSize) + add sp, a4, a5 + + /* opensbi will pass hartid in a0 and DTB in a1, save them */ + add s0, a0, 0 + add s1, a1, 0 + + /* Call library constructors before jup to SEC core */ + call ProcessLibraryConstructorList + + /* Restore a0 and a1 before calling C */ + add a0, s0, 0 + add a1, s1, 0 + call PeiCoreSMode + + /* We do not expect to reach here hence just hang */ + j _start_hang + +edk2_M_mode: /* * Jump to warm-boot if this is not the selected core booting, */ diff --git a/Platform/RISC-V/PlatformPkg/Universal/Sec/SecMain.c b/Platform/RISC-V/PlatformPkg/Universal/Sec/SecMain.c index c488f03a6a6..27ad02eac7d 100644 --- a/Platform/RISC-V/PlatformPkg/Universal/Sec/SecMain.c +++ b/Platform/RISC-V/PlatformPkg/Universal/Sec/SecMain.c @@ -493,6 +493,56 @@ PeiCore ( sbi_init (Scratch); } +VOID EFIAPI PeiCoreSMode ( + IN UINTN BootHartId, + IN VOID *DeviceTreeAddress + ) +{ + EFI_SEC_PEI_HAND_OFF SecCoreData; + EFI_PEI_CORE_ENTRY_POINT PeiCoreEntryPoint; + EFI_FIRMWARE_VOLUME_HEADER *BootFv = (EFI_FIRMWARE_VOLUME_HEADER *)FixedPcdGet32(PcdRiscVPeiFvBase); + EFI_RISCV_OPENSBI_FIRMWARE_CONTEXT FirmwareContext; + + DEBUG ((DEBUG_INFO, "PeiCoreSMode: DeviceTreeAddress = 0x%p\n", + DeviceTreeAddress)); + DEBUG ((DEBUG_INFO, "PeiCoreSMode: BootHartId = %d\n", BootHartId)); + FindAndReportEntryPoints (&BootFv, &PeiCoreEntryPoint); + + SecCoreData.DataSize = sizeof(EFI_SEC_PEI_HAND_OFF); + SecCoreData.BootFirmwareVolumeBase = BootFv; + SecCoreData.BootFirmwareVolumeSize = (UINTN) BootFv->FvLength; + SecCoreData.TemporaryRamBase = (VOID*)(UINT64) FixedPcdGet32(PcdTemporaryRamBase); + SecCoreData.TemporaryRamSize = (UINTN) FixedPcdGet32(PcdTemporaryRamSize); + SecCoreData.PeiTemporaryRamBase = SecCoreData.TemporaryRamBase; + SecCoreData.PeiTemporaryRamSize = SecCoreData.TemporaryRamSize >> 1; + SecCoreData.StackBase = (UINT8 *)SecCoreData.TemporaryRamBase + (SecCoreData.TemporaryRamSize >> 1); + SecCoreData.StackSize = SecCoreData.TemporaryRamSize >> 1; + + // + // Set up OpepSBI firmware context pointer on boot hart OpenSbi scratch. + // Firmware context residents in stack and will be switched to memory when + // temporary RAM migration. + // + ZeroMem ((VOID *)&FirmwareContext, sizeof (EFI_RISCV_OPENSBI_FIRMWARE_CONTEXT)); + + // + // Save Flattened Device tree in firmware context + // + FirmwareContext.FlattenedDeviceTree = (UINT64)DeviceTreeAddress; + + FirmwareContext.SecPeiHandOffData = (UINT64)&SecCoreData; + + // + // REVISIT: Set supervisor translation mode to Bare mode + // + DEBUG ((DEBUG_INFO, "%a: Set Supervisor address mode to Bare-mode.\n", __FUNCTION__)); + RiscVSetSupervisorAddressTranslationRegister ((UINT64)RISCV_SATP_MODE_OFF << RISCV_SATP_MODE_BIT_POSITION); + // + // Transfer the control to the PEI core + // + PeiCoreEntryPoint((EFI_SEC_PEI_HAND_OFF *) BootHartId, (EFI_PEI_PPI_DESCRIPTOR *)&FirmwareContext); +} + /** Register firmware SBI extension and launch PeiCore to the mode specified in PcdPeiCorePrivilegeMode; diff --git a/Platform/RISC-V/PlatformPkg/Universal/Sec/SecMain.inf b/Platform/RISC-V/PlatformPkg/Universal/Sec/SecMain.inf index 1e8d53f4868..53bceb408fe 100644 --- a/Platform/RISC-V/PlatformPkg/Universal/Sec/SecMain.inf +++ b/Platform/RISC-V/PlatformPkg/Universal/Sec/SecMain.inf @@ -62,6 +62,7 @@ [Pcd] gUefiRiscVPlatformPkgTokenSpaceGuid.PcdBootHartId + gUefiRiscVPlatformPkgTokenSpaceGuid.PcdEdk2InSMode gUefiRiscVPlatformPkgTokenSpaceGuid.PcdRootFirmwareDomainBaseAddress gUefiRiscVPlatformPkgTokenSpaceGuid.PcdRootFirmwareDomainSize gUefiRiscVPlatformPkgTokenSpaceGuid.PcdBootableHartNumber From 42130ae30b50a8598d5fb7ec7f3a7be2fe3f0795 Mon Sep 17 00:00:00 2001 From: Sunil V L Date: Sun, 6 Mar 2022 14:44:13 +0530 Subject: [PATCH 07/17] Qemu/RiscvVirt: Remove hardcoded system memory size Currently, the system memory size is hardcoded. But the system memory can be configured while launching qemu. Hence, this patch enables reading memory configured at runtime. Signed-off-by: Sunil V L --- Platform/Qemu/RiscvVirt/RiscvVirt.dsc | 5 +- .../RISC-V/PlatformPkg/RiscVPlatformPkg.dec | 7 ++- .../PlatformPkg/Universal/FdtPeim/FdtPeim.c | 56 +++++++++++++++++++ .../PlatformPkg/Universal/FdtPeim/FdtPeim.inf | 5 ++ .../Universal/Pei/PlatformPei/MemDetect.c | 18 +++--- .../Universal/Pei/PlatformPei/PlatformPei.inf | 2 + 6 files changed, 80 insertions(+), 13 deletions(-) diff --git a/Platform/Qemu/RiscvVirt/RiscvVirt.dsc b/Platform/Qemu/RiscvVirt/RiscvVirt.dsc index 3905e613435..5e0a296e5be 100644 --- a/Platform/Qemu/RiscvVirt/RiscvVirt.dsc +++ b/Platform/Qemu/RiscvVirt/RiscvVirt.dsc @@ -445,7 +445,10 @@ PcdLib|MdePkg/Library/PeiPcdLib/PeiPcdLib.inf } - Platform/RISC-V/PlatformPkg/Universal/FdtPeim/FdtPeim.inf + Platform/RISC-V/PlatformPkg/Universal/FdtPeim/FdtPeim.inf { + + PcdLib|MdePkg/Library/PeiPcdLib/PeiPcdLib.inf + } # # DXE Phase modules diff --git a/Platform/RISC-V/PlatformPkg/RiscVPlatformPkg.dec b/Platform/RISC-V/PlatformPkg/RiscVPlatformPkg.dec index b45f48fdc58..3c1201a5c0e 100644 --- a/Platform/RISC-V/PlatformPkg/RiscVPlatformPkg.dec +++ b/Platform/RISC-V/PlatformPkg/RiscVPlatformPkg.dec @@ -72,6 +72,7 @@ # as {0x1, 0x2, 0x3}. # gUefiRiscVPlatformPkgTokenSpaceGuid.PcdBootableHartIndexToId|NULL|VOID*|0x00001086 + gUefiRiscVPlatformPkgTokenSpaceGuid.PcdEdk2InSMode|0|UINT32|0x00001087 # # Definitions for OpenSbi # @@ -88,7 +89,11 @@ [PcdsFeatureFlag] -[PcdsFixedAtBuild, PcdsPatchableInModule, PcdsDynamic, PcdsDynamicEx] +[PcdsDynamic] + gUefiRiscVPlatformPkgTokenSpaceGuid.PcdSystemMemorySize|0x40000000|UINT64|0x00001300 + gUefiRiscVPlatformPkgTokenSpaceGuid.PcdSystemMemoryBase|0x80000000|UINT64|0x00001301 + +[PcdsFixedAtBuild, PcdsPatchableInModule, PcdsDynamicEx] [UserExtensions.TianoCore."ExtraFiles"] RiscVPlatformPkgExtra.uni diff --git a/Platform/RISC-V/PlatformPkg/Universal/FdtPeim/FdtPeim.c b/Platform/RISC-V/PlatformPkg/Universal/FdtPeim/FdtPeim.c index c56dc4e5455..7bdff60743a 100644 --- a/Platform/RISC-V/PlatformPkg/Universal/FdtPeim/FdtPeim.c +++ b/Platform/RISC-V/PlatformPkg/Universal/FdtPeim/FdtPeim.c @@ -11,11 +11,66 @@ SPDX-License-Identifier: BSD-2-Clause-Patent #include #include #include +#include #include #include +EFI_STATUS QemuGetMemoryInfo( + VOID *DeviceTreeBase + ) +{ + INT32 Node, Prev; + CONST CHAR8 *Type; + INT32 Len; + CONST UINT64 *RegProp; + RETURN_STATUS PcdStatus; + UINT64 CurBase, CurSize; + UINT64 NewBase = 0, NewSize = 0; + + // Look for the lowest memory node + for (Prev = 0;; Prev = Node) { + Node = fdt_next_node (DeviceTreeBase, Prev, NULL); + if (Node < 0) { + break; + } + + // Check for memory node + Type = fdt_getprop (DeviceTreeBase, Node, "device_type", &Len); + if (Type && AsciiStrnCmp (Type, "memory", Len) == 0) { + // Get the 'reg' property of this node. For now, we will assume + // two 8 byte quantities for base and size, respectively. + RegProp = fdt_getprop (DeviceTreeBase, Node, "reg", &Len); + if (RegProp != 0 && Len == (2 * sizeof (UINT64))) { + + CurBase = fdt64_to_cpu (ReadUnaligned64 (RegProp)); + CurSize = fdt64_to_cpu (ReadUnaligned64 (RegProp + 1)); + + DEBUG ((DEBUG_INFO, "%a: System RAM @ 0x%lx - 0x%lx\n", + __FUNCTION__, CurBase, CurBase + CurSize - 1)); + + if (NewBase > CurBase || NewBase == 0) { + NewBase = CurBase; + NewSize = CurSize; + } + } else { + DEBUG ((DEBUG_ERROR, "%a: Failed to parse FDT memory node\n", + __FUNCTION__)); + } + } + } + + DEBUG ((DEBUG_INFO, "QemuGetMemoryInfo: NewSize = 0x%lx, NewBase = 0x%lx\n", + NewSize, NewBase)); + PcdStatus = PcdSet64S (PcdSystemMemorySize, NewSize); + ASSERT_RETURN_ERROR (PcdStatus); + PcdStatus = PcdSet64S (PcdSystemMemoryBase, NewBase); + ASSERT_RETURN_ERROR (PcdStatus); + + return EFI_SUCCESS; +} + /** The entrypoint of the module, it will pass the FDT via a HOB. @@ -64,6 +119,7 @@ PeimPassFdt ( NewBase = AllocatePages (FdtPages); ASSERT (NewBase != NULL); fdt_open_into (Base, NewBase, EFI_PAGES_TO_SIZE (FdtPages)); + QemuGetMemoryInfo(NewBase); FdtHobData = BuildGuidHob (&gFdtHobGuid, sizeof *FdtHobData); ASSERT (FdtHobData != NULL); diff --git a/Platform/RISC-V/PlatformPkg/Universal/FdtPeim/FdtPeim.inf b/Platform/RISC-V/PlatformPkg/Universal/FdtPeim/FdtPeim.inf index 2579dafe869..26866e9ba2c 100644 --- a/Platform/RISC-V/PlatformPkg/Universal/FdtPeim/FdtPeim.inf +++ b/Platform/RISC-V/PlatformPkg/Universal/FdtPeim/FdtPeim.inf @@ -31,6 +31,7 @@ MdePkg/MdePkg.dec MdeModulePkg/MdeModulePkg.dec Silicon/RISC-V/ProcessorPkg/RiscVProcessorPkg.dec + Platform/RISC-V/PlatformPkg/RiscVPlatformPkg.dec [LibraryClasses] DebugLib @@ -42,5 +43,9 @@ [Guids] gFdtHobGuid ## PRODUCES +[Pcd] + gUefiRiscVPlatformPkgTokenSpaceGuid.PcdSystemMemoryBase + gUefiRiscVPlatformPkgTokenSpaceGuid.PcdSystemMemorySize + [Depex] TRUE diff --git a/Platform/RISC-V/PlatformPkg/Universal/Pei/PlatformPei/MemDetect.c b/Platform/RISC-V/PlatformPkg/Universal/Pei/PlatformPei/MemDetect.c index 3e579bfbf51..b122d16d1ed 100644 --- a/Platform/RISC-V/PlatformPkg/Universal/Pei/PlatformPei/MemDetect.c +++ b/Platform/RISC-V/PlatformPkg/Universal/Pei/PlatformPei/MemDetect.c @@ -45,12 +45,8 @@ PublishPeiMemory ( EFI_PHYSICAL_ADDRESS MemoryBase; UINT64 MemorySize; - // - // TODO: This value should come from platform - // configuration or the memory sizing code. - // - MemoryBase = 0x80000000UL + 0x1000000UL; - MemorySize = 0x40000000UL - 0x1000000UL; // 1GB - 16MB + MemoryBase = PcdGet64(PcdSystemMemoryBase) + 0x1000000UL; + MemorySize = PcdGet64(PcdSystemMemorySize) - 0x1000000UL; //1GB - 16MB DEBUG ((DEBUG_INFO, "%a: MemoryBase:0x%x MemorySize:%x\n", __FUNCTION__, MemoryBase, MemorySize)); @@ -72,9 +68,9 @@ InitializeRamRegions ( VOID ) { - // - // TODO: This value should come from platform - // configuration or the memory sizing code. - // - AddMemoryRangeHob (0x81000000UL, 0x81000000UL + 0x3F000000UL); + UINT64 Start, End; + + Start = PcdGet64(PcdSystemMemoryBase) + 0x1000000UL; + End = Start + (PcdGet64(PcdSystemMemorySize) - 0x1000000UL); + AddMemoryRangeHob(Start, End); } diff --git a/Platform/RISC-V/PlatformPkg/Universal/Pei/PlatformPei/PlatformPei.inf b/Platform/RISC-V/PlatformPkg/Universal/Pei/PlatformPei/PlatformPei.inf index e99a3b9c1d7..ecee7ac977b 100644 --- a/Platform/RISC-V/PlatformPkg/Universal/Pei/PlatformPei/PlatformPei.inf +++ b/Platform/RISC-V/PlatformPkg/Universal/Pei/PlatformPei/PlatformPei.inf @@ -58,6 +58,8 @@ gUefiRiscVPlatformPkgTokenSpaceGuid.PcdRiscVDxeFvSize gUefiRiscVPlatformPkgTokenSpaceGuid.PcdTemporaryRamBase gUefiRiscVPlatformPkgTokenSpaceGuid.PcdTemporaryRamSize + gUefiRiscVPlatformPkgTokenSpaceGuid.PcdSystemMemoryBase + gUefiRiscVPlatformPkgTokenSpaceGuid.PcdSystemMemorySize [Ppis] gEfiPeiMasterBootModePpiGuid From 9afb87d17c9dd1c3fdd7e407052d62cd7232b8dd Mon Sep 17 00:00:00 2001 From: Sunil V L Date: Thu, 31 Mar 2022 20:17:37 +0530 Subject: [PATCH 08/17] Qemu/RiscvVirt: Fix timer frequency On Qemu, timer frequency is 10000000. But EDK2 is currently using 1000000. Due to this, the timeout expires much faster. Signed-off-by: Sunil V L --- Platform/Qemu/RiscvVirt/RiscvVirt.fdf.inc | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/Platform/Qemu/RiscvVirt/RiscvVirt.fdf.inc b/Platform/Qemu/RiscvVirt/RiscvVirt.fdf.inc index 54041dc3ce7..d1bc4e22a62 100644 --- a/Platform/Qemu/RiscvVirt/RiscvVirt.fdf.inc +++ b/Platform/Qemu/RiscvVirt/RiscvVirt.fdf.inc @@ -85,7 +85,7 @@ SET gUefiRiscVPlatformPkgTokenSpaceGuid.PcdTemporaryRamSize = 0x10000 # SET gUefiRiscVPlatformPkgTokenSpaceGuid.PcdDeviceTreeAddress = 0x1020 -SET gUefiRiscVPkgTokenSpaceGuid.PcdRiscVMachineTimerFrequencyInHerz = 1000000 +SET gUefiRiscVPkgTokenSpaceGuid.PcdRiscVMachineTimerFrequencyInHerz = 10000000 # TODO: This can be dynamically configured in QEMU SET gUefiRiscVPlatformPkgTokenSpaceGuid.PcdHartCount = 1 # Total cores on U540 platform SET gUefiRiscVPlatformPkgTokenSpaceGuid.PcdBootHartId = 0 # Boot hart ID From 90746e917587484052914dd9dda963dc84a778c5 Mon Sep 17 00:00:00 2001 From: Sunil V L Date: Tue, 5 Apr 2022 21:41:56 +0530 Subject: [PATCH 09/17] RiscVVirt: Enable full Boot Manager Menu Signed-off-by: Sunil V L --- .../PlatformBootManagerLib/PlatformBm.c | 1079 +++++++++++++++++ .../PlatformBootManagerLib/PlatformBm.h | 45 + .../PlatformBootManagerLib.inf | 78 ++ .../PlatformBootManagerLib/QemuKernel.c | 77 ++ Platform/Qemu/RiscvVirt/RiscvVirt.dsc | 45 +- 5 files changed, 1319 insertions(+), 5 deletions(-) create mode 100644 Platform/Qemu/RiscvVirt/Library/PlatformBootManagerLib/PlatformBm.c create mode 100644 Platform/Qemu/RiscvVirt/Library/PlatformBootManagerLib/PlatformBm.h create mode 100644 Platform/Qemu/RiscvVirt/Library/PlatformBootManagerLib/PlatformBootManagerLib.inf create mode 100644 Platform/Qemu/RiscvVirt/Library/PlatformBootManagerLib/QemuKernel.c diff --git a/Platform/Qemu/RiscvVirt/Library/PlatformBootManagerLib/PlatformBm.c b/Platform/Qemu/RiscvVirt/Library/PlatformBootManagerLib/PlatformBm.c new file mode 100644 index 00000000000..bb371ec3e95 --- /dev/null +++ b/Platform/Qemu/RiscvVirt/Library/PlatformBootManagerLib/PlatformBm.c @@ -0,0 +1,1079 @@ +/** @file + Implementation for PlatformBootManagerLib library class interfaces. + + Copyright (C) 2015-2016, Red Hat, Inc. + Copyright (c) 2014, ARM Ltd. All rights reserved.
+ Copyright (c) 2004 - 2018, Intel Corporation. All rights reserved.
+ + SPDX-License-Identifier: BSD-2-Clause-Patent + +**/ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include "PlatformBm.h" + +#define DP_NODE_LEN(Type) { (UINT8)sizeof (Type), (UINT8)(sizeof (Type) >> 8) } + +#define VERSION_STRING_PREFIX L"Tianocore/EDK2 firmware version " + +#pragma pack (1) +typedef struct { + VENDOR_DEVICE_PATH SerialDxe; + UART_DEVICE_PATH Uart; + VENDOR_DEFINED_DEVICE_PATH TermType; + EFI_DEVICE_PATH_PROTOCOL End; +} PLATFORM_SERIAL_CONSOLE; +#pragma pack () + +STATIC PLATFORM_SERIAL_CONSOLE mSerialConsole = { + // + // VENDOR_DEVICE_PATH SerialDxe + // + { + { HARDWARE_DEVICE_PATH, HW_VENDOR_DP, DP_NODE_LEN (VENDOR_DEVICE_PATH) }, + EDKII_SERIAL_PORT_LIB_VENDOR_GUID + }, + + // + // UART_DEVICE_PATH Uart + // + { + { MESSAGING_DEVICE_PATH, MSG_UART_DP, DP_NODE_LEN (UART_DEVICE_PATH) }, + 0, // Reserved + FixedPcdGet64 (PcdUartDefaultBaudRate), // BaudRate + FixedPcdGet8 (PcdUartDefaultDataBits), // DataBits + FixedPcdGet8 (PcdUartDefaultParity), // Parity + FixedPcdGet8 (PcdUartDefaultStopBits) // StopBits + }, + + // + // VENDOR_DEFINED_DEVICE_PATH TermType + // + { + { + MESSAGING_DEVICE_PATH, MSG_VENDOR_DP, + DP_NODE_LEN (VENDOR_DEFINED_DEVICE_PATH) + } + // + // Guid to be filled in dynamically + // + }, + + // + // EFI_DEVICE_PATH_PROTOCOL End + // + { + END_DEVICE_PATH_TYPE, END_ENTIRE_DEVICE_PATH_SUBTYPE, + DP_NODE_LEN (EFI_DEVICE_PATH_PROTOCOL) + } +}; + +#pragma pack (1) +typedef struct { + USB_CLASS_DEVICE_PATH Keyboard; + EFI_DEVICE_PATH_PROTOCOL End; +} PLATFORM_USB_KEYBOARD; +#pragma pack () + +STATIC PLATFORM_USB_KEYBOARD mUsbKeyboard = { + // + // USB_CLASS_DEVICE_PATH Keyboard + // + { + { + MESSAGING_DEVICE_PATH, MSG_USB_CLASS_DP, + DP_NODE_LEN (USB_CLASS_DEVICE_PATH) + }, + 0xFFFF, // VendorId: any + 0xFFFF, // ProductId: any + 3, // DeviceClass: HID + 1, // DeviceSubClass: boot + 1 // DeviceProtocol: keyboard + }, + + // + // EFI_DEVICE_PATH_PROTOCOL End + // + { + END_DEVICE_PATH_TYPE, END_ENTIRE_DEVICE_PATH_SUBTYPE, + DP_NODE_LEN (EFI_DEVICE_PATH_PROTOCOL) + } +}; + +/** + Check if the handle satisfies a particular condition. + + @param[in] Handle The handle to check. + @param[in] ReportText A caller-allocated string passed in for reporting + purposes. It must never be NULL. + + @retval TRUE The condition is satisfied. + @retval FALSE Otherwise. This includes the case when the condition could not + be fully evaluated due to an error. +**/ +typedef +BOOLEAN +(EFIAPI *FILTER_FUNCTION)( + IN EFI_HANDLE Handle, + IN CONST CHAR16 *ReportText + ); + +/** + Process a handle. + + @param[in] Handle The handle to process. + @param[in] ReportText A caller-allocated string passed in for reporting + purposes. It must never be NULL. +**/ +typedef +VOID +(EFIAPI *CALLBACK_FUNCTION)( + IN EFI_HANDLE Handle, + IN CONST CHAR16 *ReportText + ); + +/** + Locate all handles that carry the specified protocol, filter them with a + callback function, and pass each handle that passes the filter to another + callback. + + @param[in] ProtocolGuid The protocol to look for. + + @param[in] Filter The filter function to pass each handle to. If this + parameter is NULL, then all handles are processed. + + @param[in] Process The callback function to pass each handle to that + clears the filter. +**/ +STATIC +VOID +FilterAndProcess ( + IN EFI_GUID *ProtocolGuid, + IN FILTER_FUNCTION Filter OPTIONAL, + IN CALLBACK_FUNCTION Process + ) +{ + EFI_STATUS Status; + EFI_HANDLE *Handles; + UINTN NoHandles; + UINTN Idx; + + Status = gBS->LocateHandleBuffer ( + ByProtocol, + ProtocolGuid, + NULL /* SearchKey */, + &NoHandles, + &Handles + ); + if (EFI_ERROR (Status)) { + // + // This is not an error, just an informative condition. + // + DEBUG (( + DEBUG_VERBOSE, + "%a: %g: %r\n", + __FUNCTION__, + ProtocolGuid, + Status + )); + return; + } + + ASSERT (NoHandles > 0); + for (Idx = 0; Idx < NoHandles; ++Idx) { + CHAR16 *DevicePathText; + STATIC CHAR16 Fallback[] = L""; + + // + // The ConvertDevicePathToText() function handles NULL input transparently. + // + DevicePathText = ConvertDevicePathToText ( + DevicePathFromHandle (Handles[Idx]), + FALSE, // DisplayOnly + FALSE // AllowShortcuts + ); + if (DevicePathText == NULL) { + DevicePathText = Fallback; + } + + if ((Filter == NULL) || Filter (Handles[Idx], DevicePathText)) { + Process (Handles[Idx], DevicePathText); + } + + if (DevicePathText != Fallback) { + FreePool (DevicePathText); + } + } + + gBS->FreePool (Handles); +} + +/** + This FILTER_FUNCTION checks if a handle corresponds to a PCI display device. +**/ +STATIC +BOOLEAN +EFIAPI +IsPciDisplay ( + IN EFI_HANDLE Handle, + IN CONST CHAR16 *ReportText + ) +{ + EFI_STATUS Status; + EFI_PCI_IO_PROTOCOL *PciIo; + PCI_TYPE00 Pci; + + Status = gBS->HandleProtocol ( + Handle, + &gEfiPciIoProtocolGuid, + (VOID **)&PciIo + ); + if (EFI_ERROR (Status)) { + // + // This is not an error worth reporting. + // + return FALSE; + } + + Status = PciIo->Pci.Read ( + PciIo, + EfiPciIoWidthUint32, + 0 /* Offset */, + sizeof Pci / sizeof (UINT32), + &Pci + ); + if (EFI_ERROR (Status)) { + DEBUG ((DEBUG_ERROR, "%a: %s: %r\n", __FUNCTION__, ReportText, Status)); + return FALSE; + } + + return IS_PCI_DISPLAY (&Pci); +} + +/** + This FILTER_FUNCTION checks if a handle corresponds to a Virtio RNG device at + the VIRTIO_DEVICE_PROTOCOL level. +**/ +STATIC +BOOLEAN +EFIAPI +IsVirtioRng ( + IN EFI_HANDLE Handle, + IN CONST CHAR16 *ReportText + ) +{ + EFI_STATUS Status; + VIRTIO_DEVICE_PROTOCOL *VirtIo; + + Status = gBS->HandleProtocol ( + Handle, + &gVirtioDeviceProtocolGuid, + (VOID **)&VirtIo + ); + if (EFI_ERROR (Status)) { + return FALSE; + } + + return (BOOLEAN)(VirtIo->SubSystemDeviceId == + VIRTIO_SUBSYSTEM_ENTROPY_SOURCE); +} + +/** + This FILTER_FUNCTION checks if a handle corresponds to a Virtio RNG device at + the EFI_PCI_IO_PROTOCOL level. +**/ +STATIC +BOOLEAN +EFIAPI +IsVirtioPciRng ( + IN EFI_HANDLE Handle, + IN CONST CHAR16 *ReportText + ) +{ + EFI_STATUS Status; + EFI_PCI_IO_PROTOCOL *PciIo; + UINT16 VendorId; + UINT16 DeviceId; + UINT8 RevisionId; + BOOLEAN Virtio10; + UINT16 SubsystemId; + + Status = gBS->HandleProtocol ( + Handle, + &gEfiPciIoProtocolGuid, + (VOID **)&PciIo + ); + if (EFI_ERROR (Status)) { + return FALSE; + } + + // + // Read and check VendorId. + // + Status = PciIo->Pci.Read ( + PciIo, + EfiPciIoWidthUint16, + PCI_VENDOR_ID_OFFSET, + 1, + &VendorId + ); + if (EFI_ERROR (Status)) { + goto PciError; + } + + if (VendorId != VIRTIO_VENDOR_ID) { + return FALSE; + } + + // + // Read DeviceId and RevisionId. + // + Status = PciIo->Pci.Read ( + PciIo, + EfiPciIoWidthUint16, + PCI_DEVICE_ID_OFFSET, + 1, + &DeviceId + ); + if (EFI_ERROR (Status)) { + goto PciError; + } + + Status = PciIo->Pci.Read ( + PciIo, + EfiPciIoWidthUint8, + PCI_REVISION_ID_OFFSET, + 1, + &RevisionId + ); + if (EFI_ERROR (Status)) { + goto PciError; + } + + // + // From DeviceId and RevisionId, determine whether the device is a + // modern-only Virtio 1.0 device. In case of Virtio 1.0, DeviceId can + // immediately be restricted to VIRTIO_SUBSYSTEM_ENTROPY_SOURCE, and + // SubsystemId will only play a sanity-check role. Otherwise, DeviceId can + // only be sanity-checked, and SubsystemId will decide. + // + if ((DeviceId == 0x1040 + VIRTIO_SUBSYSTEM_ENTROPY_SOURCE) && + (RevisionId >= 0x01)) + { + Virtio10 = TRUE; + } else if ((DeviceId >= 0x1000) && (DeviceId <= 0x103F) && (RevisionId == 0x00)) { + Virtio10 = FALSE; + } else { + return FALSE; + } + + // + // Read and check SubsystemId as dictated by Virtio10. + // + Status = PciIo->Pci.Read ( + PciIo, + EfiPciIoWidthUint16, + PCI_SUBSYSTEM_ID_OFFSET, + 1, + &SubsystemId + ); + if (EFI_ERROR (Status)) { + goto PciError; + } + + if (Virtio10 && (SubsystemId >= 0x40)) { + return TRUE; + } + + if (!Virtio10 && (SubsystemId == VIRTIO_SUBSYSTEM_ENTROPY_SOURCE)) { + return TRUE; + } + + return FALSE; + +PciError: + DEBUG ((DEBUG_ERROR, "%a: %s: %r\n", __FUNCTION__, ReportText, Status)); + return FALSE; +} + +/** + This CALLBACK_FUNCTION attempts to connect a handle non-recursively, asking + the matching driver to produce all first-level child handles. +**/ +STATIC +VOID +EFIAPI +Connect ( + IN EFI_HANDLE Handle, + IN CONST CHAR16 *ReportText + ) +{ + EFI_STATUS Status; + + Status = gBS->ConnectController ( + Handle, // ControllerHandle + NULL, // DriverImageHandle + NULL, // RemainingDevicePath -- produce all children + FALSE // Recursive + ); + DEBUG (( + EFI_ERROR (Status) ? DEBUG_ERROR : DEBUG_VERBOSE, + "%a: %s: %r\n", + __FUNCTION__, + ReportText, + Status + )); +} + +/** + This CALLBACK_FUNCTION retrieves the EFI_DEVICE_PATH_PROTOCOL from the + handle, and adds it to ConOut and ErrOut. +**/ +STATIC +VOID +EFIAPI +AddOutput ( + IN EFI_HANDLE Handle, + IN CONST CHAR16 *ReportText + ) +{ + EFI_STATUS Status; + EFI_DEVICE_PATH_PROTOCOL *DevicePath; + + DevicePath = DevicePathFromHandle (Handle); + if (DevicePath == NULL) { + DEBUG (( + DEBUG_ERROR, + "%a: %s: handle %p: device path not found\n", + __FUNCTION__, + ReportText, + Handle + )); + return; + } + + Status = EfiBootManagerUpdateConsoleVariable (ConOut, DevicePath, NULL); + if (EFI_ERROR (Status)) { + DEBUG (( + DEBUG_ERROR, + "%a: %s: adding to ConOut: %r\n", + __FUNCTION__, + ReportText, + Status + )); + return; + } + + Status = EfiBootManagerUpdateConsoleVariable (ErrOut, DevicePath, NULL); + if (EFI_ERROR (Status)) { + DEBUG (( + DEBUG_ERROR, + "%a: %s: adding to ErrOut: %r\n", + __FUNCTION__, + ReportText, + Status + )); + return; + } + + DEBUG (( + DEBUG_VERBOSE, + "%a: %s: added to ConOut and ErrOut\n", + __FUNCTION__, + ReportText + )); +} + +STATIC +VOID +PlatformRegisterFvBootOption ( + EFI_GUID *FileGuid, + CHAR16 *Description, + UINT32 Attributes + ) +{ + EFI_STATUS Status; + INTN OptionIndex; + EFI_BOOT_MANAGER_LOAD_OPTION NewOption; + EFI_BOOT_MANAGER_LOAD_OPTION *BootOptions; + UINTN BootOptionCount; + MEDIA_FW_VOL_FILEPATH_DEVICE_PATH FileNode; + EFI_LOADED_IMAGE_PROTOCOL *LoadedImage; + EFI_DEVICE_PATH_PROTOCOL *DevicePath; + + Status = gBS->HandleProtocol ( + gImageHandle, + &gEfiLoadedImageProtocolGuid, + (VOID **)&LoadedImage + ); + ASSERT_EFI_ERROR (Status); + + EfiInitializeFwVolDevicepathNode (&FileNode, FileGuid); + DevicePath = DevicePathFromHandle (LoadedImage->DeviceHandle); + ASSERT (DevicePath != NULL); + DevicePath = AppendDevicePathNode ( + DevicePath, + (EFI_DEVICE_PATH_PROTOCOL *)&FileNode + ); + ASSERT (DevicePath != NULL); + + Status = EfiBootManagerInitializeLoadOption ( + &NewOption, + LoadOptionNumberUnassigned, + LoadOptionTypeBoot, + Attributes, + Description, + DevicePath, + NULL, + 0 + ); + ASSERT_EFI_ERROR (Status); + FreePool (DevicePath); + + BootOptions = EfiBootManagerGetLoadOptions ( + &BootOptionCount, + LoadOptionTypeBoot + ); + + OptionIndex = EfiBootManagerFindLoadOption ( + &NewOption, + BootOptions, + BootOptionCount + ); + + if (OptionIndex == -1) { + Status = EfiBootManagerAddLoadOptionVariable (&NewOption, MAX_UINTN); + ASSERT_EFI_ERROR (Status); + } + + EfiBootManagerFreeLoadOption (&NewOption); + EfiBootManagerFreeLoadOptions (BootOptions, BootOptionCount); +} + +/** + Remove all MemoryMapped(...)/FvFile(...) and Fv(...)/FvFile(...) boot options + whose device paths do not resolve exactly to an FvFile in the system. + + This removes any boot options that point to binaries built into the firmware + and have become stale due to any of the following: + - FvMain's base address or size changed (historical), + - FvMain's FvNameGuid changed, + - the FILE_GUID of the pointed-to binary changed, + - the referenced binary is no longer built into the firmware. + + EfiBootManagerFindLoadOption() used in PlatformRegisterFvBootOption() only + avoids exact duplicates. +**/ +STATIC +VOID +RemoveStaleFvFileOptions ( + VOID + ) +{ + EFI_BOOT_MANAGER_LOAD_OPTION *BootOptions; + UINTN BootOptionCount; + UINTN Index; + + BootOptions = EfiBootManagerGetLoadOptions ( + &BootOptionCount, + LoadOptionTypeBoot + ); + + for (Index = 0; Index < BootOptionCount; ++Index) { + EFI_DEVICE_PATH_PROTOCOL *Node1, *Node2, *SearchNode; + EFI_STATUS Status; + EFI_HANDLE FvHandle; + + // + // If the device path starts with neither MemoryMapped(...) nor Fv(...), + // then keep the boot option. + // + Node1 = BootOptions[Index].FilePath; + if (!((DevicePathType (Node1) == HARDWARE_DEVICE_PATH) && + (DevicePathSubType (Node1) == HW_MEMMAP_DP)) && + !((DevicePathType (Node1) == MEDIA_DEVICE_PATH) && + (DevicePathSubType (Node1) == MEDIA_PIWG_FW_VOL_DP))) + { + continue; + } + + // + // If the second device path node is not FvFile(...), then keep the boot + // option. + // + Node2 = NextDevicePathNode (Node1); + if ((DevicePathType (Node2) != MEDIA_DEVICE_PATH) || + (DevicePathSubType (Node2) != MEDIA_PIWG_FW_FILE_DP)) + { + continue; + } + + // + // Locate the Firmware Volume2 protocol instance that is denoted by the + // boot option. If this lookup fails (i.e., the boot option references a + // firmware volume that doesn't exist), then we'll proceed to delete the + // boot option. + // + SearchNode = Node1; + Status = gBS->LocateDevicePath ( + &gEfiFirmwareVolume2ProtocolGuid, + &SearchNode, + &FvHandle + ); + + if (!EFI_ERROR (Status)) { + // + // The firmware volume was found; now let's see if it contains the FvFile + // identified by GUID. + // + EFI_FIRMWARE_VOLUME2_PROTOCOL *FvProtocol; + MEDIA_FW_VOL_FILEPATH_DEVICE_PATH *FvFileNode; + UINTN BufferSize; + EFI_FV_FILETYPE FoundType; + EFI_FV_FILE_ATTRIBUTES FileAttributes; + UINT32 AuthenticationStatus; + + Status = gBS->HandleProtocol ( + FvHandle, + &gEfiFirmwareVolume2ProtocolGuid, + (VOID **)&FvProtocol + ); + ASSERT_EFI_ERROR (Status); + + FvFileNode = (MEDIA_FW_VOL_FILEPATH_DEVICE_PATH *)Node2; + // + // Buffer==NULL means we request metadata only: BufferSize, FoundType, + // FileAttributes. + // + Status = FvProtocol->ReadFile ( + FvProtocol, + &FvFileNode->FvFileName, // NameGuid + NULL, // Buffer + &BufferSize, + &FoundType, + &FileAttributes, + &AuthenticationStatus + ); + if (!EFI_ERROR (Status)) { + // + // The FvFile was found. Keep the boot option. + // + continue; + } + } + + // + // Delete the boot option. + // + Status = EfiBootManagerDeleteLoadOptionVariable ( + BootOptions[Index].OptionNumber, + LoadOptionTypeBoot + ); + DEBUG_CODE_BEGIN (); + CHAR16 *DevicePathString; + + DevicePathString = ConvertDevicePathToText ( + BootOptions[Index].FilePath, + FALSE, + FALSE + ); + DEBUG (( + EFI_ERROR (Status) ? DEBUG_WARN : DEBUG_VERBOSE, + "%a: removing stale Boot#%04x %s: %r\n", + __FUNCTION__, + (UINT32)BootOptions[Index].OptionNumber, + DevicePathString == NULL ? L"" : DevicePathString, + Status + )); + if (DevicePathString != NULL) { + FreePool (DevicePathString); + } + + DEBUG_CODE_END (); + } + + EfiBootManagerFreeLoadOptions (BootOptions, BootOptionCount); +} + +STATIC +VOID +PlatformRegisterOptionsAndKeys ( + VOID + ) +{ + EFI_STATUS Status; + EFI_INPUT_KEY Enter; + EFI_INPUT_KEY F2; + EFI_INPUT_KEY Esc; + EFI_BOOT_MANAGER_LOAD_OPTION BootOption; + + // + // Register ENTER as CONTINUE key + // + Enter.ScanCode = SCAN_NULL; + Enter.UnicodeChar = CHAR_CARRIAGE_RETURN; + Status = EfiBootManagerRegisterContinueKeyOption (0, &Enter, NULL); + ASSERT_EFI_ERROR (Status); + + // + // Map F2 and ESC to Boot Manager Menu + // + F2.ScanCode = SCAN_F2; + F2.UnicodeChar = CHAR_NULL; + Esc.ScanCode = SCAN_ESC; + Esc.UnicodeChar = CHAR_NULL; + Status = EfiBootManagerGetBootManagerMenu (&BootOption); + ASSERT_EFI_ERROR (Status); + Status = EfiBootManagerAddKeyOptionVariable ( + NULL, + (UINT16)BootOption.OptionNumber, + 0, + &F2, + NULL + ); + ASSERT (Status == EFI_SUCCESS || Status == EFI_ALREADY_STARTED); + Status = EfiBootManagerAddKeyOptionVariable ( + NULL, + (UINT16)BootOption.OptionNumber, + 0, + &Esc, + NULL + ); + ASSERT (Status == EFI_SUCCESS || Status == EFI_ALREADY_STARTED); +} + +// +// BDS Platform Functions +// + +/** + Do the platform init, can be customized by OEM/IBV + Possible things that can be done in PlatformBootManagerBeforeConsole: + > Update console variable: 1. include hot-plug devices; + > 2. Clear ConIn and add SOL for AMT + > Register new Driver#### or Boot#### + > Register new Key####: e.g.: F12 + > Signal ReadyToLock event + > Authentication action: 1. connect Auth devices; + > 2. Identify auto logon user. +**/ +VOID +EFIAPI +PlatformBootManagerBeforeConsole ( + VOID + ) +{ + UINT16 FrontPageTimeout; + RETURN_STATUS PcdStatus; + EFI_STATUS Status; + + // + // Signal EndOfDxe PI Event + // + EfiEventGroupSignal (&gEfiEndOfDxeEventGroupGuid); + + // + // Disable the TPM 2 platform hierarchy + // + ConfigureTpmPlatformHierarchy (); + + // + // Dispatch deferred images after EndOfDxe event. + // + EfiBootManagerDispatchDeferredImages (); + + // + // Locate the PCI root bridges and make the PCI bus driver connect each, + // non-recursively. This will produce a number of child handles with PciIo on + // them. + // + FilterAndProcess (&gEfiPciRootBridgeIoProtocolGuid, NULL, Connect); + + // + // Signal the ACPI platform driver that it can download QEMU ACPI tables. + // + EfiEventGroupSignal (&gRootBridgesConnectedEventGroupGuid); + + // + // Find all display class PCI devices (using the handles from the previous + // step), and connect them non-recursively. This should produce a number of + // child handles with GOPs on them. + // + FilterAndProcess (&gEfiPciIoProtocolGuid, IsPciDisplay, Connect); + + // + // Now add the device path of all handles with GOP on them to ConOut and + // ErrOut. + // + FilterAndProcess (&gEfiGraphicsOutputProtocolGuid, NULL, AddOutput); + + // + // Add the hardcoded short-form USB keyboard device path to ConIn. + // + EfiBootManagerUpdateConsoleVariable ( + ConIn, + (EFI_DEVICE_PATH_PROTOCOL *)&mUsbKeyboard, + NULL + ); + + // + // Add the hardcoded serial console device path to ConIn, ConOut, ErrOut. + // + CopyGuid ( + &mSerialConsole.TermType.Guid, + PcdGetPtr (PcdTerminalTypeGuidBuffer) + ); + EfiBootManagerUpdateConsoleVariable ( + ConIn, + (EFI_DEVICE_PATH_PROTOCOL *)&mSerialConsole, + NULL + ); + EfiBootManagerUpdateConsoleVariable ( + ConOut, + (EFI_DEVICE_PATH_PROTOCOL *)&mSerialConsole, + NULL + ); + EfiBootManagerUpdateConsoleVariable ( + ErrOut, + (EFI_DEVICE_PATH_PROTOCOL *)&mSerialConsole, + NULL + ); + + // + // Set the front page timeout from the QEMU configuration. + // + FrontPageTimeout = GetFrontPageTimeoutFromQemu (); + PcdStatus = PcdSet16S (PcdPlatformBootTimeOut, FrontPageTimeout); + ASSERT_RETURN_ERROR (PcdStatus); + // + // Reflect the PCD in the standard Timeout variable. + // + Status = gRT->SetVariable ( + EFI_TIME_OUT_VARIABLE_NAME, + &gEfiGlobalVariableGuid, + (EFI_VARIABLE_NON_VOLATILE | + EFI_VARIABLE_BOOTSERVICE_ACCESS | + EFI_VARIABLE_RUNTIME_ACCESS), + sizeof FrontPageTimeout, + &FrontPageTimeout + ); + DEBUG (( + EFI_ERROR (Status) ? DEBUG_ERROR : DEBUG_VERBOSE, + "%a: SetVariable(%s, %u): %r\n", + __FUNCTION__, + EFI_TIME_OUT_VARIABLE_NAME, + FrontPageTimeout, + Status + )); + + // + // Register platform-specific boot options and keyboard shortcuts. + // + PlatformRegisterOptionsAndKeys (); + + // + // At this point, VIRTIO_DEVICE_PROTOCOL instances exist only for Virtio MMIO + // transports. Install EFI_RNG_PROTOCOL instances on Virtio MMIO RNG devices. + // + FilterAndProcess (&gVirtioDeviceProtocolGuid, IsVirtioRng, Connect); + + // + // Install both VIRTIO_DEVICE_PROTOCOL and (dependent) EFI_RNG_PROTOCOL + // instances on Virtio PCI RNG devices. + // + FilterAndProcess (&gEfiPciIoProtocolGuid, IsVirtioPciRng, Connect); +} + +/** + Do the platform specific action after the console is ready + Possible things that can be done in PlatformBootManagerAfterConsole: + > Console post action: + > Dynamically switch output mode from 100x31 to 80x25 for certain scenario + > Signal console ready platform customized event + > Run diagnostics like memory testing + > Connect certain devices + > Dispatch additional option roms + > Special boot: e.g.: USB boot, enter UI +**/ +VOID +EFIAPI +PlatformBootManagerAfterConsole ( + VOID + ) +{ + RETURN_STATUS Status; + UINTN FirmwareVerLength; + + FirmwareVerLength = StrLen (PcdGetPtr (PcdFirmwareVersionString)); + // + // Show the splash screen. + // + BootLogoEnableLogo (); + + if (FirmwareVerLength > 0) { + Print ( + VERSION_STRING_PREFIX L"%s\n", + PcdGetPtr (PcdFirmwareVersionString) + ); + } + + Print (L"Press ESCAPE for boot options "); + // + // Process QEMU's -kernel command line option. The kernel booted this way + // will receive ACPI tables: in PlatformBootManagerBeforeConsole(), we + // connected any and all PCI root bridges, and then signaled the ACPI + // platform driver. + // + TryRunningQemuKernel (); + + // + // Connect the purported boot devices. + // + Status = ConnectDevicesFromQemu (); + if (RETURN_ERROR (Status)) { + // + // Connect the rest of the devices. + // + EfiBootManagerConnectAll (); + } + + // + // Enumerate all possible boot options, then filter and reorder them based on + // the QEMU configuration. + // + EfiBootManagerRefreshAllBootOption (); + + // + // Register UEFI Shell + // + PlatformRegisterFvBootOption ( + &gUefiShellFileGuid, + L"EFI Internal Shell", + LOAD_OPTION_ACTIVE + ); + + RemoveStaleFvFileOptions (); + SetBootOrderFromQemu (); + + PlatformBmPrintScRegisterHandler (); +} + +/** + This function is called each second during the boot manager waits the + timeout. + + @param TimeoutRemain The remaining timeout. +**/ +VOID +EFIAPI +PlatformBootManagerWaitCallback ( + UINT16 TimeoutRemain + ) +{ + EFI_GRAPHICS_OUTPUT_BLT_PIXEL_UNION Black; + EFI_GRAPHICS_OUTPUT_BLT_PIXEL_UNION White; + UINT16 TimeoutInitial; + + TimeoutInitial = PcdGet16 (PcdPlatformBootTimeOut); + + // + // If PcdPlatformBootTimeOut is set to zero, then we consider + // that no progress update should be enacted. + // + if (TimeoutInitial == 0) { + return; + } + + Black.Raw = 0x00000000; + White.Raw = 0x00FFFFFF; + + BootLogoUpdateProgress ( + White.Pixel, + Black.Pixel, + L"Start boot option", + White.Pixel, + (TimeoutInitial - TimeoutRemain) * 100 / TimeoutInitial, + 0 + ); +} + +/** + The function is called when no boot option could be launched, + including platform recovery options and options pointing to applications + built into firmware volumes. + + If this function returns, BDS attempts to enter an infinite loop. +**/ +VOID +EFIAPI +PlatformBootManagerUnableToBoot ( + VOID + ) +{ + EFI_STATUS Status; + EFI_INPUT_KEY Key; + EFI_BOOT_MANAGER_LOAD_OPTION BootManagerMenu; + UINTN Index; + + // + // BootManagerMenu doesn't contain the correct information when return status + // is EFI_NOT_FOUND. + // + Status = EfiBootManagerGetBootManagerMenu (&BootManagerMenu); + if (EFI_ERROR (Status)) { + return; + } + + // + // Normally BdsDxe does not print anything to the system console, but this is + // a last resort -- the end-user will likely not see any DEBUG messages + // logged in this situation. + // + // AsciiPrint() will NULL-check gST->ConOut internally. We check gST->ConIn + // here to see if it makes sense to request and wait for a keypress. + // + if (gST->ConIn != NULL) { + AsciiPrint ( + "%a: No bootable option or device was found.\n" + "%a: Press any key to enter the Boot Manager Menu.\n", + gEfiCallerBaseName, + gEfiCallerBaseName + ); + Status = gBS->WaitForEvent (1, &gST->ConIn->WaitForKey, &Index); + ASSERT_EFI_ERROR (Status); + ASSERT (Index == 0); + + // + // Drain any queued keys. + // + while (!EFI_ERROR (gST->ConIn->ReadKeyStroke (gST->ConIn, &Key))) { + // + // just throw away Key + // + } + } + + for ( ; ;) { + EfiBootManagerBoot (&BootManagerMenu); + } +} diff --git a/Platform/Qemu/RiscvVirt/Library/PlatformBootManagerLib/PlatformBm.h b/Platform/Qemu/RiscvVirt/Library/PlatformBootManagerLib/PlatformBm.h new file mode 100644 index 00000000000..70c52d9832c --- /dev/null +++ b/Platform/Qemu/RiscvVirt/Library/PlatformBootManagerLib/PlatformBm.h @@ -0,0 +1,45 @@ +/** @file + Head file for BDS Platform specific code + + Copyright (C) 2015-2016, Red Hat, Inc. + Copyright (c) 2004 - 2008, Intel Corporation. All rights reserved.
+ + SPDX-License-Identifier: BSD-2-Clause-Patent + +**/ + +#ifndef _PLATFORM_BM_H_ +#define _PLATFORM_BM_H_ + +#include +#include +#include +#include +#include +#include +#include +#include + +/** + Download the kernel, the initial ramdisk, and the kernel command line from + QEMU's fw_cfg. Construct a minimal SimpleFileSystem that contains the two + image files, and load and start the kernel from it. + + The kernel will be instructed via its command line to load the initrd from + the same Simple FileSystem. + + @retval EFI_NOT_FOUND Kernel image was not found. + @retval EFI_OUT_OF_RESOURCES Memory allocation failed. + @retval EFI_PROTOCOL_ERROR Unterminated kernel command line. + + @return Error codes from any of the underlying + functions. On success, the function doesn't + return. +**/ +EFI_STATUS +EFIAPI +TryRunningQemuKernel ( + VOID + ); + +#endif // _PLATFORM_BM_H_ diff --git a/Platform/Qemu/RiscvVirt/Library/PlatformBootManagerLib/PlatformBootManagerLib.inf b/Platform/Qemu/RiscvVirt/Library/PlatformBootManagerLib/PlatformBootManagerLib.inf new file mode 100644 index 00000000000..c3372bcceea --- /dev/null +++ b/Platform/Qemu/RiscvVirt/Library/PlatformBootManagerLib/PlatformBootManagerLib.inf @@ -0,0 +1,78 @@ +## @file +# Implementation for PlatformBootManagerLib library class interfaces. +# +# Copyright (C) 2015-2016, Red Hat, Inc. +# Copyright (c) 2014, ARM Ltd. All rights reserved.
+# Copyright (c) 2007 - 2014, Intel Corporation. All rights reserved.
+# +# SPDX-License-Identifier: BSD-2-Clause-Patent +# +## + +[Defines] + INF_VERSION = 0x00010005 + BASE_NAME = PlatformBootManagerLib + FILE_GUID = 469184E8-FADA-41E4-8823-012CA19B40D4 + MODULE_TYPE = DXE_DRIVER + VERSION_STRING = 1.0 + LIBRARY_CLASS = PlatformBootManagerLib|DXE_DRIVER + +# +# The following information is for reference only and not required by the build tools. +# +# VALID_ARCHITECTURES = ARM AARCH64 +# + +[Sources] + PlatformBm.c + PlatformBm.h + QemuKernel.c + +[Packages] + ArmVirtPkg/ArmVirtPkg.dec + MdeModulePkg/MdeModulePkg.dec + MdePkg/MdePkg.dec + OvmfPkg/OvmfPkg.dec + SecurityPkg/SecurityPkg.dec + ShellPkg/ShellPkg.dec + +[LibraryClasses] + BaseLib + BaseMemoryLib + BootLogoLib + DebugLib + DevicePathLib + MemoryAllocationLib + PcdLib + PlatformBmPrintScLib + QemuBootOrderLib + QemuLoadImageLib + ReportStatusCodeLib + TpmPlatformHierarchyLib + UefiBootManagerLib + UefiBootServicesTableLib + UefiLib + UefiRuntimeServicesTableLib + +[FixedPcd] + gEfiMdePkgTokenSpaceGuid.PcdUartDefaultBaudRate + gEfiMdePkgTokenSpaceGuid.PcdUartDefaultDataBits + gEfiMdePkgTokenSpaceGuid.PcdUartDefaultParity + gEfiMdePkgTokenSpaceGuid.PcdUartDefaultStopBits + +[Pcd] + gArmVirtTokenSpaceGuid.PcdTerminalTypeGuidBuffer + gEfiMdePkgTokenSpaceGuid.PcdPlatformBootTimeOut + gEfiMdeModulePkgTokenSpaceGuid.PcdFirmwareVersionString + +[Guids] + gEfiEndOfDxeEventGroupGuid + gEfiGlobalVariableGuid + gRootBridgesConnectedEventGroupGuid + gUefiShellFileGuid + +[Protocols] + gEfiFirmwareVolume2ProtocolGuid + gEfiGraphicsOutputProtocolGuid + gEfiPciRootBridgeIoProtocolGuid + gVirtioDeviceProtocolGuid diff --git a/Platform/Qemu/RiscvVirt/Library/PlatformBootManagerLib/QemuKernel.c b/Platform/Qemu/RiscvVirt/Library/PlatformBootManagerLib/QemuKernel.c new file mode 100644 index 00000000000..c66b7c7b21f --- /dev/null +++ b/Platform/Qemu/RiscvVirt/Library/PlatformBootManagerLib/QemuKernel.c @@ -0,0 +1,77 @@ +/** @file + Try to load an EFI-stubbed ARM Linux kernel from QEMU's fw_cfg. + + This implementation differs from OvmfPkg/Library/LoadLinuxLib. An EFI + stub in the subject kernel is a hard requirement here. + + Copyright (C) 2014-2016, Red Hat, Inc. + + SPDX-License-Identifier: BSD-2-Clause-Patent +**/ + +#include +#include + +#include "PlatformBm.h" + +// +// The entry point of the feature. +// + +/** + Download the kernel, the initial ramdisk, and the kernel command line from + QEMU's fw_cfg. Construct a minimal SimpleFileSystem that contains the two + image files, and load and start the kernel from it. + + The kernel will be instructed via its command line to load the initrd from + the same Simple FileSystem. + + @retval EFI_NOT_FOUND Kernel image was not found. + @retval EFI_OUT_OF_RESOURCES Memory allocation failed. + @retval EFI_PROTOCOL_ERROR Unterminated kernel command line. + + @return Error codes from any of the underlying + functions. On success, the function doesn't + return. +**/ +EFI_STATUS +EFIAPI +TryRunningQemuKernel ( + VOID + ) +{ + EFI_STATUS Status; + EFI_HANDLE KernelImageHandle; + + Status = QemuLoadKernelImage (&KernelImageHandle); + if (EFI_ERROR (Status)) { + return Status; + } + + // + // Signal the EFI_EVENT_GROUP_READY_TO_BOOT event. + // + EfiSignalEventReadyToBoot (); + + REPORT_STATUS_CODE ( + EFI_PROGRESS_CODE, + (EFI_SOFTWARE_DXE_BS_DRIVER | EFI_SW_DXE_BS_PC_READY_TO_BOOT_EVENT) + ); + + // + // Start the image. + // + Status = QemuStartKernelImage (&KernelImageHandle); + if (EFI_ERROR (Status)) { + DEBUG (( + DEBUG_ERROR, + "%a: QemuStartKernelImage(): %r\n", + __FUNCTION__, + Status + )); + } + + QemuUnloadKernelImage (KernelImageHandle); + + return Status; +} diff --git a/Platform/Qemu/RiscvVirt/RiscvVirt.dsc b/Platform/Qemu/RiscvVirt/RiscvVirt.dsc index 5e0a296e5be..0192c4d9173 100644 --- a/Platform/Qemu/RiscvVirt/RiscvVirt.dsc +++ b/Platform/Qemu/RiscvVirt/RiscvVirt.dsc @@ -173,6 +173,22 @@ PciHostBridgeLib|OvmfPkg/Fdt/FdtPciHostBridgeLib/FdtPciHostBridgeLib.inf PciHostBridgeUtilityLib|OvmfPkg/Library/PciHostBridgeUtilityLib/PciHostBridgeUtilityLib.inf + # Boot Manager +!if $(TPM2_ENABLE) == TRUE + Tpm2CommandLib|SecurityPkg/Library/Tpm2CommandLib/Tpm2CommandLib.inf + Tcg2PhysicalPresenceLib|OvmfPkg/Library/Tcg2PhysicalPresenceLibQemu/DxeTcg2PhysicalPresenceLib.inf + TpmMeasurementLib|SecurityPkg/Library/DxeTpmMeasurementLib/DxeTpmMeasurementLib.inf + TpmPlatformHierarchyLib|SecurityPkg/Library/PeiDxeTpmPlatformHierarchyLib/PeiDxeTpmPlatformHierarchyLib.inf +!else + TpmMeasurementLib|MdeModulePkg/Library/TpmMeasurementLibNull/TpmMeasurementLibNull.inf + TpmPlatformHierarchyLib|SecurityPkg/Library/PeiDxeTpmPlatformHierarchyLibNull/PeiDxeTpmPlatformHierarchyLib.inf +!endif + + BootLogoLib|MdeModulePkg/Library/BootLogoLib/BootLogoLib.inf + PlatformBmPrintScLib|OvmfPkg/Library/PlatformBmPrintScLib/PlatformBmPrintScLib.inf + PlatformBootManagerLib|Platform/Qemu/RiscvVirt/Library/PlatformBootManagerLib/PlatformBootManagerLib.inf + QemuBootOrderLib|OvmfPkg/Library/QemuBootOrderLib/QemuBootOrderLib.inf + [LibraryClasses.common.SEC] !ifdef $(DEBUG_ON_SERIAL_PORT) DebugLib|MdePkg/Library/BaseDebugLibSerialPort/BaseDebugLibSerialPort.inf @@ -308,7 +324,6 @@ DebugAgentLib|SourceLevelDebugPkg/Library/DebugAgent/DxeDebugAgentLib.inf !endif UefiBootManagerLib|MdeModulePkg/Library/UefiBootManagerLib/UefiBootManagerLib.inf - PlatformBootManagerLib|Platform/RISC-V/PlatformPkg/Library/PlatformBootManagerLib/PlatformBootManagerLib.inf PlatformMemoryTestLib|Platform/RISC-V/PlatformPkg/Library/PlatformMemoryTestLibNull/PlatformMemoryTestLibNull.inf PlatformUpdateProgressLib|Platform/RISC-V/PlatformPkg/Library/PlatformUpdateProgressLibNull/PlatformUpdateProgressLibNull.inf @@ -346,7 +361,7 @@ gEfiMdeModulePkgTokenSpaceGuid.PcdVpdBaseAddress|0x0 - gEfiMdePkgTokenSpaceGuid.PcdReportStatusCodePropertyMask|0x07 + gEfiMdePkgTokenSpaceGuid.PcdReportStatusCodePropertyMask|0x02 gEfiMdePkgTokenSpaceGuid.PcdDebugPrintErrorLevel|0x8000004F !ifdef $(SOURCE_DEBUG_ENABLE) gEfiMdePkgTokenSpaceGuid.PcdDebugPropertyMask|0x17 @@ -370,6 +385,8 @@ # gEfiMdeModulePkgTokenSpaceGuid.PcdBootManagerMenuFile|{ 0x21, 0xaa, 0x2c, 0x46, 0x14, 0x76, 0x03, 0x45, 0x83, 0x6e, 0x8a, 0xb6, 0xf4, 0x66, 0x23, 0x31 } + gEfiMdeModulePkgTokenSpaceGuid.PcdFirmwareVersionString|L"2.7" + # Serial Port gEfiMdeModulePkgTokenSpaceGuid.PcdSerialUseMmio|TRUE gEfiMdeModulePkgTokenSpaceGuid.PcdSerialRegisterBase|0x10000000 @@ -404,7 +421,7 @@ gEfiMdeModulePkgTokenSpaceGuid.PcdVideoHorizontalResolution|800 gEfiMdeModulePkgTokenSpaceGuid.PcdVideoVerticalResolution|600 - gEfiMdePkgTokenSpaceGuid.PcdPlatformBootTimeOut|0 + gEfiMdePkgTokenSpaceGuid.PcdPlatformBootTimeOut|10 # Set video resolution for text setup. gEfiMdeModulePkgTokenSpaceGuid.PcdSetupVideoHorizontalResolution|640 @@ -484,7 +501,6 @@ # PcdLib|MdePkg/Library/DxePcdLib/DxePcdLib.inf #} MdeModulePkg/Universal/Metronome/Metronome.inf - MdeModulePkg/Universal/BdsDxe/BdsDxe.inf MdeModulePkg/Universal/ResetSystemRuntimeDxe/ResetSystemRuntimeDxe.inf { ResetSystemLib|MdeModulePkg/Library/BaseResetSystemLibNull/BaseResetSystemLibNull.inf @@ -647,7 +663,26 @@ SecurityPkg/VariableAuthenticated/SecureBootConfigDxe/SecureBootConfigDxe.inf !endif - MdeModulePkg/Application/UiApp/UiApp.inf + + # + # Bds + # + MdeModulePkg/Universal/DevicePathDxe/DevicePathDxe.inf { + + DevicePathLib|MdePkg/Library/UefiDevicePathLib/UefiDevicePathLib.inf + PcdLib|MdePkg/Library/BasePcdLibNull/BasePcdLibNull.inf + } + MdeModulePkg/Universal/DisplayEngineDxe/DisplayEngineDxe.inf + MdeModulePkg/Universal/SetupBrowserDxe/SetupBrowserDxe.inf + MdeModulePkg/Universal/DriverHealthManagerDxe/DriverHealthManagerDxe.inf + MdeModulePkg/Universal/BdsDxe/BdsDxe.inf + MdeModulePkg/Logo/LogoDxe.inf + MdeModulePkg/Application/UiApp/UiApp.inf { + + NULL|MdeModulePkg/Library/DeviceManagerUiLib/DeviceManagerUiLib.inf + NULL|MdeModulePkg/Library/BootManagerUiLib/BootManagerUiLib.inf +# NULL|MdeModulePkg/Library/BootMaintenanceManagerUiLib/BootMaintenanceManagerUiLib.inf + } [PcdsDynamicDefault.common] # set PcdPciExpressBaseAddress to MAX_UINT64, which signifies that this From ff71d943d93736f0e71ecbfa9d59642d185e66b7 Mon Sep 17 00:00:00 2001 From: Sunil V L Date: Tue, 12 Apr 2022 15:15:53 +0530 Subject: [PATCH 10/17] Qemu/RiscvVirt: Enable Boot Manitenance Manager Signed-off-by: Sunil V L --- Platform/Qemu/RiscvVirt/RiscvVirt.dsc | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/Platform/Qemu/RiscvVirt/RiscvVirt.dsc b/Platform/Qemu/RiscvVirt/RiscvVirt.dsc index 0192c4d9173..e12f89c4c0b 100644 --- a/Platform/Qemu/RiscvVirt/RiscvVirt.dsc +++ b/Platform/Qemu/RiscvVirt/RiscvVirt.dsc @@ -188,6 +188,7 @@ PlatformBmPrintScLib|OvmfPkg/Library/PlatformBmPrintScLib/PlatformBmPrintScLib.inf PlatformBootManagerLib|Platform/Qemu/RiscvVirt/Library/PlatformBootManagerLib/PlatformBootManagerLib.inf QemuBootOrderLib|OvmfPkg/Library/QemuBootOrderLib/QemuBootOrderLib.inf + FileExplorerLib|MdeModulePkg/Library/FileExplorerLib/FileExplorerLib.inf [LibraryClasses.common.SEC] !ifdef $(DEBUG_ON_SERIAL_PORT) @@ -681,7 +682,7 @@ NULL|MdeModulePkg/Library/DeviceManagerUiLib/DeviceManagerUiLib.inf NULL|MdeModulePkg/Library/BootManagerUiLib/BootManagerUiLib.inf -# NULL|MdeModulePkg/Library/BootMaintenanceManagerUiLib/BootMaintenanceManagerUiLib.inf + NULL|MdeModulePkg/Library/BootMaintenanceManagerUiLib/BootMaintenanceManagerUiLib.inf } [PcdsDynamicDefault.common] From f8a1352d8ad69f3647550750fe477bc2cbd83bf6 Mon Sep 17 00:00:00 2001 From: AnishK Date: Mon, 21 Mar 2022 13:35:49 +0530 Subject: [PATCH 11/17] TFTP support for PXE boot --- Platform/Qemu/RiscvVirt/RiscvVirt.dsc | 18 ++++++++++++++++++ Platform/Qemu/RiscvVirt/RiscvVirt.fdf | 4 ++++ 2 files changed, 22 insertions(+) diff --git a/Platform/Qemu/RiscvVirt/RiscvVirt.dsc b/Platform/Qemu/RiscvVirt/RiscvVirt.dsc index e12f89c4c0b..94ba9a607d9 100644 --- a/Platform/Qemu/RiscvVirt/RiscvVirt.dsc +++ b/Platform/Qemu/RiscvVirt/RiscvVirt.dsc @@ -142,6 +142,8 @@ !if $(SECURE_BOOT_ENABLE) == TRUE BaseCryptLib|CryptoPkg/Library/BaseCryptLib/BaseCryptLib.inf !endif + + RiscVCpuLib|Silicon/RISC-V/ProcessorPkg/Library/RiscVCpuLib/RiscVCpuLib.inf RiscVEdk2SbiLib|Silicon/RISC-V/ProcessorPkg/Library/RiscVEdk2SbiLib/RiscVEdk2SbiLib.inf RiscVPlatformTimerLib|Platform/SiFive/U5SeriesPkg/Library/RiscVPlatformTimerLib/RiscVPlatformTimerLib.inf @@ -685,6 +687,22 @@ NULL|MdeModulePkg/Library/BootMaintenanceManagerUiLib/BootMaintenanceManagerUiLib.inf } +# TFTP support for PXE boot + ShellPkg/DynamicCommand/TftpDynamicCommand/TftpDynamicCommand.inf { + + gEfiShellPkgTokenSpaceGuid.PcdShellLibAutoInitialize|FALSE + + ShellLib|ShellPkg/Library/UefiShellLib/UefiShellLib.inf + SortLib|MdeModulePkg/Library/UefiSortLib/UefiSortLib.inf + } + ShellPkg/DynamicCommand/TftpDynamicCommand/TftpApp.inf { + + gEfiShellPkgTokenSpaceGuid.PcdShellLibAutoInitialize|FALSE + + ShellLib|ShellPkg/Library/UefiShellLib/UefiShellLib.inf + SortLib|MdeModulePkg/Library/UefiSortLib/UefiSortLib.inf + } + [PcdsDynamicDefault.common] # set PcdPciExpressBaseAddress to MAX_UINT64, which signifies that this # PCD and PcdPciDisableBusEnumeration above have not been assigned yet diff --git a/Platform/Qemu/RiscvVirt/RiscvVirt.fdf b/Platform/Qemu/RiscvVirt/RiscvVirt.fdf index 75fbe294474..7e8c87eab6d 100644 --- a/Platform/Qemu/RiscvVirt/RiscvVirt.fdf +++ b/Platform/Qemu/RiscvVirt/RiscvVirt.fdf @@ -222,6 +222,10 @@ INF OvmfPkg/SmbiosPlatformDxe/SmbiosPlatformDxe.inf INF OvmfPkg/LinuxInitrdDynamicShellCommand/LinuxInitrdDynamicShellCommand.inf INF ShellPkg/Application/Shell/Shell.inf +# TFTP support for PXE boot +INF ShellPkg/DynamicCommand/TftpDynamicCommand/TftpDynamicCommand.inf +INF ShellPkg/DynamicCommand/TftpDynamicCommand/TftpApp.inf + # # Network modules # From 005aa78ad6c3b07549599adf5e0b87fe4fc6911a Mon Sep 17 00:00:00 2001 From: AnishK Date: Mon, 21 Mar 2022 14:08:49 +0530 Subject: [PATCH 12/17] HTTP support for PXE boot --- Platform/Qemu/RiscvVirt/RiscvVirt.dsc | 27 +++++++++++++++++++++++++-- Platform/Qemu/RiscvVirt/RiscvVirt.fdf | 4 ++++ 2 files changed, 29 insertions(+), 2 deletions(-) diff --git a/Platform/Qemu/RiscvVirt/RiscvVirt.dsc b/Platform/Qemu/RiscvVirt/RiscvVirt.dsc index 94ba9a607d9..86cb5ce5713 100644 --- a/Platform/Qemu/RiscvVirt/RiscvVirt.dsc +++ b/Platform/Qemu/RiscvVirt/RiscvVirt.dsc @@ -37,8 +37,8 @@ # DEFINE NETWORK_SNP_ENABLE = FALSE DEFINE NETWORK_IP6_ENABLE = FALSE - DEFINE NETWORK_TLS_ENABLE = FALSE - DEFINE NETWORK_HTTP_BOOT_ENABLE = FALSE + DEFINE NETWORK_TLS_ENABLE = FALSE + DEFINE NETWORK_HTTP_BOOT_ENABLE = FALSE DEFINE NETWORK_ISCSI_ENABLE = FALSE [BuildOptions] @@ -703,6 +703,29 @@ SortLib|MdeModulePkg/Library/UefiSortLib/UefiSortLib.inf } + # HTTP support for PXE boot + ShellPkg/DynamicCommand/HttpDynamicCommand/HttpDynamicCommand.inf { + + gEfiShellPkgTokenSpaceGuid.PcdShellLibAutoInitialize|FALSE + + ShellLib|ShellPkg/Library/UefiShellLib/UefiShellLib.inf + SortLib|MdeModulePkg/Library/UefiSortLib/UefiSortLib.inf + HttpLib|NetworkPkg/Library/DxeHttpLib/DxeHttpLib.inf + } + ShellPkg/DynamicCommand/HttpDynamicCommand/HttpApp.inf { + # + # + # ESRT and FMP GUID for sample device capsule update + # + #FILE_GUID = $(FMP_GREEN_SAMPLE_DEVICE) + + gEfiShellPkgTokenSpaceGuid.PcdShellLibAutoInitialize|FALSE + + ShellLib|ShellPkg/Library/UefiShellLib/UefiShellLib.inf + SortLib|MdeModulePkg/Library/UefiSortLib/UefiSortLib.inf + HttpLib|NetworkPkg/Library/DxeHttpLib/DxeHttpLib.inf + } + [PcdsDynamicDefault.common] # set PcdPciExpressBaseAddress to MAX_UINT64, which signifies that this # PCD and PcdPciDisableBusEnumeration above have not been assigned yet diff --git a/Platform/Qemu/RiscvVirt/RiscvVirt.fdf b/Platform/Qemu/RiscvVirt/RiscvVirt.fdf index 7e8c87eab6d..0c38d5d35f4 100644 --- a/Platform/Qemu/RiscvVirt/RiscvVirt.fdf +++ b/Platform/Qemu/RiscvVirt/RiscvVirt.fdf @@ -226,6 +226,10 @@ INF ShellPkg/Application/Shell/Shell.inf INF ShellPkg/DynamicCommand/TftpDynamicCommand/TftpDynamicCommand.inf INF ShellPkg/DynamicCommand/TftpDynamicCommand/TftpApp.inf +# HTTP support for PXE boot +INF ShellPkg/DynamicCommand/HttpDynamicCommand/HttpDynamicCommand.inf +INF ShellPkg/DynamicCommand/HttpDynamicCommand/HttpApp.inf + # # Network modules # From 6dd5327551ca513494cf67c284573786114b5f25 Mon Sep 17 00:00:00 2001 From: AnishK Date: Mon, 21 Mar 2022 14:30:22 +0530 Subject: [PATCH 13/17] HTTPS support for PXE boot --- Platform/Qemu/RiscvVirt/RiscvVirt.dsc | 32 +++++++++++++++++++++++++-- 1 file changed, 30 insertions(+), 2 deletions(-) diff --git a/Platform/Qemu/RiscvVirt/RiscvVirt.dsc b/Platform/Qemu/RiscvVirt/RiscvVirt.dsc index 86cb5ce5713..80572240e06 100644 --- a/Platform/Qemu/RiscvVirt/RiscvVirt.dsc +++ b/Platform/Qemu/RiscvVirt/RiscvVirt.dsc @@ -37,9 +37,10 @@ # DEFINE NETWORK_SNP_ENABLE = FALSE DEFINE NETWORK_IP6_ENABLE = FALSE - DEFINE NETWORK_TLS_ENABLE = FALSE - DEFINE NETWORK_HTTP_BOOT_ENABLE = FALSE + DEFINE NETWORK_TLS_ENABLE = TRUE + DEFINE NETWORK_HTTP_BOOT_ENABLE = TRUE DEFINE NETWORK_ISCSI_ENABLE = FALSE + DEFINE NETWORK_ALLOW_HTTP_CONNECTIONS = TRUE [BuildOptions] GCC:RELEASE_*_*_CC_FLAGS = -DMDEPKG_NDEBUG @@ -687,6 +688,16 @@ NULL|MdeModulePkg/Library/BootMaintenanceManagerUiLib/BootMaintenanceManagerUiLib.inf } +# HTTPS(secure) support in GUI for updating ssl keys for PXE boot + MdeModulePkg/Application/UiApp/UiApp.inf { + + NULL|MdeModulePkg/Library/DeviceManagerUiLib/DeviceManagerUiLib.inf + NULL|MdeModulePkg/Library/BootManagerUiLib/BootManagerUiLib.inf + NULL|MdeModulePkg/Library/BootMaintenanceManagerUiLib/BootMaintenanceManagerUiLib.inf + FileExplorerLib|MdeModulePkg/Library/FileExplorerLib/FileExplorerLib.inf + } + + # TFTP support for PXE boot ShellPkg/DynamicCommand/TftpDynamicCommand/TftpDynamicCommand.inf { @@ -726,6 +737,23 @@ HttpLib|NetworkPkg/Library/DxeHttpLib/DxeHttpLib.inf } +# HTTPS (secure) support for PXE boot + NetworkPkg/TlsDxe/TlsDxe.inf { + + BaseCryptLib|CryptoPkg/Library/BaseCryptLib/BaseCryptLib.inf + TlsLib|CryptoPkg/Library/TlsLib/TlsLib.inf + IntrinsicLib|CryptoPkg/Library/IntrinsicLib/IntrinsicLib.inf + OpensslLib|CryptoPkg/Library/OpensslLib/OpensslLib.inf + RngLib|MdePkg/Library/DxeRngLib/DxeRngLib.inf + FileExplorerLib|MdeModulePkg/Library/FileExplorerLib/FileExplorerLib.inf + } +NetworkPkg/TlsAuthConfigDxe/TlsAuthConfigDxe.inf { + + FileExplorerLib|MdeModulePkg/Library/FileExplorerLib/FileExplorerLib.inf + NULL|OvmfPkg/Library/TlsAuthConfigLib/TlsAuthConfigLib.inf + +} + [PcdsDynamicDefault.common] # set PcdPciExpressBaseAddress to MAX_UINT64, which signifies that this # PCD and PcdPciDisableBusEnumeration above have not been assigned yet From fca629157ffcc9634936a3abba8e79c2fc8b8797 Mon Sep 17 00:00:00 2001 From: Sunil V L Date: Tue, 12 Apr 2022 20:33:04 +0530 Subject: [PATCH 14/17] Qemu/RiscvVirt: Enable Graphics Output Signed-off-by: Sunil V L --- Platform/Qemu/RiscvVirt/RiscvVirt.dsc | 21 ++++++++++++++++----- Platform/Qemu/RiscvVirt/RiscvVirt.fdf | 8 ++++++++ 2 files changed, 24 insertions(+), 5 deletions(-) diff --git a/Platform/Qemu/RiscvVirt/RiscvVirt.dsc b/Platform/Qemu/RiscvVirt/RiscvVirt.dsc index 80572240e06..594228ac8b9 100644 --- a/Platform/Qemu/RiscvVirt/RiscvVirt.dsc +++ b/Platform/Qemu/RiscvVirt/RiscvVirt.dsc @@ -190,6 +190,7 @@ BootLogoLib|MdeModulePkg/Library/BootLogoLib/BootLogoLib.inf PlatformBmPrintScLib|OvmfPkg/Library/PlatformBmPrintScLib/PlatformBmPrintScLib.inf PlatformBootManagerLib|Platform/Qemu/RiscvVirt/Library/PlatformBootManagerLib/PlatformBootManagerLib.inf + FrameBufferBltLib|MdeModulePkg/Library/FrameBufferBltLib/FrameBufferBltLib.inf QemuBootOrderLib|OvmfPkg/Library/QemuBootOrderLib/QemuBootOrderLib.inf FileExplorerLib|MdeModulePkg/Library/FileExplorerLib/FileExplorerLib.inf @@ -535,11 +536,9 @@ MdeModulePkg/Universal/Console/ConPlatformDxe/ConPlatformDxe.inf MdeModulePkg/Universal/Console/ConSplitterDxe/ConSplitterDxe.inf -# No graphic console supported yet. -# MdeModulePkg/Universal/Console/GraphicsConsoleDxe/GraphicsConsoleDxe.inf { -# -# PcdLib|MdePkg/Library/DxePcdLib/DxePcdLib.inf -# } +# Graphic console + MdeModulePkg/Universal/Console/GraphicsConsoleDxe/GraphicsConsoleDxe.inf + MdeModulePkg/Universal/Console/TerminalDxe/TerminalDxe.inf MdeModulePkg/Universal/DevicePathDxe/DevicePathDxe.inf { @@ -610,6 +609,13 @@ OvmfPkg/VirtioPciDeviceDxe/VirtioPciDeviceDxe.inf OvmfPkg/Virtio10Dxe/Virtio10.inf + # + # Video support + # + OvmfPkg/QemuRamfbDxe/QemuRamfbDxe.inf + OvmfPkg/VirtioGpuDxe/VirtioGpu.inf + OvmfPkg/PlatformDxe/Platform.inf + # # Platform Driver # @@ -765,3 +771,8 @@ NetworkPkg/TlsAuthConfigDxe/TlsAuthConfigDxe.inf { gUefiOvmfPkgTokenSpaceGuid.PcdQemuBootOrderPciTranslation|TRUE gUefiOvmfPkgTokenSpaceGuid.PcdQemuBootOrderMmioTranslation|TRUE + ## If TRUE, Graphics Output Protocol will be installed on virtual handle created by ConsplitterDxe. + # It could be set FALSE to save size. + gEfiMdeModulePkgTokenSpaceGuid.PcdConOutGopSupport|TRUE + gEfiMdeModulePkgTokenSpaceGuid.PcdConOutUgaSupport|FALSE + diff --git a/Platform/Qemu/RiscvVirt/RiscvVirt.fdf b/Platform/Qemu/RiscvVirt/RiscvVirt.fdf index 0c38d5d35f4..677e5cc4c6d 100644 --- a/Platform/Qemu/RiscvVirt/RiscvVirt.fdf +++ b/Platform/Qemu/RiscvVirt/RiscvVirt.fdf @@ -157,6 +157,13 @@ INF MdeModulePkg/Bus/Pci/PciBusDxe/PciBusDxe.inf INF OvmfPkg/VirtioPciDeviceDxe/VirtioPciDeviceDxe.inf INF OvmfPkg/Virtio10Dxe/Virtio10.inf +# +# Video support +# +INF OvmfPkg/QemuRamfbDxe/QemuRamfbDxe.inf +INF OvmfPkg/VirtioGpuDxe/VirtioGpu.inf +INF OvmfPkg/PlatformDxe/Platform.inf + # # Platform Driver # @@ -195,6 +202,7 @@ INF MdeModulePkg/Universal/MonotonicCounterRuntimeDxe/MonotonicCounterRuntimeDx INF MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf INF MdeModulePkg/Universal/Console/ConPlatformDxe/ConPlatformDxe.inf INF MdeModulePkg/Universal/Console/ConSplitterDxe/ConSplitterDxe.inf +INF MdeModulePkg/Universal/Console/GraphicsConsoleDxe/GraphicsConsoleDxe.inf INF MdeModulePkg/Universal/Console/TerminalDxe/TerminalDxe.inf INF MdeModulePkg/Universal/BdsDxe/BdsDxe.inf INF MdeModulePkg/Universal/DevicePathDxe/DevicePathDxe.inf From 29bdea88f18cb086d65d609dca7ae3c001c97a4c Mon Sep 17 00:00:00 2001 From: Sunil V L Date: Fri, 27 May 2022 18:12:37 +0530 Subject: [PATCH 15/17] FdtDxe: Fix boot-hartid issue when EDK2 is booted in S-mode boot-hartid in DT is always updated with a build time constant hartid. This works only when EDK2 is booted in M-mode. Instead of hard coded hartid, use the hartid which is populated in the Firmware Context structure during boot. Signed-off-by: Sunil V L --- Silicon/RISC-V/ProcessorPkg/Universal/FdtDxe/FdtDxe.c | 11 ++++++++++- .../RISC-V/ProcessorPkg/Universal/FdtDxe/FdtDxe.inf | 2 ++ 2 files changed, 12 insertions(+), 1 deletion(-) diff --git a/Silicon/RISC-V/ProcessorPkg/Universal/FdtDxe/FdtDxe.c b/Silicon/RISC-V/ProcessorPkg/Universal/FdtDxe/FdtDxe.c index 9342fc107d9..9c01cd55f40 100644 --- a/Silicon/RISC-V/ProcessorPkg/Universal/FdtDxe/FdtDxe.c +++ b/Silicon/RISC-V/ProcessorPkg/Universal/FdtDxe/FdtDxe.c @@ -18,6 +18,7 @@ #include #include #include +#include /** Fix up the device tree with booting hartid for the kernel @@ -78,6 +79,7 @@ InstallFdtFromHob ( EFI_HOB_GUID_TYPE *GuidHob; VOID *DataInHob; UINTN DataSize; + EFI_RISCV_OPENSBI_FIRMWARE_CONTEXT *FirmwareContext; GuidHob = GetFirstGuidHob (&gFdtHobGuid); if (GuidHob == NULL) { @@ -88,11 +90,18 @@ InstallFdtFromHob ( )); return EFI_NOT_FOUND; } + GetFirmwareContextPointer (&FirmwareContext); + ASSERT (FirmwareContext != NULL); + if (FirmwareContext == NULL) { + DEBUG ((DEBUG_ERROR, "Failed to get the pointer of EFI_RISCV_OPENSBI_FIRMWARE_CONTEXT\n")); + return EFI_NOT_FOUND; + } + DEBUG ((DEBUG_INFO, " %a: BootHartId = 0x%x.\n", __FUNCTION__, FirmwareContext->BootHartId)); DataInHob = (VOID *)*((UINTN *)GET_GUID_HOB_DATA (GuidHob)); DataSize = GET_GUID_HOB_DATA_SIZE (GuidHob); - Status = FixDtb (DataInHob, PcdGet32 (PcdBootHartId)); + Status = FixDtb (DataInHob, FirmwareContext->BootHartId); if (EFI_ERROR (Status)) { return Status; } diff --git a/Silicon/RISC-V/ProcessorPkg/Universal/FdtDxe/FdtDxe.inf b/Silicon/RISC-V/ProcessorPkg/Universal/FdtDxe/FdtDxe.inf index 6df179a6274..7ac73711499 100644 --- a/Silicon/RISC-V/ProcessorPkg/Universal/FdtDxe/FdtDxe.inf +++ b/Silicon/RISC-V/ProcessorPkg/Universal/FdtDxe/FdtDxe.inf @@ -26,6 +26,7 @@ MdeModulePkg/MdeModulePkg.dec MdePkg/MdePkg.dec Platform/RISC-V/PlatformPkg/RiscVPlatformPkg.dec + Silicon/RISC-V/ProcessorPkg/RiscVProcessorPkg.dec OvmfPkg/OvmfPkg.dec [LibraryClasses] @@ -39,6 +40,7 @@ UefiBootServicesTableLib UefiDriverEntryPoint QemuFwCfgLib + RiscVFirmwareContextLib [Sources] FdtDxe.c From c060b16d23c6b78b5550ac6b1c3f2ceb60bf7ede Mon Sep 17 00:00:00 2001 From: Sunil V L Date: Fri, 27 May 2022 19:04:10 +0530 Subject: [PATCH 16/17] Qemu/RiscvVirt: Add VariableFlashInfoLib dependency Signed-off-by: Sunil V L --- Platform/Qemu/RiscvVirt/RiscvVirt.dsc | 1 + 1 file changed, 1 insertion(+) diff --git a/Platform/Qemu/RiscvVirt/RiscvVirt.dsc b/Platform/Qemu/RiscvVirt/RiscvVirt.dsc index 594228ac8b9..afa37f18ac6 100644 --- a/Platform/Qemu/RiscvVirt/RiscvVirt.dsc +++ b/Platform/Qemu/RiscvVirt/RiscvVirt.dsc @@ -97,6 +97,7 @@ UefiUsbLib|MdePkg/Library/UefiUsbLib/UefiUsbLib.inf CustomizedDisplayLib|MdeModulePkg/Library/CustomizedDisplayLib/CustomizedDisplayLib.inf SortLib|MdeModulePkg/Library/BaseSortLib/BaseSortLib.inf + VariableFlashInfoLib|MdeModulePkg/Library/BaseVariableFlashInfoLib/BaseVariableFlashInfoLib.inf UefiBootManagerLib|MdeModulePkg/Library/UefiBootManagerLib/UefiBootManagerLib.inf VariablePolicyLib|MdeModulePkg/Library/VariablePolicyLib/VariablePolicyLibRuntimeDxe.inf FdtLib|EmbeddedPkg/Library/FdtLib/FdtLib.inf From 5f699fa0dd33ffedeab07591ed5a7e0e121fcf9a Mon Sep 17 00:00:00 2001 From: Heinrich Schuchardt Date: Thu, 2 Jun 2022 19:23:28 +0200 Subject: [PATCH 17/17] RISC-V: fix RISCV_EFI_BOOT_PROTOCOL The proposed RISC-V boot protocol specification requires that calling GetBootHartId() with a value of This other than the protocol interface address shall result in EFI_INVALID_PARAMETER. It is not sufficient to test that This is not NULL. Cf. https://bugzilla.tianocore.org/show_bug.cgi?id=3837 Fixes: 6daebc9af276 ("RISC-V: Implement RISCV_EFI_BOOT_PROTOCOL") Signed-off-by: Heinrich Schuchardt --- Silicon/RISC-V/ProcessorPkg/Universal/CpuDxe/CpuDxe.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/Silicon/RISC-V/ProcessorPkg/Universal/CpuDxe/CpuDxe.c b/Silicon/RISC-V/ProcessorPkg/Universal/CpuDxe/CpuDxe.c index 6f6a18db05c..df08f8872d9 100644 --- a/Silicon/RISC-V/ProcessorPkg/Universal/CpuDxe/CpuDxe.c +++ b/Silicon/RISC-V/ProcessorPkg/Universal/CpuDxe/CpuDxe.c @@ -18,6 +18,7 @@ STATIC BOOLEAN mInterruptState = FALSE; STATIC EFI_HANDLE mCpuHandle = NULL; STATIC UINTN mBootHartId; +RISCV_EFI_BOOT_PROTOCOL gRiscvBootProtocol; EFI_STATUS EFIAPI @@ -26,7 +27,7 @@ RiscvGetBootHartId ( OUT UINTN *BootHartId ) { - if((This == NULL) || (BootHartId == NULL)) { + if((This != &gRiscvBootProtocol) || (BootHartId == NULL)) { return EFI_INVALID_PARAMETER; }