From a9ed96402e23f9632612da9c89f3a9cbbca6ef8a Mon Sep 17 00:00:00 2001 From: Tim Crawford Date: Wed, 7 Jan 2026 20:58:43 -0700 Subject: [PATCH] ec/ite: Move e-flash signature to 0x80 According to the datasheet, the e-flash signature can be at any 16-byte aligned address in 0x40-0xF0. Because of an address conflict with SDCC 4.5.0, move the signature to 0x80. This matches the address for Zephyr RISC-V SoCs, like 82302. Ref: https://github.com/zephyrproject-rtos/zephyr/pull/36379 Signed-off-by: Tim Crawford --- src/ec/ite/signature.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/src/ec/ite/signature.c b/src/ec/ite/signature.c index 767f53263..4ff728ef2 100644 --- a/src/ec/ite/signature.c +++ b/src/ec/ite/signature.c @@ -4,13 +4,13 @@ #if CONFIG_BUS_ESPI // eSPI signature (byte 7 = 0xA4) -static __code const uint8_t __at(0x40) SIGNATURE[16] = { +static __code const uint8_t __at(0x80) SIGNATURE[16] = { 0xA5, 0xA5, 0xA5, 0xA5, 0xA5, 0xA5, 0xA4, 0x95, 0x85, 0x12, 0x5A, 0x5A, 0xAA, 0x00, 0x55, 0x55, }; #else // CONFIG_BUS_ESPI // LPC signature (byte 7 = 0xA5) -static __code const uint8_t __at(0x40) SIGNATURE[16] = { +static __code const uint8_t __at(0x80) SIGNATURE[16] = { 0xA5, 0xA5, 0xA5, 0xA5, 0xA5, 0xA5, 0xA5, 0x94, 0x85, 0x12, 0x5A, 0x5A, 0xAA, 0x00, 0x55, 0x55, };