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AES

This project is an implementation of an Intel 8088 in the Cx programming language. This implementation has the following features:

  • Partial Implementation of the 8088 processor for retrograming applications

MIT LICENSE Copyright (c) 2012 - 2020 Synflow, a trademark of NextDF EIRL

Objectives

This core aims to show what a complete design looks like in Cx. We are improving the code as we add features to the language, so generally it requires the latest version of the Synflow SDK to be translated to Verilog or VHDL. You can download the Synflow SDK here.

Limitations

This core is meant to be a demonstration rather than a full-fledged, exhaustive standard-compliant implementation of the standard.

Known bugs

Contributions

If you're interested in contributing or extending this core to adapt it to your needs, feel free to contact us, tweet, send an email, or use our contact form.

Documentation

From the Intel 8086 Family User's Manual

-reset: page 44 -queue status: page 44 -status lines: page 45

-Chapter 4 Hardware Reference Information --page 143