From 08ace5658fc21d42b3fcad0b07da7c65b90dd569 Mon Sep 17 00:00:00 2001 From: Himanshu Sharma Date: Thu, 20 Nov 2025 10:46:48 +0200 Subject: [PATCH 01/16] TG-332 Add Github action for building Linux kernel --- .github/workflows/build-kernel.yml | 38 +++ arch/arm64/configs/siklu_arm64_defconfig | 343 +++++++++++++++++++++++ 2 files changed, 381 insertions(+) create mode 100644 .github/workflows/build-kernel.yml create mode 100644 arch/arm64/configs/siklu_arm64_defconfig diff --git a/.github/workflows/build-kernel.yml b/.github/workflows/build-kernel.yml new file mode 100644 index 0000000000000..748a915833ff7 --- /dev/null +++ b/.github/workflows/build-kernel.yml @@ -0,0 +1,38 @@ +name: Build Linux Kernel (siklu_arm64_defconfig) + +on: + workflow_dispatch: + push: + branches: + - tg-v6.12 + pull_request: + branches: + - tg-v6.12 + +jobs: + build: + runs-on: ubuntu-latest + steps: + - name: Checkout repository + uses: actions/checkout@v4 + + - name: Install dependencies + run: | + sudo apt-get update + sudo apt-get install -y build-essential bc flex bison libssl-dev libncurses-dev crossbuild-essential-arm64 + + - name: Set up environment + run: | + export ARCH=arm64 + export CROSS_COMPILE=aarch64-linux-gnu- + + - name: Build kernel with siklu_arm64_defconfig + run: | + make siklu_arm64_defconfig + make -j$(nproc) + + - name: Archive kernel image + uses: actions/upload-artifact@v4 + with: + name: kernel-image + path: arch/arm64/boot/Image diff --git a/arch/arm64/configs/siklu_arm64_defconfig b/arch/arm64/configs/siklu_arm64_defconfig new file mode 100644 index 0000000000000..ccb5ad55fa2f5 --- /dev/null +++ b/arch/arm64/configs/siklu_arm64_defconfig @@ -0,0 +1,343 @@ +CONFIG_LOCALVERSION="-yocto-standard" +CONFIG_SYSVIPC=y +CONFIG_HIGH_RES_TIMERS=y +CONFIG_BPF_SYSCALL=y +CONFIG_IKCONFIG=y +CONFIG_IKCONFIG_PROC=y +CONFIG_LOG_BUF_SHIFT=20 +CONFIG_CGROUPS=y +CONFIG_NAMESPACES=y +# CONFIG_UTS_NS is not set +# CONFIG_IPC_NS is not set +# CONFIG_PID_NS is not set +# CONFIG_NET_NS is not set +CONFIG_EXPERT=y +CONFIG_PERF_EVENTS=y +CONFIG_ARCH_MVEBU=y +CONFIG_ARCH_QCOM=y +CONFIG_ARM64_VA_BITS_48=y +CONFIG_SCHED_MC=y +CONFIG_NR_CPUS=4 +CONFIG_NUMA=y +# CONFIG_ARM64_PTR_AUTH is not set +CONFIG_RANDOMIZE_BASE=y +# CONFIG_RANDOMIZE_MODULE_REGION_FULL is not set +# CONFIG_EFI is not set +CONFIG_CPU_IDLE=y +CONFIG_CPU_FREQ=y +CONFIG_CPU_FREQ_STAT=y +CONFIG_CPU_FREQ_GOV_POWERSAVE=y +CONFIG_CPU_FREQ_GOV_USERSPACE=y +CONFIG_CPU_FREQ_GOV_ONDEMAND=y +CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y +CONFIG_CPUFREQ_DT=y +CONFIG_ARM_ARMADA_8K_CPUFREQ=y +CONFIG_JUMP_LABEL=y +CONFIG_MODULES=y +CONFIG_MODULE_UNLOAD=y +# CONFIG_MQ_IOSCHED_DEADLINE is not set +# CONFIG_MQ_IOSCHED_KYBER is not set +# CONFIG_COMPAT_BRK is not set +CONFIG_CMA=y +CONFIG_NET=y +CONFIG_PACKET=y +CONFIG_PACKET_DIAG=y +CONFIG_UNIX=y +CONFIG_UNIX_DIAG=y +CONFIG_XFRM_USER=y +CONFIG_NET_KEY=y +CONFIG_XDP_SOCKETS=y +CONFIG_XDP_SOCKETS_DIAG=y +CONFIG_INET=y +CONFIG_IP_PNP=y +CONFIG_IP_PNP_DHCP=y +CONFIG_IP_PNP_BOOTP=y +CONFIG_INET_ESP=y +CONFIG_TCP_CONG_ADVANCED=y +CONFIG_TCP_CONG_BIC=y +CONFIG_TCP_CONG_WESTWOOD=y +CONFIG_TCP_CONG_HTCP=y +CONFIG_TCP_CONG_VEGAS=y +CONFIG_IPV6_ROUTER_PREF=y +CONFIG_IPV6_ROUTE_INFO=y +CONFIG_NETWORK_PHY_TIMESTAMPING=y +CONFIG_NETFILTER=y +CONFIG_BRIDGE_NETFILTER=y +CONFIG_NETFILTER_NETLINK_QUEUE=y +CONFIG_NF_CONNTRACK=y +CONFIG_NF_CONNTRACK_EVENTS=y +# CONFIG_NF_CT_PROTO_DCCP is not set +# CONFIG_NF_CT_PROTO_SCTP is not set +# CONFIG_NF_CT_PROTO_UDPLITE is not set +CONFIG_NF_CT_NETLINK=y +CONFIG_NF_TABLES=y +CONFIG_NFT_CT=y +CONFIG_NFT_MASQ=y +CONFIG_NFT_NAT=y +CONFIG_NFT_COMPAT=y +CONFIG_NETFILTER_XT_TARGET_CONNMARK=y +CONFIG_NETFILTER_XT_MATCH_COMMENT=y +CONFIG_NF_TABLES_IPV4=y +CONFIG_IP_NF_IPTABLES=y +CONFIG_IP_NF_FILTER=y +CONFIG_IP_NF_NAT=y +CONFIG_IP_NF_TARGET_MASQUERADE=y +CONFIG_IP_NF_MANGLE=y +CONFIG_NF_REJECT_IPV6=y +CONFIG_NF_LOG_IPV6=y +CONFIG_IP6_NF_IPTABLES=y +CONFIG_IP6_NF_FILTER=y +CONFIG_NF_TABLES_BRIDGE=y +CONFIG_BRIDGE_NF_EBTABLES=y +CONFIG_BRIDGE_EBT_T_NAT=y +CONFIG_BRIDGE_EBT_DNAT=y +CONFIG_BRIDGE_EBT_SNAT=y +CONFIG_BRIDGE=y +CONFIG_VLAN_8021Q=y +CONFIG_NET_SCHED=y +CONFIG_NET_SCH_TBF=y +CONFIG_NET_SCH_FQ_CODEL=y +CONFIG_NET_SCH_FQ=y +CONFIG_NETLINK_DIAG=y +CONFIG_QRTR=y +CONFIG_QRTR_MHI=y +CONFIG_CFG80211=y +CONFIG_MAC80211=y +CONFIG_PCI=y +CONFIG_PCI_IOV=y +CONFIG_PCIE_BUS_PERFORMANCE=y +CONFIG_PCIE_ARMADA_8K=y +CONFIG_PCIE_QCOM=y +CONFIG_DEVTMPFS=y +CONFIG_DEVTMPFS_MOUNT=y +CONFIG_MHI_BUS=y +CONFIG_MTD=y +CONFIG_MTD_CMDLINE_PARTS=y +CONFIG_MTD_QCOMSMEM_PARTS=y +CONFIG_MTD_BLOCK=y +CONFIG_MTD_RAW_NAND=y +CONFIG_MTD_NAND_MARVELL=y +CONFIG_MTD_NAND_QCOM=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_UBI=y +CONFIG_BLK_DEV_LOOP=y +CONFIG_BLK_DEV_RAM=y +CONFIG_BLK_DEV_RAM_SIZE=262144 +CONFIG_RSMU=y +CONFIG_EEPROM_AT24=y +CONFIG_EEPROM_AT25=y +CONFIG_SCSI=y +# CONFIG_SCSI_PROC_FS is not set +CONFIG_BLK_DEV_SD=y +# CONFIG_SCSI_LOWLEVEL is not set +CONFIG_NETDEVICES=y +CONFIG_TUN=y +CONFIG_VETH=y +# CONFIG_NET_VENDOR_3COM is not set +# CONFIG_NET_VENDOR_ADAPTEC is not set +# CONFIG_NET_VENDOR_AGERE is not set +# CONFIG_NET_VENDOR_ALACRITECH is not set +# CONFIG_NET_VENDOR_ALTEON is not set +# CONFIG_NET_VENDOR_AMAZON is not set +# CONFIG_NET_VENDOR_AMD is not set +# CONFIG_NET_VENDOR_AQUANTIA is not set +# CONFIG_NET_VENDOR_ARC is not set +# CONFIG_NET_VENDOR_ATHEROS is not set +# CONFIG_NET_VENDOR_BROADCOM is not set +# CONFIG_NET_VENDOR_CAVIUM is not set +# CONFIG_NET_VENDOR_CHELSIO is not set +# CONFIG_NET_VENDOR_CISCO is not set +# CONFIG_NET_VENDOR_DEC is not set +# CONFIG_NET_VENDOR_DLINK is not set +# CONFIG_NET_VENDOR_EMULEX is not set +# CONFIG_NET_VENDOR_EZCHIP is not set +# CONFIG_NET_VENDOR_HISILICON is not set +# CONFIG_NET_VENDOR_HUAWEI is not set +# CONFIG_NET_VENDOR_INTEL is not set +CONFIG_MVPP2=y +CONFIG_MVPP2_PTP=y +# CONFIG_NET_VENDOR_MELLANOX is not set +# CONFIG_NET_VENDOR_MICREL is not set +# CONFIG_NET_VENDOR_MICROCHIP is not set +# CONFIG_NET_VENDOR_MYRI is not set +# CONFIG_NET_VENDOR_NATSEMI is not set +# CONFIG_NET_VENDOR_NETRONOME is not set +# CONFIG_NET_VENDOR_NVIDIA is not set +# CONFIG_NET_VENDOR_OKI is not set +# CONFIG_NET_VENDOR_QLOGIC is not set +# CONFIG_NET_VENDOR_BROCADE is not set +# CONFIG_NET_VENDOR_QUALCOMM is not set +# CONFIG_NET_VENDOR_RDC is not set +# CONFIG_NET_VENDOR_REALTEK is not set +# CONFIG_NET_VENDOR_RENESAS is not set +# CONFIG_NET_VENDOR_ROCKER is not set +# CONFIG_NET_VENDOR_SAMSUNG is not set +# CONFIG_NET_VENDOR_SEEQ is not set +# CONFIG_NET_VENDOR_SILAN is not set +# CONFIG_NET_VENDOR_SIS is not set +# CONFIG_NET_VENDOR_SOLARFLARE is not set +# CONFIG_NET_VENDOR_SMSC is not set +# CONFIG_NET_VENDOR_STMICRO is not set +# CONFIG_NET_VENDOR_SUN is not set +# CONFIG_NET_VENDOR_SYNOPSYS is not set +# CONFIG_NET_VENDOR_TEHUTI is not set +# CONFIG_NET_VENDOR_TI is not set +# CONFIG_NET_VENDOR_VIA is not set +# CONFIG_NET_VENDOR_WIZNET is not set +CONFIG_LED_TRIGGER_PHY=y +CONFIG_SFP=y +CONFIG_MARVELL_PHY=y +CONFIG_MARVELL_10G_PHY=y +CONFIG_MARVELL_10G_PHY_PTP=y +CONFIG_MDIO_IPQ4019=y +CONFIG_USB_RTL8152=y +CONFIG_ATH12K=m +CONFIG_ATH12K_DEBUG=y +CONFIG_INPUT_EVDEV=y +# CONFIG_INPUT_KEYBOARD is not set +# CONFIG_INPUT_MOUSE is not set +# CONFIG_SERIO is not set +CONFIG_VT_HW_CONSOLE_BINDING=y +CONFIG_LEGACY_PTY_COUNT=16 +CONFIG_SERIAL_8250=y +CONFIG_SERIAL_8250_CONSOLE=y +CONFIG_SERIAL_8250_DW=y +CONFIG_SERIAL_MSM=y +CONFIG_SERIAL_MSM_CONSOLE=y +CONFIG_HW_RANDOM=y +# CONFIG_DEVPORT is not set +CONFIG_I2C=y +CONFIG_I2C_CHARDEV=y +CONFIG_I2C_MUX=y +CONFIG_I2C_MUX_PCA954x=y +CONFIG_I2C_GPIO=y +CONFIG_I2C_MV64XXX=y +CONFIG_I2C_QUP=y +CONFIG_SPI=y +CONFIG_SPI_ORION=y +CONFIG_SPI_QUP=y +CONFIG_SPI_SC18IS602=y +CONFIG_SPI_SPIDEV=y +CONFIG_PPS_CLIENT_GPIO=m +CONFIG_PTP_1588_CLOCK_IDTCM=m +CONFIG_PINCTRL_MSM=y +CONFIG_PINCTRL_IPQ6018=y +CONFIG_POWER_RESET_GPIO=y +CONFIG_POWER_RESET_GPIO_RESTART=y +CONFIG_POWER_RESET_RESTART=y +CONFIG_POWER_RESET_SYSCON=y +CONFIG_POWER_SEQUENCING=y +CONFIG_SENSORS_LTC4151=y +CONFIG_SENSORS_LM75=y +CONFIG_SENSORS_TMP421=y +CONFIG_THERMAL=y +CONFIG_ARMADA_THERMAL=y +CONFIG_WATCHDOG=y +CONFIG_ARM_SBSA_WATCHDOG=y +CONFIG_QCOM_WDT=y +CONFIG_MFD_RSMU_I2C=y +CONFIG_REGULATOR=y +CONFIG_REGULATOR_FIXED_VOLTAGE=y +CONFIG_REGULATOR_QCOM_SMD_RPM=y +CONFIG_USB=y +# CONFIG_USB_PCI is not set +CONFIG_USB_XHCI_HCD=y +CONFIG_USB_XHCI_MVEBU=y +CONFIG_USB_EHCI_HCD=y +CONFIG_USB_EHCI_ROOT_HUB_TT=y +CONFIG_USB_STORAGE=y +CONFIG_USB_DWC3=y +CONFIG_NOP_USB_XCEIV=y +CONFIG_USB_GPIO_VBUS=y +CONFIG_NEW_LEDS=y +CONFIG_LEDS_CLASS=y +CONFIG_LEDS_GPIO=y +CONFIG_LEDS_SYSCON=y +CONFIG_LEDS_TRIGGERS=y +CONFIG_LEDS_TRIGGER_HEARTBEAT=y +CONFIG_LEDS_TRIGGER_CPU=y +CONFIG_LEDS_TRIGGER_DEFAULT_ON=y +CONFIG_LEDS_TRIGGER_NETDEV=y +CONFIG_RTC_CLASS=y +CONFIG_RTC_DRV_PCF8523=y +CONFIG_RTC_DRV_RV3028=y +CONFIG_DMADEVICES=y +CONFIG_MV_XOR_V2=y +CONFIG_QCOM_BAM_DMA=y +CONFIG_UIO=y +CONFIG_UIO_PDRV_GENIRQ=m +CONFIG_UIO_PCI_GENERIC=y +# CONFIG_VIRTIO_MENU is not set +# CONFIG_VHOST_MENU is not set +CONFIG_COMMON_CLK_QCOM=y +CONFIG_QCOM_CLK_SMD_RPM=y +CONFIG_IPQ_APSS_6018=y +CONFIG_IPQ_GCC_6018=y +CONFIG_HWSPINLOCK=y +CONFIG_HWSPINLOCK_QCOM=y +# CONFIG_FSL_ERRATUM_A008585 is not set +# CONFIG_HISILICON_ERRATUM_161010101 is not set +CONFIG_MAILBOX=y +CONFIG_QCOM_APCS_IPC=y +# CONFIG_IOMMU_SUPPORT is not set +CONFIG_REMOTEPROC=y +CONFIG_RPMSG_CHAR=y +CONFIG_RPMSG_QCOM_GLINK_RPM=y +CONFIG_RPMSG_QCOM_GLINK_SMEM=y +CONFIG_QCOM_SMEM=y +CONFIG_QCOM_SMD_RPM=y +CONFIG_QCOM_SMP2P=y +CONFIG_QCOM_SMSM=y +CONFIG_QCOM_SOCINFO=y +CONFIG_IIO=y +CONFIG_FXOS8700_I2C=y +CONFIG_PWM=y +CONFIG_PWM_IPQ=y +# CONFIG_PHY_MVEBU_A3700_COMPHY is not set +# CONFIG_PHY_MVEBU_A3700_UTMI is not set +CONFIG_PHY_MVEBU_CP110_COMPHY=y +CONFIG_PHY_QCOM_QMP=y +CONFIG_PHY_QCOM_QUSB2=y +CONFIG_EXT4_FS=y +CONFIG_EXT4_FS_POSIX_ACL=y +CONFIG_FANOTIFY=y +CONFIG_VFAT_FS=y +CONFIG_PROC_KCORE=y +CONFIG_PROC_CHILDREN=y +CONFIG_TMPFS=y +CONFIG_TMPFS_POSIX_ACL=y +CONFIG_HUGETLBFS=y +CONFIG_UBIFS_FS=y +CONFIG_UBIFS_FS_ADVANCED_COMPR=y +CONFIG_UBIFS_ATIME_SUPPORT=y +CONFIG_PSTORE=y +CONFIG_PSTORE_RAM=y +CONFIG_NFS_FS=y +CONFIG_NFS_V4=y +CONFIG_NFS_V4_1=y +CONFIG_NFS_V4_2=y +CONFIG_ROOT_NFS=y +CONFIG_NLS_CODEPAGE_437=y +CONFIG_NLS_ISO8859_1=y +CONFIG_CRYPTO_USER=y +CONFIG_CRYPTO_ECDH=y +CONFIG_CRYPTO_MICHAEL_MIC=y +CONFIG_CRYPTO_ANSI_CPRNG=y +CONFIG_CRYPTO_GHASH_ARM64_CE=y +CONFIG_CRYPTO_SHA1_ARM64_CE=y +CONFIG_CRYPTO_SHA2_ARM64_CE=y +CONFIG_CRYPTO_AES_ARM64_CE_CCM=y +CONFIG_CRYPTO_DEV_MARVELL_CESA=y +CONFIG_CRYPTO_DEV_QCE=y +CONFIG_CRYPTO_DEV_QCOM_RNG=y +CONFIG_CRC_ITU_T=y +CONFIG_CRC7=y +CONFIG_DMA_CMA=y +CONFIG_PRINTK_TIME=y +CONFIG_MAGIC_SYSRQ=y +CONFIG_DEBUG_FS=y +CONFIG_PANIC_ON_OOPS=y +CONFIG_PANIC_TIMEOUT=-1 +# CONFIG_FTRACE is not set +CONFIG_PID_IN_CONTEXTIDR=y + From 7931c9b792247bc4a9aee41a64929e2523e1e57d Mon Sep 17 00:00:00 2001 From: Himanshu Sharma Date: Thu, 20 Nov 2025 10:46:48 +0200 Subject: [PATCH 02/16] updating .yaml build commands and compiler --- arch/arm64/boot/dts/marvell/falcon.dts | 101 +++++ .../dts/qcom/ipq6018-siklu-ctu-100-fr2.dts | 373 ++++++++++++++++++ .../boot/dts/qcom/ipq6018-siklu-ctu-100.dts | 313 +++++++++++++++ 3 files changed, 787 insertions(+) create mode 100644 arch/arm64/boot/dts/marvell/falcon.dts create mode 100644 arch/arm64/boot/dts/qcom/ipq6018-siklu-ctu-100-fr2.dts create mode 100644 arch/arm64/boot/dts/qcom/ipq6018-siklu-ctu-100.dts diff --git a/arch/arm64/boot/dts/marvell/falcon.dts b/arch/arm64/boot/dts/marvell/falcon.dts new file mode 100644 index 0000000000000..741a9f0c4aca1 --- /dev/null +++ b/arch/arm64/boot/dts/marvell/falcon.dts @@ -0,0 +1,101 @@ +/dts-v1/; +/plugin/; + +&i2c0 { + #address-cells = <1>; + #size-cells = <0>; + + ltc4151@6a { + compatible = "lltc,ltc4151"; + reg = <0x6a>; + shunt-resistor-micro-ohms = <20000>; + }; +}; + +&cp0_i2c1 { + #address-cells = <1>; + #size-cells = <0>; + + idtcm: i2c-idtcm-dpll@58 { + #clock-cells = <0>; + compatible = "idt,8a34001"; + reg = <0x58>; + }; +}; + +&cp0_eth0 { + siklu_port_name = "eth2"; +}; + +&cp0_eth1 { + status = "disabled"; +}; + +&cp1_eth0 { + siklu_port_name = "eth1"; +}; + +&cp1_pinctrl { + cp1_mpp6_gpio: cp1-mpp6-gpio { + marvell,pins = "mpp6"; + marvell,function = "gpio"; + }; + + cp1_mpp6_ptp: cp1-mpp6-ptp { + marvell,pins = "mpp6"; + marvell,function = "ptp"; + }; +}; + +&cp1_ethernet { + pinctrl-names = "default", "extts"; + pinctrl-0 = <&cp1_mpp6_gpio>; + pinctrl-1 = <&cp1_mpp6_ptp>; +}; + +// not needed in falcon +&cp1_mdio { + status = "disabled"; +}; + + +/* +* DEV-6442: Add initialization order to the falcon 3310 phy and modems +* By defining i2c-idtcm-dpll as a clock (#clock-cells = <0>;) we +* can create dependency for this clock in the phy (cp0_xmdio) and +* the pcies( modems) sections and thus to cause the i2c-idtcm-dpll +* driver to be initialized before them. otherwise the dpll init can +* cause issues to the modems and the 3310 phy +* +* DEV-7615: Use depends-on to probe the pcies in order +*/ + +&cp0_xmdio { + assigned-clocks = <&idtcm 0>; + assigned-clock-parents = <&idtcm 0>; +}; + +&cp0_pcie0 { + assigned-clocks = <&idtcm 0>; + assigned-clock-parents = <&idtcm 0>; +}; + +&cp0_pcie1 { + assigned-clocks = <&idtcm 0>; + assigned-clock-parents = <&idtcm 0>; + depends-on = <&cp0_pcie0>; +}; + + +&cp1_pcie0 { + assigned-clocks = <&idtcm 0>; + assigned-clock-parents = <&idtcm 0>; + depends-on = <&cp0_pcie1>; +}; + + +&cp1_pcie1 { + assigned-clocks = <&idtcm 0>; + assigned-clock-parents = <&idtcm 0>; + depends-on = <&cp1_pcie0>; +}; diff --git a/arch/arm64/boot/dts/qcom/ipq6018-siklu-ctu-100-fr2.dts b/arch/arm64/boot/dts/qcom/ipq6018-siklu-ctu-100-fr2.dts new file mode 100644 index 0000000000000..e5728156daffe --- /dev/null +++ b/arch/arm64/boot/dts/qcom/ipq6018-siklu-ctu-100-fr2.dts @@ -0,0 +1,373 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) +/* + * IPQ6018 CP01 board device tree source + * + * Copyright (c) 2019-2020 The Linux Foundation. All rights reserved. + */ + +/dts-v1/; + +#include +#include "ipq6018.dtsi" + +/ { + model = "Siklu cTU 100 new"; + compatible = "siklu,ipq6018-ctu", "qcom,ipq6018"; + + aliases { + serial0 = &blsp1_uart3; + ethernet0 = &sgmii; + ethernet1 = &wigig0; + wigig_device_tu = &wigig0; + }; + + /* Declare wigig devices for the gen_node_info_file.sh script. + Note that this declaration is not used by any driver and resides in + the dts by Facebook convention only. */ + wigig_devices { + wigig0: wigig@0 { + pci-bus = "0000:01:00.0"; + }; + }; + + /* + * We have two HWs: PCB263A v1 and PCB263A v2. + * On PCB263A v1 (old), the USB reset pin is on GPIO55, + * On PCB263A v2 (new). the USB reset pin is on GPIO43. + * In order to support both of them together, we will need to + * reset both pins. In order to do so, we are using the `reset-gpios` + * to trigger the old reset, along with a fixed regulator passed + * through `vcc-supply` to trigger the new reset. + * So at the end, both GPIOs will be active once usb3h0_phy will be + * needed. + */ + usb3_vbus_new: regulator-usb3-new { + compatible = "regulator-fixed"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + gpio = <&tlmm 43 GPIO_ACTIVE_HIGH>; + enable-active-high; + regulator-name = "usb3_vbus"; + status = "okay"; + pinctrl-0 = <&usb3_reset_pins_new>; + pinctrl-names = "default"; + }; + + usb3h0_phy: usb3_phy0 { + compatible = "usb-nop-xceiv"; + reset-gpios = <&tlmm 55 GPIO_ACTIVE_HIGH>; + pinctrl-0 = <&usb3_reset_pins_old>; + pinctrl-names = "default"; + vcc-supply = <&usb3_vbus_new>; + }; + + chosen { + stdout-path = "serial0:115200n8"; + bootargs = " swiotlb=1 isolcpus=2,3 ro cma=32m default_hugepagesz=2m hugepagesz=2m hugepages=80 usbcore.quirks=2357:0601:k"; + }; + + /* + * +=========+==============+========================+ + * | | | | + * | Region | Start Offset | Size | + * | | | | + * +--------+--------------+-------------------------+ + * | | | | + * | | | | + * | | | | + * | | | | + * | Linux | 0x41000000 | 139MB | + * | | | | + * | | | | + * | | | | + * +--------+--------------+-------------------------+ + * | TZ App | 0x49B00000 | 6MB | + * +--------+--------------+-------------------------+ + * + * From the available 145 MB for Linux in the first 256 MB, + * we are reserving 6 MB for TZAPP. + * + * Refer arch/arm64/boot/dts/qcom/ipq6018-memory.dtsi + * for memory layout. + */ + + /* TZApp is enabled in default memory profile only. */ + /* This below reservation must be updated when LM support is added. */ + reserved-memory { + tzapp:tzapp@49B00000 { /* TZAPPS */ + no-map; + reg = <0x0 0x49B00000 0x0 0x00600000>; + }; + + ramoops@50000000 { + compatible = "ramoops"; + reg = <0x0 0x50000000 0x0 0x10000>; + record-size = <0x4000>; + }; + }; + + i2c-gpio { + compatible = "i2c-gpio"; + #address-cells = <1>; + #size-cells = <0>; + pinctrl-0 = <&i2c_gpio_pins>; + pinctrl-names = "default"; + scl-gpios = <&tlmm 46 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; + sda-gpios = <&tlmm 47 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; + status = "okay"; + + // // move to dtso? + spi_bridge0: spi@28 { + compatible = "nxp,sc18is606"; + reg = <0x28>; + // spidev in compatible string is not supported so use random one from supported list... + spidev@0 { + compatible = "menlo,m53cpld"; + reg = <0>; + // tweak speed later + spi-max-frequency = <25000000>; + }; + spidev@1 { + compatible = "menlo,m53cpld"; + reg = <0>; + spi-max-frequency = <25000000>; + }; + spidev@2 { + compatible = "menlo,m53cpld"; + reg = <0>; + spi-max-frequency = <25000000>; + }; + }; + // move to dtso? + spi_bridge1: spi@29 { + compatible = "nxp,sc18is606"; + reg = <0x29>; + + spidev@0 { + compatible = "menlo,m53cpld"; + reg = <0>; + spi-max-frequency = <25000000>; + }; + spidev@1 { + compatible = "menlo,m53cpld"; + reg = <0>; + spi-max-frequency = <25000000>; + }; + spidev@2 { + compatible = "menlo,m53cpld"; + reg = <0>; + spi-max-frequency = <25000000>; + }; + }; + + // move to dtso as part of RF board + temperature-sensor@48 { + compatible = "ti,tmp1075"; + reg = <0x48>; + }; + + rtc@52 { + device_type = "rtc"; + compatible = "microcrystal,rv3028"; + reg = <0x52>; + backup-switchover-mode; + dsm-mode; + trickle-resistor-ohms = <3000>; + }; + + temperature-sensor@4c { + compatible = "ti,tmp421"; + reg = <0x4c>; + }; + + eeprom@a0 { + compatible = "atmel,24c256"; // AT24CM02 should be compatible with this + reg = <0xa0>; + pagesize = <256>; + status = "okay"; + }; + }; +}; + +&blsp1_uart3 { + pinctrl-0 = <&serial_3_pins>; + pinctrl-names = "default"; + status = "ok"; +}; + +&blsp1_spi1 { + cs-select = <0>; + status = "ok"; + + m25p80@0 { + #address-cells = <1>; + #size-cells = <1>; + reg = <0>; + compatible = "n25q128a11"; + spi-max-frequency = <50000000>; + + partitions { + compatible = "qcom,smem-part"; + }; + }; +}; + +&tlmm { + i2c_gpio_pins: i2c-gpio-pins { + pins = "gpio46", "gpio47"; + function = "gpio"; + drive-strength = <8>; + }; + + spi_0_pins: spi-0-pins { + pins = "gpio38", "gpio39", "gpio40", "gpio41"; + function = "blsp0_spi"; + drive-strength = <8>; + bias-pull-down; + }; + + usb3_reset_pins_old: usb3-reset-old-pins { + pins = "gpio55"; + function = "gpio"; + drive-strength = <8>; + }; + + usb3_reset_pins_new: usb3-reset-new-pins { + pins = "gpio43"; + function = "gpio"; + drive-strength = <8>; + bias-pull-up; + }; + + pwm_pins: pwm-pins { + /* Power LED yellow part */ + mux_0 { + pins = "gpio23"; + function = "pwm12"; + }; + /* Power LED green part */ + mux_1 { + pins = "gpio24"; + function = "pwm22"; + }; + }; + + mdio_pins: mdio_pinmux { + mux_0 { + pins = "gpio64"; + function = "mdc"; + drive-strength = <8>; + bias-pull-up; + }; + mux_1 { + pins = "gpio65"; + function = "mdio"; + drive-strength = <8>; + bias-pull-up; + }; + mux_2 { + pins = "gpio74"; + function = "gpio"; + bias-pull-up; + }; + mux_3 { + pins = "gpio77"; + function = "gpio"; + bias-pull-up; + }; + }; +}; + +&soc { + sgmii: dp2 { + device_type = "network"; + compatible = "qcom,nss-dp"; + qcom,id = <3>; + reg = <0x0 0x3a001600 0x0 0x200>; + qcom,mactype = <0>; + local-mac-address = [000000000000]; + qcom,link-poll = <1>; + mdio-bus = <&mdio>; + qcom,phy-mdio-addr = <4>; + phy-mode = "sgmii"; + siklu_port_name = "eth1"; + }; + + ess-switch@3a000000 { + switch_cpu_bmp = <0x1>; /* cpu port bitmap */ + switch_lan_bmp = <0x18>; /* lan port bitmap */ + switch_wan_bmp = <0x20>; /* wan port bitmap */ + switch_inner_bmp = <0xc0>; /*inner port bitmap*/ + switch_mac_mode = <0x0>; /* mac mode for uniphy instance0*/ + switch_mac_mode1 = <0xf>; /* mac mode for uniphy instance1*/ + switch_mac_mode2 = <0xff>; /* mac mode for uniphy instance2*/ + mdio-bus = <&mdio>; + qcom,port_phyinfo { + port@4 { + port_id = <3>; + phy_address = <4>; + }; + }; + }; +}; + +&mdio { + pinctrl-0 = <&mdio_pins>; + pinctrl-names = "default"; + reset-gpios = <&tlmm 74 GPIO_ACTIVE_LOW>; + reset-assert-us = <2000>; + status = "okay"; + phy1: ethernet-phy@4 { + reg = <4>; + }; +}; + +&qpic_bam { + status = "ok"; +}; + +&qpic_nand { + status = "ok"; + + nand@0 { + reg = <0>; + #address-cells = <1>; + #size-cells = <1>; + + nand-ecc-strength = <8>; + nand-ecc-step-size = <512>; + nand-bus-width = <8>; + }; +}; + +&pcie_phy { + status = "ok"; +}; + +&pcie0 { + perst-gpio = <&tlmm 60 1>; + + status = "ok"; +}; + +&ssphy_0 { + status = "ok"; +}; + +&qusb_phy_0 { + status = "ok"; +}; + +&usb3 { + status = "ok"; +}; + +&dwc_0 { + usb-phy = <&usb3h0_phy>; +}; + +&pwm { + pinctrl-0 = <&pwm_pins>; + pinctrl-names = "default"; + status = "okay"; +}; diff --git a/arch/arm64/boot/dts/qcom/ipq6018-siklu-ctu-100.dts b/arch/arm64/boot/dts/qcom/ipq6018-siklu-ctu-100.dts new file mode 100644 index 0000000000000..ac75fed3227d5 --- /dev/null +++ b/arch/arm64/boot/dts/qcom/ipq6018-siklu-ctu-100.dts @@ -0,0 +1,313 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) +/* + * IPQ6018 CP01 board device tree source + * + * Copyright (c) 2019-2020 The Linux Foundation. All rights reserved. + */ + +/dts-v1/; + +#include +#include "ipq6018.dtsi" + +/ { + model = "Siklu cTU 100"; + compatible = "siklu,ipq6018-ctu", "qcom,ipq6018"; + + aliases { + serial0 = &blsp1_uart3; + ethernet0 = &sgmii; + ethernet1 = &wigig0; + wigig_device_tu = &wigig0; + }; + + /* Declare wigig devices for the gen_node_info_file.sh script. + Note that this declaration is not used by any driver and resides in + the dts by Facebook convention only. */ + wigig_devices { + wigig0: wigig@0 { + pci-bus = "0000:01:00.0"; + }; + }; + + /* + * We have two HWs: PCB263A v1 and PCB263A v2. + * On PCB263A v1 (old), the USB reset pin is on GPIO55, + * On PCB263A v2 (new). the USB reset pin is on GPIO43. + * In order to support both of them together, we will need to + * reset both pins. In order to do so, we are using the `reset-gpios` + * to trigger the old reset, along with a fixed regulator passed + * through `vcc-supply` to trigger the new reset. + * So at the end, both GPIOs will be active once usb3h0_phy will be + * needed. + */ + usb3_vbus_new: regulator-usb3-new { + compatible = "regulator-fixed"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + gpio = <&tlmm 43 GPIO_ACTIVE_HIGH>; + enable-active-high; + regulator-name = "usb3_vbus"; + status = "okay"; + pinctrl-0 = <&usb3_reset_pins_new>; + pinctrl-names = "default"; + }; + + usb3h0_phy: usb3_phy0 { + compatible = "usb-nop-xceiv"; + reset-gpios = <&tlmm 55 GPIO_ACTIVE_HIGH>; + pinctrl-0 = <&usb3_reset_pins_old>; + pinctrl-names = "default"; + vcc-supply = <&usb3_vbus_new>; + }; + + chosen { + stdout-path = "serial0:115200n8"; + bootargs = " swiotlb=1 isolcpus=2,3 ro cma=32m default_hugepagesz=2m hugepagesz=2m hugepages=80 usbcore.quirks=2357:0601:k"; + }; + + /* + * +=========+==============+========================+ + * | | | | + * | Region | Start Offset | Size | + * | | | | + * +--------+--------------+-------------------------+ + * | | | | + * | | | | + * | | | | + * | | | | + * | Linux | 0x41000000 | 139MB | + * | | | | + * | | | | + * | | | | + * +--------+--------------+-------------------------+ + * | TZ App | 0x49B00000 | 6MB | + * +--------+--------------+-------------------------+ + * + * From the available 145 MB for Linux in the first 256 MB, + * we are reserving 6 MB for TZAPP. + * + * Refer arch/arm64/boot/dts/qcom/ipq6018-memory.dtsi + * for memory layout. + */ + + /* TZApp is enabled in default memory profile only. */ + /* This below reservation must be updated when LM support is added. */ + reserved-memory { + tzapp:tzapp@49B00000 { /* TZAPPS */ + no-map; + reg = <0x0 0x49B00000 0x0 0x00600000>; + }; + + ramoops@50000000 { + compatible = "ramoops"; + reg = <0x0 0x50000000 0x0 0x10000>; + record-size = <0x4000>; + }; + }; + + i2c-gpio { + compatible = "i2c-gpio"; + #address-cells = <1>; + #size-cells = <0>; + pinctrl-0 = <&i2c_gpio_pins>; + pinctrl-names = "default"; + scl-gpios = <&tlmm 46 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; + sda-gpios = <&tlmm 47 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; + status = "okay"; + + rtc@68 { + compatible = "nxp,pcf8523"; + reg = <0x68>; + quartz-load-femtofarads = <7000>; + }; + + temperature-sensor@4c { + compatible = "ti,tmp421"; + reg = <0x4c>; + }; + }; +}; + +&blsp1_uart3 { + pinctrl-0 = <&serial_3_pins>; + pinctrl-names = "default"; + status = "ok"; +}; + +&blsp1_spi1 { + cs-select = <0>; + status = "ok"; + + m25p80@0 { + #address-cells = <1>; + #size-cells = <1>; + reg = <0>; + compatible = "n25q128a11"; + spi-max-frequency = <50000000>; + + partitions { + compatible = "qcom,smem-part"; + }; + }; +}; + +&tlmm { + i2c_gpio_pins: i2c-gpio-pins { + pins = "gpio46", "gpio47"; + function = "gpio"; + drive-strength = <8>; + }; + + spi_0_pins: spi-0-pins { + pins = "gpio38", "gpio39", "gpio40", "gpio41"; + function = "blsp0_spi"; + drive-strength = <8>; + bias-pull-down; + }; + + usb3_reset_pins_old: usb3-reset-old-pins { + pins = "gpio55"; + function = "gpio"; + drive-strength = <8>; + }; + + usb3_reset_pins_new: usb3-reset-new-pins { + pins = "gpio43"; + function = "gpio"; + drive-strength = <8>; + bias-pull-up; + }; + + pwm_pins: pwm-pins { + /* Power LED yellow part */ + mux_0 { + pins = "gpio23"; + function = "pwm12"; + }; + /* Power LED green part */ + mux_1 { + pins = "gpio24"; + function = "pwm22"; + }; + }; + + mdio_pins: mdio_pinmux { + mux_0 { + pins = "gpio64"; + function = "mdc"; + drive-strength = <8>; + bias-pull-up; + }; + mux_1 { + pins = "gpio65"; + function = "mdio"; + drive-strength = <8>; + bias-pull-up; + }; + mux_2 { + pins = "gpio74"; + function = "gpio"; + bias-pull-up; + }; + mux_3 { + pins = "gpio77"; + function = "gpio"; + bias-pull-up; + }; + }; +}; + +&soc { + sgmii: dp2 { + device_type = "network"; + compatible = "qcom,nss-dp"; + qcom,id = <3>; + reg = <0x0 0x3a001600 0x0 0x200>; + qcom,mactype = <0>; + local-mac-address = [000000000000]; + qcom,link-poll = <1>; + mdio-bus = <&mdio>; + qcom,phy-mdio-addr = <4>; + phy-mode = "sgmii"; + siklu_port_name = "eth1"; + }; + + ess-switch@3a000000 { + switch_cpu_bmp = <0x1>; /* cpu port bitmap */ + switch_lan_bmp = <0x18>; /* lan port bitmap */ + switch_wan_bmp = <0x20>; /* wan port bitmap */ + switch_inner_bmp = <0xc0>; /*inner port bitmap*/ + switch_mac_mode = <0x0>; /* mac mode for uniphy instance0*/ + switch_mac_mode1 = <0xf>; /* mac mode for uniphy instance1*/ + switch_mac_mode2 = <0xff>; /* mac mode for uniphy instance2*/ + mdio-bus = <&mdio>; + qcom,port_phyinfo { + port@4 { + port_id = <3>; + phy_address = <4>; + }; + }; + }; +}; + +&mdio { + pinctrl-0 = <&mdio_pins>; + pinctrl-names = "default"; + reset-gpios = <&tlmm 74 GPIO_ACTIVE_LOW>; + reset-assert-us = <2000>; + status = "okay"; + phy1: ethernet-phy@4 { + reg = <4>; + }; +}; + +&qpic_bam { + status = "ok"; +}; + +&qpic_nand { + status = "ok"; + + nand@0 { + reg = <0>; + #address-cells = <1>; + #size-cells = <1>; + + nand-ecc-strength = <8>; + nand-ecc-step-size = <512>; + nand-bus-width = <8>; + }; +}; + +&pcie_phy { + status = "ok"; +}; + +&pcie0 { + perst-gpio = <&tlmm 60 1>; + + status = "ok"; +}; + +&ssphy_0 { + status = "ok"; +}; + +&qusb_phy_0 { + status = "ok"; +}; + +&usb3 { + status = "ok"; +}; + +&dwc_0 { + usb-phy = <&usb3h0_phy>; +}; + +&pwm { + pinctrl-0 = <&pwm_pins>; + pinctrl-names = "default"; + status = "okay"; +}; From e7509e4c4126fd2d326a042f62f3dcc3264d9787 Mon Sep 17 00:00:00 2001 From: Himanshu Sharma Date: Thu, 20 Nov 2025 21:39:01 +0200 Subject: [PATCH 03/16] fixing .yaml steps --- .github/workflows/build-kernel.yml | 11 ++++++++--- 1 file changed, 8 insertions(+), 3 deletions(-) diff --git a/.github/workflows/build-kernel.yml b/.github/workflows/build-kernel.yml index 748a915833ff7..a29074f19de70 100644 --- a/.github/workflows/build-kernel.yml +++ b/.github/workflows/build-kernel.yml @@ -26,10 +26,15 @@ jobs: export ARCH=arm64 export CROSS_COMPILE=aarch64-linux-gnu- - - name: Build kernel with siklu_arm64_defconfig + - name: Copy siklu_arm64_defconfig to config + run: cp arch/arm64/configs/siklu_arm64_defconfig ./config + + - name: Configure kernel (olddefconfig) + run: make ARCH=arm64 olddefconfig + + - name: Build kernel with arm64 architecture run: | - make siklu_arm64_defconfig - make -j$(nproc) + make ARCH=arm64 -j$(nproc) - name: Archive kernel image uses: actions/upload-artifact@v4 From 94698c94196010232e60ec9fdf13ab572890317b Mon Sep 17 00:00:00 2001 From: Himanshu Sharma Date: Thu, 20 Nov 2025 22:31:56 +0200 Subject: [PATCH 04/16] changing the file extension from dts to dtso --- arch/arm64/boot/dts/marvell/{falcon.dts => falcon.dtso} | 0 1 file changed, 0 insertions(+), 0 deletions(-) rename arch/arm64/boot/dts/marvell/{falcon.dts => falcon.dtso} (100%) diff --git a/arch/arm64/boot/dts/marvell/falcon.dts b/arch/arm64/boot/dts/marvell/falcon.dtso similarity index 100% rename from arch/arm64/boot/dts/marvell/falcon.dts rename to arch/arm64/boot/dts/marvell/falcon.dtso From fbf954dd372d64f73b79d65ec41fd144e5a200f9 Mon Sep 17 00:00:00 2001 From: Himanshu Sharma Date: Thu, 20 Nov 2025 22:48:25 +0200 Subject: [PATCH 05/16] update make to single thread --- .github/workflows/build-kernel.yml | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/.github/workflows/build-kernel.yml b/.github/workflows/build-kernel.yml index a29074f19de70..1ae4d4445e2a0 100644 --- a/.github/workflows/build-kernel.yml +++ b/.github/workflows/build-kernel.yml @@ -19,7 +19,7 @@ jobs: - name: Install dependencies run: | sudo apt-get update - sudo apt-get install -y build-essential bc flex bison libssl-dev libncurses-dev crossbuild-essential-arm64 + sudo apt-get install -y build-essential bc flex bison libssl-dev libncurses-dev crossbuild-essential-arm64 gcc-aarch64-linux-gnu g++-aarch64-linux-gnu - name: Set up environment run: | @@ -34,7 +34,7 @@ jobs: - name: Build kernel with arm64 architecture run: | - make ARCH=arm64 -j$(nproc) + make ARCH=arm64 - name: Archive kernel image uses: actions/upload-artifact@v4 From 095e63a3a22f5c034dcbcf159a416f5f9366a02d Mon Sep 17 00:00:00 2001 From: Himanshu Sharma Date: Fri, 21 Nov 2025 17:31:38 +0200 Subject: [PATCH 06/16] Fixing environment issues --- .github/workflows/build-kernel.yml | 17 +++++++---------- 1 file changed, 7 insertions(+), 10 deletions(-) diff --git a/.github/workflows/build-kernel.yml b/.github/workflows/build-kernel.yml index 1ae4d4445e2a0..cbad586b8ac49 100644 --- a/.github/workflows/build-kernel.yml +++ b/.github/workflows/build-kernel.yml @@ -11,8 +11,11 @@ on: jobs: build: - runs-on: ubuntu-latest - steps: + runs-on: ubuntu-latest + env: + ARCH: arm64 + CROSS_COMPILE: aarch64-linux-gnu- + steps: - name: Checkout repository uses: actions/checkout@v4 @@ -21,11 +24,6 @@ jobs: sudo apt-get update sudo apt-get install -y build-essential bc flex bison libssl-dev libncurses-dev crossbuild-essential-arm64 gcc-aarch64-linux-gnu g++-aarch64-linux-gnu - - name: Set up environment - run: | - export ARCH=arm64 - export CROSS_COMPILE=aarch64-linux-gnu- - - name: Copy siklu_arm64_defconfig to config run: cp arch/arm64/configs/siklu_arm64_defconfig ./config @@ -33,9 +31,8 @@ jobs: run: make ARCH=arm64 olddefconfig - name: Build kernel with arm64 architecture - run: | - make ARCH=arm64 - + run: make ARCH=arm64 -j$(nproc) + - name: Archive kernel image uses: actions/upload-artifact@v4 with: From 9a93f5ebff7583616a839fae1237c9e7dfe1d8ce Mon Sep 17 00:00:00 2001 From: Himanshu Sharma Date: Fri, 21 Nov 2025 18:14:37 +0200 Subject: [PATCH 07/16] add log to see cpuinfo --- .github/workflows/build-kernel.yml | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/.github/workflows/build-kernel.yml b/.github/workflows/build-kernel.yml index cbad586b8ac49..6f29f2265f8e9 100644 --- a/.github/workflows/build-kernel.yml +++ b/.github/workflows/build-kernel.yml @@ -30,6 +30,12 @@ jobs: - name: Configure kernel (olddefconfig) run: make ARCH=arm64 olddefconfig + - name: Log runner CPU info + run: | + echo "CPU core count: $(nproc)" + echo "Processor info:" + lscpu + - name: Build kernel with arm64 architecture run: make ARCH=arm64 -j$(nproc) From ec8d42ccf0a5d78fa530deb6009889d83cc7cbb3 Mon Sep 17 00:00:00 2001 From: Himanshu Sharma Date: Mon, 24 Nov 2025 20:55:07 +0200 Subject: [PATCH 08/16] Addressing review comments --- .github/workflows/build-kernel.yml | 2 +- .../boot/dts/marvell/armada-8040-n366.dts | 665 +----------------- arch/arm64/boot/dts/marvell/falcon.dtso | 101 +-- .../dts/qcom/ipq6018-siklu-ctu-100-fr2.dts | 371 +--------- .../boot/dts/qcom/ipq6018-siklu-ctu-100.dts | 311 +------- 5 files changed, 7 insertions(+), 1443 deletions(-) diff --git a/.github/workflows/build-kernel.yml b/.github/workflows/build-kernel.yml index 6f29f2265f8e9..2a888d78dd5e1 100644 --- a/.github/workflows/build-kernel.yml +++ b/.github/workflows/build-kernel.yml @@ -37,7 +37,7 @@ jobs: lscpu - name: Build kernel with arm64 architecture - run: make ARCH=arm64 -j$(nproc) + run: make -j - name: Archive kernel image uses: actions/upload-artifact@v4 diff --git a/arch/arm64/boot/dts/marvell/armada-8040-n366.dts b/arch/arm64/boot/dts/marvell/armada-8040-n366.dts index 21bfca0777b2f..5da5a82aaf095 100644 --- a/arch/arm64/boot/dts/marvell/armada-8040-n366.dts +++ b/arch/arm64/boot/dts/marvell/armada-8040-n366.dts @@ -1,665 +1,4 @@ -#include "armada-8040.dtsi" - -#include -#include +/dts-v1/; / { - model = "Siklu N366"; - compatible = "siklu,n366", "marvell,armada8040", - "marvell,armada-ap806-quad", "marvell,armada-ap806"; - - chosen { - stdout-path = "serial0:115200n8"; - bootargs = "mem=2G cma=128m isolcpus=2,3 ro default_hugepagesz=2m hugepagesz=2m hugepages=256 usbcore.quirks=2357:0601:k"; - }; - - memory@00000000 { - device_type = "memory"; - reg = <0x0 0x0 0x0 0x80000000>; - }; - - /* restart instead of power off */ - restart_poweroff { - compatible = "restart-poweroff"; - }; - - reserved-memory { - ramoops@6fff0000 { - compatible = "ramoops"; - reg = <0x0 0x6fff0000 0x0 0x10000>; - record-size = <0x4000>; - }; - }; - - aliases { - /* For u-boot, set setup mac addresses */ - ethernet0 = &cp0_eth1; /* 1G SGMII Copper */ - ethernet1 = &cp0_eth0; /* 10G Copper */ - ethernet2 = &cp1_eth0; /* 10G SFP */ - - /* Setup mac addresses for wigig devices */ - ethernet3 = &wigig0; - ethernet4 = &wigig1; - ethernet5 = &wigig2; - ethernet6 = &wigig3; - - wigig_device_tu = &wigig2; - }; - - /* Declare wigig devices for the gen_node_info_file.sh script */ - wigig_devices { - /* J13 */ - wigig0: wigig@0 { - pci-bus = "0000:01:00.0"; - }; - /* J12 */ - wigig1: wigig@1 { - pci-bus = "0003:01:00.0"; - }; - /* J6 */ - wigig2: wigig@2 { - pci-bus = "0002:01:00.0"; - }; - /* J5 */ - wigig3: wigig@3 { - pci-bus = "0001:01:00.0"; - }; - }; - - v_5v0_usb3_hst_vbus: regulator-usb3-vbus0 { - compatible = "regulator-fixed"; - enable-active-high; - gpio = <&cp0_gpio2 23 GPIO_ACTIVE_HIGH>; - pinctrl-names = "default"; - pinctrl-0 = <&cp0_xhci_vbus_pins>; - regulator-name = "v_5v0_usb3_hst_vbus"; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - status = "okay"; - }; - - usb3h0_phy: usb3_phy0 { - compatible = "usb-nop-xceiv"; - vcc-supply = <&v_5v0_usb3_hst_vbus>; - }; - - pps { - compatible = "pps-gpio"; - pinctrl-names = "default"; - pinctrl-0 = <&cp0_pps>; - gpio = <&cp0_gpio2 21 GPIO_ACTIVE_HIGH>; - capture-clear; - status = "okay"; - }; - - sfp: sfp { - /* SFP */ - compatible = "sff,sfp"; - i2c-bus = <&cp0_i2c0>; - tx-disable-gpio = <&cp1_gpio1 8 GPIO_ACTIVE_HIGH>; /* CP1_MPP[8] SFP_P0_TX_DIS */ - pinctrl-names = "default"; - pinctrl-0 = <&cp0_sfpp1_pins &cp1_sfpp1_pins>; - }; - - leds { - compatible = "gpio-leds"; - pinctrl-names = "default"; - pinctrl-0 = <&cp0_leds &cp1_leds>; - - /* - * Remove the green power LED from gpio-leds driver control. The GPIO - * driver unconditionally disables blinking when setting output - * direction. This conflicts with the requirement to blink the LED - * until boot completes. - */ -/* - power-led-green { - gpios = <&cp0_gpio2 17 GPIO_ACTIVE_LOW>; - color = ; - function = LED_FUNCTION_POWER; - default-state = "off"; - }; -*/ - - power-led-yellow { - gpios = <&cp0_gpio2 18 GPIO_ACTIVE_LOW>; - color = ; - function = LED_FUNCTION_POWER; - default-state = "keep"; - }; - - rf-led-green { - gpios = <&cp0_gpio2 19 GPIO_ACTIVE_LOW>; - color = ; - function = "rf-indicator"; - default-state = "off"; - }; - - rf-led-yellow { - gpios = <&cp0_gpio2 20 GPIO_ACTIVE_LOW>; - color = ; - function = "rf-indicator"; - default-state = "off"; - }; - - sfp-led-green { - gpios = <&cp1_gpio1 30 GPIO_ACTIVE_LOW>; - color = ; - function = LED_FUNCTION_LAN; - default-state = "off"; - }; - - sfp-led-yellow { - gpios = <&cp1_gpio1 31 GPIO_ACTIVE_LOW>; - color = ; - function = LED_FUNCTION_LAN; - default-state = "off"; - }; - }; -}; - -/* RTC TEMP eCompass I2C bus */ -&i2c0 { - clock-frequency = <100000>; - pinctrl-names = "default"; - pinctrl-0 = <&ap_i2c_pins>; - status = "okay"; - - i2c-tmp421-temp@4c { - compatible = "ti,tmp421"; - reg = <0x4c>; - }; - - i2c-pcf8523-rtc@68 { - compatible = "nxp,pcf8523"; - reg = <0x68>; - quartz-load-femtofarads = <7000>; - }; - - i2c-fxos8700-ecompass@1e { - compatible = "nxp,fxos8700"; - reg = <0x1e>; - }; -}; - -/* SFP i2c bus */ -&cp0_i2c0 { - clock-frequency = <100000>; - pinctrl-names = "default"; - pinctrl-0 = <&cp0_i2c0_pins>; - status = "okay"; -}; - -/* Enable this bus as a workaround. Hold the CP110_GATE_SLOW_IO clock gate - * enabled to avoid hard lockup when the UART driver toggles the clock. - */ -&cp1_i2c0 { - clock-frequency = <100000>; - status = "okay"; -}; - -/* Siklu spider control bus, not connected in product versions */ -&cp0_i2c1 { - clock-frequency = <1000000>; - pinctrl-names = "default"; - pinctrl-0 = <&cp0_i2c1_pins>; - status = "okay"; -}; - -/* SFP eth */ -&cp1_eth0 { - phy-mode = "10gbase-kr"; - phys = <&cp1_comphy2 0>; - phy-names = "sfp-comphy"; - managed = "in-band-status"; - sfp = <&sfp>; - status = "okay"; - siklu_port_name = "eth3"; -}; - -/* Enable UART console. */ -&uart0 { - status = "okay"; -}; - -/* Enable USB3, lane 1 */ -&cp0_usb3_1 { - usb-phy = <&usb3h0_phy>; - status = "okay"; -}; - -&cp1_nand_controller { - pinctrl-0 = <&cp1_nand_pins &cp1_dev_nand_pins>; - status = "okay"; - - nand@0 { - reg = <0>; - nand-rb = <0>; - nand-ecc-step-size = <512>; - nand-ecc-strength = <8>; - nand-on-flash-bbt; - }; -}; - -&cp0_pinctrl { - pinctrl-0 = <&cp0_hw_version>; - - cp0_xhci_vbus_pins: cp0-xhci-vbus-pins { - marvell,pins = "mpp55"; - marvell,function = "gpio"; - }; - - cp0_sfpp1_pins: sfpp1-pins { - marvell,pins = "mpp60"; - marvell,function = "gpio"; - }; - - cp0_i2c0_pins: i2c0-pins { - marvell,pins = "mpp37", "mpp38"; - marvell,function = "i2c0"; - }; - - cp0_i2c1_pins: i2c1-pins { - marvell,pins = "mpp35", "mpp36"; - marvell,function = "i2c1"; - }; - - phy0_10g_3310_reset_pins: phy0-3310-reset-pins { - marvell,pins = "mpp61"; - marvell,function = "gpio"; - }; - - phy0_1g_1512_reset_pins: phy01-3310-reset-pins { - marvell,pins = "mpp41"; - marvell,function = "gpio"; - }; - - phy0_10g_3310_xmdio_pins: phy0-3310-xmdio-pins { - marvell,pins = "mpp42", "mpp43"; - marvell,function = "xg"; - }; - - cp0_pcie1_pins: cp0-pcie1-pins { - marvell,pins = "mpp33"; - marvell,function = "gpio"; - }; - - cp0_pcie0_pins: cp0-pcie0-pins { - marvell,pins = "mpp32"; - marvell,function = "gpio"; - }; - - /* WG1_Exist_n */ - cp0_pcie1_exist: wgig-pins { - marvell,pins = "mpp57"; - marvell,function = "gpio"; - }; - - cp0_hw_version: cp0-hw-version-pins { - marvell,pins = "mpp58", "mpp59", "mpp32"; - marvell,function = "gpio"; - }; - - cp0_leds: cp0-leds { - marvell,pins = "mpp49", "mpp50", "mpp51", "mpp52"; - marvell,function = "gpio"; - }; - - cp0_pps: cp0-pps { - marvell,pins = "mpp53"; - marvell,function = "gpio"; - }; -}; - -&cp1_pinctrl { - pinctrl-0 = <&cp1_hw_version &cp1_rssi_pwm &cp1_pse_out_led1>; - - cp1_nand_pins: cp0-nand-pins { - marvell,pins = "mpp13"; - marvell,function = "nf"; - }; - cp1_dev_nand_pins: cp0-dev-nand-pins { - marvell,pins = "mpp15", "mpp16", "mpp17", - "mpp18", "mpp19", "mpp20", - "mpp21", "mpp22", "mpp23", - "mpp24", "mpp25", "mpp26", - "mpp27"; - marvell,function = "dev"; - }; - - cp1_sfpp1_pins: sfpp1-pins { - marvell,pins = "mpp8", "mpp10", "mpp12"; - marvell,function = "gpio"; - }; - - cp1_mdio_pins: cp1-mdio-pins { - marvell,pins = "mpp4", "mpp5"; - marvell,function = "ge"; - }; - - cp1_pcie1_pins: cp1-pcie1-pins { - marvell,pins = "mpp28"; - marvell,function = "gpio"; - }; - - cp1_pcie0_pins: cp1-pcie0-pins { - marvell,pins = "mpp29"; - marvell,function = "gpio"; - }; - cp1_uart0_pins: cp1-uart0-pins { - marvell,pins = "mpp0", "mpp1"; - marvell,function = "uart0"; - }; - - cp1_hw_version: cp1-hw-version-pins { - marvell,pins = "mpp7"; - marvell,function = "gpio"; - }; - - cp1_pse_out_led1: cp1-pse-out-led1-pins { - marvell,pins = "mpp6"; - marvell,function = "gpio"; - }; - - cp1_rssi_pwm: cp1-rssi-pwm-pins { - marvell,pins = "mpp14"; - marvell,function = "gpio"; - }; - - cp1_leds: cp1-leds { - marvell,pins = "mpp30", "mpp31"; - marvell,function = "gpio"; - }; -}; - -&cp1_uart0 { - pinctrl-0 = <&cp1_uart0_pins>; - pinctrl-names = "default"; - status = "okay"; -}; - -&ap_pinctrl { - pinctrl-0 = <&ap_reset_pins &ap_rssi_alignment_mode>; - pinctrl-names = "default"; - - ap_spi_pins: ap-spi-pins { - marvell,pins = "mpp0", "mpp1", "mpp2", "mpp3"; - marvell,function = "spi0"; - }; - - ap_reset_pins: ap-reset-pins { - marvell,pins = "mpp12"; - marvell,function = "gpio"; - }; - - ap_i2c_pins: ap-i2c-pins { - marvell,pins = "mpp4", "mpp5"; - marvell,function = "i2c0"; - }; - - ap_rssi_alignment_mode: ap-rssi-alignment-mode { - marvell,pins = "mpp8"; - marvell,function = "gpio"; - }; - - ap_gps_reset: ap-gps-reset-pins { - marvell,pins = "mpp6"; - marvell,function = "gpio"; - }; -}; - -&spi0 { - pinctrl-0 = <&ap_spi_pins>; - status = "okay"; - pinctrl-names = "default"; - - spi-flash@0 { - status = "okay"; - compatible = "jedec,spi-nor"; - reg = <0>; - spi-max-frequency = <20000000>; - }; -}; - -&cp0_xmdio { - status = "okay"; - pinctrl-names = "default"; - reset-gpios = <&cp0_gpio2 29 GPIO_ACTIVE_LOW>; - reset-delay-us = <100000>; - reset-post-delay-us = <100000>; - pinctrl-0 = <&phy0_10g_3310_reset_pins &phy0_10g_3310_xmdio_pins>; - - phy0: ethernet-phy@2 { - compatible = "ethernet-phy-ieee802.3-c45"; - reg = <2>; - }; -}; - -&cp0_eth0 { - status = "okay"; - siklu_port_name = "eth1"; - phy = <&phy0>; - phy-mode = "10gbase-kr"; - phys = <&cp0_comphy2 0>; -}; - -&cp1_mdio { - status = "okay"; - pinctrl-names = "default"; - pinctrl-0 = <&cp1_mdio_pins &phy0_1g_1512_reset_pins>; - reset-gpios = <&cp0_gpio2 9 GPIO_ACTIVE_LOW>; - reset-delay-us = <100000>; - reset-post-delay-us = <100000>; - - mdio_phy0: mdio-phy0 { - reg = <0>; - }; -}; - -&cp0_eth1 { - status = "okay"; - siklu_port_name = "eth2"; - phy = <&mdio_phy0>; - phy-mode = "sgmii"; - phys = <&cp0_comphy3 1>; -}; - -&cp0_ethernet { - status = "okay"; -}; - -&cp1_ethernet { - status = "okay"; -}; - -&cp0_pcie0 { - pinctrl-names = "default"; - pinctrl-0 = <&cp0_pcie0_pins>; - num-lanes = <2>; - reset-gpio = <&cp0_gpio2 0 GPIO_ACTIVE_HIGH>; - phys = <&cp0_comphy0 0>; - status = "okay"; -}; - -&cp0_pcie1 { - pinctrl-names = "default"; - pinctrl-0 = <&cp0_pcie1_pins>; - num-lanes = <1>; - reset-gpio = <&cp0_gpio2 1 GPIO_ACTIVE_HIGH>; - phys = <&cp0_comphy4 1>; - status = "okay"; -}; - -&cp1_pcie0 { - pinctrl-names = "default"; - pinctrl-0 = <&cp1_pcie0_pins>; - num-lanes = <2>; - reset-gpio = <&cp1_gpio1 29 GPIO_ACTIVE_HIGH>; - phys = <&cp1_comphy0 0>; - status = "okay"; -}; - -&cp1_pcie1 { - pinctrl-names = "default"; - pinctrl-0 = <&cp1_pcie1_pins>; - num-lanes = <1>; - reset-gpio = <&cp1_gpio1 28 GPIO_ACTIVE_HIGH>; - phys = <&cp1_comphy4 1>; - status = "okay"; -}; - -/* - * DEV-5151: enable emphesis quirk on eth3 in order - * to work around an issue where two devices - * will enter an endless up/down loop when they - * are connected to each other. - */ -&cp1_comphy2 { - enable-emp-quirk = <1>; -}; - -/* Override trip temps to 105c */ -&ap_crit { - temperature = <105000>; /* mC degrees */ -}; - -&cp1_crit { - temperature = <105000>; /* mC degrees */ -}; - -&cp0_crit { - temperature = <105000>; /* mC degrees */ -}; - - -&ap_pinctrl { - pinctrl-0 = <&ap_reset_pins &ap_rssi_alignment_mode>; - pinctrl-names = "default"; - - ap_spi_pins: ap-spi-pins { - marvell,pins = "mpp0", "mpp1", "mpp2", "mpp3"; - marvell,function = "spi0"; - }; - - ap_reset_pins: ap-reset-pins { - marvell,pins = "mpp12"; - marvell,function = "gpio"; - }; - - ap_i2c_pins: ap-i2c-pins { - marvell,pins = "mpp4", "mpp5"; - marvell,function = "i2c0"; - }; - - ap_rssi_alignment_mode: ap-rssi-alignment-mode { - marvell,pins = "mpp8"; - marvell,function = "gpio"; - }; - - ap_gps_reset: ap-gps-reset-pins { - marvell,pins = "mpp6"; - marvell,function = "gpio"; - }; -}; - -&ap_gpio { - status = "okay"; - - gpio-line-names = - "[spi-flash-sclk]", - "[spi-flash-miso]", - "[spi-flash-mosi]", - "[spi-flash-cs0]", - "[i2c0-sda]", /* connected to &i2c0 */ - "[i2c0-scl]", /* connected to &i2c0 */ - "gps-reset", - "timepulse_onoff", - "rssi-indicator", - "[spi-flash-cs1]", /* connected to a *DNU* SPI NAND CHIP U21 */ - "timepulse-sel2", - "[gps-uart-tx]", - "factory-reset-button", - "", /* Does not exist in chip */ - "", /* Does not exist in chip */ - "", /* Does not exist in chip */ - "", /* Does not exist in chip */ - "", /* Does not exist in chip */ - "", /* Does not exist in chip */ - "[gps-uart-rx]"; -}; - -&cp0_gpio2 { - status = "okay"; - - gpio-line-names = - "pcie0_reset_n", - "pcie1_reset_n", - "bt_poe_n", - "[cp0_i2c1_sda]", /* connected to &cp0_i2c1 */ - "[cp0_i2c1_sck]", /* connected to &cp0_i2c1 */ - "[cp0_i2c0_sck]", /* connected to &cp0_i2c0 */ - "[cp0_i2c0_sda]", /* connected to &cp0_i2c0 */ - "poe_pairs", - "phy_p0_int_n", - "phy_p0_rst_n", - "[cp0_xmdc]", - "[cp0_xmdio]", - "[pcie0_clock_config_cp0]", - "cp0_mpp45", - "cp0_mpp46", - "cp0_mpp47", - "[pcie1_clock_config_cp0]", - "pwr_led_g", - "pwr_led_y", - "mdm_led_g", - "mdm_led_y", - "timepulse_8040cpu", - "eth1_led_g_y", - "usb_enable", - "wg0_exist_n", - "wg1_exist_n", - "wg0_disable_n", - "wg1_disable_n", - "sfp_p0_exist", - "10g_phy0_rstn", - "10g_phy0_intn"; -}; - - -&cp1_gpio1 { - status = "okay"; - - gpio-line-names = - "[cp1_ua0_rx]", /* GPS UART RX */ - "[cp1_ua0_tx]", /* GPS UART TX */ - "pse_led2", /* GPIO, IN , PSE ISO7742DW */ - "pse_rst_n", /* GPIO, OUT, PSE ISO7742DW */ - "[cp1_mdc]", /* 1510 PHY */ - "[cp1_mdio]", /* 1510 PHY */ - "pse_led1", /* GPIO, IN , PSE ISO7742DW */ - "wg2_disable_n", /* useless, passed to the Wigig Modem */ - "sfp_p0_tx_dis", /* GPIO, OUT, SFP */ - "[pcie0_clock_config_cp1]", - "sfp_p0_los_s", /* GPIO, IN , SFP */ - "[pcie1_clock_config_cp1]", - "sfp_p0_fault", /* GPIO, IN , SFP */ - "[nand_rb]", - "rssi_ctrl", - "[nand_ad7]", - "[nand_ad6]", - "[nand_ad5]", - "[nand_ad4]", - "[nand_ad3]", - "[nand_ad2]", - "[nand_ad1]", - "[nand_ad0]", - "[nand_ale]", - "[nand_cle]", - "[nand_re_n]", - "[nand_we_n]", - "[nand_ce0_n]", - "[pcie3_perst_n]", - "[pcie2_perst_n]", - "[sfp_led_g]", - "[sfp_led_y]"; -}; +}; \ No newline at end of file diff --git a/arch/arm64/boot/dts/marvell/falcon.dtso b/arch/arm64/boot/dts/marvell/falcon.dtso index 741a9f0c4aca1..5da5a82aaf095 100644 --- a/arch/arm64/boot/dts/marvell/falcon.dtso +++ b/arch/arm64/boot/dts/marvell/falcon.dtso @@ -1,101 +1,4 @@ /dts-v1/; -/plugin/; -&i2c0 { - #address-cells = <1>; - #size-cells = <0>; - - ltc4151@6a { - compatible = "lltc,ltc4151"; - reg = <0x6a>; - shunt-resistor-micro-ohms = <20000>; - }; -}; - -&cp0_i2c1 { - #address-cells = <1>; - #size-cells = <0>; - - idtcm: i2c-idtcm-dpll@58 { - #clock-cells = <0>; - compatible = "idt,8a34001"; - reg = <0x58>; - }; -}; - -&cp0_eth0 { - siklu_port_name = "eth2"; -}; - -&cp0_eth1 { - status = "disabled"; -}; - -&cp1_eth0 { - siklu_port_name = "eth1"; -}; - -&cp1_pinctrl { - cp1_mpp6_gpio: cp1-mpp6-gpio { - marvell,pins = "mpp6"; - marvell,function = "gpio"; - }; - - cp1_mpp6_ptp: cp1-mpp6-ptp { - marvell,pins = "mpp6"; - marvell,function = "ptp"; - }; -}; - -&cp1_ethernet { - pinctrl-names = "default", "extts"; - pinctrl-0 = <&cp1_mpp6_gpio>; - pinctrl-1 = <&cp1_mpp6_ptp>; -}; - -// not needed in falcon -&cp1_mdio { - status = "disabled"; -}; - - -/* -* DEV-6442: Add initialization order to the falcon 3310 phy and modems -* By defining i2c-idtcm-dpll as a clock (#clock-cells = <0>;) we -* can create dependency for this clock in the phy (cp0_xmdio) and -* the pcies( modems) sections and thus to cause the i2c-idtcm-dpll -* driver to be initialized before them. otherwise the dpll init can -* cause issues to the modems and the 3310 phy -* -* DEV-7615: Use depends-on to probe the pcies in order -*/ - -&cp0_xmdio { - assigned-clocks = <&idtcm 0>; - assigned-clock-parents = <&idtcm 0>; -}; - -&cp0_pcie0 { - assigned-clocks = <&idtcm 0>; - assigned-clock-parents = <&idtcm 0>; -}; - -&cp0_pcie1 { - assigned-clocks = <&idtcm 0>; - assigned-clock-parents = <&idtcm 0>; - depends-on = <&cp0_pcie0>; -}; - - -&cp1_pcie0 { - assigned-clocks = <&idtcm 0>; - assigned-clock-parents = <&idtcm 0>; - depends-on = <&cp0_pcie1>; -}; - - -&cp1_pcie1 { - assigned-clocks = <&idtcm 0>; - assigned-clock-parents = <&idtcm 0>; - depends-on = <&cp1_pcie0>; -}; +/ { +}; \ No newline at end of file diff --git a/arch/arm64/boot/dts/qcom/ipq6018-siklu-ctu-100-fr2.dts b/arch/arm64/boot/dts/qcom/ipq6018-siklu-ctu-100-fr2.dts index e5728156daffe..5da5a82aaf095 100644 --- a/arch/arm64/boot/dts/qcom/ipq6018-siklu-ctu-100-fr2.dts +++ b/arch/arm64/boot/dts/qcom/ipq6018-siklu-ctu-100-fr2.dts @@ -1,373 +1,4 @@ -// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) -/* - * IPQ6018 CP01 board device tree source - * - * Copyright (c) 2019-2020 The Linux Foundation. All rights reserved. - */ - /dts-v1/; -#include -#include "ipq6018.dtsi" - / { - model = "Siklu cTU 100 new"; - compatible = "siklu,ipq6018-ctu", "qcom,ipq6018"; - - aliases { - serial0 = &blsp1_uart3; - ethernet0 = &sgmii; - ethernet1 = &wigig0; - wigig_device_tu = &wigig0; - }; - - /* Declare wigig devices for the gen_node_info_file.sh script. - Note that this declaration is not used by any driver and resides in - the dts by Facebook convention only. */ - wigig_devices { - wigig0: wigig@0 { - pci-bus = "0000:01:00.0"; - }; - }; - - /* - * We have two HWs: PCB263A v1 and PCB263A v2. - * On PCB263A v1 (old), the USB reset pin is on GPIO55, - * On PCB263A v2 (new). the USB reset pin is on GPIO43. - * In order to support both of them together, we will need to - * reset both pins. In order to do so, we are using the `reset-gpios` - * to trigger the old reset, along with a fixed regulator passed - * through `vcc-supply` to trigger the new reset. - * So at the end, both GPIOs will be active once usb3h0_phy will be - * needed. - */ - usb3_vbus_new: regulator-usb3-new { - compatible = "regulator-fixed"; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - gpio = <&tlmm 43 GPIO_ACTIVE_HIGH>; - enable-active-high; - regulator-name = "usb3_vbus"; - status = "okay"; - pinctrl-0 = <&usb3_reset_pins_new>; - pinctrl-names = "default"; - }; - - usb3h0_phy: usb3_phy0 { - compatible = "usb-nop-xceiv"; - reset-gpios = <&tlmm 55 GPIO_ACTIVE_HIGH>; - pinctrl-0 = <&usb3_reset_pins_old>; - pinctrl-names = "default"; - vcc-supply = <&usb3_vbus_new>; - }; - - chosen { - stdout-path = "serial0:115200n8"; - bootargs = " swiotlb=1 isolcpus=2,3 ro cma=32m default_hugepagesz=2m hugepagesz=2m hugepages=80 usbcore.quirks=2357:0601:k"; - }; - - /* - * +=========+==============+========================+ - * | | | | - * | Region | Start Offset | Size | - * | | | | - * +--------+--------------+-------------------------+ - * | | | | - * | | | | - * | | | | - * | | | | - * | Linux | 0x41000000 | 139MB | - * | | | | - * | | | | - * | | | | - * +--------+--------------+-------------------------+ - * | TZ App | 0x49B00000 | 6MB | - * +--------+--------------+-------------------------+ - * - * From the available 145 MB for Linux in the first 256 MB, - * we are reserving 6 MB for TZAPP. - * - * Refer arch/arm64/boot/dts/qcom/ipq6018-memory.dtsi - * for memory layout. - */ - - /* TZApp is enabled in default memory profile only. */ - /* This below reservation must be updated when LM support is added. */ - reserved-memory { - tzapp:tzapp@49B00000 { /* TZAPPS */ - no-map; - reg = <0x0 0x49B00000 0x0 0x00600000>; - }; - - ramoops@50000000 { - compatible = "ramoops"; - reg = <0x0 0x50000000 0x0 0x10000>; - record-size = <0x4000>; - }; - }; - - i2c-gpio { - compatible = "i2c-gpio"; - #address-cells = <1>; - #size-cells = <0>; - pinctrl-0 = <&i2c_gpio_pins>; - pinctrl-names = "default"; - scl-gpios = <&tlmm 46 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; - sda-gpios = <&tlmm 47 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; - status = "okay"; - - // // move to dtso? - spi_bridge0: spi@28 { - compatible = "nxp,sc18is606"; - reg = <0x28>; - // spidev in compatible string is not supported so use random one from supported list... - spidev@0 { - compatible = "menlo,m53cpld"; - reg = <0>; - // tweak speed later - spi-max-frequency = <25000000>; - }; - spidev@1 { - compatible = "menlo,m53cpld"; - reg = <0>; - spi-max-frequency = <25000000>; - }; - spidev@2 { - compatible = "menlo,m53cpld"; - reg = <0>; - spi-max-frequency = <25000000>; - }; - }; - // move to dtso? - spi_bridge1: spi@29 { - compatible = "nxp,sc18is606"; - reg = <0x29>; - - spidev@0 { - compatible = "menlo,m53cpld"; - reg = <0>; - spi-max-frequency = <25000000>; - }; - spidev@1 { - compatible = "menlo,m53cpld"; - reg = <0>; - spi-max-frequency = <25000000>; - }; - spidev@2 { - compatible = "menlo,m53cpld"; - reg = <0>; - spi-max-frequency = <25000000>; - }; - }; - - // move to dtso as part of RF board - temperature-sensor@48 { - compatible = "ti,tmp1075"; - reg = <0x48>; - }; - - rtc@52 { - device_type = "rtc"; - compatible = "microcrystal,rv3028"; - reg = <0x52>; - backup-switchover-mode; - dsm-mode; - trickle-resistor-ohms = <3000>; - }; - - temperature-sensor@4c { - compatible = "ti,tmp421"; - reg = <0x4c>; - }; - - eeprom@a0 { - compatible = "atmel,24c256"; // AT24CM02 should be compatible with this - reg = <0xa0>; - pagesize = <256>; - status = "okay"; - }; - }; -}; - -&blsp1_uart3 { - pinctrl-0 = <&serial_3_pins>; - pinctrl-names = "default"; - status = "ok"; -}; - -&blsp1_spi1 { - cs-select = <0>; - status = "ok"; - - m25p80@0 { - #address-cells = <1>; - #size-cells = <1>; - reg = <0>; - compatible = "n25q128a11"; - spi-max-frequency = <50000000>; - - partitions { - compatible = "qcom,smem-part"; - }; - }; -}; - -&tlmm { - i2c_gpio_pins: i2c-gpio-pins { - pins = "gpio46", "gpio47"; - function = "gpio"; - drive-strength = <8>; - }; - - spi_0_pins: spi-0-pins { - pins = "gpio38", "gpio39", "gpio40", "gpio41"; - function = "blsp0_spi"; - drive-strength = <8>; - bias-pull-down; - }; - - usb3_reset_pins_old: usb3-reset-old-pins { - pins = "gpio55"; - function = "gpio"; - drive-strength = <8>; - }; - - usb3_reset_pins_new: usb3-reset-new-pins { - pins = "gpio43"; - function = "gpio"; - drive-strength = <8>; - bias-pull-up; - }; - - pwm_pins: pwm-pins { - /* Power LED yellow part */ - mux_0 { - pins = "gpio23"; - function = "pwm12"; - }; - /* Power LED green part */ - mux_1 { - pins = "gpio24"; - function = "pwm22"; - }; - }; - - mdio_pins: mdio_pinmux { - mux_0 { - pins = "gpio64"; - function = "mdc"; - drive-strength = <8>; - bias-pull-up; - }; - mux_1 { - pins = "gpio65"; - function = "mdio"; - drive-strength = <8>; - bias-pull-up; - }; - mux_2 { - pins = "gpio74"; - function = "gpio"; - bias-pull-up; - }; - mux_3 { - pins = "gpio77"; - function = "gpio"; - bias-pull-up; - }; - }; -}; - -&soc { - sgmii: dp2 { - device_type = "network"; - compatible = "qcom,nss-dp"; - qcom,id = <3>; - reg = <0x0 0x3a001600 0x0 0x200>; - qcom,mactype = <0>; - local-mac-address = [000000000000]; - qcom,link-poll = <1>; - mdio-bus = <&mdio>; - qcom,phy-mdio-addr = <4>; - phy-mode = "sgmii"; - siklu_port_name = "eth1"; - }; - - ess-switch@3a000000 { - switch_cpu_bmp = <0x1>; /* cpu port bitmap */ - switch_lan_bmp = <0x18>; /* lan port bitmap */ - switch_wan_bmp = <0x20>; /* wan port bitmap */ - switch_inner_bmp = <0xc0>; /*inner port bitmap*/ - switch_mac_mode = <0x0>; /* mac mode for uniphy instance0*/ - switch_mac_mode1 = <0xf>; /* mac mode for uniphy instance1*/ - switch_mac_mode2 = <0xff>; /* mac mode for uniphy instance2*/ - mdio-bus = <&mdio>; - qcom,port_phyinfo { - port@4 { - port_id = <3>; - phy_address = <4>; - }; - }; - }; -}; - -&mdio { - pinctrl-0 = <&mdio_pins>; - pinctrl-names = "default"; - reset-gpios = <&tlmm 74 GPIO_ACTIVE_LOW>; - reset-assert-us = <2000>; - status = "okay"; - phy1: ethernet-phy@4 { - reg = <4>; - }; -}; - -&qpic_bam { - status = "ok"; -}; - -&qpic_nand { - status = "ok"; - - nand@0 { - reg = <0>; - #address-cells = <1>; - #size-cells = <1>; - - nand-ecc-strength = <8>; - nand-ecc-step-size = <512>; - nand-bus-width = <8>; - }; -}; - -&pcie_phy { - status = "ok"; -}; - -&pcie0 { - perst-gpio = <&tlmm 60 1>; - - status = "ok"; -}; - -&ssphy_0 { - status = "ok"; -}; - -&qusb_phy_0 { - status = "ok"; -}; - -&usb3 { - status = "ok"; -}; - -&dwc_0 { - usb-phy = <&usb3h0_phy>; -}; - -&pwm { - pinctrl-0 = <&pwm_pins>; - pinctrl-names = "default"; - status = "okay"; -}; +}; \ No newline at end of file diff --git a/arch/arm64/boot/dts/qcom/ipq6018-siklu-ctu-100.dts b/arch/arm64/boot/dts/qcom/ipq6018-siklu-ctu-100.dts index ac75fed3227d5..5da5a82aaf095 100644 --- a/arch/arm64/boot/dts/qcom/ipq6018-siklu-ctu-100.dts +++ b/arch/arm64/boot/dts/qcom/ipq6018-siklu-ctu-100.dts @@ -1,313 +1,4 @@ -// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) -/* - * IPQ6018 CP01 board device tree source - * - * Copyright (c) 2019-2020 The Linux Foundation. All rights reserved. - */ - /dts-v1/; -#include -#include "ipq6018.dtsi" - / { - model = "Siklu cTU 100"; - compatible = "siklu,ipq6018-ctu", "qcom,ipq6018"; - - aliases { - serial0 = &blsp1_uart3; - ethernet0 = &sgmii; - ethernet1 = &wigig0; - wigig_device_tu = &wigig0; - }; - - /* Declare wigig devices for the gen_node_info_file.sh script. - Note that this declaration is not used by any driver and resides in - the dts by Facebook convention only. */ - wigig_devices { - wigig0: wigig@0 { - pci-bus = "0000:01:00.0"; - }; - }; - - /* - * We have two HWs: PCB263A v1 and PCB263A v2. - * On PCB263A v1 (old), the USB reset pin is on GPIO55, - * On PCB263A v2 (new). the USB reset pin is on GPIO43. - * In order to support both of them together, we will need to - * reset both pins. In order to do so, we are using the `reset-gpios` - * to trigger the old reset, along with a fixed regulator passed - * through `vcc-supply` to trigger the new reset. - * So at the end, both GPIOs will be active once usb3h0_phy will be - * needed. - */ - usb3_vbus_new: regulator-usb3-new { - compatible = "regulator-fixed"; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - gpio = <&tlmm 43 GPIO_ACTIVE_HIGH>; - enable-active-high; - regulator-name = "usb3_vbus"; - status = "okay"; - pinctrl-0 = <&usb3_reset_pins_new>; - pinctrl-names = "default"; - }; - - usb3h0_phy: usb3_phy0 { - compatible = "usb-nop-xceiv"; - reset-gpios = <&tlmm 55 GPIO_ACTIVE_HIGH>; - pinctrl-0 = <&usb3_reset_pins_old>; - pinctrl-names = "default"; - vcc-supply = <&usb3_vbus_new>; - }; - - chosen { - stdout-path = "serial0:115200n8"; - bootargs = " swiotlb=1 isolcpus=2,3 ro cma=32m default_hugepagesz=2m hugepagesz=2m hugepages=80 usbcore.quirks=2357:0601:k"; - }; - - /* - * +=========+==============+========================+ - * | | | | - * | Region | Start Offset | Size | - * | | | | - * +--------+--------------+-------------------------+ - * | | | | - * | | | | - * | | | | - * | | | | - * | Linux | 0x41000000 | 139MB | - * | | | | - * | | | | - * | | | | - * +--------+--------------+-------------------------+ - * | TZ App | 0x49B00000 | 6MB | - * +--------+--------------+-------------------------+ - * - * From the available 145 MB for Linux in the first 256 MB, - * we are reserving 6 MB for TZAPP. - * - * Refer arch/arm64/boot/dts/qcom/ipq6018-memory.dtsi - * for memory layout. - */ - - /* TZApp is enabled in default memory profile only. */ - /* This below reservation must be updated when LM support is added. */ - reserved-memory { - tzapp:tzapp@49B00000 { /* TZAPPS */ - no-map; - reg = <0x0 0x49B00000 0x0 0x00600000>; - }; - - ramoops@50000000 { - compatible = "ramoops"; - reg = <0x0 0x50000000 0x0 0x10000>; - record-size = <0x4000>; - }; - }; - - i2c-gpio { - compatible = "i2c-gpio"; - #address-cells = <1>; - #size-cells = <0>; - pinctrl-0 = <&i2c_gpio_pins>; - pinctrl-names = "default"; - scl-gpios = <&tlmm 46 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; - sda-gpios = <&tlmm 47 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; - status = "okay"; - - rtc@68 { - compatible = "nxp,pcf8523"; - reg = <0x68>; - quartz-load-femtofarads = <7000>; - }; - - temperature-sensor@4c { - compatible = "ti,tmp421"; - reg = <0x4c>; - }; - }; -}; - -&blsp1_uart3 { - pinctrl-0 = <&serial_3_pins>; - pinctrl-names = "default"; - status = "ok"; -}; - -&blsp1_spi1 { - cs-select = <0>; - status = "ok"; - - m25p80@0 { - #address-cells = <1>; - #size-cells = <1>; - reg = <0>; - compatible = "n25q128a11"; - spi-max-frequency = <50000000>; - - partitions { - compatible = "qcom,smem-part"; - }; - }; -}; - -&tlmm { - i2c_gpio_pins: i2c-gpio-pins { - pins = "gpio46", "gpio47"; - function = "gpio"; - drive-strength = <8>; - }; - - spi_0_pins: spi-0-pins { - pins = "gpio38", "gpio39", "gpio40", "gpio41"; - function = "blsp0_spi"; - drive-strength = <8>; - bias-pull-down; - }; - - usb3_reset_pins_old: usb3-reset-old-pins { - pins = "gpio55"; - function = "gpio"; - drive-strength = <8>; - }; - - usb3_reset_pins_new: usb3-reset-new-pins { - pins = "gpio43"; - function = "gpio"; - drive-strength = <8>; - bias-pull-up; - }; - - pwm_pins: pwm-pins { - /* Power LED yellow part */ - mux_0 { - pins = "gpio23"; - function = "pwm12"; - }; - /* Power LED green part */ - mux_1 { - pins = "gpio24"; - function = "pwm22"; - }; - }; - - mdio_pins: mdio_pinmux { - mux_0 { - pins = "gpio64"; - function = "mdc"; - drive-strength = <8>; - bias-pull-up; - }; - mux_1 { - pins = "gpio65"; - function = "mdio"; - drive-strength = <8>; - bias-pull-up; - }; - mux_2 { - pins = "gpio74"; - function = "gpio"; - bias-pull-up; - }; - mux_3 { - pins = "gpio77"; - function = "gpio"; - bias-pull-up; - }; - }; -}; - -&soc { - sgmii: dp2 { - device_type = "network"; - compatible = "qcom,nss-dp"; - qcom,id = <3>; - reg = <0x0 0x3a001600 0x0 0x200>; - qcom,mactype = <0>; - local-mac-address = [000000000000]; - qcom,link-poll = <1>; - mdio-bus = <&mdio>; - qcom,phy-mdio-addr = <4>; - phy-mode = "sgmii"; - siklu_port_name = "eth1"; - }; - - ess-switch@3a000000 { - switch_cpu_bmp = <0x1>; /* cpu port bitmap */ - switch_lan_bmp = <0x18>; /* lan port bitmap */ - switch_wan_bmp = <0x20>; /* wan port bitmap */ - switch_inner_bmp = <0xc0>; /*inner port bitmap*/ - switch_mac_mode = <0x0>; /* mac mode for uniphy instance0*/ - switch_mac_mode1 = <0xf>; /* mac mode for uniphy instance1*/ - switch_mac_mode2 = <0xff>; /* mac mode for uniphy instance2*/ - mdio-bus = <&mdio>; - qcom,port_phyinfo { - port@4 { - port_id = <3>; - phy_address = <4>; - }; - }; - }; -}; - -&mdio { - pinctrl-0 = <&mdio_pins>; - pinctrl-names = "default"; - reset-gpios = <&tlmm 74 GPIO_ACTIVE_LOW>; - reset-assert-us = <2000>; - status = "okay"; - phy1: ethernet-phy@4 { - reg = <4>; - }; -}; - -&qpic_bam { - status = "ok"; -}; - -&qpic_nand { - status = "ok"; - - nand@0 { - reg = <0>; - #address-cells = <1>; - #size-cells = <1>; - - nand-ecc-strength = <8>; - nand-ecc-step-size = <512>; - nand-bus-width = <8>; - }; -}; - -&pcie_phy { - status = "ok"; -}; - -&pcie0 { - perst-gpio = <&tlmm 60 1>; - - status = "ok"; -}; - -&ssphy_0 { - status = "ok"; -}; - -&qusb_phy_0 { - status = "ok"; -}; - -&usb3 { - status = "ok"; -}; - -&dwc_0 { - usb-phy = <&usb3h0_phy>; -}; - -&pwm { - pinctrl-0 = <&pwm_pins>; - pinctrl-names = "default"; - status = "okay"; -}; +}; \ No newline at end of file From 8027d76b9015f87fdf36c91f5ab82bdda6aeeca2 Mon Sep 17 00:00:00 2001 From: Himanshu Sharma Date: Tue, 25 Nov 2025 08:26:18 +0200 Subject: [PATCH 09/16] removing make -j as it leads to resource exhausion --- .github/workflows/build-kernel.yml | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/.github/workflows/build-kernel.yml b/.github/workflows/build-kernel.yml index 2a888d78dd5e1..8e9a3628553c3 100644 --- a/.github/workflows/build-kernel.yml +++ b/.github/workflows/build-kernel.yml @@ -37,7 +37,7 @@ jobs: lscpu - name: Build kernel with arm64 architecture - run: make -j + run: make -j$(nproc) - name: Archive kernel image uses: actions/upload-artifact@v4 From 86b3ee78de56f18517dc3653fe1877eb743c71ca Mon Sep 17 00:00:00 2001 From: Himanshu Sharma Date: Tue, 25 Nov 2025 10:42:02 +0200 Subject: [PATCH 10/16] using just make siklu_arm64_defconfig --- .github/workflows/build-kernel.yml | 7 ++----- 1 file changed, 2 insertions(+), 5 deletions(-) diff --git a/.github/workflows/build-kernel.yml b/.github/workflows/build-kernel.yml index 8e9a3628553c3..c92dfb9a7d278 100644 --- a/.github/workflows/build-kernel.yml +++ b/.github/workflows/build-kernel.yml @@ -24,11 +24,8 @@ jobs: sudo apt-get update sudo apt-get install -y build-essential bc flex bison libssl-dev libncurses-dev crossbuild-essential-arm64 gcc-aarch64-linux-gnu g++-aarch64-linux-gnu - - name: Copy siklu_arm64_defconfig to config - run: cp arch/arm64/configs/siklu_arm64_defconfig ./config - - - name: Configure kernel (olddefconfig) - run: make ARCH=arm64 olddefconfig + - name: Configure kernel (siklu_arm64_defconfig ) + run: make ARCH=arm64 siklu_arm64_defconfig - name: Log runner CPU info run: | From 1be87c75f50f128ef20bb8cbcb017fa41a45600f Mon Sep 17 00:00:00 2001 From: Himanshu Sharma Date: Tue, 25 Nov 2025 11:20:36 +0200 Subject: [PATCH 11/16] adding github action cache to speed up build --- .github/workflows/build-kernel.yml | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) diff --git a/.github/workflows/build-kernel.yml b/.github/workflows/build-kernel.yml index c92dfb9a7d278..fbb03472fd03a 100644 --- a/.github/workflows/build-kernel.yml +++ b/.github/workflows/build-kernel.yml @@ -16,6 +16,23 @@ jobs: ARCH: arm64 CROSS_COMPILE: aarch64-linux-gnu- steps: + - name: Cache build dependencies and kernel outputs + uses: actions/cache@v4 + with: + path: | + arch/arm64/boot/Image + .config + vmlinux + Module.symvers + modules.order + arch/arm64/boot/dts + drivers + include + scripts + key: ${{ runner.os }}-kernel-${{ github.ref }}-${{ github.sha }} + restore-keys: | + ${{ runner.os }}-kernel-${{ github.ref }}- + ${{ runner.os }}-kernel- - name: Checkout repository uses: actions/checkout@v4 From e3128d9465559d4ce8089a909ffc0399cd2bc792 Mon Sep 17 00:00:00 2001 From: Himanshu Sharma Date: Tue, 25 Nov 2025 17:07:55 +0200 Subject: [PATCH 12/16] optimising build using cache, include generated files. Add logic to rebuild cache, incase .config is changed --- .github/workflows/build-kernel.yml | 59 +++++++++++++++++------------- 1 file changed, 34 insertions(+), 25 deletions(-) diff --git a/.github/workflows/build-kernel.yml b/.github/workflows/build-kernel.yml index fbb03472fd03a..edb3c15cf4596 100644 --- a/.github/workflows/build-kernel.yml +++ b/.github/workflows/build-kernel.yml @@ -16,39 +16,48 @@ jobs: ARCH: arm64 CROSS_COMPILE: aarch64-linux-gnu- steps: - - name: Cache build dependencies and kernel outputs - uses: actions/cache@v4 - with: - path: | - arch/arm64/boot/Image - .config - vmlinux - Module.symvers - modules.order - arch/arm64/boot/dts - drivers - include - scripts - key: ${{ runner.os }}-kernel-${{ github.ref }}-${{ github.sha }} - restore-keys: | - ${{ runner.os }}-kernel-${{ github.ref }}- - ${{ runner.os }}-kernel- - - name: Checkout repository - uses: actions/checkout@v4 + - name: Log runner CPU info + run: | + echo "CPU core count: $(nproc)" + echo "Processor info:" + lscpu - name: Install dependencies run: | sudo apt-get update sudo apt-get install -y build-essential bc flex bison libssl-dev libncurses-dev crossbuild-essential-arm64 gcc-aarch64-linux-gnu g++-aarch64-linux-gnu + - name: Checkout repository + uses: actions/checkout@v4 + - name: Configure kernel (siklu_arm64_defconfig ) run: make ARCH=arm64 siklu_arm64_defconfig - - - name: Log runner CPU info - run: | - echo "CPU core count: $(nproc)" - echo "Processor info:" - lscpu + + - name: Cache build dependencies and kernel outputs + uses: actions/cache@v4 + with: + # --- Optimized Cache Path: Targeting ALL generated, costly artifacts --- + path: | + .config # The configuration file (Input to the build system) + vmlinux # The final, linked kernel binary (ELF) + arch/arm64/boot/Image # The final compressed kernel image + Module.symvers # Essential global symbol metadata + modules.order # Module load order definition + vmlinux.o # Crucial intermediate linker object file + **/*.ko # All compiled kernel modules (Kernel Objects) + **/*.o # All intermediate object files (core incremental build acceleration) + **/*.cmd # Kbuild command tracking files (for dependency checking) + **/*.d # Kbuild dependency files + **/*.lds # Linker script outputs (e.g., vmlinux.lds) + **/*.s # Generated assembly files + **/*.dtb # Generated Device Tree Blobs (if compiled in-tree) + include/generated/utsrelease.h # Generated version header + include/generated/compile.h # Generated compile header + + # --- Integrity Cache Key: Ensures cache is reused only if core inputs are identical --- + key: ${{ runner.os }}-kernel-${{ hashFiles('.config', 'arch/arm64/Makefile') }} + restore-keys: | + ${{ runner.os }}-kernel- - name: Build kernel with arm64 architecture run: make -j$(nproc) From 5ee221f0238f65b7e6e7e41a53630c67542f5a9a Mon Sep 17 00:00:00 2001 From: Himanshu Sharma Date: Wed, 26 Nov 2025 14:38:25 +0200 Subject: [PATCH 13/16] remove comments as they were being treated as actual path, removing log and pwd info --- .github/workflows/build-kernel.yml | 30 +++++++++++++++--------------- 1 file changed, 15 insertions(+), 15 deletions(-) diff --git a/.github/workflows/build-kernel.yml b/.github/workflows/build-kernel.yml index edb3c15cf4596..a273ef111a292 100644 --- a/.github/workflows/build-kernel.yml +++ b/.github/workflows/build-kernel.yml @@ -38,21 +38,21 @@ jobs: with: # --- Optimized Cache Path: Targeting ALL generated, costly artifacts --- path: | - .config # The configuration file (Input to the build system) - vmlinux # The final, linked kernel binary (ELF) - arch/arm64/boot/Image # The final compressed kernel image - Module.symvers # Essential global symbol metadata - modules.order # Module load order definition - vmlinux.o # Crucial intermediate linker object file - **/*.ko # All compiled kernel modules (Kernel Objects) - **/*.o # All intermediate object files (core incremental build acceleration) - **/*.cmd # Kbuild command tracking files (for dependency checking) - **/*.d # Kbuild dependency files - **/*.lds # Linker script outputs (e.g., vmlinux.lds) - **/*.s # Generated assembly files - **/*.dtb # Generated Device Tree Blobs (if compiled in-tree) - include/generated/utsrelease.h # Generated version header - include/generated/compile.h # Generated compile header + .config + vmlinux + arch/arm64/boot/Image + Module.symvers + modules.order + vmlinux.o + **/*.ko + **/*.o + **/*.cmd + **/*.d + **/*.lds + **/*.s + **/*.dtb + include/generated/utsrelease.h + include/generated/compile.h # --- Integrity Cache Key: Ensures cache is reused only if core inputs are identical --- key: ${{ runner.os }}-kernel-${{ hashFiles('.config', 'arch/arm64/Makefile') }} From d3929da446f34f369e095d21f5cbe331061d1bc1 Mon Sep 17 00:00:00 2001 From: Himanshu Sharma Date: Wed, 26 Nov 2025 16:07:25 +0200 Subject: [PATCH 14/16] Removing armada-8040-n366.dts ipq6018-siklu-ctu-100-fr2.dts & updating Makefile accordingly --- arch/arm64/boot/dts/marvell/Makefile | 1 - arch/arm64/boot/dts/marvell/armada-8040-n366.dts | 4 ---- arch/arm64/boot/dts/qcom/ipq6018-siklu-ctu-100-fr2.dts | 4 ---- 3 files changed, 9 deletions(-) delete mode 100644 arch/arm64/boot/dts/marvell/armada-8040-n366.dts delete mode 100644 arch/arm64/boot/dts/qcom/ipq6018-siklu-ctu-100-fr2.dts diff --git a/arch/arm64/boot/dts/marvell/Makefile b/arch/arm64/boot/dts/marvell/Makefile index 1a5cbf1e69a75..c86878c5a94b0 100644 --- a/arch/arm64/boot/dts/marvell/Makefile +++ b/arch/arm64/boot/dts/marvell/Makefile @@ -17,7 +17,6 @@ dtb-$(CONFIG_ARCH_MVEBU) += armada-8040-db.dtb dtb-$(CONFIG_ARCH_MVEBU) += armada-8040-mcbin.dtb dtb-$(CONFIG_ARCH_MVEBU) += armada-8040-mcbin-singleshot.dtb dtb-$(CONFIG_ARCH_MVEBU) += armada-8040-puzzle-m801.dtb -dtb-$(CONFIG_ARCH_MVEBU) += armada-8040-n366.dtb dtb-$(CONFIG_ARCH_MVEBU) += falcon.dtbo dtb-$(CONFIG_ARCH_MVEBU) += armada-8080-db.dtb dtb-$(CONFIG_ARCH_MVEBU) += cn9130-db.dtb diff --git a/arch/arm64/boot/dts/marvell/armada-8040-n366.dts b/arch/arm64/boot/dts/marvell/armada-8040-n366.dts deleted file mode 100644 index 5da5a82aaf095..0000000000000 --- a/arch/arm64/boot/dts/marvell/armada-8040-n366.dts +++ /dev/null @@ -1,4 +0,0 @@ -/dts-v1/; - -/ { -}; \ No newline at end of file diff --git a/arch/arm64/boot/dts/qcom/ipq6018-siklu-ctu-100-fr2.dts b/arch/arm64/boot/dts/qcom/ipq6018-siklu-ctu-100-fr2.dts deleted file mode 100644 index 5da5a82aaf095..0000000000000 --- a/arch/arm64/boot/dts/qcom/ipq6018-siklu-ctu-100-fr2.dts +++ /dev/null @@ -1,4 +0,0 @@ -/dts-v1/; - -/ { -}; \ No newline at end of file From 55457dc583d5027148fa2d3914d3a10d0c73ff33 Mon Sep 17 00:00:00 2001 From: Himanshu Sharma Date: Wed, 26 Nov 2025 16:27:37 +0200 Subject: [PATCH 15/16] Removed falcon.dtso file & updated Makefile accordingly --- arch/arm64/boot/dts/marvell/Makefile | 1 - arch/arm64/boot/dts/marvell/falcon.dtso | 4 ---- 2 files changed, 5 deletions(-) delete mode 100644 arch/arm64/boot/dts/marvell/falcon.dtso diff --git a/arch/arm64/boot/dts/marvell/Makefile b/arch/arm64/boot/dts/marvell/Makefile index c86878c5a94b0..ce751b5028e26 100644 --- a/arch/arm64/boot/dts/marvell/Makefile +++ b/arch/arm64/boot/dts/marvell/Makefile @@ -17,7 +17,6 @@ dtb-$(CONFIG_ARCH_MVEBU) += armada-8040-db.dtb dtb-$(CONFIG_ARCH_MVEBU) += armada-8040-mcbin.dtb dtb-$(CONFIG_ARCH_MVEBU) += armada-8040-mcbin-singleshot.dtb dtb-$(CONFIG_ARCH_MVEBU) += armada-8040-puzzle-m801.dtb -dtb-$(CONFIG_ARCH_MVEBU) += falcon.dtbo dtb-$(CONFIG_ARCH_MVEBU) += armada-8080-db.dtb dtb-$(CONFIG_ARCH_MVEBU) += cn9130-db.dtb dtb-$(CONFIG_ARCH_MVEBU) += cn9130-db-B.dtb diff --git a/arch/arm64/boot/dts/marvell/falcon.dtso b/arch/arm64/boot/dts/marvell/falcon.dtso deleted file mode 100644 index 5da5a82aaf095..0000000000000 --- a/arch/arm64/boot/dts/marvell/falcon.dtso +++ /dev/null @@ -1,4 +0,0 @@ -/dts-v1/; - -/ { -}; \ No newline at end of file From 9ae71659f6494511f230c013c23e1a6fa7bc49aa Mon Sep 17 00:00:00 2001 From: Himanshu Sharma Date: Wed, 26 Nov 2025 16:42:36 +0200 Subject: [PATCH 16/16] remove arch/arm64/boot/dts/qcom/ipq6018-siklu-ctu-100.dts as well --- arch/arm64/boot/dts/qcom/ipq6018-siklu-ctu-100.dts | 4 ---- 1 file changed, 4 deletions(-) delete mode 100644 arch/arm64/boot/dts/qcom/ipq6018-siklu-ctu-100.dts diff --git a/arch/arm64/boot/dts/qcom/ipq6018-siklu-ctu-100.dts b/arch/arm64/boot/dts/qcom/ipq6018-siklu-ctu-100.dts deleted file mode 100644 index 5da5a82aaf095..0000000000000 --- a/arch/arm64/boot/dts/qcom/ipq6018-siklu-ctu-100.dts +++ /dev/null @@ -1,4 +0,0 @@ -/dts-v1/; - -/ { -}; \ No newline at end of file