From 7426ad5b968bae9f4078dba1f3f63ffabea3e4b0 Mon Sep 17 00:00:00 2001 From: Adam Gemmell Date: Mon, 15 Dec 2025 17:06:56 +0000 Subject: [PATCH 1/2] Remove fp16 target feature from some aarch64 intrinsics This seems to affect codegen on a lot of Arm intrinsics so I've avoided making the change there. --- .../core_arch/src/aarch64/neon/generated.rs | 20 +- .../src/arm_shared/neon/generated.rs | 233 ++++++++++++------ .../spec/neon/aarch64.spec.yml | 3 - .../spec/neon/arm_shared.spec.yml | 82 +++--- 4 files changed, 207 insertions(+), 131 deletions(-) diff --git a/crates/core_arch/src/aarch64/neon/generated.rs b/crates/core_arch/src/aarch64/neon/generated.rs index ce864cc7d9..f1291c8fbd 100644 --- a/crates/core_arch/src/aarch64/neon/generated.rs +++ b/crates/core_arch/src/aarch64/neon/generated.rs @@ -7217,8 +7217,8 @@ pub fn vcvtq_f64_u64(a: uint64x2_t) -> float64x2_t { #[doc = "Floating-point convert to lower precision"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vcvt_high_f16_f32)"] #[inline] +#[target_feature(enable = "neon")] #[cfg_attr(test, assert_instr(fcvtn2))] -#[target_feature(enable = "neon,fp16")] #[unstable(feature = "stdarch_neon_f16", issue = "136306")] #[cfg(not(target_arch = "arm64ec"))] pub fn vcvt_high_f16_f32(a: float16x4_t, b: float32x4_t) -> float16x8_t { @@ -7227,8 +7227,8 @@ pub fn vcvt_high_f16_f32(a: float16x4_t, b: float32x4_t) -> float16x8_t { #[doc = "Floating-point convert to higher precision"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vcvt_high_f32_f16)"] #[inline] +#[target_feature(enable = "neon")] #[cfg_attr(test, assert_instr(fcvtl2))] -#[target_feature(enable = "neon,fp16")] #[unstable(feature = "stdarch_neon_f16", issue = "136306")] #[cfg(not(target_arch = "arm64ec"))] pub fn vcvt_high_f32_f16(a: float16x8_t) -> float32x4_t { @@ -21492,7 +21492,7 @@ pub fn vrecpxh_f16(a: f16) -> f16 { #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vreinterpret_f64_f16)"] #[inline] #[cfg(target_endian = "little")] -#[target_feature(enable = "neon,fp16")] +#[target_feature(enable = "neon")] #[unstable(feature = "stdarch_neon_f16", issue = "136306")] #[cfg(not(target_arch = "arm64ec"))] #[cfg_attr(test, assert_instr(nop))] @@ -21503,7 +21503,7 @@ pub fn vreinterpret_f64_f16(a: float16x4_t) -> float64x1_t { #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vreinterpret_f64_f16)"] #[inline] #[cfg(target_endian = "big")] -#[target_feature(enable = "neon,fp16")] +#[target_feature(enable = "neon")] #[unstable(feature = "stdarch_neon_f16", issue = "136306")] #[cfg(not(target_arch = "arm64ec"))] #[cfg_attr(test, assert_instr(nop))] @@ -21515,7 +21515,7 @@ pub fn vreinterpret_f64_f16(a: float16x4_t) -> float64x1_t { #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vreinterpretq_f64_f16)"] #[inline] #[cfg(target_endian = "little")] -#[target_feature(enable = "neon,fp16")] +#[target_feature(enable = "neon")] #[unstable(feature = "stdarch_neon_f16", issue = "136306")] #[cfg(not(target_arch = "arm64ec"))] #[cfg_attr(test, assert_instr(nop))] @@ -21526,7 +21526,7 @@ pub fn vreinterpretq_f64_f16(a: float16x8_t) -> float64x2_t { #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vreinterpretq_f64_f16)"] #[inline] #[cfg(target_endian = "big")] -#[target_feature(enable = "neon,fp16")] +#[target_feature(enable = "neon")] #[unstable(feature = "stdarch_neon_f16", issue = "136306")] #[cfg(not(target_arch = "arm64ec"))] #[cfg_attr(test, assert_instr(nop))] @@ -21541,7 +21541,7 @@ pub fn vreinterpretq_f64_f16(a: float16x8_t) -> float64x2_t { #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vreinterpret_f16_f64)"] #[inline] #[cfg(target_endian = "little")] -#[target_feature(enable = "neon,fp16")] +#[target_feature(enable = "neon")] #[unstable(feature = "stdarch_neon_f16", issue = "136306")] #[cfg(not(target_arch = "arm64ec"))] #[cfg_attr(test, assert_instr(nop))] @@ -21552,7 +21552,7 @@ pub fn vreinterpret_f16_f64(a: float64x1_t) -> float16x4_t { #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vreinterpret_f16_f64)"] #[inline] #[cfg(target_endian = "big")] -#[target_feature(enable = "neon,fp16")] +#[target_feature(enable = "neon")] #[unstable(feature = "stdarch_neon_f16", issue = "136306")] #[cfg(not(target_arch = "arm64ec"))] #[cfg_attr(test, assert_instr(nop))] @@ -21566,7 +21566,7 @@ pub fn vreinterpret_f16_f64(a: float64x1_t) -> float16x4_t { #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vreinterpretq_f16_f64)"] #[inline] #[cfg(target_endian = "little")] -#[target_feature(enable = "neon,fp16")] +#[target_feature(enable = "neon")] #[unstable(feature = "stdarch_neon_f16", issue = "136306")] #[cfg(not(target_arch = "arm64ec"))] #[cfg_attr(test, assert_instr(nop))] @@ -21577,7 +21577,7 @@ pub fn vreinterpretq_f16_f64(a: float64x2_t) -> float16x8_t { #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vreinterpretq_f16_f64)"] #[inline] #[cfg(target_endian = "big")] -#[target_feature(enable = "neon,fp16")] +#[target_feature(enable = "neon")] #[unstable(feature = "stdarch_neon_f16", issue = "136306")] #[cfg(not(target_arch = "arm64ec"))] #[cfg_attr(test, assert_instr(nop))] diff --git a/crates/core_arch/src/arm_shared/neon/generated.rs b/crates/core_arch/src/arm_shared/neon/generated.rs index d45454c696..cfd9c20186 100644 --- a/crates/core_arch/src/arm_shared/neon/generated.rs +++ b/crates/core_arch/src/arm_shared/neon/generated.rs @@ -7569,8 +7569,9 @@ pub fn vcntq_p8(a: poly8x16_t) -> poly8x16_t { #[doc = "Join two smaller vectors into a single larger vector"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vcombine_f16)"] #[inline] +#[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] -#[target_feature(enable = "neon,fp16")] +#[cfg_attr(target_arch = "arm", target_feature(enable = "fp16"))] #[unstable(feature = "stdarch_neon_f16", issue = "136306")] #[cfg(not(target_arch = "arm64ec"))] #[cfg_attr(test, assert_instr(nop))] @@ -7785,13 +7786,14 @@ pub fn vcombine_p64(a: poly64x1_t, b: poly64x1_t) -> poly64x2_t { #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vcreate_f16)"] #[inline] #[cfg(target_endian = "little")] +#[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] #[cfg_attr(all(test, target_arch = "arm"), assert_instr(nop))] #[cfg_attr( all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), assert_instr(nop) )] -#[target_feature(enable = "neon,fp16")] +#[cfg_attr(target_arch = "arm", target_feature(enable = "fp16"))] #[unstable(feature = "stdarch_neon_f16", issue = "136306")] #[cfg(not(target_arch = "arm64ec"))] pub fn vcreate_f16(a: u64) -> float16x4_t { @@ -7801,13 +7803,14 @@ pub fn vcreate_f16(a: u64) -> float16x4_t { #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vcreate_f16)"] #[inline] #[cfg(target_endian = "big")] +#[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] #[cfg_attr(all(test, target_arch = "arm"), assert_instr(nop))] #[cfg_attr( all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), assert_instr(nop) )] -#[target_feature(enable = "neon,fp16")] +#[cfg_attr(target_arch = "arm", target_feature(enable = "fp16"))] #[unstable(feature = "stdarch_neon_f16", issue = "136306")] #[cfg(not(target_arch = "arm64ec"))] pub fn vcreate_f16(a: u64) -> float16x4_t { @@ -8305,13 +8308,14 @@ pub fn vcreate_p64(a: u64) -> poly64x1_t { #[doc = "Floating-point convert to lower precision narrow"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vcvt_f16_f32)"] #[inline] +#[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] # [cfg_attr (all (test , target_arch = "arm") , assert_instr (vcvt . f16 . f32))] #[cfg_attr( all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), assert_instr(fcvtn) )] -#[target_feature(enable = "neon,fp16")] +#[cfg_attr(target_arch = "arm", target_feature(enable = "fp16"))] #[unstable(feature = "stdarch_neon_f16", issue = "136306")] #[cfg(not(target_arch = "arm64ec"))] pub fn vcvt_f16_f32(a: float32x4_t) -> float16x4_t { @@ -8380,13 +8384,14 @@ pub fn vcvtq_f16_u16(a: uint16x8_t) -> float16x8_t { #[doc = "Floating-point convert to higher precision long"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vcvt_f32_f16)"] #[inline] +#[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] #[cfg_attr(all(test, target_arch = "arm"), assert_instr(vcvt))] #[cfg_attr( all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), assert_instr(fcvtl) )] -#[target_feature(enable = "neon,fp16")] +#[cfg_attr(target_arch = "arm", target_feature(enable = "fp16"))] #[unstable(feature = "stdarch_neon_f16", issue = "136306")] #[cfg(not(target_arch = "arm64ec"))] pub fn vcvt_f32_f16(a: float16x4_t) -> float32x4_t { @@ -9545,6 +9550,7 @@ pub fn vdotq_u32(a: uint32x4_t, b: uint8x16_t, c: uint8x16_t) -> uint32x4_t { #[doc = "Set all vector lanes to the same value"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vdup_lane_f16)"] #[inline] +#[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vdup.16", N = 2))] #[cfg_attr( @@ -9552,7 +9558,7 @@ pub fn vdotq_u32(a: uint32x4_t, b: uint8x16_t, c: uint8x16_t) -> uint32x4_t { assert_instr(dup, N = 2) )] #[rustc_legacy_const_generics(1)] -#[target_feature(enable = "neon,fp16")] +#[cfg_attr(target_arch = "arm", target_feature(enable = "fp16"))] #[unstable(feature = "stdarch_neon_f16", issue = "136306")] #[cfg(not(target_arch = "arm64ec"))] pub fn vdup_lane_f16(a: float16x4_t) -> float16x4_t { @@ -9562,6 +9568,7 @@ pub fn vdup_lane_f16(a: float16x4_t) -> float16x4_t { #[doc = "Set all vector lanes to the same value"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vdupq_lane_f16)"] #[inline] +#[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vdup.16", N = 2))] #[cfg_attr( @@ -9569,7 +9576,7 @@ pub fn vdup_lane_f16(a: float16x4_t) -> float16x4_t { assert_instr(dup, N = 2) )] #[rustc_legacy_const_generics(1)] -#[target_feature(enable = "neon,fp16")] +#[cfg_attr(target_arch = "arm", target_feature(enable = "fp16"))] #[unstable(feature = "stdarch_neon_f16", issue = "136306")] #[cfg(not(target_arch = "arm64ec"))] pub fn vdupq_lane_f16(a: float16x4_t) -> float16x8_t { @@ -10108,6 +10115,7 @@ pub fn vdup_lane_u64(a: uint64x1_t) -> uint64x1_t { #[doc = "Set all vector lanes to the same value"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vdup_laneq_f16)"] #[inline] +#[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vdup.16", N = 4))] #[cfg_attr( @@ -10115,7 +10123,7 @@ pub fn vdup_lane_u64(a: uint64x1_t) -> uint64x1_t { assert_instr(dup, N = 4) )] #[rustc_legacy_const_generics(1)] -#[target_feature(enable = "neon,fp16")] +#[cfg_attr(target_arch = "arm", target_feature(enable = "fp16"))] #[unstable(feature = "stdarch_neon_f16", issue = "136306")] #[cfg(not(target_arch = "arm64ec"))] pub fn vdup_laneq_f16(a: float16x8_t) -> float16x4_t { @@ -10125,6 +10133,7 @@ pub fn vdup_laneq_f16(a: float16x8_t) -> float16x4_t { #[doc = "Set all vector lanes to the same value"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vdupq_laneq_f16)"] #[inline] +#[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vdup.16", N = 4))] #[cfg_attr( @@ -10132,7 +10141,7 @@ pub fn vdup_laneq_f16(a: float16x8_t) -> float16x4_t { assert_instr(dup, N = 4) )] #[rustc_legacy_const_generics(1)] -#[target_feature(enable = "neon,fp16")] +#[cfg_attr(target_arch = "arm", target_feature(enable = "fp16"))] #[unstable(feature = "stdarch_neon_f16", issue = "136306")] #[cfg(not(target_arch = "arm64ec"))] pub fn vdupq_laneq_f16(a: float16x8_t) -> float16x8_t { @@ -10671,13 +10680,14 @@ pub fn vdup_laneq_u64(a: uint64x2_t) -> uint64x1_t { #[doc = "Create a new vector with all lanes set to a value"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vdup_n_f16)"] #[inline] +#[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vdup.16"))] #[cfg_attr( all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), assert_instr(dup) )] -#[target_feature(enable = "neon,fp16")] +#[cfg_attr(target_arch = "arm", target_feature(enable = "fp16"))] #[unstable(feature = "stdarch_neon_f16", issue = "136306")] #[cfg(not(target_arch = "arm64ec"))] pub fn vdup_n_f16(a: f16) -> float16x4_t { @@ -10686,13 +10696,14 @@ pub fn vdup_n_f16(a: f16) -> float16x4_t { #[doc = "Create a new vector with all lanes set to a value"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vdupq_n_f16)"] #[inline] +#[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vdup.16"))] #[cfg_attr( all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), assert_instr(dup) )] -#[target_feature(enable = "neon,fp16")] +#[cfg_attr(target_arch = "arm", target_feature(enable = "fp16"))] #[unstable(feature = "stdarch_neon_f16", issue = "136306")] #[cfg(not(target_arch = "arm64ec"))] pub fn vdupq_n_f16(a: f16) -> float16x8_t { @@ -12829,8 +12840,9 @@ pub fn vfmsq_n_f32(a: float32x4_t, b: float32x4_t, c: f32) -> float32x4_t { #[doc = "Duplicate vector element to vector"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vget_high_f16)"] #[inline] +#[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] -#[target_feature(enable = "neon,fp16")] +#[cfg_attr(target_arch = "arm", target_feature(enable = "fp16"))] #[unstable(feature = "stdarch_neon_f16", issue = "136306")] #[cfg(not(target_arch = "arm64ec"))] #[cfg_attr(test, assert_instr(nop))] @@ -12840,8 +12852,9 @@ pub fn vget_high_f16(a: float16x8_t) -> float16x4_t { #[doc = "Duplicate vector element to vector"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vget_low_f16)"] #[inline] +#[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] -#[target_feature(enable = "neon,fp16")] +#[cfg_attr(target_arch = "arm", target_feature(enable = "fp16"))] #[unstable(feature = "stdarch_neon_f16", issue = "136306")] #[cfg(not(target_arch = "arm64ec"))] #[cfg_attr(test, assert_instr(nop))] @@ -13082,14 +13095,15 @@ pub fn vget_high_u64(a: uint64x2_t) -> uint64x1_t { #[doc = "Duplicate vector element to scalar"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vget_lane_f16)"] #[inline] +#[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] -#[target_feature(enable = "neon,fp16")] #[cfg_attr(all(test, target_arch = "arm"), assert_instr(nop, LANE = 0))] #[cfg_attr( all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), assert_instr(nop, LANE = 0) )] #[rustc_legacy_const_generics(1)] +#[cfg_attr(target_arch = "arm", target_feature(enable = "fp16"))] #[unstable(feature = "stdarch_neon_f16", issue = "136306")] #[cfg(not(target_arch = "arm64ec"))] pub fn vget_lane_f16(a: float16x4_t) -> f16 { @@ -13099,14 +13113,15 @@ pub fn vget_lane_f16(a: float16x4_t) -> f16 { #[doc = "Duplicate vector element to scalar"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vgetq_lane_f16)"] #[inline] +#[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] -#[target_feature(enable = "neon,fp16")] #[cfg_attr(all(test, target_arch = "arm"), assert_instr(nop, LANE = 0))] #[cfg_attr( all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), assert_instr(nop, LANE = 0) )] #[rustc_legacy_const_generics(1)] +#[cfg_attr(target_arch = "arm", target_feature(enable = "fp16"))] #[unstable(feature = "stdarch_neon_f16", issue = "136306")] #[cfg(not(target_arch = "arm64ec"))] pub fn vgetq_lane_f16(a: float16x8_t) -> f16 { @@ -14457,13 +14472,14 @@ pub fn vhsubq_u32(a: uint32x4_t, b: uint32x4_t) -> uint32x4_t { #[doc = "## Safety"] #[doc = " * Neon instrinsic unsafe"] #[inline] +#[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] #[cfg_attr(all(test, target_arch = "arm"), assert_instr(vld1))] #[cfg_attr( all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), assert_instr(ld1r) )] -#[target_feature(enable = "neon,fp16")] +#[cfg_attr(target_arch = "arm", target_feature(enable = "fp16"))] #[unstable(feature = "stdarch_neon_f16", issue = "136306")] #[cfg(not(target_arch = "arm64ec"))] pub unsafe fn vld1_dup_f16(ptr: *const f16) -> float16x4_t { @@ -14475,13 +14491,14 @@ pub unsafe fn vld1_dup_f16(ptr: *const f16) -> float16x4_t { #[doc = "## Safety"] #[doc = " * Neon instrinsic unsafe"] #[inline] +#[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] #[cfg_attr(all(test, target_arch = "arm"), assert_instr(vld1))] #[cfg_attr( all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), assert_instr(ld1r) )] -#[target_feature(enable = "neon,fp16")] +#[cfg_attr(target_arch = "arm", target_feature(enable = "fp16"))] #[unstable(feature = "stdarch_neon_f16", issue = "136306")] #[cfg(not(target_arch = "arm64ec"))] pub unsafe fn vld1q_dup_f16(ptr: *const f16) -> float16x8_t { @@ -15123,13 +15140,14 @@ pub unsafe fn vld1q_f16(ptr: *const f16) -> float16x8_t { #[doc = "## Safety"] #[doc = " * Neon instrinsic unsafe"] #[inline] +#[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] #[cfg_attr(all(test, target_arch = "arm"), assert_instr(vld1))] #[cfg_attr( all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), assert_instr(ld1) )] -#[target_feature(enable = "neon,fp16")] +#[cfg_attr(target_arch = "arm", target_feature(enable = "fp16"))] #[unstable(feature = "stdarch_neon_f16", issue = "136306")] #[cfg(not(target_arch = "arm64ec"))] pub unsafe fn vld1_f16_x2(a: *const f16) -> float16x4x2_t { @@ -15148,13 +15166,14 @@ pub unsafe fn vld1_f16_x2(a: *const f16) -> float16x4x2_t { #[doc = "## Safety"] #[doc = " * Neon instrinsic unsafe"] #[inline] +#[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] #[cfg_attr(all(test, target_arch = "arm"), assert_instr(vld1))] #[cfg_attr( all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), assert_instr(ld1) )] -#[target_feature(enable = "neon,fp16")] +#[cfg_attr(target_arch = "arm", target_feature(enable = "fp16"))] #[unstable(feature = "stdarch_neon_f16", issue = "136306")] #[cfg(not(target_arch = "arm64ec"))] pub unsafe fn vld1_f16_x3(a: *const f16) -> float16x4x3_t { @@ -15173,13 +15192,14 @@ pub unsafe fn vld1_f16_x3(a: *const f16) -> float16x4x3_t { #[doc = "## Safety"] #[doc = " * Neon instrinsic unsafe"] #[inline] +#[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] #[cfg_attr(all(test, target_arch = "arm"), assert_instr(vld1))] #[cfg_attr( all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), assert_instr(ld1) )] -#[target_feature(enable = "neon,fp16")] +#[cfg_attr(target_arch = "arm", target_feature(enable = "fp16"))] #[unstable(feature = "stdarch_neon_f16", issue = "136306")] #[cfg(not(target_arch = "arm64ec"))] pub unsafe fn vld1_f16_x4(a: *const f16) -> float16x4x4_t { @@ -15198,13 +15218,14 @@ pub unsafe fn vld1_f16_x4(a: *const f16) -> float16x4x4_t { #[doc = "## Safety"] #[doc = " * Neon instrinsic unsafe"] #[inline] +#[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] #[cfg_attr(all(test, target_arch = "arm"), assert_instr(vld1))] #[cfg_attr( all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), assert_instr(ld1) )] -#[target_feature(enable = "neon,fp16")] +#[cfg_attr(target_arch = "arm", target_feature(enable = "fp16"))] #[unstable(feature = "stdarch_neon_f16", issue = "136306")] #[cfg(not(target_arch = "arm64ec"))] pub unsafe fn vld1q_f16_x2(a: *const f16) -> float16x8x2_t { @@ -15223,13 +15244,14 @@ pub unsafe fn vld1q_f16_x2(a: *const f16) -> float16x8x2_t { #[doc = "## Safety"] #[doc = " * Neon instrinsic unsafe"] #[inline] +#[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] #[cfg_attr(all(test, target_arch = "arm"), assert_instr(vld1))] #[cfg_attr( all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), assert_instr(ld1) )] -#[target_feature(enable = "neon,fp16")] +#[cfg_attr(target_arch = "arm", target_feature(enable = "fp16"))] #[unstable(feature = "stdarch_neon_f16", issue = "136306")] #[cfg(not(target_arch = "arm64ec"))] pub unsafe fn vld1q_f16_x3(a: *const f16) -> float16x8x3_t { @@ -15248,13 +15270,14 @@ pub unsafe fn vld1q_f16_x3(a: *const f16) -> float16x8x3_t { #[doc = "## Safety"] #[doc = " * Neon instrinsic unsafe"] #[inline] +#[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] #[cfg_attr(all(test, target_arch = "arm"), assert_instr(vld1))] #[cfg_attr( all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), assert_instr(ld1) )] -#[target_feature(enable = "neon,fp16")] +#[cfg_attr(target_arch = "arm", target_feature(enable = "fp16"))] #[unstable(feature = "stdarch_neon_f16", issue = "136306")] #[cfg(not(target_arch = "arm64ec"))] pub unsafe fn vld1q_f16_x4(a: *const f16) -> float16x8x4_t { @@ -15654,6 +15677,7 @@ pub unsafe fn vld1q_f32_x4(a: *const f32) -> float32x4x4_t { #[doc = "## Safety"] #[doc = " * Neon instrinsic unsafe"] #[inline] +#[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] #[cfg_attr(all(test, target_arch = "arm"), assert_instr(vld1, LANE = 0))] #[cfg_attr( @@ -15661,7 +15685,7 @@ pub unsafe fn vld1q_f32_x4(a: *const f32) -> float32x4x4_t { assert_instr(ld1, LANE = 0) )] #[rustc_legacy_const_generics(2)] -#[target_feature(enable = "neon,fp16")] +#[cfg_attr(target_arch = "arm", target_feature(enable = "fp16"))] #[unstable(feature = "stdarch_neon_f16", issue = "136306")] #[cfg(not(target_arch = "arm64ec"))] pub unsafe fn vld1_lane_f16(ptr: *const f16, src: float16x4_t) -> float16x4_t { @@ -15673,6 +15697,7 @@ pub unsafe fn vld1_lane_f16(ptr: *const f16, src: float16x4_t) #[doc = "## Safety"] #[doc = " * Neon instrinsic unsafe"] #[inline] +#[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] #[cfg_attr(all(test, target_arch = "arm"), assert_instr(vld1, LANE = 0))] #[cfg_attr( @@ -15680,7 +15705,7 @@ pub unsafe fn vld1_lane_f16(ptr: *const f16, src: float16x4_t) assert_instr(ld1, LANE = 0) )] #[rustc_legacy_const_generics(2)] -#[target_feature(enable = "neon,fp16")] +#[cfg_attr(target_arch = "arm", target_feature(enable = "fp16"))] #[unstable(feature = "stdarch_neon_f16", issue = "136306")] #[cfg(not(target_arch = "arm64ec"))] pub unsafe fn vld1q_lane_f16(ptr: *const f16, src: float16x8_t) -> float16x8_t { @@ -19458,9 +19483,10 @@ pub unsafe fn vld1q_dup_p64(ptr: *const p64) -> poly64x2_t { #[doc = "## Safety"] #[doc = " * Neon instrinsic unsafe"] #[inline] +#[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] #[cfg(target_arch = "arm")] -#[target_feature(enable = "neon,fp16")] +#[cfg_attr(target_arch = "arm", target_feature(enable = "fp16"))] #[cfg_attr(all(test, target_arch = "arm"), assert_instr(vld2))] #[unstable(feature = "stdarch_neon_f16", issue = "136306")] #[cfg(not(target_arch = "arm64ec"))] @@ -19476,9 +19502,10 @@ pub unsafe fn vld2_dup_f16(a: *const f16) -> float16x4x2_t { #[doc = "## Safety"] #[doc = " * Neon instrinsic unsafe"] #[inline] +#[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] #[cfg(target_arch = "arm")] -#[target_feature(enable = "neon,fp16")] +#[cfg_attr(target_arch = "arm", target_feature(enable = "fp16"))] #[cfg_attr(all(test, target_arch = "arm"), assert_instr(vld2))] #[unstable(feature = "stdarch_neon_f16", issue = "136306")] #[cfg(not(target_arch = "arm64ec"))] @@ -19494,12 +19521,13 @@ pub unsafe fn vld2q_dup_f16(a: *const f16) -> float16x8x2_t { #[doc = "## Safety"] #[doc = " * Neon instrinsic unsafe"] #[inline] +#[target_feature(enable = "neon")] #[cfg(not(target_arch = "arm"))] #[cfg_attr( all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), assert_instr(ld2r) )] -#[target_feature(enable = "neon,fp16")] +#[cfg_attr(target_arch = "arm", target_feature(enable = "fp16"))] #[unstable(feature = "stdarch_neon_f16", issue = "136306")] #[cfg(not(target_arch = "arm64ec"))] pub unsafe fn vld2_dup_f16(a: *const f16) -> float16x4x2_t { @@ -19517,12 +19545,13 @@ pub unsafe fn vld2_dup_f16(a: *const f16) -> float16x4x2_t { #[doc = "## Safety"] #[doc = " * Neon instrinsic unsafe"] #[inline] +#[target_feature(enable = "neon")] #[cfg(not(target_arch = "arm"))] #[cfg_attr( all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), assert_instr(ld2r) )] -#[target_feature(enable = "neon,fp16")] +#[cfg_attr(target_arch = "arm", target_feature(enable = "fp16"))] #[unstable(feature = "stdarch_neon_f16", issue = "136306")] #[cfg(not(target_arch = "arm64ec"))] pub unsafe fn vld2q_dup_f16(a: *const f16) -> float16x8x2_t { @@ -20435,10 +20464,11 @@ pub unsafe fn vld2q_dup_p16(a: *const p16) -> poly16x8x2_t { #[doc = "## Safety"] #[doc = " * Neon instrinsic unsafe"] #[inline] +#[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] #[cfg(target_arch = "arm")] #[cfg_attr(all(test, target_arch = "arm"), assert_instr(vld2))] -#[target_feature(enable = "neon,fp16")] +#[cfg_attr(target_arch = "arm", target_feature(enable = "fp16"))] #[unstable(feature = "stdarch_neon_f16", issue = "136306")] #[cfg(not(target_arch = "arm64ec"))] pub unsafe fn vld2_f16(a: *const f16) -> float16x4x2_t { @@ -20453,10 +20483,11 @@ pub unsafe fn vld2_f16(a: *const f16) -> float16x4x2_t { #[doc = "## Safety"] #[doc = " * Neon instrinsic unsafe"] #[inline] +#[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] #[cfg(target_arch = "arm")] #[cfg_attr(all(test, target_arch = "arm"), assert_instr(vld2))] -#[target_feature(enable = "neon,fp16")] +#[cfg_attr(target_arch = "arm", target_feature(enable = "fp16"))] #[unstable(feature = "stdarch_neon_f16", issue = "136306")] #[cfg(not(target_arch = "arm64ec"))] pub unsafe fn vld2q_f16(a: *const f16) -> float16x8x2_t { @@ -20471,12 +20502,13 @@ pub unsafe fn vld2q_f16(a: *const f16) -> float16x8x2_t { #[doc = "## Safety"] #[doc = " * Neon instrinsic unsafe"] #[inline] +#[target_feature(enable = "neon")] #[cfg(not(target_arch = "arm"))] #[cfg_attr( all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), assert_instr(ld2) )] -#[target_feature(enable = "neon,fp16")] +#[cfg_attr(target_arch = "arm", target_feature(enable = "fp16"))] #[unstable(feature = "stdarch_neon_f16", issue = "136306")] #[cfg(not(target_arch = "arm64ec"))] pub unsafe fn vld2_f16(a: *const f16) -> float16x4x2_t { @@ -20494,12 +20526,13 @@ pub unsafe fn vld2_f16(a: *const f16) -> float16x4x2_t { #[doc = "## Safety"] #[doc = " * Neon instrinsic unsafe"] #[inline] +#[target_feature(enable = "neon")] #[cfg(not(target_arch = "arm"))] #[cfg_attr( all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), assert_instr(ld2) )] -#[target_feature(enable = "neon,fp16")] +#[cfg_attr(target_arch = "arm", target_feature(enable = "fp16"))] #[unstable(feature = "stdarch_neon_f16", issue = "136306")] #[cfg(not(target_arch = "arm64ec"))] pub unsafe fn vld2q_f16(a: *const f16) -> float16x8x2_t { @@ -20801,7 +20834,7 @@ pub unsafe fn vld2q_s32(a: *const i32) -> int32x4x2_t { #[cfg(target_arch = "arm")] #[cfg_attr(all(test, target_arch = "arm"), assert_instr(vld2, LANE = 0))] #[rustc_legacy_const_generics(2)] -#[target_feature(enable = "neon,fp16")] +#[cfg_attr(target_arch = "arm", target_feature(enable = "fp16"))] #[unstable(feature = "stdarch_neon_f16", issue = "136306")] #[cfg(not(target_arch = "arm64ec"))] pub unsafe fn vld2_lane_f16(a: *const f16, b: float16x4x2_t) -> float16x4x2_t { @@ -20827,7 +20860,7 @@ pub unsafe fn vld2_lane_f16(a: *const f16, b: float16x4x2_t) -> #[cfg(target_arch = "arm")] #[cfg_attr(all(test, target_arch = "arm"), assert_instr(vld2, LANE = 0))] #[rustc_legacy_const_generics(2)] -#[target_feature(enable = "neon,fp16")] +#[cfg_attr(target_arch = "arm", target_feature(enable = "fp16"))] #[unstable(feature = "stdarch_neon_f16", issue = "136306")] #[cfg(not(target_arch = "arm64ec"))] pub unsafe fn vld2q_lane_f16(a: *const f16, b: float16x8x2_t) -> float16x8x2_t { @@ -20849,13 +20882,14 @@ pub unsafe fn vld2q_lane_f16(a: *const f16, b: float16x8x2_t) - #[doc = "## Safety"] #[doc = " * Neon instrinsic unsafe"] #[inline] +#[target_feature(enable = "neon")] #[cfg(not(target_arch = "arm"))] #[cfg_attr( all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), assert_instr(ld2, LANE = 0) )] #[rustc_legacy_const_generics(2)] -#[target_feature(enable = "neon,fp16")] +#[cfg_attr(target_arch = "arm", target_feature(enable = "fp16"))] #[unstable(feature = "stdarch_neon_f16", issue = "136306")] #[cfg(not(target_arch = "arm64ec"))] pub unsafe fn vld2_lane_f16(a: *const f16, b: float16x4x2_t) -> float16x4x2_t { @@ -20875,13 +20909,14 @@ pub unsafe fn vld2_lane_f16(a: *const f16, b: float16x4x2_t) -> #[doc = "## Safety"] #[doc = " * Neon instrinsic unsafe"] #[inline] +#[target_feature(enable = "neon")] #[cfg(not(target_arch = "arm"))] #[cfg_attr( all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), assert_instr(ld2, LANE = 0) )] #[rustc_legacy_const_generics(2)] -#[target_feature(enable = "neon,fp16")] +#[cfg_attr(target_arch = "arm", target_feature(enable = "fp16"))] #[unstable(feature = "stdarch_neon_f16", issue = "136306")] #[cfg(not(target_arch = "arm64ec"))] pub unsafe fn vld2q_lane_f16(a: *const f16, b: float16x8x2_t) -> float16x8x2_t { @@ -22031,10 +22066,11 @@ pub unsafe fn vld2q_p16(a: *const p16) -> poly16x8x2_t { #[doc = "## Safety"] #[doc = " * Neon instrinsic unsafe"] #[inline] +#[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] #[cfg(target_arch = "arm")] #[cfg_attr(all(test, target_arch = "arm"), assert_instr(vld3))] -#[target_feature(enable = "neon,fp16")] +#[cfg_attr(target_arch = "arm", target_feature(enable = "fp16"))] #[unstable(feature = "stdarch_neon_f16", issue = "136306")] #[cfg(not(target_arch = "arm64ec"))] pub unsafe fn vld3_dup_f16(a: *const f16) -> float16x4x3_t { @@ -22049,10 +22085,11 @@ pub unsafe fn vld3_dup_f16(a: *const f16) -> float16x4x3_t { #[doc = "## Safety"] #[doc = " * Neon instrinsic unsafe"] #[inline] +#[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] #[cfg(target_arch = "arm")] #[cfg_attr(all(test, target_arch = "arm"), assert_instr(vld3))] -#[target_feature(enable = "neon,fp16")] +#[cfg_attr(target_arch = "arm", target_feature(enable = "fp16"))] #[unstable(feature = "stdarch_neon_f16", issue = "136306")] #[cfg(not(target_arch = "arm64ec"))] pub unsafe fn vld3q_dup_f16(a: *const f16) -> float16x8x3_t { @@ -22067,12 +22104,13 @@ pub unsafe fn vld3q_dup_f16(a: *const f16) -> float16x8x3_t { #[doc = "## Safety"] #[doc = " * Neon instrinsic unsafe"] #[inline] +#[target_feature(enable = "neon")] #[cfg(not(target_arch = "arm"))] #[cfg_attr( all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), assert_instr(ld3r) )] -#[target_feature(enable = "neon,fp16")] +#[cfg_attr(target_arch = "arm", target_feature(enable = "fp16"))] #[unstable(feature = "stdarch_neon_f16", issue = "136306")] #[cfg(not(target_arch = "arm64ec"))] pub unsafe fn vld3_dup_f16(a: *const f16) -> float16x4x3_t { @@ -22090,12 +22128,13 @@ pub unsafe fn vld3_dup_f16(a: *const f16) -> float16x4x3_t { #[doc = "## Safety"] #[doc = " * Neon instrinsic unsafe"] #[inline] +#[target_feature(enable = "neon")] #[cfg(not(target_arch = "arm"))] #[cfg_attr( all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), assert_instr(ld3r) )] -#[target_feature(enable = "neon,fp16")] +#[cfg_attr(target_arch = "arm", target_feature(enable = "fp16"))] #[unstable(feature = "stdarch_neon_f16", issue = "136306")] #[cfg(not(target_arch = "arm64ec"))] pub unsafe fn vld3q_dup_f16(a: *const f16) -> float16x8x3_t { @@ -23030,10 +23069,11 @@ pub unsafe fn vld3q_dup_p16(a: *const p16) -> poly16x8x3_t { #[doc = "## Safety"] #[doc = " * Neon instrinsic unsafe"] #[inline] +#[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] #[cfg(target_arch = "arm")] #[cfg_attr(all(test, target_arch = "arm"), assert_instr(vld3))] -#[target_feature(enable = "neon,fp16")] +#[cfg_attr(target_arch = "arm", target_feature(enable = "fp16"))] #[unstable(feature = "stdarch_neon_f16", issue = "136306")] #[cfg(not(target_arch = "arm64ec"))] pub unsafe fn vld3_f16(a: *const f16) -> float16x4x3_t { @@ -23048,10 +23088,11 @@ pub unsafe fn vld3_f16(a: *const f16) -> float16x4x3_t { #[doc = "## Safety"] #[doc = " * Neon instrinsic unsafe"] #[inline] +#[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] #[cfg(target_arch = "arm")] #[cfg_attr(all(test, target_arch = "arm"), assert_instr(vld3))] -#[target_feature(enable = "neon,fp16")] +#[cfg_attr(target_arch = "arm", target_feature(enable = "fp16"))] #[unstable(feature = "stdarch_neon_f16", issue = "136306")] #[cfg(not(target_arch = "arm64ec"))] pub unsafe fn vld3q_f16(a: *const f16) -> float16x8x3_t { @@ -23066,12 +23107,13 @@ pub unsafe fn vld3q_f16(a: *const f16) -> float16x8x3_t { #[doc = "## Safety"] #[doc = " * Neon instrinsic unsafe"] #[inline] +#[target_feature(enable = "neon")] #[cfg(not(target_arch = "arm"))] #[cfg_attr( all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), assert_instr(ld3) )] -#[target_feature(enable = "neon,fp16")] +#[cfg_attr(target_arch = "arm", target_feature(enable = "fp16"))] #[unstable(feature = "stdarch_neon_f16", issue = "136306")] #[cfg(not(target_arch = "arm64ec"))] pub unsafe fn vld3_f16(a: *const f16) -> float16x4x3_t { @@ -23089,12 +23131,13 @@ pub unsafe fn vld3_f16(a: *const f16) -> float16x4x3_t { #[doc = "## Safety"] #[doc = " * Neon instrinsic unsafe"] #[inline] +#[target_feature(enable = "neon")] #[cfg(not(target_arch = "arm"))] #[cfg_attr( all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), assert_instr(ld3) )] -#[target_feature(enable = "neon,fp16")] +#[cfg_attr(target_arch = "arm", target_feature(enable = "fp16"))] #[unstable(feature = "stdarch_neon_f16", issue = "136306")] #[cfg(not(target_arch = "arm64ec"))] pub unsafe fn vld3q_f16(a: *const f16) -> float16x8x3_t { @@ -23396,7 +23439,7 @@ pub unsafe fn vld3q_s32(a: *const i32) -> int32x4x3_t { #[cfg(target_arch = "arm")] #[cfg_attr(all(test, target_arch = "arm"), assert_instr(vld3, LANE = 0))] #[rustc_legacy_const_generics(2)] -#[target_feature(enable = "neon,fp16")] +#[cfg_attr(target_arch = "arm", target_feature(enable = "fp16"))] #[unstable(feature = "stdarch_neon_f16", issue = "136306")] #[cfg(not(target_arch = "arm64ec"))] pub unsafe fn vld3_lane_f16(a: *const f16, b: float16x4x3_t) -> float16x4x3_t { @@ -23423,7 +23466,7 @@ pub unsafe fn vld3_lane_f16(a: *const f16, b: float16x4x3_t) -> #[cfg(target_arch = "arm")] #[cfg_attr(all(test, target_arch = "arm"), assert_instr(vld3, LANE = 0))] #[rustc_legacy_const_generics(2)] -#[target_feature(enable = "neon,fp16")] +#[cfg_attr(target_arch = "arm", target_feature(enable = "fp16"))] #[unstable(feature = "stdarch_neon_f16", issue = "136306")] #[cfg(not(target_arch = "arm64ec"))] pub unsafe fn vld3q_lane_f16(a: *const f16, b: float16x8x3_t) -> float16x8x3_t { @@ -23446,13 +23489,14 @@ pub unsafe fn vld3q_lane_f16(a: *const f16, b: float16x8x3_t) - #[doc = "## Safety"] #[doc = " * Neon instrinsic unsafe"] #[inline] +#[target_feature(enable = "neon")] #[cfg(not(target_arch = "arm"))] #[cfg_attr( all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), assert_instr(ld3, LANE = 0) )] #[rustc_legacy_const_generics(2)] -#[target_feature(enable = "neon,fp16")] +#[cfg_attr(target_arch = "arm", target_feature(enable = "fp16"))] #[unstable(feature = "stdarch_neon_f16", issue = "136306")] #[cfg(not(target_arch = "arm64ec"))] pub unsafe fn vld3_lane_f16(a: *const f16, b: float16x4x3_t) -> float16x4x3_t { @@ -23477,13 +23521,14 @@ pub unsafe fn vld3_lane_f16(a: *const f16, b: float16x4x3_t) -> #[doc = "## Safety"] #[doc = " * Neon instrinsic unsafe"] #[inline] +#[target_feature(enable = "neon")] #[cfg(not(target_arch = "arm"))] #[cfg_attr( all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), assert_instr(ld3, LANE = 0) )] #[rustc_legacy_const_generics(2)] -#[target_feature(enable = "neon,fp16")] +#[cfg_attr(target_arch = "arm", target_feature(enable = "fp16"))] #[unstable(feature = "stdarch_neon_f16", issue = "136306")] #[cfg(not(target_arch = "arm64ec"))] pub unsafe fn vld3q_lane_f16(a: *const f16, b: float16x8x3_t) -> float16x8x3_t { @@ -31524,13 +31569,14 @@ pub fn vmmlaq_u32(a: uint32x4_t, b: uint8x16_t, c: uint8x16_t) -> uint32x4_t { #[doc = "Duplicate element to vector"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vmov_n_f16)"] #[inline] +#[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vdup.16"))] #[cfg_attr( all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), assert_instr(dup) )] -#[target_feature(enable = "neon,fp16")] +#[cfg_attr(target_arch = "arm", target_feature(enable = "fp16"))] #[unstable(feature = "stdarch_neon_f16", issue = "136306")] #[cfg(not(target_arch = "arm64ec"))] pub fn vmov_n_f16(a: f16) -> float16x4_t { @@ -31539,13 +31585,14 @@ pub fn vmov_n_f16(a: f16) -> float16x4_t { #[doc = "Duplicate element to vector"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vmovq_n_f16)"] #[inline] +#[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vdup.16"))] #[cfg_attr( all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), assert_instr(dup) )] -#[target_feature(enable = "neon,fp16")] +#[cfg_attr(target_arch = "arm", target_feature(enable = "fp16"))] #[unstable(feature = "stdarch_neon_f16", issue = "136306")] #[cfg(not(target_arch = "arm64ec"))] pub fn vmovq_n_f16(a: f16) -> float16x8_t { @@ -63675,9 +63722,10 @@ pub unsafe fn vst1q_f16_x3(a: *mut f16, b: float16x8x3_t) { #[doc = "## Safety"] #[doc = " * Neon instrinsic unsafe"] #[inline] +#[target_feature(enable = "neon")] #[cfg(target_arch = "arm")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] -#[target_feature(enable = "neon,fp16")] +#[cfg_attr(target_arch = "arm", target_feature(enable = "fp16"))] #[unstable(feature = "stdarch_neon_f16", issue = "136306")] #[cfg(not(target_arch = "arm64ec"))] #[cfg_attr(test, assert_instr(vst1))] @@ -63699,9 +63747,10 @@ pub unsafe fn vst1_f16_x4(a: *mut f16, b: float16x4x4_t) { #[doc = "## Safety"] #[doc = " * Neon instrinsic unsafe"] #[inline] +#[target_feature(enable = "neon")] #[cfg(target_arch = "arm")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] -#[target_feature(enable = "neon,fp16")] +#[cfg_attr(target_arch = "arm", target_feature(enable = "fp16"))] #[unstable(feature = "stdarch_neon_f16", issue = "136306")] #[cfg(not(target_arch = "arm64ec"))] #[cfg_attr(test, assert_instr(vst1))] @@ -64313,6 +64362,7 @@ pub unsafe fn vst1q_f32_x4(a: *mut f32, b: float32x4x4_t) { #[doc = "## Safety"] #[doc = " * Neon instrinsic unsafe"] #[inline] +#[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] #[cfg_attr(all(test, target_arch = "arm"), assert_instr(nop, LANE = 0))] #[cfg_attr( @@ -64320,7 +64370,7 @@ pub unsafe fn vst1q_f32_x4(a: *mut f32, b: float32x4x4_t) { assert_instr(nop, LANE = 0) )] #[rustc_legacy_const_generics(2)] -#[target_feature(enable = "neon,fp16")] +#[cfg_attr(target_arch = "arm", target_feature(enable = "fp16"))] #[unstable(feature = "stdarch_neon_f16", issue = "136306")] #[cfg(not(target_arch = "arm64ec"))] pub unsafe fn vst1_lane_f16(a: *mut f16, b: float16x4_t) { @@ -64332,6 +64382,7 @@ pub unsafe fn vst1_lane_f16(a: *mut f16, b: float16x4_t) { #[doc = "## Safety"] #[doc = " * Neon instrinsic unsafe"] #[inline] +#[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] #[cfg_attr(all(test, target_arch = "arm"), assert_instr(nop, LANE = 0))] #[cfg_attr( @@ -64339,7 +64390,7 @@ pub unsafe fn vst1_lane_f16(a: *mut f16, b: float16x4_t) { assert_instr(nop, LANE = 0) )] #[rustc_legacy_const_generics(2)] -#[target_feature(enable = "neon,fp16")] +#[cfg_attr(target_arch = "arm", target_feature(enable = "fp16"))] #[unstable(feature = "stdarch_neon_f16", issue = "136306")] #[cfg(not(target_arch = "arm64ec"))] pub unsafe fn vst1q_lane_f16(a: *mut f16, b: float16x8_t) { @@ -66933,8 +66984,9 @@ pub unsafe fn vst1q_lane_p64(a: *mut p64, b: poly64x2_t) { #[doc = "## Safety"] #[doc = " * Neon instrinsic unsafe"] #[inline] +#[target_feature(enable = "neon")] #[cfg(not(target_arch = "arm"))] -#[target_feature(enable = "neon,fp16")] +#[cfg_attr(target_arch = "arm", target_feature(enable = "fp16"))] #[unstable(feature = "stdarch_neon_f16", issue = "136306")] #[cfg(not(target_arch = "arm64ec"))] #[cfg_attr(test, assert_instr(st2))] @@ -66953,8 +67005,9 @@ pub unsafe fn vst2_f16(a: *mut f16, b: float16x4x2_t) { #[doc = "## Safety"] #[doc = " * Neon instrinsic unsafe"] #[inline] +#[target_feature(enable = "neon")] #[cfg(not(target_arch = "arm"))] -#[target_feature(enable = "neon,fp16")] +#[cfg_attr(target_arch = "arm", target_feature(enable = "fp16"))] #[unstable(feature = "stdarch_neon_f16", issue = "136306")] #[cfg(not(target_arch = "arm64ec"))] #[cfg_attr(test, assert_instr(st2))] @@ -66973,9 +67026,10 @@ pub unsafe fn vst2q_f16(a: *mut f16, b: float16x8x2_t) { #[doc = "## Safety"] #[doc = " * Neon instrinsic unsafe"] #[inline] +#[target_feature(enable = "neon")] #[cfg(target_arch = "arm")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] -#[target_feature(enable = "neon,fp16")] +#[cfg_attr(target_arch = "arm", target_feature(enable = "fp16"))] #[unstable(feature = "stdarch_neon_f16", issue = "136306")] #[cfg(not(target_arch = "arm64ec"))] #[cfg_attr(test, assert_instr(vst2))] @@ -66991,9 +67045,10 @@ pub unsafe fn vst2_f16(a: *mut f16, b: float16x4x2_t) { #[doc = "## Safety"] #[doc = " * Neon instrinsic unsafe"] #[inline] +#[target_feature(enable = "neon")] #[cfg(target_arch = "arm")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] -#[target_feature(enable = "neon,fp16")] +#[cfg_attr(target_arch = "arm", target_feature(enable = "fp16"))] #[unstable(feature = "stdarch_neon_f16", issue = "136306")] #[cfg(not(target_arch = "arm64ec"))] #[cfg_attr(test, assert_instr(vst2))] @@ -67289,10 +67344,11 @@ pub unsafe fn vst2q_s32(a: *mut i32, b: int32x4x2_t) { #[doc = "## Safety"] #[doc = " * Neon instrinsic unsafe"] #[inline] +#[target_feature(enable = "neon")] #[cfg(not(target_arch = "arm"))] #[rustc_legacy_const_generics(2)] #[cfg_attr(test, assert_instr(st2, LANE = 0))] -#[target_feature(enable = "neon,fp16")] +#[cfg_attr(target_arch = "arm", target_feature(enable = "fp16"))] #[unstable(feature = "stdarch_neon_f16", issue = "136306")] #[cfg(not(target_arch = "arm64ec"))] pub unsafe fn vst2_lane_f16(a: *mut f16, b: float16x4x2_t) { @@ -67311,10 +67367,11 @@ pub unsafe fn vst2_lane_f16(a: *mut f16, b: float16x4x2_t) { #[doc = "## Safety"] #[doc = " * Neon instrinsic unsafe"] #[inline] +#[target_feature(enable = "neon")] #[cfg(not(target_arch = "arm"))] #[rustc_legacy_const_generics(2)] #[cfg_attr(test, assert_instr(st2, LANE = 0))] -#[target_feature(enable = "neon,fp16")] +#[cfg_attr(target_arch = "arm", target_feature(enable = "fp16"))] #[unstable(feature = "stdarch_neon_f16", issue = "136306")] #[cfg(not(target_arch = "arm64ec"))] pub unsafe fn vst2q_lane_f16(a: *mut f16, b: float16x8x2_t) { @@ -67333,11 +67390,12 @@ pub unsafe fn vst2q_lane_f16(a: *mut f16, b: float16x8x2_t) { #[doc = "## Safety"] #[doc = " * Neon instrinsic unsafe"] #[inline] +#[target_feature(enable = "neon")] #[cfg(target_arch = "arm")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] #[cfg_attr(test, assert_instr(vst2, LANE = 0))] #[rustc_legacy_const_generics(2)] -#[target_feature(enable = "neon,fp16")] +#[cfg_attr(target_arch = "arm", target_feature(enable = "fp16"))] #[unstable(feature = "stdarch_neon_f16", issue = "136306")] #[cfg(not(target_arch = "arm64ec"))] pub unsafe fn vst2_lane_f16(a: *mut f16, b: float16x4x2_t) { @@ -67353,11 +67411,12 @@ pub unsafe fn vst2_lane_f16(a: *mut f16, b: float16x4x2_t) { #[doc = "## Safety"] #[doc = " * Neon instrinsic unsafe"] #[inline] +#[target_feature(enable = "neon")] #[cfg(target_arch = "arm")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] #[cfg_attr(test, assert_instr(vst2, LANE = 0))] #[rustc_legacy_const_generics(2)] -#[target_feature(enable = "neon,fp16")] +#[cfg_attr(target_arch = "arm", target_feature(enable = "fp16"))] #[unstable(feature = "stdarch_neon_f16", issue = "136306")] #[cfg(not(target_arch = "arm64ec"))] pub unsafe fn vst2q_lane_f16(a: *mut f16, b: float16x8x2_t) { @@ -68157,9 +68216,10 @@ pub unsafe fn vst2q_p16(a: *mut p16, b: poly16x8x2_t) { #[doc = "## Safety"] #[doc = " * Neon instrinsic unsafe"] #[inline] +#[target_feature(enable = "neon")] #[cfg(target_arch = "arm")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] -#[target_feature(enable = "neon,fp16")] +#[cfg_attr(target_arch = "arm", target_feature(enable = "fp16"))] #[unstable(feature = "stdarch_neon_f16", issue = "136306")] #[cfg(not(target_arch = "arm64ec"))] #[cfg_attr(test, assert_instr(vst3))] @@ -68175,9 +68235,10 @@ pub unsafe fn vst3_f16(a: *mut f16, b: float16x4x3_t) { #[doc = "## Safety"] #[doc = " * Neon instrinsic unsafe"] #[inline] +#[target_feature(enable = "neon")] #[cfg(target_arch = "arm")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] -#[target_feature(enable = "neon,fp16")] +#[cfg_attr(target_arch = "arm", target_feature(enable = "fp16"))] #[unstable(feature = "stdarch_neon_f16", issue = "136306")] #[cfg(not(target_arch = "arm64ec"))] #[cfg_attr(test, assert_instr(vst3))] @@ -68193,8 +68254,9 @@ pub unsafe fn vst3q_f16(a: *mut f16, b: float16x8x3_t) { #[doc = "## Safety"] #[doc = " * Neon instrinsic unsafe"] #[inline] +#[target_feature(enable = "neon")] #[cfg(not(target_arch = "arm"))] -#[target_feature(enable = "neon,fp16")] +#[cfg_attr(target_arch = "arm", target_feature(enable = "fp16"))] #[unstable(feature = "stdarch_neon_f16", issue = "136306")] #[cfg(not(target_arch = "arm64ec"))] #[cfg_attr(test, assert_instr(st3))] @@ -68213,8 +68275,9 @@ pub unsafe fn vst3_f16(a: *mut f16, b: float16x4x3_t) { #[doc = "## Safety"] #[doc = " * Neon instrinsic unsafe"] #[inline] +#[target_feature(enable = "neon")] #[cfg(not(target_arch = "arm"))] -#[target_feature(enable = "neon,fp16")] +#[cfg_attr(target_arch = "arm", target_feature(enable = "fp16"))] #[unstable(feature = "stdarch_neon_f16", issue = "136306")] #[cfg(not(target_arch = "arm64ec"))] #[cfg_attr(test, assert_instr(st3))] @@ -68513,11 +68576,12 @@ pub unsafe fn vst3q_s32(a: *mut i32, b: int32x4x3_t) { #[doc = "## Safety"] #[doc = " * Neon instrinsic unsafe"] #[inline] +#[target_feature(enable = "neon")] #[cfg(target_arch = "arm")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] #[cfg_attr(test, assert_instr(vst3, LANE = 0))] #[rustc_legacy_const_generics(2)] -#[target_feature(enable = "neon,fp16")] +#[cfg_attr(target_arch = "arm", target_feature(enable = "fp16"))] #[unstable(feature = "stdarch_neon_f16", issue = "136306")] #[cfg(not(target_arch = "arm64ec"))] pub unsafe fn vst3_lane_f16(a: *mut f16, b: float16x4x3_t) { @@ -68540,11 +68604,12 @@ pub unsafe fn vst3_lane_f16(a: *mut f16, b: float16x4x3_t) { #[doc = "## Safety"] #[doc = " * Neon instrinsic unsafe"] #[inline] +#[target_feature(enable = "neon")] #[cfg(target_arch = "arm")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] #[cfg_attr(test, assert_instr(vst3, LANE = 0))] #[rustc_legacy_const_generics(2)] -#[target_feature(enable = "neon,fp16")] +#[cfg_attr(target_arch = "arm", target_feature(enable = "fp16"))] #[unstable(feature = "stdarch_neon_f16", issue = "136306")] #[cfg(not(target_arch = "arm64ec"))] pub unsafe fn vst3q_lane_f16(a: *mut f16, b: float16x8x3_t) { @@ -68567,10 +68632,11 @@ pub unsafe fn vst3q_lane_f16(a: *mut f16, b: float16x8x3_t) { #[doc = "## Safety"] #[doc = " * Neon instrinsic unsafe"] #[inline] +#[target_feature(enable = "neon")] #[cfg(not(target_arch = "arm"))] #[rustc_legacy_const_generics(2)] #[cfg_attr(test, assert_instr(st3, LANE = 0))] -#[target_feature(enable = "neon,fp16")] +#[cfg_attr(target_arch = "arm", target_feature(enable = "fp16"))] #[unstable(feature = "stdarch_neon_f16", issue = "136306")] #[cfg(not(target_arch = "arm64ec"))] pub unsafe fn vst3_lane_f16(a: *mut f16, b: float16x4x3_t) { @@ -68589,10 +68655,11 @@ pub unsafe fn vst3_lane_f16(a: *mut f16, b: float16x4x3_t) { #[doc = "## Safety"] #[doc = " * Neon instrinsic unsafe"] #[inline] +#[target_feature(enable = "neon")] #[cfg(not(target_arch = "arm"))] #[rustc_legacy_const_generics(2)] #[cfg_attr(test, assert_instr(st3, LANE = 0))] -#[target_feature(enable = "neon,fp16")] +#[cfg_attr(target_arch = "arm", target_feature(enable = "fp16"))] #[unstable(feature = "stdarch_neon_f16", issue = "136306")] #[cfg(not(target_arch = "arm64ec"))] pub unsafe fn vst3q_lane_f16(a: *mut f16, b: float16x8x3_t) { @@ -69437,9 +69504,10 @@ pub unsafe fn vst3q_p16(a: *mut p16, b: poly16x8x3_t) { #[doc = "## Safety"] #[doc = " * Neon instrinsic unsafe"] #[inline] +#[target_feature(enable = "neon")] #[cfg(target_arch = "arm")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] -#[target_feature(enable = "neon,fp16")] +#[cfg_attr(target_arch = "arm", target_feature(enable = "fp16"))] #[unstable(feature = "stdarch_neon_f16", issue = "136306")] #[cfg(not(target_arch = "arm64ec"))] #[cfg_attr(test, assert_instr(vst4))] @@ -69462,9 +69530,10 @@ pub unsafe fn vst4_f16(a: *mut f16, b: float16x4x4_t) { #[doc = "## Safety"] #[doc = " * Neon instrinsic unsafe"] #[inline] +#[target_feature(enable = "neon")] #[cfg(target_arch = "arm")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] -#[target_feature(enable = "neon,fp16")] +#[cfg_attr(target_arch = "arm", target_feature(enable = "fp16"))] #[unstable(feature = "stdarch_neon_f16", issue = "136306")] #[cfg(not(target_arch = "arm64ec"))] #[cfg_attr(test, assert_instr(vst4))] @@ -69487,8 +69556,9 @@ pub unsafe fn vst4q_f16(a: *mut f16, b: float16x8x4_t) { #[doc = "## Safety"] #[doc = " * Neon instrinsic unsafe"] #[inline] +#[target_feature(enable = "neon")] #[cfg(not(target_arch = "arm"))] -#[target_feature(enable = "neon,fp16")] +#[cfg_attr(target_arch = "arm", target_feature(enable = "fp16"))] #[unstable(feature = "stdarch_neon_f16", issue = "136306")] #[cfg(not(target_arch = "arm64ec"))] #[cfg_attr(test, assert_instr(st4))] @@ -69507,8 +69577,9 @@ pub unsafe fn vst4_f16(a: *mut f16, b: float16x4x4_t) { #[doc = "## Safety"] #[doc = " * Neon instrinsic unsafe"] #[inline] +#[target_feature(enable = "neon")] #[cfg(not(target_arch = "arm"))] -#[target_feature(enable = "neon,fp16")] +#[cfg_attr(target_arch = "arm", target_feature(enable = "fp16"))] #[unstable(feature = "stdarch_neon_f16", issue = "136306")] #[cfg(not(target_arch = "arm64ec"))] #[cfg_attr(test, assert_instr(st4))] @@ -69856,11 +69927,12 @@ pub unsafe fn vst4q_s32(a: *mut i32, b: int32x4x4_t) { #[doc = "## Safety"] #[doc = " * Neon instrinsic unsafe"] #[inline] +#[target_feature(enable = "neon")] #[cfg(target_arch = "arm")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] #[cfg_attr(test, assert_instr(vst4, LANE = 0))] #[rustc_legacy_const_generics(2)] -#[target_feature(enable = "neon,fp16")] +#[cfg_attr(target_arch = "arm", target_feature(enable = "fp16"))] #[unstable(feature = "stdarch_neon_f16", issue = "136306")] #[cfg(not(target_arch = "arm64ec"))] pub unsafe fn vst4_lane_f16(a: *mut f16, b: float16x4x4_t) { @@ -69884,11 +69956,12 @@ pub unsafe fn vst4_lane_f16(a: *mut f16, b: float16x4x4_t) { #[doc = "## Safety"] #[doc = " * Neon instrinsic unsafe"] #[inline] +#[target_feature(enable = "neon")] #[cfg(target_arch = "arm")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] #[cfg_attr(test, assert_instr(vst4, LANE = 0))] #[rustc_legacy_const_generics(2)] -#[target_feature(enable = "neon,fp16")] +#[cfg_attr(target_arch = "arm", target_feature(enable = "fp16"))] #[unstable(feature = "stdarch_neon_f16", issue = "136306")] #[cfg(not(target_arch = "arm64ec"))] pub unsafe fn vst4q_lane_f16(a: *mut f16, b: float16x8x4_t) { @@ -69912,10 +69985,11 @@ pub unsafe fn vst4q_lane_f16(a: *mut f16, b: float16x8x4_t) { #[doc = "## Safety"] #[doc = " * Neon instrinsic unsafe"] #[inline] +#[target_feature(enable = "neon")] #[cfg(not(target_arch = "arm"))] #[rustc_legacy_const_generics(2)] #[cfg_attr(test, assert_instr(st4, LANE = 0))] -#[target_feature(enable = "neon,fp16")] +#[cfg_attr(target_arch = "arm", target_feature(enable = "fp16"))] #[unstable(feature = "stdarch_neon_f16", issue = "136306")] #[cfg(not(target_arch = "arm64ec"))] pub unsafe fn vst4_lane_f16(a: *mut f16, b: float16x4x4_t) { @@ -69941,10 +70015,11 @@ pub unsafe fn vst4_lane_f16(a: *mut f16, b: float16x4x4_t) { #[doc = "## Safety"] #[doc = " * Neon instrinsic unsafe"] #[inline] +#[target_feature(enable = "neon")] #[cfg(not(target_arch = "arm"))] #[rustc_legacy_const_generics(2)] #[cfg_attr(test, assert_instr(st4, LANE = 0))] -#[target_feature(enable = "neon,fp16")] +#[cfg_attr(target_arch = "arm", target_feature(enable = "fp16"))] #[unstable(feature = "stdarch_neon_f16", issue = "136306")] #[cfg(not(target_arch = "arm64ec"))] pub unsafe fn vst4q_lane_f16(a: *mut f16, b: float16x8x4_t) { diff --git a/crates/stdarch-gen-arm/spec/neon/aarch64.spec.yml b/crates/stdarch-gen-arm/spec/neon/aarch64.spec.yml index 48c12779a8..f3faf14838 100644 --- a/crates/stdarch-gen-arm/spec/neon/aarch64.spec.yml +++ b/crates/stdarch-gen-arm/spec/neon/aarch64.spec.yml @@ -1506,7 +1506,6 @@ intrinsics: return_type: "{neon_type[0]}" attr: - FnCall: [cfg_attr, [test, {FnCall: [assert_instr, [fcvtn2]]}]] - - *neon-fp16 - *neon-unstable-f16 - *target-not-arm64ec safety: safe @@ -1524,7 +1523,6 @@ intrinsics: return_type: "{neon_type[0]}" attr: - FnCall: [cfg_attr, [test, {FnCall: [assert_instr, [fcvtl2]]}]] - - *neon-fp16 - *neon-unstable-f16 - *target-not-arm64ec safety: safe @@ -8793,7 +8791,6 @@ intrinsics: arguments: ["a: {type[0]}"] return_type: "{type[1]}" attr: - - *neon-fp16 - *neon-unstable-f16 - *target-not-arm64ec assert_instr: [nop] diff --git a/crates/stdarch-gen-arm/spec/neon/arm_shared.spec.yml b/crates/stdarch-gen-arm/spec/neon/arm_shared.spec.yml index 9ebdc4334c..9727f0a4bb 100644 --- a/crates/stdarch-gen-arm/spec/neon/arm_shared.spec.yml +++ b/crates/stdarch-gen-arm/spec/neon/arm_shared.spec.yml @@ -71,6 +71,10 @@ neon-i8mm: &neon-i8mm neon-fp16: &neon-fp16 FnCall: [target_feature, ['enable = "neon,fp16"']] +# #[cfg_attr[target_arch = "arm", target_feature(enable = "neon,fp16")] +arm-fp16: &arm-fp16 + FnCall: [cfg_attr, ['target_arch = "arm"', {FnCall: [target_feature, ['enable = "fp16"']]}]] + enable-fcma: &enable-fcma FnCall: [cfg_attr, [{ FnCall: [not, ['target_arch = "arm"']]}, { FnCall: [target_feature, ['enable = "fcma"']] }]] @@ -1502,7 +1506,7 @@ intrinsics: - FnCall: [cfg_attr, [*test-is-arm, {FnCall: [assert_instr, ['"vdup.16"', 'N = 4']]}]] - FnCall: [cfg_attr, [*neon-target-aarch64-arm64ec, {FnCall: [assert_instr, [dup, 'N = 4']]}]] - FnCall: [rustc_legacy_const_generics, ['1']] - - *neon-fp16 + - *arm-fp16 - *neon-unstable-f16 - *target-not-arm64ec static_defs: ['const N: i32'] @@ -1522,7 +1526,7 @@ intrinsics: - *neon-v7 - FnCall: [cfg_attr, [*test-is-arm, {FnCall: [assert_instr, ['"vdup.16"']]}]] - FnCall: [cfg_attr, [*neon-target-aarch64-arm64ec, {FnCall: [assert_instr, [dup]]}]] - - *neon-fp16 + - *arm-fp16 - *neon-unstable-f16 - *target-not-arm64ec safety: safe @@ -1541,7 +1545,7 @@ intrinsics: - FnCall: [cfg_attr, [*test-is-arm, {FnCall: [assert_instr, ['"vdup.16"', 'N = 2']]}]] - FnCall: [cfg_attr, [*neon-target-aarch64-arm64ec, {FnCall: [assert_instr, [dup, 'N = 2']]}]] - FnCall: [rustc_legacy_const_generics, ['1']] - - *neon-fp16 + - *arm-fp16 - *neon-unstable-f16 - *target-not-arm64ec static_defs: ['const N: i32'] @@ -2754,7 +2758,7 @@ intrinsics: - *neon-v7 - FnCall: [cfg_attr, [*test-is-arm, {FnCall: [assert_instr, [vld1]]}]] - FnCall: [cfg_attr, [*neon-target-aarch64-arm64ec, {FnCall: [assert_instr, [ld1]]}]] - - *neon-fp16 + - *arm-fp16 - *neon-unstable-f16 - *target-not-arm64ec safety: @@ -2785,7 +2789,7 @@ intrinsics: - FnCall: [cfg_attr, [*test-is-arm, {FnCall: [assert_instr, [vld1, 'LANE = 0']]}]] - FnCall: [cfg_attr, [*neon-target-aarch64-arm64ec, {FnCall: [assert_instr, [ld1, 'LANE = 0']]}]] - FnCall: [rustc_legacy_const_generics, ["2"]] - - *neon-fp16 + - *arm-fp16 - *neon-unstable-f16 - *target-not-arm64ec static_defs: ['const LANE: i32'] @@ -2806,7 +2810,7 @@ intrinsics: - *neon-v7 - FnCall: [cfg_attr, [*test-is-arm, {FnCall: [assert_instr, ["vld1"]]}]] - FnCall: [cfg_attr, [*neon-target-aarch64-arm64ec, {FnCall: [assert_instr, [ld1r]]}]] - - *neon-fp16 + - *arm-fp16 - *neon-unstable-f16 - *target-not-arm64ec safety: @@ -3399,7 +3403,7 @@ intrinsics: - *neon-v7 - *target-is-arm - FnCall: [cfg_attr, [*test-is-arm, {FnCall: [assert_instr, [vld2]]}]] - - *neon-fp16 + - *arm-fp16 - *neon-unstable-f16 - *target-not-arm64ec safety: @@ -3428,7 +3432,7 @@ intrinsics: attr: - *target-not-arm - FnCall: [cfg_attr, [*neon-target-aarch64-arm64ec, {FnCall: [assert_instr, [ld2]]}]] - - *neon-fp16 + - *arm-fp16 - *neon-unstable-f16 - *target-not-arm64ec safety: @@ -3455,7 +3459,7 @@ intrinsics: attr: - *neon-v7 - *target-is-arm - - *neon-fp16 + - *arm-fp16 - FnCall: [cfg_attr, [*test-is-arm, {FnCall: [assert_instr, [vld2]]}]] - *neon-unstable-f16 - *target-not-arm64ec @@ -3486,7 +3490,7 @@ intrinsics: attr: - *target-not-arm - FnCall: [cfg_attr, [*neon-target-aarch64-arm64ec, {FnCall: [assert_instr, [ld2r]]}]] - - *neon-fp16 + - *arm-fp16 - *neon-unstable-f16 - *target-not-arm64ec safety: @@ -3516,7 +3520,7 @@ intrinsics: - *target-is-arm - FnCall: [cfg_attr, [*test-is-arm, {FnCall: [assert_instr, ['vld2', 'LANE = 0']]}]] - FnCall: [rustc_legacy_const_generics, ["2"]] - - *neon-fp16 + - *arm-fp16 - *neon-unstable-f16 - *target-not-arm64ec static_defs: @@ -3559,7 +3563,7 @@ intrinsics: - *target-not-arm - FnCall: [cfg_attr, [*neon-target-aarch64-arm64ec, {FnCall: [assert_instr, [ld2, 'LANE = 0']]}]] - FnCall: [rustc_legacy_const_generics, ["2"]] - - *neon-fp16 + - *arm-fp16 - *neon-unstable-f16 - *target-not-arm64ec static_defs: @@ -3600,7 +3604,7 @@ intrinsics: - *neon-v7 - *target-is-arm - FnCall: [cfg_attr, [*test-is-arm, {FnCall: [assert_instr, [vld3]]}]] - - *neon-fp16 + - *arm-fp16 - *neon-unstable-f16 - *target-not-arm64ec safety: @@ -3629,7 +3633,7 @@ intrinsics: attr: - *target-not-arm - FnCall: [cfg_attr, [*neon-target-aarch64-arm64ec, {FnCall: [assert_instr, [ld3]]}]] - - *neon-fp16 + - *arm-fp16 - *neon-unstable-f16 - *target-not-arm64ec safety: @@ -3657,7 +3661,7 @@ intrinsics: - *neon-v7 - *target-is-arm - FnCall: [cfg_attr, [*test-is-arm, {FnCall: [assert_instr, [vld3]]}]] - - *neon-fp16 + - *arm-fp16 - *neon-unstable-f16 - *target-not-arm64ec safety: @@ -3687,7 +3691,7 @@ intrinsics: attr: - *target-not-arm - FnCall: [cfg_attr, [*neon-target-aarch64-arm64ec, {FnCall: [assert_instr, [ld3r]]}]] - - *neon-fp16 + - *arm-fp16 - *neon-unstable-f16 - *target-not-arm64ec safety: @@ -3717,7 +3721,7 @@ intrinsics: - *target-is-arm - FnCall: [cfg_attr, [*test-is-arm, {FnCall: [assert_instr, ['vld3', 'LANE = 0']]}]] - FnCall: [rustc_legacy_const_generics, ["2"]] - - *neon-fp16 + - *arm-fp16 - *neon-unstable-f16 - *target-not-arm64ec static_defs: @@ -3762,7 +3766,7 @@ intrinsics: - *target-not-arm - FnCall: [cfg_attr, [*neon-target-aarch64-arm64ec, {FnCall: [assert_instr, [ld3, 'LANE = 0']]}]] - FnCall: [rustc_legacy_const_generics, ["2"]] - - *neon-fp16 + - *arm-fp16 - *neon-unstable-f16 - *target-not-arm64ec static_defs: @@ -4744,7 +4748,7 @@ intrinsics: - FnCall: [cfg_attr, [*test-is-arm, {FnCall: [assert_instr, [nop, 'LANE = 0']]}]] - FnCall: [cfg_attr, [*neon-target-aarch64-arm64ec, {FnCall: [assert_instr, [nop, 'LANE = 0']]}]] - FnCall: [rustc_legacy_const_generics, ["2"]] - - *neon-fp16 + - *arm-fp16 - *neon-unstable-f16 - *target-not-arm64ec types: @@ -4982,7 +4986,7 @@ intrinsics: attr: - *target-is-arm - *neon-v7 - - *neon-fp16 + - *arm-fp16 - *neon-unstable-f16 - *target-not-arm64ec assert_instr: [vst1] @@ -5126,7 +5130,7 @@ intrinsics: arguments: ["a: *mut {type[0]}", "b: {neon_type[1]}"] attr: - *target-not-arm - - *neon-fp16 + - *arm-fp16 - *neon-unstable-f16 - *target-not-arm64ec assert_instr: [st2] @@ -5217,7 +5221,7 @@ intrinsics: - *target-not-arm - FnCall: [rustc_legacy_const_generics, ['2']] - FnCall: [cfg_attr, [test, {FnCall: [assert_instr, [st2, 'LANE = 0']]}]] - - *neon-fp16 + - *arm-fp16 - *neon-unstable-f16 - *target-not-arm64ec static_defs: ['const LANE: i32'] @@ -5309,7 +5313,7 @@ intrinsics: attr: - *target-is-arm - *neon-v7 - - *neon-fp16 + - *arm-fp16 - *neon-unstable-f16 - *target-not-arm64ec assert_instr: [vst2] @@ -5376,7 +5380,7 @@ intrinsics: - *neon-v7 - FnCall: [cfg_attr, [test, {FnCall: [assert_instr, [vst2, 'LANE = 0']]}]] - FnCall: [rustc_legacy_const_generics, ['2']] - - *neon-fp16 + - *arm-fp16 - *neon-unstable-f16 - *target-not-arm64ec static_defs: ['const LANE: i32'] @@ -5587,7 +5591,7 @@ intrinsics: attr: - *target-is-arm - *neon-v7 - - *neon-fp16 + - *arm-fp16 - *neon-unstable-f16 - *target-not-arm64ec assert_instr: [vst3] @@ -5656,7 +5660,7 @@ intrinsics: - *neon-v7 - FnCall: [cfg_attr, [test, {FnCall: [assert_instr, [vst3, 'LANE = 0']]}]] - FnCall: [rustc_legacy_const_generics, ['2']] - - *neon-fp16 + - *arm-fp16 - *neon-unstable-f16 - *target-not-arm64ec static_defs: ['const LANE: i32'] @@ -5717,7 +5721,7 @@ intrinsics: arguments: ["a: *mut {type[0]}", "b: {neon_type[1]}"] attr: - *target-not-arm - - *neon-fp16 + - *arm-fp16 - *neon-unstable-f16 - *target-not-arm64ec assert_instr: [st3] @@ -5782,7 +5786,7 @@ intrinsics: - *target-not-arm - FnCall: [rustc_legacy_const_generics, ['2']] - FnCall: [cfg_attr, [test, {FnCall: [assert_instr, [st3, 'LANE = 0']]}]] - - *neon-fp16 + - *arm-fp16 - *neon-unstable-f16 - *target-not-arm64ec static_defs: ['const LANE: i32'] @@ -5996,7 +6000,7 @@ intrinsics: attr: - *target-is-arm - *neon-v7 - - *neon-fp16 + - *arm-fp16 - *neon-unstable-f16 - *target-not-arm64ec assert_instr: [vst4] @@ -6066,7 +6070,7 @@ intrinsics: - *neon-v7 - FnCall: [cfg_attr, [test, {FnCall: [assert_instr, [vst4, 'LANE = 0']]}]] - FnCall: [rustc_legacy_const_generics, ['2']] - - *neon-fp16 + - *arm-fp16 - *neon-unstable-f16 - *target-not-arm64ec static_defs: ['const LANE: i32'] @@ -6129,7 +6133,7 @@ intrinsics: arguments: ["a: *mut {type[0]}", "b: {neon_type[1]}"] attr: - *target-not-arm - - *neon-fp16 + - *arm-fp16 - *neon-unstable-f16 - *target-not-arm64ec assert_instr: [st4] @@ -6196,7 +6200,7 @@ intrinsics: - *target-not-arm - FnCall: [rustc_legacy_const_generics, ['2']] - FnCall: [cfg_attr, [test, {FnCall: [assert_instr, [st4, 'LANE = 0']]}]] - - *neon-fp16 + - *arm-fp16 - *neon-unstable-f16 - *target-not-arm64ec static_defs: ['const LANE: i32'] @@ -9139,7 +9143,7 @@ intrinsics: - *neon-v7 - FnCall: [cfg_attr, [*test-is-arm, {FnCall: [assert_instr, [nop]]}]] - FnCall: [cfg_attr, [*neon-target-aarch64-arm64ec, {FnCall: [assert_instr, [nop]]}]] - - *neon-fp16 + - *arm-fp16 - *neon-unstable-f16 - *target-not-arm64ec safety: safe @@ -10730,7 +10734,7 @@ intrinsics: - *neon-v7 - FnCall: [cfg_attr, [*test-is-arm, {FnCall: [assert_instr, [vcvt.f16.f32]]}]] - FnCall: [cfg_attr, [*neon-target-aarch64-arm64ec, {FnCall: [assert_instr, [fcvtn]]}]] - - *neon-fp16 + - *arm-fp16 - *neon-unstable-f16 - *target-not-arm64ec safety: safe @@ -10747,7 +10751,7 @@ intrinsics: - *neon-v7 - FnCall: [cfg_attr, [*test-is-arm, {FnCall: [assert_instr, [vcvt]]}]] - FnCall: [cfg_attr, [*neon-target-aarch64-arm64ec, {FnCall: [assert_instr, [fcvtl]]}]] - - *neon-fp16 + - *arm-fp16 - *neon-unstable-f16 - *target-not-arm64ec safety: safe @@ -14055,7 +14059,7 @@ intrinsics: return_type: "{neon_type[1]}" attr: - *neon-v7 - - *neon-fp16 + - *arm-fp16 - *neon-unstable-f16 - *target-not-arm64ec assert_instr: [nop] @@ -14071,7 +14075,7 @@ intrinsics: return_type: "{neon_type[0]}" attr: - *neon-v7 - - *neon-fp16 + - *arm-fp16 - *neon-unstable-f16 - *target-not-arm64ec assert_instr: [nop] @@ -14088,10 +14092,10 @@ intrinsics: return_type: "{type[1]}" attr: - *neon-v7 - - *neon-fp16 - FnCall: [cfg_attr, [*test-is-arm, {FnCall: [assert_instr, [nop, 'LANE = 0']]}]] - FnCall: [cfg_attr, [*neon-target-aarch64-arm64ec, {FnCall: [assert_instr, [nop, 'LANE = 0']]}]] - FnCall: [rustc_legacy_const_generics, ["1"]] + - *arm-fp16 - *neon-unstable-f16 - *target-not-arm64ec static_defs: ['const LANE: i32'] @@ -14111,7 +14115,7 @@ intrinsics: - *neon-v7 - FnCall: [cfg_attr, [*test-is-arm, {FnCall: [assert_instr, ['"vdup.16"']]}]] - FnCall: [cfg_attr, [*neon-target-aarch64-arm64ec, {FnCall: [assert_instr, [dup]]}]] - - *neon-fp16 + - *arm-fp16 - *neon-unstable-f16 - *target-not-arm64ec safety: safe From 48260eb454b21b7d4d571ddfd3ffa6137d91d4dc Mon Sep 17 00:00:00 2001 From: Adam Gemmell Date: Tue, 16 Dec 2025 11:24:11 +0000 Subject: [PATCH 2/2] Fix some Arm instruction assertion tests --- crates/core_arch/src/aarch64/neon/generated.rs | 10 +++++----- crates/core_arch/src/arm_shared/neon/generated.rs | 2 +- crates/stdarch-gen-arm/spec/neon/aarch64.spec.yml | 8 ++++---- crates/stdarch-gen-arm/spec/neon/arm_shared.spec.yml | 2 +- 4 files changed, 11 insertions(+), 11 deletions(-) diff --git a/crates/core_arch/src/aarch64/neon/generated.rs b/crates/core_arch/src/aarch64/neon/generated.rs index f1291c8fbd..0c703916c1 100644 --- a/crates/core_arch/src/aarch64/neon/generated.rs +++ b/crates/core_arch/src/aarch64/neon/generated.rs @@ -9487,7 +9487,7 @@ pub fn vdivq_f64(a: float64x2_t, b: float64x2_t) -> float64x2_t { #[target_feature(enable = "neon,fp16")] #[unstable(feature = "stdarch_neon_f16", issue = "136306")] #[cfg(not(target_arch = "arm64ec"))] -#[cfg_attr(test, assert_instr(nop))] +#[cfg_attr(test, assert_instr(fdiv))] pub fn vdivh_f16(a: f16, b: f16) -> f16 { a / b } @@ -14829,7 +14829,7 @@ pub fn vmuld_lane_f64(a: f64, b: float64x1_t) -> f64 { #[target_feature(enable = "neon,fp16")] #[unstable(feature = "stdarch_neon_f16", issue = "136306")] #[cfg(not(target_arch = "arm64ec"))] -#[cfg_attr(test, assert_instr(nop))] +#[cfg_attr(test, assert_instr(fmul))] pub fn vmulh_f16(a: f16, b: f16) -> f16 { a * b } @@ -26719,7 +26719,7 @@ pub fn vsubq_f64(a: float64x2_t, b: float64x2_t) -> float64x2_t { #[inline] #[target_feature(enable = "neon")] #[stable(feature = "neon_intrinsics", since = "1.59.0")] -#[cfg_attr(test, assert_instr(nop))] +#[cfg_attr(test, assert_instr(sub))] pub fn vsubd_s64(a: i64, b: i64) -> i64 { a.wrapping_sub(b) } @@ -26728,7 +26728,7 @@ pub fn vsubd_s64(a: i64, b: i64) -> i64 { #[inline] #[target_feature(enable = "neon")] #[stable(feature = "neon_intrinsics", since = "1.59.0")] -#[cfg_attr(test, assert_instr(nop))] +#[cfg_attr(test, assert_instr(sub))] pub fn vsubd_u64(a: u64, b: u64) -> u64 { a.wrapping_sub(b) } @@ -26738,7 +26738,7 @@ pub fn vsubd_u64(a: u64, b: u64) -> u64 { #[target_feature(enable = "neon,fp16")] #[unstable(feature = "stdarch_neon_f16", issue = "136306")] #[cfg(not(target_arch = "arm64ec"))] -#[cfg_attr(test, assert_instr(nop))] +#[cfg_attr(test, assert_instr(fsub))] pub fn vsubh_f16(a: f16, b: f16) -> f16 { a - b } diff --git a/crates/core_arch/src/arm_shared/neon/generated.rs b/crates/core_arch/src/arm_shared/neon/generated.rs index cfd9c20186..314965cc20 100644 --- a/crates/core_arch/src/arm_shared/neon/generated.rs +++ b/crates/core_arch/src/arm_shared/neon/generated.rs @@ -8310,7 +8310,7 @@ pub fn vcreate_p64(a: u64) -> poly64x1_t { #[inline] #[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] -# [cfg_attr (all (test , target_arch = "arm") , assert_instr (vcvt . f16 . f32))] +#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vcvt))] #[cfg_attr( all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), assert_instr(fcvtn) diff --git a/crates/stdarch-gen-arm/spec/neon/aarch64.spec.yml b/crates/stdarch-gen-arm/spec/neon/aarch64.spec.yml index f3faf14838..42f716874b 100644 --- a/crates/stdarch-gen-arm/spec/neon/aarch64.spec.yml +++ b/crates/stdarch-gen-arm/spec/neon/aarch64.spec.yml @@ -5669,7 +5669,7 @@ intrinsics: - *neon-fp16 - *neon-unstable-f16 - *target-not-arm64ec - assert_instr: [nop] + assert_instr: [fdiv] safety: safe types: - [f16, 'h'] @@ -5694,7 +5694,7 @@ intrinsics: arguments: ["a: {type[1]}", "b: {type[1]}"] return_type: "{type[1]}" attr: [*neon-stable] - assert_instr: [nop] + assert_instr: [sub] safety: safe types: - ['d_s64', 'i64'] @@ -5710,7 +5710,7 @@ intrinsics: - *neon-fp16 - *neon-unstable-f16 - *target-not-arm64ec - assert_instr: [nop] + assert_instr: [fsub] safety: safe types: - ['h_f16', 'f16'] @@ -11271,7 +11271,7 @@ intrinsics: - *neon-fp16 - *neon-unstable-f16 - *target-not-arm64ec - assert_instr: [nop] + assert_instr: [fmul] safety: safe types: - [f16, 'h'] diff --git a/crates/stdarch-gen-arm/spec/neon/arm_shared.spec.yml b/crates/stdarch-gen-arm/spec/neon/arm_shared.spec.yml index 9727f0a4bb..e8b31d73f9 100644 --- a/crates/stdarch-gen-arm/spec/neon/arm_shared.spec.yml +++ b/crates/stdarch-gen-arm/spec/neon/arm_shared.spec.yml @@ -10732,7 +10732,7 @@ intrinsics: return_type: "{neon_type[1]}" attr: - *neon-v7 - - FnCall: [cfg_attr, [*test-is-arm, {FnCall: [assert_instr, [vcvt.f16.f32]]}]] + - FnCall: [cfg_attr, [*test-is-arm, {FnCall: [assert_instr, [vcvt]]}]] - FnCall: [cfg_attr, [*neon-target-aarch64-arm64ec, {FnCall: [assert_instr, [fcvtn]]}]] - *arm-fp16 - *neon-unstable-f16