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This repository was archived by the owner on Feb 29, 2024. It is now read-only.
Due to 2xXLEN stack alignment, RV32 eabi needs extra compressed instructions to efficiently operate on 8 byte aligned stack, otherwise non compressed instructions will have to be used when limiting stack waste is important.
push/pop with 8 byte stack granularity (probably 3rd imm bit?)- most obvious alternative is to not use push/pop, or use it for 3-4 reg chunks only and handle rest by addi + loads/stores
C(M).ADDI8SP - probably not necessary, push/pop with 8 byte granularity can prepare initial 8 byte allocation for an following addi16sp. Non zcmpe EABI cores may need it.
Due to 2x
XLENstack alignment, RV32 eabi needs extra compressed instructions to efficiently operate on 8 byte aligned stack, otherwise non compressed instructions will have to be used when limiting stack waste is important.push/pop with 8 byte stack granularity (probably 3rd imm bit?)- most obvious alternative is to not use push/pop, or use it for 3-4 reg chunks only and handle rest by
addi+ loads/storesC(M).ADDI8SP- probably not necessary, push/pop with 8 byte granularity can prepare initial 8 byte allocation for an followingaddi16sp. Non zcmpe EABI cores may need it.