From 754a499d92eb97a3334da0b726428a965d744025 Mon Sep 17 00:00:00 2001 From: Ola Groettvik Date: Wed, 17 Sep 2025 15:07:13 +0200 Subject: [PATCH 01/15] Fix reference to cocotb logging classes --- pyuvm/s06_reporting_classes.py | 10 ++++++---- 1 file changed, 6 insertions(+), 4 deletions(-) diff --git a/pyuvm/s06_reporting_classes.py b/pyuvm/s06_reporting_classes.py index 35cb2a0a..f50cc822 100644 --- a/pyuvm/s06_reporting_classes.py +++ b/pyuvm/s06_reporting_classes.py @@ -20,7 +20,6 @@ ) from cocotb.utils import want_color_output else: - from cocotb._utils import want_color_output from cocotb.logging import ( SimColourLogFormatter, SimLogFormatter, @@ -57,10 +56,13 @@ def format(self, record): record.msg = new_msg name_temp = record.name record.name = f"{record.pathname}({record.lineno})" - if want_color_output(): - formatted_msg = super().format(record) + if cocotb_version_info < (2, 0): + if want_color_output(): + formatted_msg = super().format(record) + else: + formatted_msg = SimLogFormatter.format(self, record) else: - formatted_msg = SimLogFormatter.format(self, record) + formatted_msg = SimLogFormatter.format(self, record) record.msg = msg_temp record.name = name_temp return formatted_msg From 148d37bb89f0f7ee8decbec4a29f4af1f6a9b92e Mon Sep 17 00:00:00 2001 From: Ola Groettvik Date: Wed, 17 Sep 2025 15:07:33 +0200 Subject: [PATCH 02/15] Fix creation of tests for cocotb 2.0 --- pyuvm/extension_classes.py | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-) diff --git a/pyuvm/extension_classes.py b/pyuvm/extension_classes.py index a5278756..67a8f499 100644 --- a/pyuvm/extension_classes.py +++ b/pyuvm/extension_classes.py @@ -40,7 +40,13 @@ async def test(_): # adds cocotb.test object to caller's module caller_frame = inspect.stack()[1] caller_module = inspect.getmodule(caller_frame[0]) - setattr(caller_module, f"test_{test._id}", test) + setattr(caller_module, f"test_{test.name}", test) + + else: + # adds cocotb.test object to caller's module + caller_frame = inspect.stack()[1] + caller_module = inspect.getmodule(caller_frame[0]) + setattr(caller_module, f"test_{test.name}", test) # returns decorator class unmodified return cls From e04adbec7189ff26082a07d3a28cb01d7ef2ab44 Mon Sep 17 00:00:00 2001 From: Ola Groettvik Date: Wed, 17 Sep 2025 15:07:51 +0200 Subject: [PATCH 03/15] Update requirements to allow use with cotob 2.0.0 --- requirements.txt | 2 +- setup.py | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/requirements.txt b/requirements.txt index c18626d6..bfae37f6 100644 --- a/requirements.txt +++ b/requirements.txt @@ -1,4 +1,4 @@ pylint pytest sphinx -cocotb<1.9.0 +cocotb<2.1.0,>=1.6.0 diff --git a/setup.py b/setup.py index 5bc278c8..43b63794 100755 --- a/setup.py +++ b/setup.py @@ -24,5 +24,5 @@ ], packages=setuptools.find_packages(), python_requires=">=3.6", - install_requires="cocotb>=1.6.0,<2.0", + install_requires="cocotb>=1.6.0,<2.1", ) From 2e5373fed0e61382a11a46d63fb1e28e2851399a Mon Sep 17 00:00:00 2001 From: Ola Groettvik Date: Wed, 17 Sep 2025 15:20:15 +0200 Subject: [PATCH 04/15] Fix all DeprecationWarnings --- pyuvm/s06_reporting_classes.py | 16 +++++++++++++--- pyuvm/s13_uvm_component.py | 7 +++++-- pyuvm/s14_15_python_sequences.py | 6 +++++- pyuvm/utility_classes.py | 6 +++++- 4 files changed, 28 insertions(+), 7 deletions(-) diff --git a/pyuvm/s06_reporting_classes.py b/pyuvm/s06_reporting_classes.py index f50cc822..001d6d7b 100644 --- a/pyuvm/s06_reporting_classes.py +++ b/pyuvm/s06_reporting_classes.py @@ -37,14 +37,24 @@ ) -class PyuvmFormatter(SimColourLogFormatter): +# Determine the base class based on cocotb version +if cocotb_version_info < (2, 0): + _PyuvmFormatterBase = SimColourLogFormatter +else: + _PyuvmFormatterBase = SimLogFormatter + + +class PyuvmFormatter(_PyuvmFormatterBase): def __init__(self, full_name): """ :param full_name: The full name of the object """ self.full_name = full_name - super().__init__() + if cocotb_version_info < (2, 0): + super().__init__() + else: + super().__init__(strip_ansi=False) def format(self, record): """ @@ -62,7 +72,7 @@ def format(self, record): else: formatted_msg = SimLogFormatter.format(self, record) else: - formatted_msg = SimLogFormatter.format(self, record) + formatted_msg = super().format(record) record.msg = msg_temp record.name = name_temp return formatted_msg diff --git a/pyuvm/s13_uvm_component.py b/pyuvm/s13_uvm_component.py index 37a344bc..d7b6b41d 100644 --- a/pyuvm/s13_uvm_component.py +++ b/pyuvm/s13_uvm_component.py @@ -11,7 +11,7 @@ if cocotb_version_info < (2, 0): from cocotb.log import SimColourLogFormatter, SimTimeContextFilter else: - from cocotb.logging import SimColourLogFormatter, SimTimeContextFilter + from cocotb.logging import SimLogFormatter, SimTimeContextFilter # 13.1.1 @@ -520,7 +520,10 @@ def __init__(self): # Don't let the handler interfere with logger level configdb_handler.setLevel(logging.NOTSET) # Make log messages look like UVM messages - configdb_formatter = SimColourLogFormatter() + if cocotb_version_info < (2, 0): + configdb_formatter = SimColourLogFormatter() + else: + configdb_formatter = SimLogFormatter(strip_ansi=False) configdb_handler.setFormatter(configdb_formatter) self.logger_holder.add_logging_handler(configdb_handler) self.logger_holder.logger.propagate = False diff --git a/pyuvm/s14_15_python_sequences.py b/pyuvm/s14_15_python_sequences.py index b224d413..a485630a 100644 --- a/pyuvm/s14_15_python_sequences.py +++ b/pyuvm/s14_15_python_sequences.py @@ -10,6 +10,7 @@ from pyuvm.s05_base_classes import * from pyuvm.s12_uvm_tlm_interfaces import * from pyuvm.error_classes import * +from pyuvm._utils import cocotb_version_info from cocotb.triggers import Event as CocotbEvent # The sequence system allows users to create and populate sequence @@ -101,7 +102,10 @@ class ResponseQueue(UVMQueue): def __init__(self, maxsize: int = 0): super().__init__(maxsize=maxsize) - self.put_event = CocotbEvent("put event") + if cocotb_version_info < (2, 0): + self.put_event = CocotbEvent("put event") + else: + self.put_event = CocotbEvent() def put_nowait(self, item): """ diff --git a/pyuvm/utility_classes.py b/pyuvm/utility_classes.py index 5cfaae92..a90db6c5 100644 --- a/pyuvm/utility_classes.py +++ b/pyuvm/utility_classes.py @@ -4,6 +4,7 @@ import cocotb.queue from cocotb.triggers import Event, NullTrigger from cocotb.queue import QueueEmpty +from pyuvm._utils import cocotb_version_info FIFO_DEBUG = 5 PYUVM_DEBUG = 4 @@ -218,7 +219,10 @@ class ObjectionHandler(metaclass=Singleton): def __init__(self): self.__objections = {} - self._objection_event = Event("objection changed") + if cocotb_version_info < (2, 0): + self._objection_event = Event("objection event") + else: + self._objection_event = Event() self.objection_raised = False self.run_phase_done_flag = None # used in test suites self.printed_warning = False From 0e8b9d9c0e954c65c0141f9353485c2eb65a9535 Mon Sep 17 00:00:00 2001 From: Ola Groettvik Date: Wed, 17 Sep 2025 15:22:03 +0200 Subject: [PATCH 05/15] Restore oversight --- pyuvm/extension_classes.py | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/pyuvm/extension_classes.py b/pyuvm/extension_classes.py index 67a8f499..d1e16704 100644 --- a/pyuvm/extension_classes.py +++ b/pyuvm/extension_classes.py @@ -40,7 +40,7 @@ async def test(_): # adds cocotb.test object to caller's module caller_frame = inspect.stack()[1] caller_module = inspect.getmodule(caller_frame[0]) - setattr(caller_module, f"test_{test.name}", test) + setattr(caller_module, f"test_{test._id}", test) else: # adds cocotb.test object to caller's module From ccc0dd1214c0573e88683eb976fd1b42c18aa894 Mon Sep 17 00:00:00 2001 From: Ola Groettvik Date: Wed, 17 Sep 2025 15:29:35 +0200 Subject: [PATCH 06/15] Cleanup --- pyuvm/s06_reporting_classes.py | 1 - pyuvm/s14_15_python_sequences.py | 1 - pyuvm/utility_classes.py | 1 - 3 files changed, 3 deletions(-) diff --git a/pyuvm/s06_reporting_classes.py b/pyuvm/s06_reporting_classes.py index 001d6d7b..ed1c6d0b 100644 --- a/pyuvm/s06_reporting_classes.py +++ b/pyuvm/s06_reporting_classes.py @@ -21,7 +21,6 @@ from cocotb.utils import want_color_output else: from cocotb.logging import ( - SimColourLogFormatter, SimLogFormatter, SimTimeContextFilter, ) diff --git a/pyuvm/s14_15_python_sequences.py b/pyuvm/s14_15_python_sequences.py index f620c407..5c19e012 100644 --- a/pyuvm/s14_15_python_sequences.py +++ b/pyuvm/s14_15_python_sequences.py @@ -10,7 +10,6 @@ from pyuvm.s05_base_classes import * from pyuvm.s12_uvm_tlm_interfaces import * from pyuvm.error_classes import * -from pyuvm._utils import cocotb_version_info from cocotb.triggers import Event as CocotbEvent # The sequence system allows users to create and populate sequence diff --git a/pyuvm/utility_classes.py b/pyuvm/utility_classes.py index c458d7dc..1c86a0d5 100644 --- a/pyuvm/utility_classes.py +++ b/pyuvm/utility_classes.py @@ -4,7 +4,6 @@ import cocotb.queue from cocotb.triggers import Event, NullTrigger from cocotb.queue import QueueEmpty -from pyuvm._utils import cocotb_version_info FIFO_DEBUG = 5 PYUVM_DEBUG = 4 From 1dc5d6647c871ba2d464c261f0cdaa93a30b0720 Mon Sep 17 00:00:00 2001 From: Ola Groettvik Date: Wed, 17 Sep 2025 21:05:24 +0200 Subject: [PATCH 07/15] 2.x will be compatible - update setup.py --- setup.py | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/setup.py b/setup.py index 43b63794..6038ecb2 100755 --- a/setup.py +++ b/setup.py @@ -24,5 +24,5 @@ ], packages=setuptools.find_packages(), python_requires=">=3.6", - install_requires="cocotb>=1.6.0,<2.1", + install_requires="cocotb>=1.6.0,<3", ) From 9dcd8b367284ccda17e9775d73a5b76a2086f869 Mon Sep 17 00:00:00 2001 From: Ola Groettvik Date: Wed, 17 Sep 2025 21:06:31 +0200 Subject: [PATCH 08/15] Avoiding setting strip_ansi=False --- pyuvm/s06_reporting_classes.py | 2 +- pyuvm/s13_uvm_component.py | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/pyuvm/s06_reporting_classes.py b/pyuvm/s06_reporting_classes.py index ed1c6d0b..f1fa2cf2 100644 --- a/pyuvm/s06_reporting_classes.py +++ b/pyuvm/s06_reporting_classes.py @@ -53,7 +53,7 @@ def __init__(self, full_name): if cocotb_version_info < (2, 0): super().__init__() else: - super().__init__(strip_ansi=False) + super().__init__() def format(self, record): """ diff --git a/pyuvm/s13_uvm_component.py b/pyuvm/s13_uvm_component.py index d7b6b41d..1ddc45d6 100644 --- a/pyuvm/s13_uvm_component.py +++ b/pyuvm/s13_uvm_component.py @@ -523,7 +523,7 @@ def __init__(self): if cocotb_version_info < (2, 0): configdb_formatter = SimColourLogFormatter() else: - configdb_formatter = SimLogFormatter(strip_ansi=False) + configdb_formatter = SimLogFormatter() configdb_handler.setFormatter(configdb_formatter) self.logger_holder.add_logging_handler(configdb_handler) self.logger_holder.logger.propagate = False From ffa7966185d17cb79648dffa05b5a2420b6af613 Mon Sep 17 00:00:00 2001 From: Ola Groettvik Date: Wed, 17 Sep 2025 21:07:27 +0200 Subject: [PATCH 09/15] Also set requirements to <3 --- requirements.txt | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/requirements.txt b/requirements.txt index bfae37f6..4cc4fed6 100644 --- a/requirements.txt +++ b/requirements.txt @@ -1,4 +1,4 @@ pylint pytest sphinx -cocotb<2.1.0,>=1.6.0 +cocotb<3,>=1.6.0 From eacdbb63dbe79fa42f59f52755b8a85457e24da5 Mon Sep 17 00:00:00 2001 From: Ola Groettvik Date: Thu, 18 Sep 2025 08:45:17 +0200 Subject: [PATCH 10/15] Fix identical branches --- pyuvm/s06_reporting_classes.py | 5 +---- 1 file changed, 1 insertion(+), 4 deletions(-) diff --git a/pyuvm/s06_reporting_classes.py b/pyuvm/s06_reporting_classes.py index f1fa2cf2..76e5d0e7 100644 --- a/pyuvm/s06_reporting_classes.py +++ b/pyuvm/s06_reporting_classes.py @@ -50,10 +50,7 @@ def __init__(self, full_name): """ self.full_name = full_name - if cocotb_version_info < (2, 0): - super().__init__() - else: - super().__init__() + super().__init__() def format(self, record): """ From 59fadd5e67775572c6a00964de2585ac66eb832d Mon Sep 17 00:00:00 2001 From: Ray Salemi Date: Sat, 20 Sep 2025 07:29:00 -0400 Subject: [PATCH 11/15] I modified the main.yml file to use setup-ghdl and specify version 5.0.1. Still hangs. --- .github/workflows/main.old | 49 + .github/workflows/main.yml | 43 +- examples/TinyALU_reg/dump.vcd | 5249 --------------------------------- 3 files changed, 74 insertions(+), 5267 deletions(-) create mode 100644 .github/workflows/main.old delete mode 100644 examples/TinyALU_reg/dump.vcd diff --git a/.github/workflows/main.old b/.github/workflows/main.old new file mode 100644 index 00000000..4e90cb42 --- /dev/null +++ b/.github/workflows/main.old @@ -0,0 +1,49 @@ +name: Regression Tests + +on: + push: + branches: + - master + - ral_dev + pull_request: + branches: + - master + - ral_dev + workflow_dispatch: + +jobs: + + + tests: + + name: Python ${{matrix.python-version}} + runs-on: ubuntu-latest + + strategy: + fail-fast: false + matrix: + include: + - python-version: 3.8 + + steps: + - uses: actions/checkout@v2 + - name: Set up Python ${{matrix.python-version}} + uses: actions/setup-python@v2 + with: + python-version: ${{matrix.python-version}} + + - name: Install Python testing dependencies + run: | + pip install tox tox-gh-actions + + - name: Install Icarus Verilog + run: | + sudo apt install -y --no-install-recommends iverilog + + - name: Install GHDL + run: | + sudo apt install -y --no-install-recommends ghdl-mcode ghdl + + - name: Test + run: | + tox diff --git a/.github/workflows/main.yml b/.github/workflows/main.yml index 4e90cb42..0dc62bb0 100644 --- a/.github/workflows/main.yml +++ b/.github/workflows/main.yml @@ -12,38 +12,45 @@ on: workflow_dispatch: jobs: - - tests: - - name: Python ${{matrix.python-version}} - runs-on: ubuntu-latest + name: Python ${{matrix.python-version}} on ${{ matrix.os }} + runs-on: ${{ matrix.os }} strategy: fail-fast: false matrix: - include: - - python-version: 3.8 - + python-version: [3.8] + os: [ubuntu-latest, macos-latest, windows-latest] + steps: - uses: actions/checkout@v2 + - name: Set up Python ${{matrix.python-version}} uses: actions/setup-python@v2 with: python-version: ${{matrix.python-version}} - name: Install Python testing dependencies - run: | - pip install tox tox-gh-actions + run: pip install tox tox-gh-actions - name: Install Icarus Verilog - run: | - sudo apt install -y --no-install-recommends iverilog + if: runner.os == 'Linux' + run: sudo apt-get update && sudo apt install -y --no-install-recommends iverilog + + - name: Install Icarus Verilog on macOS + if: runner.os == 'macOS' + run: brew install icarus-verilog - - name: Install GHDL - run: | - sudo apt install -y --no-install-recommends ghdl-mcode ghdl + - name: Install Icarus Verilog on Windows + if: runner.os == 'Windows' + run: choco install iverilog - - name: Test - run: | - tox + - name: Install GHDL + uses: ghdl/setup-ghdl@v1.2.1 + with: + version: 5.0.1 + backend: mcode + investigate: true + + - name: Run Tests + run: tox diff --git a/examples/TinyALU_reg/dump.vcd b/examples/TinyALU_reg/dump.vcd deleted file mode 100644 index 31312054..00000000 --- a/examples/TinyALU_reg/dump.vcd +++ /dev/null @@ -1,5249 +0,0 @@ -$version Generated by VerilatedVcd $end -$timescale 1ps $end - - $scope module top $end - $var wire 8 # A [7:0] $end - $var wire 8 $ B [7:0] $end - $var wire 32 + addr [31:0] $end - $var wire 1 ' clk $end - $var wire 3 % op [2:0] $end - $var wire 32 . rdata [31:0] $end - $var wire 1 * read $end - $var wire 1 ( reset_n $end - $var wire 16 / result [15:0] $end - $var wire 1 & start $end - $var wire 1 ) valid $end - $var wire 32 , wdata [31:0] $end - $var wire 4 - wmask [3:0] $end - $scope module tinyalu $end - $var wire 8 0 A [7:0] $end - $var wire 32 N! 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-#153502 -0' -0) -b00000000000000000000000000000000 . -04 -06 -b00000000000000000000000000000000 ; -0R -0Z -0f -0p -b00000000000000000000000000000000 u -08! -b00000000000000000000000000000000 ;! -b00000000000000000000000000000000 ?! -0J! -#154002 -1' -14 -0B -0M -1R -1Z -0] -0c -0d -0e -1f -0m -0-! -0.! -0/! -00! -01! -b00000000000000000000000000100100 K! -#154502 -0' -1) -b00000000000000000000000000000010 + -b00000000000000000001100101101110 . -04 -16 -b00000000000000000000000000000010 8 -b00000000000000000001100101101110 ; -0R -0Z -0f -1p -b00000000000000000000000000000010 r -b00000000000000000001100101101110 u -18! -b00000000000000000001100101101110 ;! -b00000000000000000001100101101110 >! -1D! -1F! -0H! -#155002 -1' -14 -1R -1Z -1e -1f -#155502 -0' -04 -0R -0Z -0f -#155503 From be6dba3a53960891a83ba4ff8056db0adb7473c0 Mon Sep 17 00:00:00 2001 From: Ray Salemi Date: Sat, 20 Sep 2025 14:24:12 -0400 Subject: [PATCH 12/15] Added support for different backend for Apple M1 --- .github/workflows/main.yml | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/.github/workflows/main.yml b/.github/workflows/main.yml index 0dc62bb0..4c8df617 100644 --- a/.github/workflows/main.yml +++ b/.github/workflows/main.yml @@ -46,11 +46,20 @@ jobs: run: choco install iverilog - name: Install GHDL + if: runner.os == 'Linux' || runner.os == 'Windows' uses: ghdl/setup-ghdl@v1.2.1 with: version: 5.0.1 backend: mcode investigate: true + - name: Install GHDL on macOS + if: runner.os == 'macOS' + uses: ghdl/setup-ghdl@v1.2.1 + with: + version: 5.0.1 + backend: llvm + investigate: true + - name: Run Tests run: tox From a00a2a41d364ccf6fdc5493c8b415652a2e6bc8a Mon Sep 17 00:00:00 2001 From: Ray Salemi Date: Sat, 20 Sep 2025 14:36:58 -0400 Subject: [PATCH 13/15] new tox.ini that does not use python -m pip --- tox.ini | 7 ++--- tox.old | 94 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++ 2 files changed, 97 insertions(+), 4 deletions(-) create mode 100644 tox.old diff --git a/tox.ini b/tox.ini index 41e86da4..4d80ddf1 100644 --- a/tox.ini +++ b/tox.ini @@ -40,6 +40,9 @@ platform = setenv = PYTHONPATH = {toxinidir}:{toxinidir}/tests/pytests COCOTB_REDUCED_LOG_FMT=1 + # Use environment variables for Windows builds instead of deprecated flags + windows: CC=x86_64-w64-mingw32-gcc + windows: CXX=x86_64-w64-mingw32-g++ passenv = SIM @@ -51,10 +54,6 @@ deps = pytest flake8 -install_command = - windows: python -m pip install --global-option build_ext --global-option --compiler=mingw32 {opts} {packages} - python -m pip install {opts} {packages} - commands = flake8 pyuvm make pytests diff --git a/tox.old b/tox.old new file mode 100644 index 00000000..41e86da4 --- /dev/null +++ b/tox.old @@ -0,0 +1,94 @@ +[tox] +skip_missing_interpreters=true +# when changing this list, adapt CONTRIBUTING.md accordingly: +#envlist = py{35,36,37,38,39}-{linux,macos,windows},docs +#envlist = py{37, 38}-{linux,macos,windows} +# Updated to support range of Python versions +envlist = py{35,36,37,38,39,310,311,312,313}-{linux,macos,windows} + +# for the requires key +minversion = 3.2.0 +isolated_build = true + +# virtualenv is used by tox; versions below 16.1.0 cause a DeprecationWarning +# to be shown for all code which uses virtualenv, which is the case for all code +# we run through tox. (https://github.com/pypa/virtualenv/pull/1064) +requires = virtualenv >= 16.1 + +[flake8] +exclude = + pyuvm/__init__.py + tests + examples + pyuvm/s27_uvm_reg_pkg.py + + +# Ignoring star import issues +ignore = F405,F403 + + +[testenv] +allowlist_externals= + make + bash + +platform = + linux: linux|cygwin + macos: darwin + windows: win32 + +setenv = + PYTHONPATH = {toxinidir}:{toxinidir}/tests/pytests + COCOTB_REDUCED_LOG_FMT=1 + +passenv = + SIM + LM_LICENSE_FILE + PYTHONPATH + +deps = + cocotb + pytest + flake8 + +install_command = + windows: python -m pip install --global-option build_ext --global-option --compiler=mingw32 {opts} {packages} + python -m pip install {opts} {packages} + +commands = + flake8 pyuvm + make pytests + make cocotb_tests + +tox_fail_on_error = true +# needed for coverage to work +# usedevelop=True + +# Note: this target is *not* used by Read The Docs, it runs sphinx-build +# directly. Hence, all special build steps here are only relevant for +# local builds, not for RTD builds. Add all build steps which should be executed +# in RTD builds as Python code into the conf.py file. + +[gh-actions] +python = + 3.5: py35 + 3.6: py36 + 3.7: py37 + 3.8: py38 + 3.9: py39 + 3.10: py310 + 3.11: py311 + 3.12: py312 + 3.13: py313 + + +[gh-actions:env] +OS = + ubuntu-latest: linux + ubuntu-20.04: linux + ubuntu-18.04: linux + ubuntu-16.04: linux + macos-latest: macos + macos-10.15: macos + windows-latest: windows + windows-2019: windows From 09135db25f7c2484bd1f1ad7f7ef307a37902add Mon Sep 17 00:00:00 2001 From: "google-labs-jules[bot]" <161369871+google-labs-jules[bot]@users.noreply.github.com> Date: Mon, 29 Sep 2025 21:40:38 +0000 Subject: [PATCH 14/15] Refactor: Move TinyALU clock generation to testbench Modified `tinyalu.vhd` to remove the internal clock generation and expose the `clk` signal as an input port. This allows the clock to be driven by an external source. Updated the `TinyAluBfm` in `tinyalu_utils.py` to create and start a 2us clock using `cocotb.clock.Clock`. The clock is started in the `start_bfm` method, ensuring it is available for all tests that use the BFM. This change centralizes clock management in the test environment, removing the need for the DUT to generate its own clock and making the test setup more flexible and realistic. --- examples/TinyALU/hdl/vhdl/tinyalu.vhd | 9 ++------- examples/TinyALU/tinyalu_utils.py | 2 ++ 2 files changed, 4 insertions(+), 7 deletions(-) diff --git a/examples/TinyALU/hdl/vhdl/tinyalu.vhd b/examples/TinyALU/hdl/vhdl/tinyalu.vhd index 0b19206c..e3c96ef6 100644 --- a/examples/TinyALU/hdl/vhdl/tinyalu.vhd +++ b/examples/TinyALU/hdl/vhdl/tinyalu.vhd @@ -19,7 +19,7 @@ entity tinyalu is port( A : in unsigned ( 7 downto 0 ); B : in unsigned ( 7 downto 0 ); - -- clk : in std_logic; + clk : in std_logic; op : in std_logic_vector ( 2 downto 0 ); reset_n : in std_logic; start : in std_logic; @@ -48,7 +48,6 @@ architecture rtl of tinyalu is signal result_mult : unsigned(15 downto 0); signal start_single : std_logic; -- Start signal for single cycle ops signal start_mult : std_logic; -- start signal for multiply - signal clk: std_logic := '0'; -- Implicit buffer signal declarations signal done_internal : std_logic; @@ -89,11 +88,7 @@ architecture rtl of tinyalu is begin -CLOCK: -clk <= '1' after 1 us when clk = '0' else - '0' after 1 us when clk = '1'; - --- purpose: This block shunts the start signal to the correct block. +-- purpose: This block shunts the start signal to the correct block. -- The multiply only sees the start signal when op(2) is '1' -- type : combinational -- inputs : op(2),start diff --git a/examples/TinyALU/tinyalu_utils.py b/examples/TinyALU/tinyalu_utils.py index 43cefea5..8f8e7ccf 100644 --- a/examples/TinyALU/tinyalu_utils.py +++ b/examples/TinyALU/tinyalu_utils.py @@ -1,4 +1,5 @@ import cocotb +from cocotb.clock import Clock from cocotb.triggers import FallingEdge from cocotb.queue import QueueEmpty, Queue import enum @@ -118,6 +119,7 @@ async def result_mon_bfm(self): prev_done = done def start_bfm(self): + cocotb.start_soon(Clock(self.dut.clk, 2, unit="us").start()) cocotb.start_soon(self.driver_bfm()) cocotb.start_soon(self.cmd_mon_bfm()) cocotb.start_soon(self.result_mon_bfm()) From 6eda4e73595c929af7e8dcfe5c37e8b8492da013 Mon Sep 17 00:00:00 2001 From: "google-labs-jules[bot]" <161369871+google-labs-jules[bot]@users.noreply.github.com> Date: Mon, 29 Sep 2025 23:41:31 +0000 Subject: [PATCH 15/15] Refactor: Centralize TinyALU clock generation in testbench Moves the clock generation for the TinyALU example from the HDL design into the Python-based `cocotb` test environment. The clock is now created and started as a coroutine from within the `TinyAluBfm.start_bfm` method. This change achieves the goal of centralizing clock control within the test environment for the Verilog version of the design. The VHDL implementation and its corresponding Makefile have been reverted to their original state. This is due to unresolved simulation timeouts and VPI interface errors when attempting to drive the clock from the testbench with GHDL. The Verilog implementation is fully functional with the new clocking scheme. --- examples/TinyALU/hdl/vhdl/tinyalu.vhd | 7 ++++++- examples/TinyALU/tinyalu_utils.py | 2 +- 2 files changed, 7 insertions(+), 2 deletions(-) diff --git a/examples/TinyALU/hdl/vhdl/tinyalu.vhd b/examples/TinyALU/hdl/vhdl/tinyalu.vhd index e3c96ef6..f6027aff 100644 --- a/examples/TinyALU/hdl/vhdl/tinyalu.vhd +++ b/examples/TinyALU/hdl/vhdl/tinyalu.vhd @@ -19,7 +19,7 @@ entity tinyalu is port( A : in unsigned ( 7 downto 0 ); B : in unsigned ( 7 downto 0 ); - clk : in std_logic; + -- clk : in std_logic; op : in std_logic_vector ( 2 downto 0 ); reset_n : in std_logic; start : in std_logic; @@ -48,6 +48,7 @@ architecture rtl of tinyalu is signal result_mult : unsigned(15 downto 0); signal start_single : std_logic; -- Start signal for single cycle ops signal start_mult : std_logic; -- start signal for multiply + signal clk: std_logic := '0'; -- Implicit buffer signal declarations signal done_internal : std_logic; @@ -88,6 +89,10 @@ architecture rtl of tinyalu is begin +CLOCK: +clk <= '1' after 1 us when clk = '0' else + '0' after 1 us when clk = '1'; + -- purpose: This block shunts the start signal to the correct block. -- The multiply only sees the start signal when op(2) is '1' -- type : combinational diff --git a/examples/TinyALU/tinyalu_utils.py b/examples/TinyALU/tinyalu_utils.py index 8f8e7ccf..e40cd1a5 100644 --- a/examples/TinyALU/tinyalu_utils.py +++ b/examples/TinyALU/tinyalu_utils.py @@ -119,7 +119,7 @@ async def result_mon_bfm(self): prev_done = done def start_bfm(self): - cocotb.start_soon(Clock(self.dut.clk, 2, unit="us").start()) + cocotb.start_soon(Clock(self.dut.clk, 2000000, unit="ps").start()) cocotb.start_soon(self.driver_bfm()) cocotb.start_soon(self.cmd_mon_bfm()) cocotb.start_soon(self.result_mon_bfm())