diff --git a/Bender.yml b/Bender.yml
index f11e809..db02f4d 100644
--- a/Bender.yml
+++ b/Bender.yml
@@ -23,7 +23,7 @@ package:
 
 dependencies:
   common_cells: { git: "https://github.com/pulp-platform/common_cells.git", version: 1.26.0 }
-  register_interface: { git: "https://github.com/pulp-platform/register_interface.git", version: 0.3.9 }
+  register_interface: { git: "https://github.com/pulp-platform/register_interface.git", version: 0.4.7 }
 
 sources:
   - src/clic_pkg.sv
diff --git a/src/clic_apb.sv b/src/clic_apb.sv
index a833757..1a3d1f9 100644
--- a/src/clic_apb.sv
+++ b/src/clic_apb.sv
@@ -55,13 +55,20 @@ module clic_apb #(
 
 );
 
+  typedef logic [REG_BUS_ADDR_WIDTH-1:0] addr_t;
+  typedef logic [REG_BUS_DATA_WIDTH-1:0] data_t;
+  typedef logic [REG_BUS_DATA_WIDTH/8-1:0] strb_t;
 
-  REG_BUS #(
-    .ADDR_WIDTH (REG_BUS_ADDR_WIDTH),
-    .DATA_WIDTH (REG_BUS_DATA_WIDTH)
-  ) reg_bus (clk_i);
+  `REG_BUS_TYPEDEF_REQ(reg_req_t, addr_t, data_t, strb_t)
+  `REG_BUS_TYPEDEF_RSP(reg_rsp_t, data_t)
 
-  apb_to_reg i_apb_to_reg (
+  reg_req_t clic_req;
+  reg_rsp_t clic_rsp;
+
+  apb_to_reg_v2 #(
+    .reg_req_t ( reg_req_t ),
+    .reg_rsp_t ( reg_rsp_t )
+  ) i_apb_to_reg (
     .clk_i,
     .rst_ni,
     .penable_i,
@@ -72,40 +79,21 @@ module clic_apb #(
     .prdata_o,
     .pready_o,
     .pslverr_o,
-    .reg_o     (reg_bus)
+    .reg_req_o ( clic_req ),
+    .reg_rsp_i ( clic_rsp )
   );
 
-  typedef logic [REG_BUS_ADDR_WIDTH-1:0] addr_t;
-  typedef logic [REG_BUS_DATA_WIDTH-1:0] data_t;
-  typedef logic [REG_BUS_DATA_WIDTH/8-1:0] strb_t;
-
-  `REG_BUS_TYPEDEF_REQ(reg_a32_d32_req_t, addr_t, data_t, strb_t)
-  `REG_BUS_TYPEDEF_RSP(reg_a32_d32_rsp_t, data_t)
-
-  reg_a32_d32_req_t clic_req;
-  reg_a32_d32_rsp_t clic_rsp;
-
-  assign clic_req.addr  = reg_bus.addr;
-  assign clic_req.write = reg_bus.write;
-  assign clic_req.wdata = reg_bus.wdata;
-  assign clic_req.wstrb = reg_bus.wstrb;
-  assign clic_req.valid = reg_bus.valid;
-
-  assign reg_bus.rdata = clic_rsp.rdata;
-  assign reg_bus.error = clic_rsp.error;
-  assign reg_bus.ready = clic_rsp.ready;
-
   clic #(
-    .N_SOURCE  ( N_SOURCE          ),
-    .INTCTLBITS( INTCTLBITS        ),
-    .reg_req_t ( reg_a32_d32_req_t ),
-    .reg_rsp_t ( reg_a32_d32_rsp_t )
+    .N_SOURCE  ( N_SOURCE   ),
+    .INTCTLBITS( INTCTLBITS ),
+    .reg_req_t ( reg_req_t  ),
+    .reg_rsp_t ( reg_rsp_t  )
   ) i_clic (
     .clk_i,
     .rst_ni,
      // Bus Interface
-    .reg_req_i   ( clic_req       ),
-    .reg_rsp_o   ( clic_rsp       ),
+    .reg_req_i   ( clic_req ),
+    .reg_rsp_o   ( clic_rsp ),
     // Interrupt Sources
     .intr_src_i,
     // Interrupt notification to core