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Hi,We tried to run this project on 7+gen3 and found the following error:
[INFO ] Compiled on: Mar 7 2025 at 12:05:31
[INFO ] Load model qwen2 ...
[INFO ] after model init: [Memory(MB)] VMS: 11028, RSS: 522
[INFO ] QNN core API version: 2.22.0
[INFO ] QNN backend API version: 5.29.0
[INFO ] QNN system API version: 1.2.0
[INFO ] QNN backend properties:
[INFO ] - Create context from binary list: Yes
[INFO ] - Dynamic batch: Yes
[INFO ] - Early termination: No
[INFO ] - Dynamic dimensions: Yes
[INFO ] - Blockwise quantization: Unknown
[INFO ] - Blockwise quantization with expansion: Unknown
[INFO ] - Vector quantization: Unknown
[INFO ] - Tensor sparsity: Yes
[INFO ] - Updateable application tensor: Yes
[INFO ] - Updateable native tensor: Yes
[INFO ] - Updateable static tensor: Yes
[INFO ] Hardware device information:
[INFO ] [0] id=0, type=0, num_cores=1, ext_type=0
[INFO ] [0] core[0]: id=0, type=0
[INFO ] [0] on_chip: soc=70, arch=73, dlbc=true, signed_pd=true, vtcm_size=4
[INFO ] Load model model-2025_03_10 from /data/local/tmp/qwen2.5-0.5b-instruct/qwen2.5-0.5b-instruct-model/qnn
[INFO ] Loading "qwen2_0.5b_0.bin"...
[INFO ] load binary file /data/local/tmp/qwen2.5-0.5b-instruct/qwen2.5-0.5b-instruct-model/qnn/qwen2_0.5b_0.bin (size: 730027424) into address space [0x6dafc44000, 0x6ddb4795a0)
QnnDsp <E> Request feature fp16 enable with value 1 unsupported
QnnDsp <E> Failed to register context to device and backend
QnnDsp <E> Failed to create context from binary with err 0x138d
libc++abi: terminating due to uncaught exception of type powerserve::EnvironmentException: [Exception][QNN] BasicException: EnvironmentException
[Exception][QNN] EnvironmentException: failed to create QNN context from binary: /data/local/tmp/qwen2.5-0.5b-instruct/qwen2.5-0.5b-instruct-model/qnn/qwen2_0.5b_0.bin
[Exception][QNN] System error: Success
Aborted
However, the documentation for 7+gen3 shows that its NPU supports fp16:
Qualcomm® AI Engine
• Qualcomm® Adreno™ GPU
• Qualcomm® Kryo™ CPU
• Qualcomm® Hexagon™ NPU
• Fused AI accelerator architecture
• Hexagon scalar, vector, and tensor accelerators
• Hexagon Direct Link
• Support for mix precision (INT8+INT16)
• Support for all precisions (INT4, INT8, INT16, FP16)
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