Doubts about DDR_TRAINING_INIT_ALL_MEMORY in MPFS HAL DDR state machine.

[fcuzzocrea]

Hello, at this line of code of the MPFS HAL, the DDR state machine, if ECC is used, initializes the whole memory with a predefined pattern trough the load_ddr_pattern function. This behavior can also be triggered on non ECC system by defining ENABLE_MEM_INIT_NON_ECC (provided that the code under the ifdef is updated for the load_ddr_pattern API change...).

What is not clear to me is how the mem_size parameter is computed and how it is then used. According to the code, mem_size is computed as:

mem_size = LIBERO_SETTING_CFG_AXI_END_ADDRESS_AXI2_1 +\ (LIBERO_SETTING_CFG_AXI_END_ADDRESS_AXI2_0 + 1U);

In the case we consider the ICICLE Kit, which has 1 gb of memory, the LIBERO_SETTING_CFG_AXI_END_ADDRESS_AXI2_1 is set to 0x00000000UL, while LIBERO_SETTING_CFG_AXI_END_ADDRESS_AXI2_0 is set to 0x7FFFFFFFUL.

If for mem_size is intended the memory size in bytes, the the computation appears to be wrong, as it gives roughly 536 mb instead of 1 GB.

Moreover, on my custom board design which has 2 GB of ram, the LIBERO_SETTING_CFG_AXI_END_ADDRESS_AXI2_0 is also set to 0x7FFFFFFFUL, which makes the computation even more strange for me.

Can you help me ?

Thanks,

Dario

[fcuzzocrea]

Do you have any update on this ?

[fcuzzocrea]

Additionally, the code seems to not work properly. I created a buffer equal to this one, just with a different pattern.

But it seems that every 64 bytes there are 8 bytes which are put to 0 as you can see from the below screenshot I took while looking at the memory with TRACE32: