From 5006c7071165b3db22d9ea4140568172cf58cfe9 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Micha=C5=82=20=C5=BBygowski?= Date: Mon, 7 Jun 2021 14:00:50 +0200 Subject: [PATCH 1/3] src/northbridge/amd/pi/00730F01/acpi/northbridge.asl: remove obsolete device MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Signed-off-by: Michał Żygowski --- src/northbridge/amd/pi/00730F01/acpi/northbridge.asl | 4 ---- 1 file changed, 4 deletions(-) diff --git a/src/northbridge/amd/pi/00730F01/acpi/northbridge.asl b/src/northbridge/amd/pi/00730F01/acpi/northbridge.asl index c0e12b50dc7..a635247b969 100644 --- a/src/northbridge/amd/pi/00730F01/acpi/northbridge.asl +++ b/src/northbridge/amd/pi/00730F01/acpi/northbridge.asl @@ -31,10 +31,6 @@ Device(AMRT) { Name(_ADR, 0x00000000) } /* end AMRT */ -Device(PCSD) { /* Processor configuration space devices */ - Name(_ADR, 0x00180000) /* Dev# = BSP Dev#, Func# = 0 */ -} - /* Gpp 0 */ Device(PBR4) { Name(_ADR, 0x00020001) From c49a28c2f1bcca9d52c218561333af0483ccf4c0 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Micha=C5=82=20=C5=BBygowski?= Date: Mon, 7 Jun 2021 14:01:23 +0200 Subject: [PATCH 2/3] src/southbridge/amd/pi/hudson/acpi: remove non-existent USB hubs MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Signed-off-by: Michał Żygowski --- src/mainboard/pcengines/apu2/acpi/gpe.asl | 43 +++++------------ src/southbridge/amd/pi/hudson/acpi/fch.asl | 1 + src/southbridge/amd/pi/hudson/acpi/usb.asl | 54 ++++------------------ 3 files changed, 21 insertions(+), 77 deletions(-) diff --git a/src/mainboard/pcengines/apu2/acpi/gpe.asl b/src/mainboard/pcengines/apu2/acpi/gpe.asl index 322e1639ef7..e55cc678e64 100644 --- a/src/mainboard/pcengines/apu2/acpi/gpe.asl +++ b/src/mainboard/pcengines/apu2/acpi/gpe.asl @@ -2,44 +2,15 @@ Scope(\_GPE) { /* Start Scope GPE */ - /* General event 3 */ - Method(_L03) { - /* DBGO("\\_GPE\\_L00\n") */ - } - - /* Legacy PM event */ - Method(_L08) { - /* DBGO("\\_GPE\\_L08\n") */ - } - - /* Temp warning (TWarn) event */ - Method(_L09) { - /* DBGO("\\_GPE\\_L09\n") */ - /* Notify (\_TZ.TZ00, 0x80) */ - } - /* USB controller PME# */ Method(_L0B) { /* DBGO("\\_GPE\\_L0B\n") */ - Notify(\_SB.PCI0.UOH1, 0x02) /* NOTIFY_DEVICE_WAKE */ - Notify(\_SB.PCI0.UOH2, 0x02) /* NOTIFY_DEVICE_WAKE */ - Notify(\_SB.PCI0.UOH3, 0x02) /* NOTIFY_DEVICE_WAKE */ - Notify(\_SB.PCI0.UOH4, 0x02) /* NOTIFY_DEVICE_WAKE */ - Notify(\_SB.PCI0.UOH5, 0x02) /* NOTIFY_DEVICE_WAKE */ - Notify(\_SB.PCI0.UOH6, 0x02) /* NOTIFY_DEVICE_WAKE */ + Notify(\_SB.PCI0.EHC1, 0x02) /* NOTIFY_DEVICE_WAKE */ + Notify(\_SB.PCI0.EHC2, 0x02) /* NOTIFY_DEVICE_WAKE */ + Notify(\_SB.PCI0.EHC3, 0x02) /* NOTIFY_DEVICE_WAKE */ Notify(\_SB.PCI0.XHC0, 0x02) /* NOTIFY_DEVICE_WAKE */ } - /* ExtEvent0 SCI event */ - Method(_L10) { - /* DBGO("\\_GPE\\_L10\n") */ - } - - /* ExtEvent1 SCI event */ - Method(_L11) { - /* DBGO("\\_GPE\\_L11\n") */ - } - /* GPIO0 or GEvent8 event */ Method(_L18) { /* DBGO("\\_GPE\\_L18\n") */ @@ -47,5 +18,13 @@ Scope(\_GPE) { /* Start Scope GPE */ Notify(\_SB.PCI0.PBR5, 0x02) /* NOTIFY_DEVICE_WAKE */ Notify(\_SB.PCI0.PBR6, 0x02) /* NOTIFY_DEVICE_WAKE */ Notify(\_SB.PCI0.PBR7, 0x02) /* NOTIFY_DEVICE_WAKE */ + Notify(\_SB.PCI0.PBR8, 0x02) /* NOTIFY_DEVICE_WAKE */ } + + /* SATA Controller PME# */ + Method(_L1E) { + Notify(\_SB.PCI0.STCR, 0x02) /* NOTIFY_DEVICE_WAKE */ + } + + } /* End Scope GPE */ diff --git a/src/southbridge/amd/pi/hudson/acpi/fch.asl b/src/southbridge/amd/pi/hudson/acpi/fch.asl index 88cf47f7ef7..804dbd62752 100644 --- a/src/southbridge/amd/pi/hudson/acpi/fch.asl +++ b/src/southbridge/amd/pi/hudson/acpi/fch.asl @@ -23,6 +23,7 @@ Method(_OSC,4) /* 0:11.0 - SATA */ Device(STCR) { Name(_ADR, 0x00110000) + Name(_PRW, Package() {0x1e, 3}) } /* end STCR */ /* 0:14.0 - SMBUS */ diff --git a/src/southbridge/amd/pi/hudson/acpi/usb.asl b/src/southbridge/amd/pi/hudson/acpi/usb.asl index 741a7b50cbf..855c26b25ef 100644 --- a/src/southbridge/amd/pi/hudson/acpi/usb.asl +++ b/src/southbridge/amd/pi/hudson/acpi/usb.asl @@ -1,61 +1,25 @@ /* SPDX-License-Identifier: GPL-2.0-only */ -/* 0:12.0 - OHCI */ -Device(UOH1) { +/* 0:12.0 - EHCI */ +Device(EHC1) { Name(_ADR, 0x00120000) Name(_PRW, Package() {0x0B, 3}) -} /* end UOH1 */ +} /* end EHC1 */ -/* 0:12.2 - EHCI */ -Device(UOH2) { - Name(_ADR, 0x00120002) - Name(_PRW, Package() {0x0B, 3}) -} /* end UOH2 */ - -/* 0:13.0 - OHCI */ -Device(UOH3) { +/* 0:13.0 - EHCI */ +Device(EHC2) { Name(_ADR, 0x00130000) Name(_PRW, Package() {0x0B, 3}) -} /* end UOH3 */ +} /* end EHC2 */ -/* 0:13.2 - EHCI */ -Device(UOH4) { - Name(_ADR, 0x00130002) - Name(_PRW, Package() {0x0B, 3}) -} /* end UOH4 */ - -/* 0:16.0 - OHCI */ -Device(UOH5) { +/* 0:16.0 - EHCI */ +Device(EHC3) { Name(_ADR, 0x00160000) Name(_PRW, Package() {0x0B, 3}) -} /* end UOH5 */ - -/* 0:16.2 - EHCI */ -Device(UOH6) { - Name(_ADR, 0x00160002) - Name(_PRW, Package() {0x0B, 3}) -} /* end UOH5 */ - -#if !CONFIG(SOUTHBRIDGE_AMD_PI_AVALON) && \ - !CONFIG(SOUTHBRIDGE_AMD_PI_KERN) -/* 0:14.5 - OHCI */ -Device(UEH1) { - Name(_ADR, 0x00140005) - Name(_PRW, Package() {0x0B, 3}) -} /* end UEH1 */ -#endif +} /* end EHC3 */ /* 0:10.0 - XHCI 0*/ Device(XHC0) { Name(_ADR, 0x00100000) Name(_PRW, Package() {0x0B, 4}) } /* end XHC0 */ - -#if !CONFIG(SOUTHBRIDGE_AMD_PI_AVALON) && \ - !CONFIG(SOUTHBRIDGE_AMD_PI_KERN) -/* 0:10.1 - XHCI 1*/ -Device(XHC1) { - Name(_ADR, 0x00100001) - Name(_PRW, Package() {0x0B, 4}) -} /* end XHC1 */ -#endif From 48ab913a6b519ee1395965b76142b35e5d5f7204 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Micha=C5=82=20=C5=BBygowski?= Date: Mon, 7 Jun 2021 14:02:02 +0200 Subject: [PATCH 3/3] src/mainboard/pcengines/apu2/mainboard.c: clear ACPI events MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Signed-off-by: Michał Żygowski --- src/mainboard/pcengines/apu2/mainboard.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/src/mainboard/pcengines/apu2/mainboard.c b/src/mainboard/pcengines/apu2/mainboard.c index ee9983e351b..fb52e89d409 100644 --- a/src/mainboard/pcengines/apu2/mainboard.c +++ b/src/mainboard/pcengines/apu2/mainboard.c @@ -454,6 +454,10 @@ static void mainboard_final(void *chip_info) gpio_set(GPIO_58, 1); gpio_set(GPIO_59, 1); + /* Clear ACPI events */ + outw(inw(ACPI_PM_EVT_BLK), ACPI_PM_EVT_BLK); + outl(inl(ACPI_GPE0_BLK), ACPI_GPE0_BLK); + if (!check_console()) { /*The console is disabled, check if S1 is pressed and enable if so */ #if CONFIG(BOARD_PCENGINES_APU5)