From 45f099dd8e9f5d8f1ba654c8dd7df7cc34f27fe6 Mon Sep 17 00:00:00 2001 From: davide schiavone Date: Sat, 14 Feb 2026 12:48:42 +0100 Subject: [PATCH 1/2] fix #300 --- rtl/cve2_id_stage.sv | 14 ++++++++++---- 1 file changed, 10 insertions(+), 4 deletions(-) diff --git a/rtl/cve2_id_stage.sv b/rtl/cve2_id_stage.sv index f6111ac59..fcddccce2 100644 --- a/rtl/cve2_id_stage.sv +++ b/rtl/cve2_id_stage.sv @@ -284,10 +284,11 @@ module cve2_id_stage #( end end + logic coproc_done; + // CV-X-IF if (XInterface) begin: gen_xif - logic coproc_done; logic [X_INSTR_INFLIGHT-1:0] scoreboard_d, scoreboard_q; id_t x_instr_id_d, x_instr_id_q; @@ -342,8 +343,6 @@ module cve2_id_stage #( assign multicycle_done = lsu_req_dec ? lsu_resp_valid_i : (illegal_insn_dec ? coproc_done : ex_valid_i); - assign coproc_done = (x_issue_valid_o & x_issue_ready_i & ~x_issue_resp_i.writeback) | (x_result_valid_i & x_result_i.we); - // Issue Interface assign x_issue_valid_o = instr_executing & illegal_insn_dec & (id_fsm_q == FIRST_CYCLE) & scoreboard_free; assign x_issue_req_o.instr = instr_rdata_i; @@ -372,7 +371,9 @@ module cve2_id_stage #( x_issue_resp_t unused_x_issue_resp; logic unused_x_result_valid; x_result_t unused_x_result; + logic unused_coproc_done; + assign unused_coproc_done = coproc_done; assign multicycle_done = lsu_req_dec ? lsu_resp_valid_i : ex_valid_i; assign scoreboard_busy = 1'b0; @@ -775,6 +776,7 @@ module cve2_id_stage #( branch_set_raw_d = 1'b0; jump_set_raw = 1'b0; perf_branch_o = 1'b0; + coproc_done = 1'b1; if (instr_executing_spec) begin unique case (id_fsm_q) @@ -827,6 +829,7 @@ module cve2_id_stage #( if(x_issue_resp_i.accept && x_issue_resp_i.writeback) begin id_fsm_d = MULTI_CYCLE; stall_coproc = 1'b1; + coproc_done = 1'b0; end else begin id_fsm_d = FIRST_CYCLE; @@ -853,7 +856,10 @@ module cve2_id_stage #( if(multdiv_en_dec) begin rf_we_raw = rf_we_dec & ex_valid_i; end - + if (illegal_insn_dec && XInterface) begin + coproc_done = x_result_valid_i & x_result_i.we; + rf_we_raw = x_result_valid_i & x_result_i.we; + end if (multicycle_done) begin id_fsm_d = FIRST_CYCLE; end else begin From a4c5516fb6f407876301373b546903e6a8dd2194 Mon Sep 17 00:00:00 2001 From: davide schiavone Date: Wed, 18 Feb 2026 13:19:21 +0100 Subject: [PATCH 2/2] write to RF only during x-if result phase --- rtl/cve2_decoder.sv | 2 -- rtl/cve2_id_stage.sv | 3 +-- 2 files changed, 1 insertion(+), 4 deletions(-) diff --git a/rtl/cve2_decoder.sv b/rtl/cve2_decoder.sv index 7d524f574..9efad2b46 100644 --- a/rtl/cve2_decoder.sv +++ b/rtl/cve2_decoder.sv @@ -91,7 +91,6 @@ module cve2_decoder #( // Core-V eXtension interface (CV-X-IF) input cve2_pkg::readregflags_t x_issue_resp_register_read_i, - input cve2_pkg::writeregflags_t x_issue_resp_writeback_i, // jump/branches output logic jump_in_dec_o, // jump is being calculated in ALU @@ -663,7 +662,6 @@ module cve2_decoder #( if(XInterface) begin rf_ren_a_o = x_issue_resp_register_read_i[0]; rf_ren_b_o = x_issue_resp_register_read_i[1]; - rf_we = x_issue_resp_writeback_i; rf_wdata_sel_o = $bits(rf_wdata_sel_o)'({RF_WD_COPROC}); end end diff --git a/rtl/cve2_id_stage.sv b/rtl/cve2_id_stage.sv index fcddccce2..9fef525d0 100644 --- a/rtl/cve2_id_stage.sv +++ b/rtl/cve2_id_stage.sv @@ -562,7 +562,6 @@ module cve2_id_stage #( // Core-V eXtension Interface (CV-X-IF) .x_issue_resp_register_read_i(x_issue_resp_i.register_read), - .x_issue_resp_writeback_i(x_issue_resp_i.writeback), // jump/branches .jump_in_dec_o (jump_in_dec), @@ -857,7 +856,7 @@ module cve2_id_stage #( rf_we_raw = rf_we_dec & ex_valid_i; end if (illegal_insn_dec && XInterface) begin - coproc_done = x_result_valid_i & x_result_i.we; + coproc_done = x_result_valid_i; rf_we_raw = x_result_valid_i & x_result_i.we; end if (multicycle_done) begin