Question: execute command before generating a project using Vivado

[rafaelnp]

I am using PeakHDL to store synthesis time and date in an AXI4-Subordinate IP Core and have to execute register generation every time the project. containing this IP Core, is generated. The following code is used in a Makefile and performs the register generation successfully.

project:
        # generate sysinfo registers
        $(MAKE) -C ./hdl/ipcores/sysinfo/ all
        fusesoc run --setup --target=synth --no-export $(PROJ_NAME)

I took a look at the hook scripts. and as fas as I understood, they run after the project is generated. I also took a look at #488 and #353 and could not achieve any positive result. Is it possible to achieve what I described above?

FuseSoC version: 2.4.4
OS: Arch Linux - 6.17.2-arch1-1
Vivado: 2021.2

Thanks in advance for any suggestions.

[rbrglez]

Did you try to use generators instead of hooks?
https://fusesoc.readthedocs.io/en/stable/user/build_system/generators.html#

If you can provide a minimal example project with PeakHDL I can help you configure fusesoc generators.

[rafaelnp]

Thanks for the suggestions. Reading the link you sent, I understood the concept, however not the practical side, the implementation. Could you please send me a link to a project using fusesoc + generators?

[rbrglez]

Using this repository I was able to get generators working in FuseSoC. At work, I'm now using them to generate registers.

[rafaelnp]

After a while trying to run the examples, I could achieve no results. Unfortunately there is no documentation. In the FuseSoC the concepts are explained, but there are no examples or mention to which commands should be used to use a generator, in the generators repo.

Could you please provide the commands needed to run the generators examples in the repo you mentioned ?

[rbrglez]

I have created a fork of the FuseSoC generator repository and added a new generator that produces the current date.

You can view the fork here: https://github.com/rbrglez/fusesoc-generators/tree/feature/date

Additionally, I included a minimal README.md showing how to run the generator and generate a VHDL date package.

[rafaelnp]

Am I missing something?

[rbrglez]

yes.
before running fusesoc run command add fusesoc library:

fusesoc library add .

[rafaelnp]

Thanks for you quick reply and for the example, it is very appreciated. I am going to look at it.
One of my difficulties with FuseSoC and Edalize, is the lack of practical examples in their repos, one has to search for it in other repos. I created a gist to summarise what I learnt, it may be useful for you and others:

https://gist.github.com/rafaelnp/54209202b0c2cf6c6871bce932cd5c27