stm32-make/GDB-debugging-F4.txt at main · mphhpm/stm32-make · GitHub

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 display next instruction with:
    set disassemble-next-line on


Entire CFSR
    print/x *(uint32_t *) 0xE000ED28

UsageFault Status Register (UFSR)
    print/x *(uint16_t *)0xE000ED2A

BusFault Status Register (BFSR)
    print/x *(uint8_t *)0xE000ED29

HardFault Status Register (HFSR)
    print/x *(uint32_t *)0xE000ED2C

MemManage Status Register (MMFSR)
    print/x *(uint8_t *)0xE000ED28

MemManage Fault Address (MMFAR)
    print/x *(uint32_t *)0xE000ED34

disassembly of the next instruction
    display/i $pc

print psp, msp, # r0, r1, r2, r3, r12, LR, pc, xPSR
    p/a *(uint32_t[8] *)$psp
    p/a *(uint32_t[8] *)$msp

###########  DMA
dma1 (0x4002 6000), dma2 (0x4002 6400)
S1M0AR
    print/x *(uint32_t *)(0x40026000 + 0x1C + (1*0x18))
S2M0AR
    print/x *(uint32_t *)(0x40026000 + 0x1C + (2*0x18))
LISR2
    print/x *(uint32_t *)(0x40026000 + 0x00)
LISR2
    print/x *(uint32_t *)(0x40026400 + 0x00)


###########  TIM1 (0x4001 0000)
CR1
    print/x *(uint32_t *)(0x40010000 + 0x00)

CR2
    print/x *(uint32_t *)(0x40010000 + 0x04)

SR
    print/x *(uint32_t *)(0x40010000 + 0x10)

CCER
    print/x *(uint32_t *)(0x40010000 + 0x20)

CCMR1
    print/x *(uint32_t *)(0x40010000 + 0x18)

CCMR2
    print/x *(uint32_t *)(0x40010000 + 0x1C)

CCR1
    print/x *(uint32_t *)(0x40010000 + 0x34)

CCR2
    print/x *(uint32_t *)(0x40010000 + 0x38)

CCR3
    print/x *(uint32_t *)(0x40010000 + 0x3C)

CCR4
    print/x *(uint32_t *)(0x40010000 + 0x40)

DIER
    print/x *(uint32_t *)(0x40010000 + 0x0C)