From 6da6ec3952015844bea5de4356ef6bab30aa106e Mon Sep 17 00:00:00 2001
From: tailwheeldriver <34519085+tailwheeldriver@users.noreply.github.com>
Date: Sun, 29 Apr 2018 11:48:44 -0600
Subject: [PATCH] Added a test-board design
Made a design to attach a dra818v to a breadboard, with a power regulator and level shifting mosfets. For easier testing with different UCs
---
DRA818testbed/DRA818testbed-F.Cu.svg | 3088 +++++++++++++++++++
DRA818testbed/DRA818testbed-F.SilkS.svg | 2720 ++++++++++++++++
DRA818testbed/DRA818testbed-cache.lib | 243 ++
DRA818testbed/DRA818testbed.bak | 471 +++
DRA818testbed/DRA818testbed.kicad_pcb | 921 ++++++
DRA818testbed/DRA818testbed.kicad_pcb-bak | 882 ++++++
DRA818testbed/DRA818testbed.net | 329 ++
DRA818testbed/DRA818testbed.pro | 64 +
DRA818testbed/DRA818testbed.sch | 460 +++
DRA818testbed/template.svg | 3420 +++++++++++++++++++++
10 files changed, 12598 insertions(+)
create mode 100644 DRA818testbed/DRA818testbed-F.Cu.svg
create mode 100644 DRA818testbed/DRA818testbed-F.SilkS.svg
create mode 100644 DRA818testbed/DRA818testbed-cache.lib
create mode 100644 DRA818testbed/DRA818testbed.bak
create mode 100644 DRA818testbed/DRA818testbed.kicad_pcb
create mode 100644 DRA818testbed/DRA818testbed.kicad_pcb-bak
create mode 100644 DRA818testbed/DRA818testbed.net
create mode 100644 DRA818testbed/DRA818testbed.pro
create mode 100644 DRA818testbed/DRA818testbed.sch
create mode 100644 DRA818testbed/template.svg
diff --git a/DRA818testbed/DRA818testbed-F.Cu.svg b/DRA818testbed/DRA818testbed-F.Cu.svg
new file mode 100644
index 0000000..ca722f6
--- /dev/null
+++ b/DRA818testbed/DRA818testbed-F.Cu.svg
@@ -0,0 +1,3088 @@
+
+
+
diff --git a/DRA818testbed/DRA818testbed-F.SilkS.svg b/DRA818testbed/DRA818testbed-F.SilkS.svg
new file mode 100644
index 0000000..4c51f52
--- /dev/null
+++ b/DRA818testbed/DRA818testbed-F.SilkS.svg
@@ -0,0 +1,2720 @@
+
+
+
diff --git a/DRA818testbed/DRA818testbed-cache.lib b/DRA818testbed/DRA818testbed-cache.lib
new file mode 100644
index 0000000..dfdecdf
--- /dev/null
+++ b/DRA818testbed/DRA818testbed-cache.lib
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+F1 "+3V3" 0 140 50 H V C CNN
+F2 "" 0 0 50 H I C CNN
+F3 "" 0 0 50 H I C CNN
+ALIAS +3.3V
+DRAW
+P 2 0 1 0 -30 50 0 100 N
+P 2 0 1 0 0 0 0 100 N
+P 2 0 1 0 0 100 30 50 N
+X +3V3 1 0 0 0 U 50 50 1 1 W N
+ENDDRAW
+ENDDEF
+#
+# +5V
+#
+DEF +5V #PWR 0 0 Y Y 1 F P
+F0 "#PWR" 0 -150 50 H I C CNN
+F1 "+5V" 0 140 50 H V C CNN
+F2 "" 0 0 50 H I C CNN
+F3 "" 0 0 50 H I C CNN
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+P 2 0 1 0 0 100 30 50 N
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+$FPLIST
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+$ENDFPLIST
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+ENDDEF
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+F3 "" 0 0 50 H I L CNN
+ALIAS 2N7002 MMBF170
+$FPLIST
+ SOT?23*
+$ENDFPLIST
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+$FPLIST
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+ENDDEF
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+$FPLIST
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+ENDDEF
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+ENDDRAW
+ENDDEF
+#
+# R
+#
+DEF R R 0 0 N Y 1 F N
+F0 "R" 80 0 50 V V C CNN
+F1 "R" 0 0 50 V V C CNN
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+F3 "" 0 0 50 H I C CNN
+$FPLIST
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+X ~ 2 0 -150 50 U 50 50 1 1 P
+ENDDRAW
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+#
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diff --git a/DRA818testbed/DRA818testbed.bak b/DRA818testbed/DRA818testbed.bak
new file mode 100644
index 0000000..cf93239
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+LIBS:device
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+LIBS:relays
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+LIBS:transistors
+LIBS:conn
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+LIBS:regul
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+LIBS:cmos4000
+LIBS:adc-dac
+LIBS:memory
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+LIBS:microcontrollers
+LIBS:dsp
+LIBS:microchip
+LIBS:analog_switches
+LIBS:motorola
+LIBS:texas
+LIBS:intel
+LIBS:audio
+LIBS:interface
+LIBS:digital-audio
+LIBS:philips
+LIBS:display
+LIBS:cypress
+LIBS:siliconi
+LIBS:opto
+LIBS:atmel
+LIBS:contrib
+LIBS:valves
+LIBS:MainWorking
+LIBS:DRA818testbed-cache
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+ 4425 5375 4525 5375
+Wire Wire Line
+ 4525 5375 4525 5325
+$Comp
+L +5V #PWR06
+U 1 1 5AE4E0EE
+P 4025 5275
+F 0 "#PWR06" H 4025 5125 50 0001 C CNN
+F 1 "+5V" H 4025 5415 50 0000 C CNN
+F 2 "" H 4025 5275 50 0001 C CNN
+F 3 "" H 4025 5275 50 0001 C CNN
+ 1 4025 5275
+ 1 0 0 -1
+$EndComp
+Wire Wire Line
+ 4025 5275 4025 5375
+Wire Wire Line
+ 4025 5375 4125 5375
+$Comp
+L +5V #PWR07
+U 1 1 5AE4E186
+P 4675 5375
+F 0 "#PWR07" H 4675 5225 50 0001 C CNN
+F 1 "+5V" H 4675 5515 50 0000 C CNN
+F 2 "" H 4675 5375 50 0001 C CNN
+F 3 "" H 4675 5375 50 0001 C CNN
+ 1 4675 5375
+ -1 0 0 1
+$EndComp
+Wire Wire Line
+ 4775 5275 4675 5275
+Wire Wire Line
+ 4675 5275 4675 5375
+$Comp
+L Conn_01x02 J7
+U 1 1 5AE4E280
+P 4775 5925
+F 0 "J7" H 4775 6025 50 0000 C CNN
+F 1 "5vTTL" H 4775 5725 50 0000 C CNN
+F 2 "Pin_Headers:Pin_Header_Straight_1x02_Pitch2.54mm" H 4775 5925 50 0001 C CNN
+F 3 "" H 4775 5925 50 0001 C CNN
+ 1 4775 5925
+ 0 1 1 0
+$EndComp
+Wire Wire Line
+ 4675 5725 4500 5725
+Wire Wire Line
+ 4500 5725 4500 5375
+Connection ~ 4500 5375
+Wire Wire Line
+ 5125 5725 4775 5725
+Connection ~ 5125 5275
+$Comp
+L +5V #PWR08
+U 1 1 5AE5FD82
+P 5675 1900
+F 0 "#PWR08" H 5675 1750 50 0001 C CNN
+F 1 "+5V" H 5675 2040 50 0000 C CNN
+F 2 "" H 5675 1900 50 0001 C CNN
+F 3 "" H 5675 1900 50 0001 C CNN
+ 1 5675 1900
+ 1 0 0 -1
+$EndComp
+Wire Wire Line
+ 5675 1900 5675 2050
+Connection ~ 5675 2050
+Wire Wire Line
+ 4850 3025 4850 4025
+NoConn ~ 6550 3525
+Wire Wire Line
+ 5025 3325 5150 3325
+Connection ~ 5025 3325
+Wire Wire Line
+ 4925 3475 4925 4525
+NoConn ~ 4800 3325
+NoConn ~ 4800 3225
+NoConn ~ 4800 3425
+$EndSCHEMATC
diff --git a/DRA818testbed/DRA818testbed.kicad_pcb b/DRA818testbed/DRA818testbed.kicad_pcb
new file mode 100644
index 0000000..ca9ef43
--- /dev/null
+++ b/DRA818testbed/DRA818testbed.kicad_pcb
@@ -0,0 +1,921 @@
+(kicad_pcb (version 4) (host pcbnew 4.0.7-e2-6376~58~ubuntu16.04.1)
+
+ (general
+ (links 33)
+ (no_connects 2)
+ (area 0 0 0 0)
+ (thickness 1.6)
+ (drawings 0)
+ (tracks 84)
+ (zones 0)
+ (modules 16)
+ (nets 18)
+ )
+
+ (page A4)
+ (layers
+ (0 F.Cu signal)
+ (31 B.Cu signal)
+ (32 B.Adhes user)
+ (33 F.Adhes user)
+ (34 B.Paste user)
+ (35 F.Paste user)
+ (36 B.SilkS user)
+ (37 F.SilkS user)
+ (38 B.Mask user)
+ (39 F.Mask user)
+ (40 Dwgs.User user)
+ (41 Cmts.User user)
+ (42 Eco1.User user)
+ (43 Eco2.User user)
+ (44 Edge.Cuts user)
+ (45 Margin user)
+ (46 B.CrtYd user)
+ (47 F.CrtYd user)
+ (48 B.Fab user)
+ (49 F.Fab user)
+ )
+
+ (setup
+ (last_trace_width 0.762)
+ (user_trace_width 0.508)
+ (user_trace_width 0.762)
+ (user_trace_width 1.016)
+ (trace_clearance 0.2)
+ (zone_clearance 0.508)
+ (zone_45_only no)
+ (trace_min 0.2)
+ (segment_width 0.2)
+ (edge_width 0.15)
+ (via_size 1.524)
+ (via_drill 0.889)
+ (via_min_size 0.4)
+ (via_min_drill 0.3)
+ (uvia_size 0.3)
+ (uvia_drill 0.1)
+ (uvias_allowed no)
+ (uvia_min_size 0)
+ (uvia_min_drill 0)
+ (pcb_text_width 0.3)
+ (pcb_text_size 1.5 1.5)
+ (mod_edge_width 0.15)
+ (mod_text_size 1 1)
+ (mod_text_width 0.15)
+ (pad_size 1.524 1.524)
+ (pad_drill 0.762)
+ (pad_to_mask_clearance 0.2)
+ (aux_axis_origin 0 0)
+ (visible_elements FFFFEF7F)
+ (pcbplotparams
+ (layerselection 0x00030_80000001)
+ (usegerberextensions false)
+ (excludeedgelayer true)
+ (linewidth 0.100000)
+ (plotframeref false)
+ (viasonmask false)
+ (mode 1)
+ (useauxorigin false)
+ (hpglpennumber 1)
+ (hpglpenspeed 20)
+ (hpglpendiameter 15)
+ (hpglpenoverlay 2)
+ (psnegative false)
+ (psa4output false)
+ (plotreference true)
+ (plotvalue true)
+ (plotinvisibletext false)
+ (padsonsilk false)
+ (subtractmaskfromsilk false)
+ (outputformat 1)
+ (mirror false)
+ (drillshape 1)
+ (scaleselection 1)
+ (outputdirectory ""))
+ )
+
+ (net 0 "")
+ (net 1 GND)
+ (net 2 "Net-(J2-Pad1)")
+ (net 3 "Net-(J2-Pad2)")
+ (net 4 "Net-(J2-Pad3)")
+ (net 5 "Net-(J2-Pad4)")
+ (net 6 "Net-(J2-Pad5)")
+ (net 7 "Net-(J2-Pad6)")
+ (net 8 +3V3)
+ (net 9 "Net-(J6-Pad2)")
+ (net 10 "Net-(J7-Pad1)")
+ (net 11 "Net-(J7-Pad2)")
+ (net 12 "Net-(J8-Pad2)")
+ (net 13 +5V)
+ (net 14 "Net-(J6-Pad1)")
+ (net 15 "Net-(J8-Pad1)")
+ (net 16 "Net-(J3-Pad1)")
+ (net 17 "Net-(J1-Pad1)")
+
+ (net_class Default "This is the default net class."
+ (clearance 0.2)
+ (trace_width 0.25)
+ (via_dia 1.524)
+ (via_drill 0.889)
+ (uvia_dia 0.3)
+ (uvia_drill 0.1)
+ (add_net +3V3)
+ (add_net +5V)
+ (add_net GND)
+ (add_net "Net-(J1-Pad1)")
+ (add_net "Net-(J2-Pad1)")
+ (add_net "Net-(J2-Pad2)")
+ (add_net "Net-(J2-Pad3)")
+ (add_net "Net-(J2-Pad4)")
+ (add_net "Net-(J2-Pad5)")
+ (add_net "Net-(J2-Pad6)")
+ (add_net "Net-(J3-Pad1)")
+ (add_net "Net-(J6-Pad1)")
+ (add_net "Net-(J6-Pad2)")
+ (add_net "Net-(J7-Pad1)")
+ (add_net "Net-(J7-Pad2)")
+ (add_net "Net-(J8-Pad1)")
+ (add_net "Net-(J8-Pad2)")
+ )
+
+ (module Capacitors_THT:C_Disc_D8.0mm_W2.5mm_P5.00mm (layer F.Cu) (tedit 597BC7C2) (tstamp 5ADF816C)
+ (at 163.83 76.454 180)
+ (descr "C, Disc series, Radial, pin pitch=5.00mm, , diameter*width=8*2.5mm^2, Capacitor, http://cdn-reichelt.de/documents/datenblatt/B300/DS_KERKO_TC.pdf")
+ (tags "C Disc series Radial pin pitch 5.00mm diameter 8mm width 2.5mm Capacitor")
+ (path /5ADE7263)
+ (fp_text reference C1 (at 2.5 -2.56 180) (layer F.SilkS)
+ (effects (font (size 1 1) (thickness 0.15)))
+ )
+ (fp_text value 10uf (at 2.5 2.56 180) (layer F.Fab)
+ (effects (font (size 1 1) (thickness 0.15)))
+ )
+ (fp_line (start -1.5 -1.25) (end -1.5 1.25) (layer F.Fab) (width 0.1))
+ (fp_line (start -1.5 1.25) (end 6.5 1.25) (layer F.Fab) (width 0.1))
+ (fp_line (start 6.5 1.25) (end 6.5 -1.25) (layer F.Fab) (width 0.1))
+ (fp_line (start 6.5 -1.25) (end -1.5 -1.25) (layer F.Fab) (width 0.1))
+ (fp_line (start -1.56 -1.31) (end 6.56 -1.31) (layer F.SilkS) (width 0.12))
+ (fp_line (start -1.56 1.31) (end 6.56 1.31) (layer F.SilkS) (width 0.12))
+ (fp_line (start -1.56 -1.31) (end -1.56 1.31) (layer F.SilkS) (width 0.12))
+ (fp_line (start 6.56 -1.31) (end 6.56 1.31) (layer F.SilkS) (width 0.12))
+ (fp_line (start -1.85 -1.6) (end -1.85 1.6) (layer F.CrtYd) (width 0.05))
+ (fp_line (start -1.85 1.6) (end 6.85 1.6) (layer F.CrtYd) (width 0.05))
+ (fp_line (start 6.85 1.6) (end 6.85 -1.6) (layer F.CrtYd) (width 0.05))
+ (fp_line (start 6.85 -1.6) (end -1.85 -1.6) (layer F.CrtYd) (width 0.05))
+ (fp_text user %R (at 2.5 0 180) (layer F.Fab)
+ (effects (font (size 1 1) (thickness 0.15)))
+ )
+ (pad 1 thru_hole circle (at 0 0 180) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask)
+ (net 8 +3V3))
+ (pad 2 thru_hole circle (at 5 0 180) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask)
+ (net 1 GND))
+ (model ${KISYS3DMOD}/Capacitors_THT.3dshapes/C_Disc_D8.0mm_W2.5mm_P5.00mm.wrl
+ (at (xyz 0 0 0))
+ (scale (xyz 1 1 1))
+ (rotate (xyz 0 0 0))
+ )
+ )
+
+ (module Pin_Headers:Pin_Header_Straight_1x06_Pitch2.54mm (layer F.Cu) (tedit 59650532) (tstamp 5ADF8180)
+ (at 144.018 104.14 180)
+ (descr "Through hole straight pin header, 1x06, 2.54mm pitch, single row")
+ (tags "Through hole pin header THT 1x06 2.54mm single row")
+ (path /5ADE6D3C)
+ (fp_text reference J2 (at 0 -2.33 180) (layer F.SilkS)
+ (effects (font (size 1 1) (thickness 0.15)))
+ )
+ (fp_text value Conn_01x06 (at 0 15.03 180) (layer F.Fab)
+ (effects (font (size 1 1) (thickness 0.15)))
+ )
+ (fp_line (start -0.635 -1.27) (end 1.27 -1.27) (layer F.Fab) (width 0.1))
+ (fp_line (start 1.27 -1.27) (end 1.27 13.97) (layer F.Fab) (width 0.1))
+ (fp_line (start 1.27 13.97) (end -1.27 13.97) (layer F.Fab) (width 0.1))
+ (fp_line (start -1.27 13.97) (end -1.27 -0.635) (layer F.Fab) (width 0.1))
+ (fp_line (start -1.27 -0.635) (end -0.635 -1.27) (layer F.Fab) (width 0.1))
+ (fp_line (start -1.33 14.03) (end 1.33 14.03) (layer F.SilkS) (width 0.12))
+ (fp_line (start -1.33 1.27) (end -1.33 14.03) (layer F.SilkS) (width 0.12))
+ (fp_line (start 1.33 1.27) (end 1.33 14.03) (layer F.SilkS) (width 0.12))
+ (fp_line (start -1.33 1.27) (end 1.33 1.27) (layer F.SilkS) (width 0.12))
+ (fp_line (start -1.33 0) (end -1.33 -1.33) (layer F.SilkS) (width 0.12))
+ (fp_line (start -1.33 -1.33) (end 0 -1.33) (layer F.SilkS) (width 0.12))
+ (fp_line (start -1.8 -1.8) (end -1.8 14.5) (layer F.CrtYd) (width 0.05))
+ (fp_line (start -1.8 14.5) (end 1.8 14.5) (layer F.CrtYd) (width 0.05))
+ (fp_line (start 1.8 14.5) (end 1.8 -1.8) (layer F.CrtYd) (width 0.05))
+ (fp_line (start 1.8 -1.8) (end -1.8 -1.8) (layer F.CrtYd) (width 0.05))
+ (fp_text user %R (at 0 6.35 270) (layer F.Fab)
+ (effects (font (size 1 1) (thickness 0.15)))
+ )
+ (pad 1 thru_hole rect (at 0 0 180) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
+ (net 2 "Net-(J2-Pad1)"))
+ (pad 2 thru_hole oval (at 0 2.54 180) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
+ (net 3 "Net-(J2-Pad2)"))
+ (pad 3 thru_hole oval (at 0 5.08 180) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
+ (net 4 "Net-(J2-Pad3)"))
+ (pad 4 thru_hole oval (at 0 7.62 180) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
+ (net 5 "Net-(J2-Pad4)"))
+ (pad 5 thru_hole oval (at 0 10.16 180) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
+ (net 6 "Net-(J2-Pad5)"))
+ (pad 6 thru_hole oval (at 0 12.7 180) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
+ (net 7 "Net-(J2-Pad6)"))
+ (model ${KISYS3DMOD}/Pin_Headers.3dshapes/Pin_Header_Straight_1x06_Pitch2.54mm.wrl
+ (at (xyz 0 0 0))
+ (scale (xyz 1 1 1))
+ (rotate (xyz 0 0 0))
+ )
+ )
+
+ (module Pin_Headers:Pin_Header_Straight_1x01_Pitch2.54mm (layer F.Cu) (tedit 59650532) (tstamp 5ADF8185)
+ (at 169.672 79.502)
+ (descr "Through hole straight pin header, 1x01, 2.54mm pitch, single row")
+ (tags "Through hole pin header THT 1x01 2.54mm single row")
+ (path /5ADE73C1)
+ (fp_text reference J3 (at 0 -2.33) (layer F.SilkS)
+ (effects (font (size 1 1) (thickness 0.15)))
+ )
+ (fp_text value ant (at 0 2.33) (layer F.Fab)
+ (effects (font (size 1 1) (thickness 0.15)))
+ )
+ (fp_line (start -0.635 -1.27) (end 1.27 -1.27) (layer F.Fab) (width 0.1))
+ (fp_line (start 1.27 -1.27) (end 1.27 1.27) (layer F.Fab) (width 0.1))
+ (fp_line (start 1.27 1.27) (end -1.27 1.27) (layer F.Fab) (width 0.1))
+ (fp_line (start -1.27 1.27) (end -1.27 -0.635) (layer F.Fab) (width 0.1))
+ (fp_line (start -1.27 -0.635) (end -0.635 -1.27) (layer F.Fab) (width 0.1))
+ (fp_line (start -1.33 1.33) (end 1.33 1.33) (layer F.SilkS) (width 0.12))
+ (fp_line (start -1.33 1.27) (end -1.33 1.33) (layer F.SilkS) (width 0.12))
+ (fp_line (start 1.33 1.27) (end 1.33 1.33) (layer F.SilkS) (width 0.12))
+ (fp_line (start -1.33 1.27) (end 1.33 1.27) (layer F.SilkS) (width 0.12))
+ (fp_line (start -1.33 0) (end -1.33 -1.33) (layer F.SilkS) (width 0.12))
+ (fp_line (start -1.33 -1.33) (end 0 -1.33) (layer F.SilkS) (width 0.12))
+ (fp_line (start -1.8 -1.8) (end -1.8 1.8) (layer F.CrtYd) (width 0.05))
+ (fp_line (start -1.8 1.8) (end 1.8 1.8) (layer F.CrtYd) (width 0.05))
+ (fp_line (start 1.8 1.8) (end 1.8 -1.8) (layer F.CrtYd) (width 0.05))
+ (fp_line (start 1.8 -1.8) (end -1.8 -1.8) (layer F.CrtYd) (width 0.05))
+ (fp_text user %R (at 0 0 90) (layer F.Fab)
+ (effects (font (size 1 1) (thickness 0.15)))
+ )
+ (pad 1 thru_hole rect (at 0 0) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
+ (net 16 "Net-(J3-Pad1)"))
+ (model ${KISYS3DMOD}/Pin_Headers.3dshapes/Pin_Header_Straight_1x01_Pitch2.54mm.wrl
+ (at (xyz 0 0 0))
+ (scale (xyz 1 1 1))
+ (rotate (xyz 0 0 0))
+ )
+ )
+
+ (module Pin_Headers:Pin_Header_Straight_1x02_Pitch2.54mm (layer F.Cu) (tedit 59650532) (tstamp 5ADF8190)
+ (at 163.068 67.31 180)
+ (descr "Through hole straight pin header, 1x02, 2.54mm pitch, single row")
+ (tags "Through hole pin header THT 1x02 2.54mm single row")
+ (path /5ADF82D9)
+ (fp_text reference J5 (at 0 -2.33 180) (layer F.SilkS)
+ (effects (font (size 1 1) (thickness 0.15)))
+ )
+ (fp_text value Power (at 0 4.87 180) (layer F.Fab)
+ (effects (font (size 1 1) (thickness 0.15)))
+ )
+ (fp_line (start -0.635 -1.27) (end 1.27 -1.27) (layer F.Fab) (width 0.1))
+ (fp_line (start 1.27 -1.27) (end 1.27 3.81) (layer F.Fab) (width 0.1))
+ (fp_line (start 1.27 3.81) (end -1.27 3.81) (layer F.Fab) (width 0.1))
+ (fp_line (start -1.27 3.81) (end -1.27 -0.635) (layer F.Fab) (width 0.1))
+ (fp_line (start -1.27 -0.635) (end -0.635 -1.27) (layer F.Fab) (width 0.1))
+ (fp_line (start -1.33 3.87) (end 1.33 3.87) (layer F.SilkS) (width 0.12))
+ (fp_line (start -1.33 1.27) (end -1.33 3.87) (layer F.SilkS) (width 0.12))
+ (fp_line (start 1.33 1.27) (end 1.33 3.87) (layer F.SilkS) (width 0.12))
+ (fp_line (start -1.33 1.27) (end 1.33 1.27) (layer F.SilkS) (width 0.12))
+ (fp_line (start -1.33 0) (end -1.33 -1.33) (layer F.SilkS) (width 0.12))
+ (fp_line (start -1.33 -1.33) (end 0 -1.33) (layer F.SilkS) (width 0.12))
+ (fp_line (start -1.8 -1.8) (end -1.8 4.35) (layer F.CrtYd) (width 0.05))
+ (fp_line (start -1.8 4.35) (end 1.8 4.35) (layer F.CrtYd) (width 0.05))
+ (fp_line (start 1.8 4.35) (end 1.8 -1.8) (layer F.CrtYd) (width 0.05))
+ (fp_line (start 1.8 -1.8) (end -1.8 -1.8) (layer F.CrtYd) (width 0.05))
+ (fp_text user %R (at 0 1.27 270) (layer F.Fab)
+ (effects (font (size 1 1) (thickness 0.15)))
+ )
+ (pad 1 thru_hole rect (at 0 0 180) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
+ (net 13 +5V))
+ (pad 2 thru_hole oval (at 0 2.54 180) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
+ (net 1 GND))
+ (model ${KISYS3DMOD}/Pin_Headers.3dshapes/Pin_Header_Straight_1x02_Pitch2.54mm.wrl
+ (at (xyz 0 0 0))
+ (scale (xyz 1 1 1))
+ (rotate (xyz 0 0 0))
+ )
+ )
+
+ (module TO_SOT_Packages_SMD:SOT-223-3_TabPin2 (layer F.Cu) (tedit 58CE4E7E) (tstamp 5ADF8243)
+ (at 155.702 69.596 180)
+ (descr "module CMS SOT223 4 pins")
+ (tags "CMS SOT")
+ (path /5ADF804B)
+ (attr smd)
+ (fp_text reference U2 (at 0 -4.5 180) (layer F.SilkS)
+ (effects (font (size 1 1) (thickness 0.15)))
+ )
+ (fp_text value AP1117-33 (at 0 4.5 180) (layer F.Fab)
+ (effects (font (size 1 1) (thickness 0.15)))
+ )
+ (fp_text user %R (at 0 0 270) (layer F.Fab)
+ (effects (font (size 0.8 0.8) (thickness 0.12)))
+ )
+ (fp_line (start 1.91 3.41) (end 1.91 2.15) (layer F.SilkS) (width 0.12))
+ (fp_line (start 1.91 -3.41) (end 1.91 -2.15) (layer F.SilkS) (width 0.12))
+ (fp_line (start 4.4 -3.6) (end -4.4 -3.6) (layer F.CrtYd) (width 0.05))
+ (fp_line (start 4.4 3.6) (end 4.4 -3.6) (layer F.CrtYd) (width 0.05))
+ (fp_line (start -4.4 3.6) (end 4.4 3.6) (layer F.CrtYd) (width 0.05))
+ (fp_line (start -4.4 -3.6) (end -4.4 3.6) (layer F.CrtYd) (width 0.05))
+ (fp_line (start -1.85 -2.35) (end -0.85 -3.35) (layer F.Fab) (width 0.1))
+ (fp_line (start -1.85 -2.35) (end -1.85 3.35) (layer F.Fab) (width 0.1))
+ (fp_line (start -1.85 3.41) (end 1.91 3.41) (layer F.SilkS) (width 0.12))
+ (fp_line (start -0.85 -3.35) (end 1.85 -3.35) (layer F.Fab) (width 0.1))
+ (fp_line (start -4.1 -3.41) (end 1.91 -3.41) (layer F.SilkS) (width 0.12))
+ (fp_line (start -1.85 3.35) (end 1.85 3.35) (layer F.Fab) (width 0.1))
+ (fp_line (start 1.85 -3.35) (end 1.85 3.35) (layer F.Fab) (width 0.1))
+ (pad 2 smd rect (at 3.15 0 180) (size 2 3.8) (layers F.Cu F.Paste F.Mask)
+ (net 8 +3V3))
+ (pad 2 smd rect (at -3.15 0 180) (size 2 1.5) (layers F.Cu F.Paste F.Mask)
+ (net 8 +3V3))
+ (pad 3 smd rect (at -3.15 2.3 180) (size 2 1.5) (layers F.Cu F.Paste F.Mask)
+ (net 13 +5V))
+ (pad 1 smd rect (at -3.15 -2.3 180) (size 2 1.5) (layers F.Cu F.Paste F.Mask)
+ (net 1 GND))
+ (model ${KISYS3DMOD}/TO_SOT_Packages_SMD.3dshapes/SOT-223.wrl
+ (at (xyz 0 0 0))
+ (scale (xyz 1 1 1))
+ (rotate (xyz 0 0 0))
+ )
+ )
+
+ (module MainWorking:DRA818 (layer F.Cu) (tedit 5ADFA6FB) (tstamp 5ADF81A6)
+ (at 142.875 103.505 90)
+ (tags "DRA818 radio module xvcr transmitter transciever receiver vhf uhf")
+ (path /5ADE6CB3)
+ (fp_text reference U1 (at -7.275 13.225 90) (layer F.SilkS)
+ (effects (font (size 1 1) (thickness 0.15)))
+ )
+ (fp_text value DRA818 (at -7.15 10.825 90) (layer F.Fab)
+ (effects (font (size 1 1) (thickness 0.15)))
+ )
+ (fp_line (start -13.775 26.225) (end 21.85 26.175) (layer F.SilkS) (width 0.15))
+ (fp_line (start 21.85 7.1) (end -13.775 7.1) (layer F.SilkS) (width 0.15))
+ (fp_line (start -13.775 7.125) (end -13.775 26.2) (layer F.SilkS) (width 0.15))
+ (fp_line (start 21.844 7.112) (end 21.844 26.162) (layer F.SilkS) (width 0.15))
+ (pad 18 smd rect (at -9.35 26.15 180) (size 3.6 1.8) (layers F.Cu F.Paste F.Mask)
+ (net 17 "Net-(J1-Pad1)"))
+ (pad 17 smd rect (at -4.9 26.15 180) (size 3.6 1.8) (layers F.Cu F.Paste F.Mask)
+ (net 14 "Net-(J6-Pad1)"))
+ (pad 16 smd rect (at -0.45 26.15 180) (size 3.6 1.8) (layers F.Cu F.Paste F.Mask)
+ (net 15 "Net-(J8-Pad1)"))
+ (pad 15 smd rect (at 4 26.15 180) (size 3.6 1.8) (layers F.Cu F.Paste F.Mask))
+ (pad 14 smd rect (at 8.45 26.15 180) (size 3.6 1.8) (layers F.Cu F.Paste F.Mask))
+ (pad 13 smd rect (at 12.9 26.175 180) (size 3.6 1.8) (layers F.Cu F.Paste F.Mask))
+ (pad 12 smd rect (at 17.35 26.175 180) (size 3.6 1.8) (layers F.Cu F.Paste F.Mask)
+ (net 16 "Net-(J3-Pad1)"))
+ (pad 7 smd rect (at 17.4 7.125 180) (size 3.6 1.8) (layers F.Cu F.Paste F.Mask)
+ (net 6 "Net-(J2-Pad5)"))
+ (pad 6 smd rect (at 12.95 7.125 180) (size 3.6 1.8) (layers F.Cu F.Paste F.Mask)
+ (net 5 "Net-(J2-Pad4)"))
+ (pad 5 smd rect (at 8.5 7.1 180) (size 3.6 1.8) (layers F.Cu F.Paste F.Mask)
+ (net 4 "Net-(J2-Pad3)"))
+ (pad 4 smd rect (at 4.05 7.1 180) (size 3.6 1.8) (layers F.Cu F.Paste F.Mask))
+ (pad 3 smd rect (at -0.4 7.1 180) (size 3.6 1.8) (layers F.Cu F.Paste F.Mask)
+ (net 3 "Net-(J2-Pad2)"))
+ (pad 2 smd rect (at -4.85 7.1 180) (size 3.6 1.8) (layers F.Cu F.Paste F.Mask))
+ (pad 1 smd rect (at -9.3 7.1 180) (size 3.6 1.8) (layers F.Cu F.Paste F.Mask)
+ (net 2 "Net-(J2-Pad1)"))
+ (pad 8 smd rect (at 21.825 9.725 180) (size 1.8 3.6) (layers F.Cu F.Paste F.Mask)
+ (net 8 +3V3))
+ (pad 9 smd rect (at 21.85 14.325 180) (size 1.8 3.6) (layers F.Cu F.Paste F.Mask)
+ (net 1 GND))
+ (pad 10 smd rect (at 21.85 18.925 180) (size 1.8 3.6) (layers F.Cu F.Paste F.Mask)
+ (net 1 GND))
+ (pad 11 smd rect (at 21.85 23.525 180) (size 1.8 3.6) (layers F.Cu F.Paste F.Mask))
+ (pad 10 smd rect (at -13.225 10.675 90) (size 1 7) (layers F.Cu F.Paste F.Mask)
+ (net 1 GND))
+ (pad 10 smd trapezoid (at -13.225 23.425 90) (size 1 5.5) (layers F.Cu F.Paste F.Mask)
+ (net 1 GND))
+ )
+
+ (module Pin_Headers:Pin_Header_Straight_1x02_Pitch2.54mm (layer F.Cu) (tedit 59650532) (tstamp 5AE4D6EF)
+ (at 174.244 109.22 90)
+ (descr "Through hole straight pin header, 1x02, 2.54mm pitch, single row")
+ (tags "Through hole pin header THT 1x02 2.54mm single row")
+ (path /5AE4D5AD)
+ (fp_text reference J6 (at 0 -2.33 90) (layer F.SilkS)
+ (effects (font (size 1 1) (thickness 0.15)))
+ )
+ (fp_text value txjump (at 0 4.87 90) (layer F.Fab)
+ (effects (font (size 1 1) (thickness 0.15)))
+ )
+ (fp_line (start -0.635 -1.27) (end 1.27 -1.27) (layer F.Fab) (width 0.1))
+ (fp_line (start 1.27 -1.27) (end 1.27 3.81) (layer F.Fab) (width 0.1))
+ (fp_line (start 1.27 3.81) (end -1.27 3.81) (layer F.Fab) (width 0.1))
+ (fp_line (start -1.27 3.81) (end -1.27 -0.635) (layer F.Fab) (width 0.1))
+ (fp_line (start -1.27 -0.635) (end -0.635 -1.27) (layer F.Fab) (width 0.1))
+ (fp_line (start -1.33 3.87) (end 1.33 3.87) (layer F.SilkS) (width 0.12))
+ (fp_line (start -1.33 1.27) (end -1.33 3.87) (layer F.SilkS) (width 0.12))
+ (fp_line (start 1.33 1.27) (end 1.33 3.87) (layer F.SilkS) (width 0.12))
+ (fp_line (start -1.33 1.27) (end 1.33 1.27) (layer F.SilkS) (width 0.12))
+ (fp_line (start -1.33 0) (end -1.33 -1.33) (layer F.SilkS) (width 0.12))
+ (fp_line (start -1.33 -1.33) (end 0 -1.33) (layer F.SilkS) (width 0.12))
+ (fp_line (start -1.8 -1.8) (end -1.8 4.35) (layer F.CrtYd) (width 0.05))
+ (fp_line (start -1.8 4.35) (end 1.8 4.35) (layer F.CrtYd) (width 0.05))
+ (fp_line (start 1.8 4.35) (end 1.8 -1.8) (layer F.CrtYd) (width 0.05))
+ (fp_line (start 1.8 -1.8) (end -1.8 -1.8) (layer F.CrtYd) (width 0.05))
+ (fp_text user %R (at 0 1.27 180) (layer F.Fab)
+ (effects (font (size 1 1) (thickness 0.15)))
+ )
+ (pad 1 thru_hole rect (at 0 0 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
+ (net 14 "Net-(J6-Pad1)"))
+ (pad 2 thru_hole oval (at 0 2.54 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
+ (net 9 "Net-(J6-Pad2)"))
+ (model ${KISYS3DMOD}/Pin_Headers.3dshapes/Pin_Header_Straight_1x02_Pitch2.54mm.wrl
+ (at (xyz 0 0 0))
+ (scale (xyz 1 1 1))
+ (rotate (xyz 0 0 0))
+ )
+ )
+
+ (module Pin_Headers:Pin_Header_Straight_1x02_Pitch2.54mm (layer F.Cu) (tedit 59650532) (tstamp 5AE4D6F5)
+ (at 182.626 91.948 180)
+ (descr "Through hole straight pin header, 1x02, 2.54mm pitch, single row")
+ (tags "Through hole pin header THT 1x02 2.54mm single row")
+ (path /5AE4E280)
+ (fp_text reference J7 (at 0 -2.33 180) (layer F.SilkS)
+ (effects (font (size 1 1) (thickness 0.15)))
+ )
+ (fp_text value 5vTTL (at 0 4.87 180) (layer F.Fab)
+ (effects (font (size 1 1) (thickness 0.15)))
+ )
+ (fp_line (start -0.635 -1.27) (end 1.27 -1.27) (layer F.Fab) (width 0.1))
+ (fp_line (start 1.27 -1.27) (end 1.27 3.81) (layer F.Fab) (width 0.1))
+ (fp_line (start 1.27 3.81) (end -1.27 3.81) (layer F.Fab) (width 0.1))
+ (fp_line (start -1.27 3.81) (end -1.27 -0.635) (layer F.Fab) (width 0.1))
+ (fp_line (start -1.27 -0.635) (end -0.635 -1.27) (layer F.Fab) (width 0.1))
+ (fp_line (start -1.33 3.87) (end 1.33 3.87) (layer F.SilkS) (width 0.12))
+ (fp_line (start -1.33 1.27) (end -1.33 3.87) (layer F.SilkS) (width 0.12))
+ (fp_line (start 1.33 1.27) (end 1.33 3.87) (layer F.SilkS) (width 0.12))
+ (fp_line (start -1.33 1.27) (end 1.33 1.27) (layer F.SilkS) (width 0.12))
+ (fp_line (start -1.33 0) (end -1.33 -1.33) (layer F.SilkS) (width 0.12))
+ (fp_line (start -1.33 -1.33) (end 0 -1.33) (layer F.SilkS) (width 0.12))
+ (fp_line (start -1.8 -1.8) (end -1.8 4.35) (layer F.CrtYd) (width 0.05))
+ (fp_line (start -1.8 4.35) (end 1.8 4.35) (layer F.CrtYd) (width 0.05))
+ (fp_line (start 1.8 4.35) (end 1.8 -1.8) (layer F.CrtYd) (width 0.05))
+ (fp_line (start 1.8 -1.8) (end -1.8 -1.8) (layer F.CrtYd) (width 0.05))
+ (fp_text user %R (at 0 1.27 270) (layer F.Fab)
+ (effects (font (size 1 1) (thickness 0.15)))
+ )
+ (pad 1 thru_hole rect (at 0 0 180) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
+ (net 10 "Net-(J7-Pad1)"))
+ (pad 2 thru_hole oval (at 0 2.54 180) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
+ (net 11 "Net-(J7-Pad2)"))
+ (model ${KISYS3DMOD}/Pin_Headers.3dshapes/Pin_Header_Straight_1x02_Pitch2.54mm.wrl
+ (at (xyz 0 0 0))
+ (scale (xyz 1 1 1))
+ (rotate (xyz 0 0 0))
+ )
+ )
+
+ (module Pin_Headers:Pin_Header_Straight_1x02_Pitch2.54mm (layer F.Cu) (tedit 59650532) (tstamp 5AE4D6FB)
+ (at 174.244 104.14 90)
+ (descr "Through hole straight pin header, 1x02, 2.54mm pitch, single row")
+ (tags "Through hole pin header THT 1x02 2.54mm single row")
+ (path /5AE4D547)
+ (fp_text reference J8 (at 0 -2.33 90) (layer F.SilkS)
+ (effects (font (size 1 1) (thickness 0.15)))
+ )
+ (fp_text value rxjump (at 0 4.87 90) (layer F.Fab)
+ (effects (font (size 1 1) (thickness 0.15)))
+ )
+ (fp_line (start -0.635 -1.27) (end 1.27 -1.27) (layer F.Fab) (width 0.1))
+ (fp_line (start 1.27 -1.27) (end 1.27 3.81) (layer F.Fab) (width 0.1))
+ (fp_line (start 1.27 3.81) (end -1.27 3.81) (layer F.Fab) (width 0.1))
+ (fp_line (start -1.27 3.81) (end -1.27 -0.635) (layer F.Fab) (width 0.1))
+ (fp_line (start -1.27 -0.635) (end -0.635 -1.27) (layer F.Fab) (width 0.1))
+ (fp_line (start -1.33 3.87) (end 1.33 3.87) (layer F.SilkS) (width 0.12))
+ (fp_line (start -1.33 1.27) (end -1.33 3.87) (layer F.SilkS) (width 0.12))
+ (fp_line (start 1.33 1.27) (end 1.33 3.87) (layer F.SilkS) (width 0.12))
+ (fp_line (start -1.33 1.27) (end 1.33 1.27) (layer F.SilkS) (width 0.12))
+ (fp_line (start -1.33 0) (end -1.33 -1.33) (layer F.SilkS) (width 0.12))
+ (fp_line (start -1.33 -1.33) (end 0 -1.33) (layer F.SilkS) (width 0.12))
+ (fp_line (start -1.8 -1.8) (end -1.8 4.35) (layer F.CrtYd) (width 0.05))
+ (fp_line (start -1.8 4.35) (end 1.8 4.35) (layer F.CrtYd) (width 0.05))
+ (fp_line (start 1.8 4.35) (end 1.8 -1.8) (layer F.CrtYd) (width 0.05))
+ (fp_line (start 1.8 -1.8) (end -1.8 -1.8) (layer F.CrtYd) (width 0.05))
+ (fp_text user %R (at 0 1.27 180) (layer F.Fab)
+ (effects (font (size 1 1) (thickness 0.15)))
+ )
+ (pad 1 thru_hole rect (at 0 0 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
+ (net 15 "Net-(J8-Pad1)"))
+ (pad 2 thru_hole oval (at 0 2.54 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
+ (net 12 "Net-(J8-Pad2)"))
+ (model ${KISYS3DMOD}/Pin_Headers.3dshapes/Pin_Header_Straight_1x02_Pitch2.54mm.wrl
+ (at (xyz 0 0 0))
+ (scale (xyz 1 1 1))
+ (rotate (xyz 0 0 0))
+ )
+ )
+
+ (module TO_SOT_Packages_SMD:SOT-23 (layer F.Cu) (tedit 5AE5F755) (tstamp 5AE4D702)
+ (at 176.657 85.725 90)
+ (descr "SOT-23, Standard")
+ (tags SOT-23)
+ (path /5AE4D897)
+ (attr smd)
+ (fp_text reference Q1 (at -0.254 -4.572 90) (layer F.SilkS)
+ (effects (font (size 1 1) (thickness 0.15)))
+ )
+ (fp_text value BSS138 (at 0 2.5 90) (layer F.Fab)
+ (effects (font (size 1 1) (thickness 0.15)))
+ )
+ (fp_text user %R (at 0 0 180) (layer F.Fab)
+ (effects (font (size 0.5 0.5) (thickness 0.075)))
+ )
+ (fp_line (start -0.7 -0.95) (end -0.7 1.5) (layer F.Fab) (width 0.1))
+ (fp_line (start -0.15 -1.52) (end 0.7 -1.52) (layer F.Fab) (width 0.1))
+ (fp_line (start -0.7 -0.95) (end -0.15 -1.52) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.7 -1.52) (end 0.7 1.52) (layer F.Fab) (width 0.1))
+ (fp_line (start -0.7 1.52) (end 0.7 1.52) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.76 1.58) (end 0.76 0.65) (layer F.SilkS) (width 0.12))
+ (fp_line (start 0.76 -1.58) (end 0.76 -0.65) (layer F.SilkS) (width 0.12))
+ (fp_line (start -1.7 -1.75) (end 1.7 -1.75) (layer F.CrtYd) (width 0.05))
+ (fp_line (start 1.7 -1.75) (end 1.7 1.75) (layer F.CrtYd) (width 0.05))
+ (fp_line (start 1.7 1.75) (end -1.7 1.75) (layer F.CrtYd) (width 0.05))
+ (fp_line (start -1.7 1.75) (end -1.7 -1.75) (layer F.CrtYd) (width 0.05))
+ (fp_line (start 0.76 -1.58) (end -1.4 -1.58) (layer F.SilkS) (width 0.12))
+ (fp_line (start 0.76 1.58) (end -0.7 1.58) (layer F.SilkS) (width 0.12))
+ (pad 1 smd rect (at -1 -0.95 90) (size 0.9 0.8) (layers F.Cu F.Paste F.Mask)
+ (net 8 +3V3))
+ (pad 2 smd rect (at -1 0.95 90) (size 0.9 0.8) (layers F.Cu F.Paste F.Mask)
+ (net 9 "Net-(J6-Pad2)"))
+ (pad 3 smd rect (at 1 0 90) (size 0.9 0.8) (layers F.Cu F.Paste F.Mask)
+ (net 11 "Net-(J7-Pad2)"))
+ (model ${KISYS3DMOD}/TO_SOT_Packages_SMD.3dshapes/SOT-23.wrl
+ (at (xyz 0 0 0))
+ (scale (xyz 1 1 1))
+ (rotate (xyz 0 0 0))
+ )
+ )
+
+ (module TO_SOT_Packages_SMD:SOT-23 (layer F.Cu) (tedit 58CE4E7E) (tstamp 5AE4D709)
+ (at 174.752 92.964 90)
+ (descr "SOT-23, Standard")
+ (tags SOT-23)
+ (path /5AE4D83B)
+ (attr smd)
+ (fp_text reference Q2 (at 0 -2.5 90) (layer F.SilkS)
+ (effects (font (size 1 1) (thickness 0.15)))
+ )
+ (fp_text value BSS138 (at 0 2.5 90) (layer F.Fab)
+ (effects (font (size 1 1) (thickness 0.15)))
+ )
+ (fp_text user %R (at 0 0 180) (layer F.Fab)
+ (effects (font (size 0.5 0.5) (thickness 0.075)))
+ )
+ (fp_line (start -0.7 -0.95) (end -0.7 1.5) (layer F.Fab) (width 0.1))
+ (fp_line (start -0.15 -1.52) (end 0.7 -1.52) (layer F.Fab) (width 0.1))
+ (fp_line (start -0.7 -0.95) (end -0.15 -1.52) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.7 -1.52) (end 0.7 1.52) (layer F.Fab) (width 0.1))
+ (fp_line (start -0.7 1.52) (end 0.7 1.52) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.76 1.58) (end 0.76 0.65) (layer F.SilkS) (width 0.12))
+ (fp_line (start 0.76 -1.58) (end 0.76 -0.65) (layer F.SilkS) (width 0.12))
+ (fp_line (start -1.7 -1.75) (end 1.7 -1.75) (layer F.CrtYd) (width 0.05))
+ (fp_line (start 1.7 -1.75) (end 1.7 1.75) (layer F.CrtYd) (width 0.05))
+ (fp_line (start 1.7 1.75) (end -1.7 1.75) (layer F.CrtYd) (width 0.05))
+ (fp_line (start -1.7 1.75) (end -1.7 -1.75) (layer F.CrtYd) (width 0.05))
+ (fp_line (start 0.76 -1.58) (end -1.4 -1.58) (layer F.SilkS) (width 0.12))
+ (fp_line (start 0.76 1.58) (end -0.7 1.58) (layer F.SilkS) (width 0.12))
+ (pad 1 smd rect (at -1 -0.95 90) (size 0.9 0.8) (layers F.Cu F.Paste F.Mask)
+ (net 8 +3V3))
+ (pad 2 smd rect (at -1 0.95 90) (size 0.9 0.8) (layers F.Cu F.Paste F.Mask)
+ (net 12 "Net-(J8-Pad2)"))
+ (pad 3 smd rect (at 1 0 90) (size 0.9 0.8) (layers F.Cu F.Paste F.Mask)
+ (net 10 "Net-(J7-Pad1)"))
+ (model ${KISYS3DMOD}/TO_SOT_Packages_SMD.3dshapes/SOT-23.wrl
+ (at (xyz 0 0 0))
+ (scale (xyz 1 1 1))
+ (rotate (xyz 0 0 0))
+ )
+ )
+
+ (module Resistors_SMD:R_0805 (layer F.Cu) (tedit 58E0A804) (tstamp 5AE4D70F)
+ (at 176.657 89.535 180)
+ (descr "Resistor SMD 0805, reflow soldering, Vishay (see dcrcw.pdf)")
+ (tags "resistor 0805")
+ (path /5AE4DC2C)
+ (attr smd)
+ (fp_text reference R1 (at 0 -1.65 180) (layer F.SilkS)
+ (effects (font (size 1 1) (thickness 0.15)))
+ )
+ (fp_text value 10k (at 0 1.75 180) (layer F.Fab)
+ (effects (font (size 1 1) (thickness 0.15)))
+ )
+ (fp_text user %R (at 0 0 180) (layer F.Fab)
+ (effects (font (size 0.5 0.5) (thickness 0.075)))
+ )
+ (fp_line (start -1 0.62) (end -1 -0.62) (layer F.Fab) (width 0.1))
+ (fp_line (start 1 0.62) (end -1 0.62) (layer F.Fab) (width 0.1))
+ (fp_line (start 1 -0.62) (end 1 0.62) (layer F.Fab) (width 0.1))
+ (fp_line (start -1 -0.62) (end 1 -0.62) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.6 0.88) (end -0.6 0.88) (layer F.SilkS) (width 0.12))
+ (fp_line (start -0.6 -0.88) (end 0.6 -0.88) (layer F.SilkS) (width 0.12))
+ (fp_line (start -1.55 -0.9) (end 1.55 -0.9) (layer F.CrtYd) (width 0.05))
+ (fp_line (start -1.55 -0.9) (end -1.55 0.9) (layer F.CrtYd) (width 0.05))
+ (fp_line (start 1.55 0.9) (end 1.55 -0.9) (layer F.CrtYd) (width 0.05))
+ (fp_line (start 1.55 0.9) (end -1.55 0.9) (layer F.CrtYd) (width 0.05))
+ (pad 1 smd rect (at -0.95 0 180) (size 0.7 1.3) (layers F.Cu F.Paste F.Mask)
+ (net 9 "Net-(J6-Pad2)"))
+ (pad 2 smd rect (at 0.95 0 180) (size 0.7 1.3) (layers F.Cu F.Paste F.Mask)
+ (net 8 +3V3))
+ (model ${KISYS3DMOD}/Resistors_SMD.3dshapes/R_0805.wrl
+ (at (xyz 0 0 0))
+ (scale (xyz 1 1 1))
+ (rotate (xyz 0 0 0))
+ )
+ )
+
+ (module Resistors_SMD:R_0805 (layer F.Cu) (tedit 58E0A804) (tstamp 5AE4D715)
+ (at 177.038 81.346 90)
+ (descr "Resistor SMD 0805, reflow soldering, Vishay (see dcrcw.pdf)")
+ (tags "resistor 0805")
+ (path /5AE4DF9A)
+ (attr smd)
+ (fp_text reference R2 (at 0 -1.65 90) (layer F.SilkS)
+ (effects (font (size 1 1) (thickness 0.15)))
+ )
+ (fp_text value 10k (at 0 1.75 90) (layer F.Fab)
+ (effects (font (size 1 1) (thickness 0.15)))
+ )
+ (fp_text user %R (at 0 0 90) (layer F.Fab)
+ (effects (font (size 0.5 0.5) (thickness 0.075)))
+ )
+ (fp_line (start -1 0.62) (end -1 -0.62) (layer F.Fab) (width 0.1))
+ (fp_line (start 1 0.62) (end -1 0.62) (layer F.Fab) (width 0.1))
+ (fp_line (start 1 -0.62) (end 1 0.62) (layer F.Fab) (width 0.1))
+ (fp_line (start -1 -0.62) (end 1 -0.62) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.6 0.88) (end -0.6 0.88) (layer F.SilkS) (width 0.12))
+ (fp_line (start -0.6 -0.88) (end 0.6 -0.88) (layer F.SilkS) (width 0.12))
+ (fp_line (start -1.55 -0.9) (end 1.55 -0.9) (layer F.CrtYd) (width 0.05))
+ (fp_line (start -1.55 -0.9) (end -1.55 0.9) (layer F.CrtYd) (width 0.05))
+ (fp_line (start 1.55 0.9) (end 1.55 -0.9) (layer F.CrtYd) (width 0.05))
+ (fp_line (start 1.55 0.9) (end -1.55 0.9) (layer F.CrtYd) (width 0.05))
+ (pad 1 smd rect (at -0.95 0 90) (size 0.7 1.3) (layers F.Cu F.Paste F.Mask)
+ (net 11 "Net-(J7-Pad2)"))
+ (pad 2 smd rect (at 0.95 0 90) (size 0.7 1.3) (layers F.Cu F.Paste F.Mask)
+ (net 13 +5V))
+ (model ${KISYS3DMOD}/Resistors_SMD.3dshapes/R_0805.wrl
+ (at (xyz 0 0 0))
+ (scale (xyz 1 1 1))
+ (rotate (xyz 0 0 0))
+ )
+ )
+
+ (module Resistors_SMD:R_0805 (layer F.Cu) (tedit 58E0A804) (tstamp 5AE4D71B)
+ (at 174.752 96.774 180)
+ (descr "Resistor SMD 0805, reflow soldering, Vishay (see dcrcw.pdf)")
+ (tags "resistor 0805")
+ (path /5AE4DD3C)
+ (attr smd)
+ (fp_text reference R3 (at 0 -1.65 180) (layer F.SilkS)
+ (effects (font (size 1 1) (thickness 0.15)))
+ )
+ (fp_text value 10k (at 0 1.75 180) (layer F.Fab)
+ (effects (font (size 1 1) (thickness 0.15)))
+ )
+ (fp_text user %R (at 0 0 180) (layer F.Fab)
+ (effects (font (size 0.5 0.5) (thickness 0.075)))
+ )
+ (fp_line (start -1 0.62) (end -1 -0.62) (layer F.Fab) (width 0.1))
+ (fp_line (start 1 0.62) (end -1 0.62) (layer F.Fab) (width 0.1))
+ (fp_line (start 1 -0.62) (end 1 0.62) (layer F.Fab) (width 0.1))
+ (fp_line (start -1 -0.62) (end 1 -0.62) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.6 0.88) (end -0.6 0.88) (layer F.SilkS) (width 0.12))
+ (fp_line (start -0.6 -0.88) (end 0.6 -0.88) (layer F.SilkS) (width 0.12))
+ (fp_line (start -1.55 -0.9) (end 1.55 -0.9) (layer F.CrtYd) (width 0.05))
+ (fp_line (start -1.55 -0.9) (end -1.55 0.9) (layer F.CrtYd) (width 0.05))
+ (fp_line (start 1.55 0.9) (end 1.55 -0.9) (layer F.CrtYd) (width 0.05))
+ (fp_line (start 1.55 0.9) (end -1.55 0.9) (layer F.CrtYd) (width 0.05))
+ (pad 1 smd rect (at -0.95 0 180) (size 0.7 1.3) (layers F.Cu F.Paste F.Mask)
+ (net 12 "Net-(J8-Pad2)"))
+ (pad 2 smd rect (at 0.95 0 180) (size 0.7 1.3) (layers F.Cu F.Paste F.Mask)
+ (net 8 +3V3))
+ (model ${KISYS3DMOD}/Resistors_SMD.3dshapes/R_0805.wrl
+ (at (xyz 0 0 0))
+ (scale (xyz 1 1 1))
+ (rotate (xyz 0 0 0))
+ )
+ )
+
+ (module Resistors_SMD:R_0805 (layer F.Cu) (tedit 58E0A804) (tstamp 5AE4D721)
+ (at 173.99 81.346 90)
+ (descr "Resistor SMD 0805, reflow soldering, Vishay (see dcrcw.pdf)")
+ (tags "resistor 0805")
+ (path /5AE4DFCF)
+ (attr smd)
+ (fp_text reference R4 (at 0 -1.65 90) (layer F.SilkS)
+ (effects (font (size 1 1) (thickness 0.15)))
+ )
+ (fp_text value 10k (at 0 1.75 90) (layer F.Fab)
+ (effects (font (size 1 1) (thickness 0.15)))
+ )
+ (fp_text user %R (at 0 0 90) (layer F.Fab)
+ (effects (font (size 0.5 0.5) (thickness 0.075)))
+ )
+ (fp_line (start -1 0.62) (end -1 -0.62) (layer F.Fab) (width 0.1))
+ (fp_line (start 1 0.62) (end -1 0.62) (layer F.Fab) (width 0.1))
+ (fp_line (start 1 -0.62) (end 1 0.62) (layer F.Fab) (width 0.1))
+ (fp_line (start -1 -0.62) (end 1 -0.62) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.6 0.88) (end -0.6 0.88) (layer F.SilkS) (width 0.12))
+ (fp_line (start -0.6 -0.88) (end 0.6 -0.88) (layer F.SilkS) (width 0.12))
+ (fp_line (start -1.55 -0.9) (end 1.55 -0.9) (layer F.CrtYd) (width 0.05))
+ (fp_line (start -1.55 -0.9) (end -1.55 0.9) (layer F.CrtYd) (width 0.05))
+ (fp_line (start 1.55 0.9) (end 1.55 -0.9) (layer F.CrtYd) (width 0.05))
+ (fp_line (start 1.55 0.9) (end -1.55 0.9) (layer F.CrtYd) (width 0.05))
+ (pad 1 smd rect (at -0.95 0 90) (size 0.7 1.3) (layers F.Cu F.Paste F.Mask)
+ (net 10 "Net-(J7-Pad1)"))
+ (pad 2 smd rect (at 0.95 0 90) (size 0.7 1.3) (layers F.Cu F.Paste F.Mask)
+ (net 13 +5V))
+ (model ${KISYS3DMOD}/Resistors_SMD.3dshapes/R_0805.wrl
+ (at (xyz 0 0 0))
+ (scale (xyz 1 1 1))
+ (rotate (xyz 0 0 0))
+ )
+ )
+
+ (module Pin_Headers:Pin_Header_Straight_1x01_Pitch2.54mm (layer F.Cu) (tedit 59650532) (tstamp 5AE60022)
+ (at 176.784 114.3)
+ (descr "Through hole straight pin header, 1x01, 2.54mm pitch, single row")
+ (tags "Through hole pin header THT 1x01 2.54mm single row")
+ (path /5AE60A6D)
+ (fp_text reference J1 (at 0 -2.33) (layer F.SilkS)
+ (effects (font (size 1 1) (thickness 0.15)))
+ )
+ (fp_text value audio (at 0 2.33) (layer F.Fab)
+ (effects (font (size 1 1) (thickness 0.15)))
+ )
+ (fp_line (start -0.635 -1.27) (end 1.27 -1.27) (layer F.Fab) (width 0.1))
+ (fp_line (start 1.27 -1.27) (end 1.27 1.27) (layer F.Fab) (width 0.1))
+ (fp_line (start 1.27 1.27) (end -1.27 1.27) (layer F.Fab) (width 0.1))
+ (fp_line (start -1.27 1.27) (end -1.27 -0.635) (layer F.Fab) (width 0.1))
+ (fp_line (start -1.27 -0.635) (end -0.635 -1.27) (layer F.Fab) (width 0.1))
+ (fp_line (start -1.33 1.33) (end 1.33 1.33) (layer F.SilkS) (width 0.12))
+ (fp_line (start -1.33 1.27) (end -1.33 1.33) (layer F.SilkS) (width 0.12))
+ (fp_line (start 1.33 1.27) (end 1.33 1.33) (layer F.SilkS) (width 0.12))
+ (fp_line (start -1.33 1.27) (end 1.33 1.27) (layer F.SilkS) (width 0.12))
+ (fp_line (start -1.33 0) (end -1.33 -1.33) (layer F.SilkS) (width 0.12))
+ (fp_line (start -1.33 -1.33) (end 0 -1.33) (layer F.SilkS) (width 0.12))
+ (fp_line (start -1.8 -1.8) (end -1.8 1.8) (layer F.CrtYd) (width 0.05))
+ (fp_line (start -1.8 1.8) (end 1.8 1.8) (layer F.CrtYd) (width 0.05))
+ (fp_line (start 1.8 1.8) (end 1.8 -1.8) (layer F.CrtYd) (width 0.05))
+ (fp_line (start 1.8 -1.8) (end -1.8 -1.8) (layer F.CrtYd) (width 0.05))
+ (fp_text user %R (at 0 0 90) (layer F.Fab)
+ (effects (font (size 1 1) (thickness 0.15)))
+ )
+ (pad 1 thru_hole rect (at 0 0) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
+ (net 17 "Net-(J1-Pad1)"))
+ (model ${KISYS3DMOD}/Pin_Headers.3dshapes/Pin_Header_Straight_1x01_Pitch2.54mm.wrl
+ (at (xyz 0 0 0))
+ (scale (xyz 1 1 1))
+ (rotate (xyz 0 0 0))
+ )
+ )
+
+ (segment (start 161.8 81.655) (end 161.8 87.886) (width 0.762) (layer F.Cu) (net 1))
+ (segment (start 158.852 71.896) (end 157.748 71.896) (width 0.762) (layer F.Cu) (net 1))
+ (segment (start 157.748 71.896) (end 156.718 70.866) (width 0.762) (layer F.Cu) (net 1))
+ (segment (start 158.242 64.77) (end 161.865919 64.77) (width 0.762) (layer F.Cu) (net 1))
+ (segment (start 156.718 70.866) (end 156.718 66.294) (width 0.762) (layer F.Cu) (net 1))
+ (segment (start 156.718 66.294) (end 158.242 64.77) (width 0.762) (layer F.Cu) (net 1))
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+ (segment (start 147.438 87.767) (end 149.1 86.105) (width 0.762) (layer F.Cu) (net 6))
+ (segment (start 149.1 86.105) (end 150 86.105) (width 0.762) (layer F.Cu) (net 6))
+ (segment (start 175.707 85.513) (end 175.707 86.725) (width 0.762) (layer F.Cu) (net 8))
+ (segment (start 175.675999 85.481999) (end 175.707 85.513) (width 0.762) (layer F.Cu) (net 8))
+ (segment (start 174.932998 77.396998) (end 175.675999 78.139999) (width 0.762) (layer F.Cu) (net 8))
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+ (segment (start 177.546 91.948) (end 182.626 91.948) (width 0.762) (layer B.Cu) (net 10))
+ (via (at 182.626 91.948) (size 1.524) (drill 0.889) (layers F.Cu B.Cu) (net 10))
+ (via (at 177.546 91.948) (size 1.524) (drill 0.889) (layers F.Cu B.Cu) (net 10))
+ (segment (start 174.752 91.964) (end 177.53 91.964) (width 0.762) (layer F.Cu) (net 10))
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+
+ (zone (net 1) (net_name GND) (layer F.Cu) (tstamp 0) (hatch edge 0.508)
+ (connect_pads yes (clearance 0.508))
+ (min_thickness 0.254)
+ (fill yes (arc_segments 16) (thermal_gap 0.508) (thermal_bridge_width 0.508))
+ (polygon
+ (pts
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diff --git a/DRA818testbed/DRA818testbed.kicad_pcb-bak b/DRA818testbed/DRA818testbed.kicad_pcb-bak
new file mode 100644
index 0000000..0dd8fee
--- /dev/null
+++ b/DRA818testbed/DRA818testbed.kicad_pcb-bak
@@ -0,0 +1,882 @@
+(kicad_pcb (version 4) (host pcbnew 4.0.7-e2-6376~58~ubuntu16.04.1)
+
+ (general
+ (links 39)
+ (no_connects 35)
+ (area 137.365381 64.315999 216.34581 128.289)
+ (thickness 1.6)
+ (drawings 0)
+ (tracks 51)
+ (zones 0)
+ (modules 17)
+ (nets 18)
+ )
+
+ (page A4)
+ (layers
+ (0 F.Cu signal)
+ (31 B.Cu signal)
+ (32 B.Adhes user)
+ (33 F.Adhes user)
+ (34 B.Paste user)
+ (35 F.Paste user)
+ (36 B.SilkS user)
+ (37 F.SilkS user)
+ (38 B.Mask user)
+ (39 F.Mask user)
+ (40 Dwgs.User user)
+ (41 Cmts.User user)
+ (42 Eco1.User user)
+ (43 Eco2.User user)
+ (44 Edge.Cuts user)
+ (45 Margin user)
+ (46 B.CrtYd user)
+ (47 F.CrtYd user)
+ (48 B.Fab user)
+ (49 F.Fab user)
+ )
+
+ (setup
+ (last_trace_width 0.762)
+ (user_trace_width 0.508)
+ (user_trace_width 0.762)
+ (user_trace_width 1.016)
+ (trace_clearance 0.2)
+ (zone_clearance 0.508)
+ (zone_45_only no)
+ (trace_min 0.2)
+ (segment_width 0.2)
+ (edge_width 0.15)
+ (via_size 1.524)
+ (via_drill 0.889)
+ (via_min_size 0.4)
+ (via_min_drill 0.3)
+ (uvia_size 0.3)
+ (uvia_drill 0.1)
+ (uvias_allowed no)
+ (uvia_min_size 0)
+ (uvia_min_drill 0)
+ (pcb_text_width 0.3)
+ (pcb_text_size 1.5 1.5)
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+ (pad_to_mask_clearance 0.2)
+ (aux_axis_origin 0 0)
+ (grid_origin 173.99 76.2)
+ (visible_elements FFFFEF7F)
+ (pcbplotparams
+ (layerselection 0x00030_80000001)
+ (usegerberextensions false)
+ (excludeedgelayer true)
+ (linewidth 0.100000)
+ (plotframeref false)
+ (viasonmask false)
+ (mode 1)
+ (useauxorigin false)
+ (hpglpennumber 1)
+ (hpglpenspeed 20)
+ (hpglpendiameter 15)
+ (hpglpenoverlay 2)
+ (psnegative false)
+ (psa4output false)
+ (plotreference true)
+ (plotvalue true)
+ (plotinvisibletext false)
+ (padsonsilk false)
+ (subtractmaskfromsilk false)
+ (outputformat 1)
+ (mirror false)
+ (drillshape 1)
+ (scaleselection 1)
+ (outputdirectory ""))
+ )
+
+ (net 0 "")
+ (net 1 GND)
+ (net 2 "Net-(J1-Pad2)")
+ (net 3 "Net-(J1-Pad3)")
+ (net 4 "Net-(J1-Pad4)")
+ (net 5 "Net-(J1-Pad5)")
+ (net 6 "Net-(J2-Pad1)")
+ (net 7 "Net-(J2-Pad2)")
+ (net 8 "Net-(J2-Pad3)")
+ (net 9 "Net-(J2-Pad4)")
+ (net 10 "Net-(J2-Pad5)")
+ (net 11 "Net-(J2-Pad6)")
+ (net 12 +3V3)
+ (net 13 "Net-(J6-Pad2)")
+ (net 14 "Net-(J7-Pad1)")
+ (net 15 "Net-(J7-Pad2)")
+ (net 16 "Net-(J8-Pad2)")
+ (net 17 +5V)
+
+ (net_class Default "This is the default net class."
+ (clearance 0.2)
+ (trace_width 0.25)
+ (via_dia 1.524)
+ (via_drill 0.889)
+ (uvia_dia 0.3)
+ (uvia_drill 0.1)
+ (add_net +3V3)
+ (add_net +5V)
+ (add_net GND)
+ (add_net "Net-(J1-Pad2)")
+ (add_net "Net-(J1-Pad3)")
+ (add_net "Net-(J1-Pad4)")
+ (add_net "Net-(J1-Pad5)")
+ (add_net "Net-(J2-Pad1)")
+ (add_net "Net-(J2-Pad2)")
+ (add_net "Net-(J2-Pad3)")
+ (add_net "Net-(J2-Pad4)")
+ (add_net "Net-(J2-Pad5)")
+ (add_net "Net-(J2-Pad6)")
+ (add_net "Net-(J6-Pad2)")
+ (add_net "Net-(J7-Pad1)")
+ (add_net "Net-(J7-Pad2)")
+ (add_net "Net-(J8-Pad2)")
+ )
+
+ (module Capacitors_THT:C_Disc_D8.0mm_W2.5mm_P5.00mm (layer F.Cu) (tedit 597BC7C2) (tstamp 5ADF816C)
+ (at 163.83 76.454 180)
+ (descr "C, Disc series, Radial, pin pitch=5.00mm, , diameter*width=8*2.5mm^2, Capacitor, http://cdn-reichelt.de/documents/datenblatt/B300/DS_KERKO_TC.pdf")
+ (tags "C Disc series Radial pin pitch 5.00mm diameter 8mm width 2.5mm Capacitor")
+ (path /5ADE7263)
+ (fp_text reference C1 (at 2.5 -2.56 180) (layer F.SilkS)
+ (effects (font (size 1 1) (thickness 0.15)))
+ )
+ (fp_text value 10uf (at 2.5 2.56 180) (layer F.Fab)
+ (effects (font (size 1 1) (thickness 0.15)))
+ )
+ (fp_line (start -1.5 -1.25) (end -1.5 1.25) (layer F.Fab) (width 0.1))
+ (fp_line (start -1.5 1.25) (end 6.5 1.25) (layer F.Fab) (width 0.1))
+ (fp_line (start 6.5 1.25) (end 6.5 -1.25) (layer F.Fab) (width 0.1))
+ (fp_line (start 6.5 -1.25) (end -1.5 -1.25) (layer F.Fab) (width 0.1))
+ (fp_line (start -1.56 -1.31) (end 6.56 -1.31) (layer F.SilkS) (width 0.12))
+ (fp_line (start -1.56 1.31) (end 6.56 1.31) (layer F.SilkS) (width 0.12))
+ (fp_line (start -1.56 -1.31) (end -1.56 1.31) (layer F.SilkS) (width 0.12))
+ (fp_line (start 6.56 -1.31) (end 6.56 1.31) (layer F.SilkS) (width 0.12))
+ (fp_line (start -1.85 -1.6) (end -1.85 1.6) (layer F.CrtYd) (width 0.05))
+ (fp_line (start -1.85 1.6) (end 6.85 1.6) (layer F.CrtYd) (width 0.05))
+ (fp_line (start 6.85 1.6) (end 6.85 -1.6) (layer F.CrtYd) (width 0.05))
+ (fp_line (start 6.85 -1.6) (end -1.85 -1.6) (layer F.CrtYd) (width 0.05))
+ (fp_text user %R (at 2.5 0 180) (layer F.Fab)
+ (effects (font (size 1 1) (thickness 0.15)))
+ )
+ (pad 1 thru_hole circle (at 0 0 180) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask)
+ (net 12 +3V3))
+ (pad 2 thru_hole circle (at 5 0 180) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask)
+ (net 1 GND))
+ (model ${KISYS3DMOD}/Capacitors_THT.3dshapes/C_Disc_D8.0mm_W2.5mm_P5.00mm.wrl
+ (at (xyz 0 0 0))
+ (scale (xyz 1 1 1))
+ (rotate (xyz 0 0 0))
+ )
+ )
+
+ (module Pin_Headers:Pin_Header_Straight_1x06_Pitch2.54mm (layer F.Cu) (tedit 59650532) (tstamp 5ADF8176)
+ (at 182.626 96.52)
+ (descr "Through hole straight pin header, 1x06, 2.54mm pitch, single row")
+ (tags "Through hole pin header THT 1x06 2.54mm single row")
+ (path /5ADE6DCF)
+ (fp_text reference J1 (at 0 -2.33) (layer F.SilkS)
+ (effects (font (size 1 1) (thickness 0.15)))
+ )
+ (fp_text value Conn_01x06 (at 0 15.03) (layer F.Fab)
+ (effects (font (size 1 1) (thickness 0.15)))
+ )
+ (fp_line (start -0.635 -1.27) (end 1.27 -1.27) (layer F.Fab) (width 0.1))
+ (fp_line (start 1.27 -1.27) (end 1.27 13.97) (layer F.Fab) (width 0.1))
+ (fp_line (start 1.27 13.97) (end -1.27 13.97) (layer F.Fab) (width 0.1))
+ (fp_line (start -1.27 13.97) (end -1.27 -0.635) (layer F.Fab) (width 0.1))
+ (fp_line (start -1.27 -0.635) (end -0.635 -1.27) (layer F.Fab) (width 0.1))
+ (fp_line (start -1.33 14.03) (end 1.33 14.03) (layer F.SilkS) (width 0.12))
+ (fp_line (start -1.33 1.27) (end -1.33 14.03) (layer F.SilkS) (width 0.12))
+ (fp_line (start 1.33 1.27) (end 1.33 14.03) (layer F.SilkS) (width 0.12))
+ (fp_line (start -1.33 1.27) (end 1.33 1.27) (layer F.SilkS) (width 0.12))
+ (fp_line (start -1.33 0) (end -1.33 -1.33) (layer F.SilkS) (width 0.12))
+ (fp_line (start -1.33 -1.33) (end 0 -1.33) (layer F.SilkS) (width 0.12))
+ (fp_line (start -1.8 -1.8) (end -1.8 14.5) (layer F.CrtYd) (width 0.05))
+ (fp_line (start -1.8 14.5) (end 1.8 14.5) (layer F.CrtYd) (width 0.05))
+ (fp_line (start 1.8 14.5) (end 1.8 -1.8) (layer F.CrtYd) (width 0.05))
+ (fp_line (start 1.8 -1.8) (end -1.8 -1.8) (layer F.CrtYd) (width 0.05))
+ (fp_text user %R (at 0 6.35 90) (layer F.Fab)
+ (effects (font (size 1 1) (thickness 0.15)))
+ )
+ (pad 1 thru_hole rect (at 0 0) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
+ (net 1 GND))
+ (pad 2 thru_hole oval (at 0 2.54) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
+ (net 2 "Net-(J1-Pad2)"))
+ (pad 3 thru_hole oval (at 0 5.08) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
+ (net 3 "Net-(J1-Pad3)"))
+ (pad 4 thru_hole oval (at 0 7.62) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
+ (net 4 "Net-(J1-Pad4)"))
+ (pad 5 thru_hole oval (at 0 10.16) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
+ (net 5 "Net-(J1-Pad5)"))
+ (pad 6 thru_hole oval (at 0 12.7) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
+ (net 1 GND))
+ (model ${KISYS3DMOD}/Pin_Headers.3dshapes/Pin_Header_Straight_1x06_Pitch2.54mm.wrl
+ (at (xyz 0 0 0))
+ (scale (xyz 1 1 1))
+ (rotate (xyz 0 0 0))
+ )
+ )
+
+ (module Pin_Headers:Pin_Header_Straight_1x06_Pitch2.54mm (layer F.Cu) (tedit 59650532) (tstamp 5ADF8180)
+ (at 142.113 104.14 180)
+ (descr "Through hole straight pin header, 1x06, 2.54mm pitch, single row")
+ (tags "Through hole pin header THT 1x06 2.54mm single row")
+ (path /5ADE6D3C)
+ (fp_text reference J2 (at 0 -2.33 180) (layer F.SilkS)
+ (effects (font (size 1 1) (thickness 0.15)))
+ )
+ (fp_text value Conn_01x06 (at 0 15.03 180) (layer F.Fab)
+ (effects (font (size 1 1) (thickness 0.15)))
+ )
+ (fp_line (start -0.635 -1.27) (end 1.27 -1.27) (layer F.Fab) (width 0.1))
+ (fp_line (start 1.27 -1.27) (end 1.27 13.97) (layer F.Fab) (width 0.1))
+ (fp_line (start 1.27 13.97) (end -1.27 13.97) (layer F.Fab) (width 0.1))
+ (fp_line (start -1.27 13.97) (end -1.27 -0.635) (layer F.Fab) (width 0.1))
+ (fp_line (start -1.27 -0.635) (end -0.635 -1.27) (layer F.Fab) (width 0.1))
+ (fp_line (start -1.33 14.03) (end 1.33 14.03) (layer F.SilkS) (width 0.12))
+ (fp_line (start -1.33 1.27) (end -1.33 14.03) (layer F.SilkS) (width 0.12))
+ (fp_line (start 1.33 1.27) (end 1.33 14.03) (layer F.SilkS) (width 0.12))
+ (fp_line (start -1.33 1.27) (end 1.33 1.27) (layer F.SilkS) (width 0.12))
+ (fp_line (start -1.33 0) (end -1.33 -1.33) (layer F.SilkS) (width 0.12))
+ (fp_line (start -1.33 -1.33) (end 0 -1.33) (layer F.SilkS) (width 0.12))
+ (fp_line (start -1.8 -1.8) (end -1.8 14.5) (layer F.CrtYd) (width 0.05))
+ (fp_line (start -1.8 14.5) (end 1.8 14.5) (layer F.CrtYd) (width 0.05))
+ (fp_line (start 1.8 14.5) (end 1.8 -1.8) (layer F.CrtYd) (width 0.05))
+ (fp_line (start 1.8 -1.8) (end -1.8 -1.8) (layer F.CrtYd) (width 0.05))
+ (fp_text user %R (at 0 6.35 270) (layer F.Fab)
+ (effects (font (size 1 1) (thickness 0.15)))
+ )
+ (pad 1 thru_hole rect (at 0 0 180) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
+ (net 6 "Net-(J2-Pad1)"))
+ (pad 2 thru_hole oval (at 0 2.54 180) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
+ (net 7 "Net-(J2-Pad2)"))
+ (pad 3 thru_hole oval (at 0 5.08 180) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
+ (net 8 "Net-(J2-Pad3)"))
+ (pad 4 thru_hole oval (at 0 7.62 180) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
+ (net 9 "Net-(J2-Pad4)"))
+ (pad 5 thru_hole oval (at 0 10.16 180) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
+ (net 10 "Net-(J2-Pad5)"))
+ (pad 6 thru_hole oval (at 0 12.7 180) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
+ (net 11 "Net-(J2-Pad6)"))
+ (model ${KISYS3DMOD}/Pin_Headers.3dshapes/Pin_Header_Straight_1x06_Pitch2.54mm.wrl
+ (at (xyz 0 0 0))
+ (scale (xyz 1 1 1))
+ (rotate (xyz 0 0 0))
+ )
+ )
+
+ (module Pin_Headers:Pin_Header_Straight_1x01_Pitch2.54mm (layer F.Cu) (tedit 59650532) (tstamp 5ADF8185)
+ (at 192.532 84.328)
+ (descr "Through hole straight pin header, 1x01, 2.54mm pitch, single row")
+ (tags "Through hole pin header THT 1x01 2.54mm single row")
+ (path /5ADE73C1)
+ (fp_text reference J3 (at 0 -2.33) (layer F.SilkS)
+ (effects (font (size 1 1) (thickness 0.15)))
+ )
+ (fp_text value ant (at 0 2.33) (layer F.Fab)
+ (effects (font (size 1 1) (thickness 0.15)))
+ )
+ (fp_line (start -0.635 -1.27) (end 1.27 -1.27) (layer F.Fab) (width 0.1))
+ (fp_line (start 1.27 -1.27) (end 1.27 1.27) (layer F.Fab) (width 0.1))
+ (fp_line (start 1.27 1.27) (end -1.27 1.27) (layer F.Fab) (width 0.1))
+ (fp_line (start -1.27 1.27) (end -1.27 -0.635) (layer F.Fab) (width 0.1))
+ (fp_line (start -1.27 -0.635) (end -0.635 -1.27) (layer F.Fab) (width 0.1))
+ (fp_line (start -1.33 1.33) (end 1.33 1.33) (layer F.SilkS) (width 0.12))
+ (fp_line (start -1.33 1.27) (end -1.33 1.33) (layer F.SilkS) (width 0.12))
+ (fp_line (start 1.33 1.27) (end 1.33 1.33) (layer F.SilkS) (width 0.12))
+ (fp_line (start -1.33 1.27) (end 1.33 1.27) (layer F.SilkS) (width 0.12))
+ (fp_line (start -1.33 0) (end -1.33 -1.33) (layer F.SilkS) (width 0.12))
+ (fp_line (start -1.33 -1.33) (end 0 -1.33) (layer F.SilkS) (width 0.12))
+ (fp_line (start -1.8 -1.8) (end -1.8 1.8) (layer F.CrtYd) (width 0.05))
+ (fp_line (start -1.8 1.8) (end 1.8 1.8) (layer F.CrtYd) (width 0.05))
+ (fp_line (start 1.8 1.8) (end 1.8 -1.8) (layer F.CrtYd) (width 0.05))
+ (fp_line (start 1.8 -1.8) (end -1.8 -1.8) (layer F.CrtYd) (width 0.05))
+ (fp_text user %R (at 0 0 90) (layer F.Fab)
+ (effects (font (size 1 1) (thickness 0.15)))
+ )
+ (pad 1 thru_hole rect (at 0 0) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
+ (net 2 "Net-(J1-Pad2)"))
+ (model ${KISYS3DMOD}/Pin_Headers.3dshapes/Pin_Header_Straight_1x01_Pitch2.54mm.wrl
+ (at (xyz 0 0 0))
+ (scale (xyz 1 1 1))
+ (rotate (xyz 0 0 0))
+ )
+ )
+
+ (module Pin_Headers:Pin_Header_Straight_1x01_Pitch2.54mm (layer F.Cu) (tedit 59650532) (tstamp 5ADF818A)
+ (at 192.532 78.232)
+ (descr "Through hole straight pin header, 1x01, 2.54mm pitch, single row")
+ (tags "Through hole pin header THT 1x01 2.54mm single row")
+ (path /5ADF81D4)
+ (fp_text reference J4 (at 0 -2.33) (layer F.SilkS)
+ (effects (font (size 1 1) (thickness 0.15)))
+ )
+ (fp_text value gnd_ant (at 0 2.33) (layer F.Fab)
+ (effects (font (size 1 1) (thickness 0.15)))
+ )
+ (fp_line (start -0.635 -1.27) (end 1.27 -1.27) (layer F.Fab) (width 0.1))
+ (fp_line (start 1.27 -1.27) (end 1.27 1.27) (layer F.Fab) (width 0.1))
+ (fp_line (start 1.27 1.27) (end -1.27 1.27) (layer F.Fab) (width 0.1))
+ (fp_line (start -1.27 1.27) (end -1.27 -0.635) (layer F.Fab) (width 0.1))
+ (fp_line (start -1.27 -0.635) (end -0.635 -1.27) (layer F.Fab) (width 0.1))
+ (fp_line (start -1.33 1.33) (end 1.33 1.33) (layer F.SilkS) (width 0.12))
+ (fp_line (start -1.33 1.27) (end -1.33 1.33) (layer F.SilkS) (width 0.12))
+ (fp_line (start 1.33 1.27) (end 1.33 1.33) (layer F.SilkS) (width 0.12))
+ (fp_line (start -1.33 1.27) (end 1.33 1.27) (layer F.SilkS) (width 0.12))
+ (fp_line (start -1.33 0) (end -1.33 -1.33) (layer F.SilkS) (width 0.12))
+ (fp_line (start -1.33 -1.33) (end 0 -1.33) (layer F.SilkS) (width 0.12))
+ (fp_line (start -1.8 -1.8) (end -1.8 1.8) (layer F.CrtYd) (width 0.05))
+ (fp_line (start -1.8 1.8) (end 1.8 1.8) (layer F.CrtYd) (width 0.05))
+ (fp_line (start 1.8 1.8) (end 1.8 -1.8) (layer F.CrtYd) (width 0.05))
+ (fp_line (start 1.8 -1.8) (end -1.8 -1.8) (layer F.CrtYd) (width 0.05))
+ (fp_text user %R (at 0 0 90) (layer F.Fab)
+ (effects (font (size 1 1) (thickness 0.15)))
+ )
+ (pad 1 thru_hole rect (at 0 0) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
+ (net 1 GND))
+ (model ${KISYS3DMOD}/Pin_Headers.3dshapes/Pin_Header_Straight_1x01_Pitch2.54mm.wrl
+ (at (xyz 0 0 0))
+ (scale (xyz 1 1 1))
+ (rotate (xyz 0 0 0))
+ )
+ )
+
+ (module Pin_Headers:Pin_Header_Straight_1x02_Pitch2.54mm (layer F.Cu) (tedit 59650532) (tstamp 5ADF8190)
+ (at 163.068 67.31 180)
+ (descr "Through hole straight pin header, 1x02, 2.54mm pitch, single row")
+ (tags "Through hole pin header THT 1x02 2.54mm single row")
+ (path /5ADF82D9)
+ (fp_text reference J5 (at 0 -2.33 180) (layer F.SilkS)
+ (effects (font (size 1 1) (thickness 0.15)))
+ )
+ (fp_text value Power (at 0 4.87 180) (layer F.Fab)
+ (effects (font (size 1 1) (thickness 0.15)))
+ )
+ (fp_line (start -0.635 -1.27) (end 1.27 -1.27) (layer F.Fab) (width 0.1))
+ (fp_line (start 1.27 -1.27) (end 1.27 3.81) (layer F.Fab) (width 0.1))
+ (fp_line (start 1.27 3.81) (end -1.27 3.81) (layer F.Fab) (width 0.1))
+ (fp_line (start -1.27 3.81) (end -1.27 -0.635) (layer F.Fab) (width 0.1))
+ (fp_line (start -1.27 -0.635) (end -0.635 -1.27) (layer F.Fab) (width 0.1))
+ (fp_line (start -1.33 3.87) (end 1.33 3.87) (layer F.SilkS) (width 0.12))
+ (fp_line (start -1.33 1.27) (end -1.33 3.87) (layer F.SilkS) (width 0.12))
+ (fp_line (start 1.33 1.27) (end 1.33 3.87) (layer F.SilkS) (width 0.12))
+ (fp_line (start -1.33 1.27) (end 1.33 1.27) (layer F.SilkS) (width 0.12))
+ (fp_line (start -1.33 0) (end -1.33 -1.33) (layer F.SilkS) (width 0.12))
+ (fp_line (start -1.33 -1.33) (end 0 -1.33) (layer F.SilkS) (width 0.12))
+ (fp_line (start -1.8 -1.8) (end -1.8 4.35) (layer F.CrtYd) (width 0.05))
+ (fp_line (start -1.8 4.35) (end 1.8 4.35) (layer F.CrtYd) (width 0.05))
+ (fp_line (start 1.8 4.35) (end 1.8 -1.8) (layer F.CrtYd) (width 0.05))
+ (fp_line (start 1.8 -1.8) (end -1.8 -1.8) (layer F.CrtYd) (width 0.05))
+ (fp_text user %R (at 0 1.27 270) (layer F.Fab)
+ (effects (font (size 1 1) (thickness 0.15)))
+ )
+ (pad 1 thru_hole rect (at 0 0 180) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
+ (net 11 "Net-(J2-Pad6)"))
+ (pad 2 thru_hole oval (at 0 2.54 180) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
+ (net 1 GND))
+ (model ${KISYS3DMOD}/Pin_Headers.3dshapes/Pin_Header_Straight_1x02_Pitch2.54mm.wrl
+ (at (xyz 0 0 0))
+ (scale (xyz 1 1 1))
+ (rotate (xyz 0 0 0))
+ )
+ )
+
+ (module TO_SOT_Packages_SMD:SOT-223-3_TabPin2 (layer F.Cu) (tedit 58CE4E7E) (tstamp 5ADF8243)
+ (at 155.702 69.596 180)
+ (descr "module CMS SOT223 4 pins")
+ (tags "CMS SOT")
+ (path /5ADF804B)
+ (attr smd)
+ (fp_text reference U2 (at 0 -4.5 180) (layer F.SilkS)
+ (effects (font (size 1 1) (thickness 0.15)))
+ )
+ (fp_text value AP1117-33 (at 0 4.5 180) (layer F.Fab)
+ (effects (font (size 1 1) (thickness 0.15)))
+ )
+ (fp_text user %R (at 0 0 270) (layer F.Fab)
+ (effects (font (size 0.8 0.8) (thickness 0.12)))
+ )
+ (fp_line (start 1.91 3.41) (end 1.91 2.15) (layer F.SilkS) (width 0.12))
+ (fp_line (start 1.91 -3.41) (end 1.91 -2.15) (layer F.SilkS) (width 0.12))
+ (fp_line (start 4.4 -3.6) (end -4.4 -3.6) (layer F.CrtYd) (width 0.05))
+ (fp_line (start 4.4 3.6) (end 4.4 -3.6) (layer F.CrtYd) (width 0.05))
+ (fp_line (start -4.4 3.6) (end 4.4 3.6) (layer F.CrtYd) (width 0.05))
+ (fp_line (start -4.4 -3.6) (end -4.4 3.6) (layer F.CrtYd) (width 0.05))
+ (fp_line (start -1.85 -2.35) (end -0.85 -3.35) (layer F.Fab) (width 0.1))
+ (fp_line (start -1.85 -2.35) (end -1.85 3.35) (layer F.Fab) (width 0.1))
+ (fp_line (start -1.85 3.41) (end 1.91 3.41) (layer F.SilkS) (width 0.12))
+ (fp_line (start -0.85 -3.35) (end 1.85 -3.35) (layer F.Fab) (width 0.1))
+ (fp_line (start -4.1 -3.41) (end 1.91 -3.41) (layer F.SilkS) (width 0.12))
+ (fp_line (start -1.85 3.35) (end 1.85 3.35) (layer F.Fab) (width 0.1))
+ (fp_line (start 1.85 -3.35) (end 1.85 3.35) (layer F.Fab) (width 0.1))
+ (pad 2 smd rect (at 3.15 0 180) (size 2 3.8) (layers F.Cu F.Paste F.Mask)
+ (net 12 +3V3))
+ (pad 2 smd rect (at -3.15 0 180) (size 2 1.5) (layers F.Cu F.Paste F.Mask)
+ (net 12 +3V3))
+ (pad 3 smd rect (at -3.15 2.3 180) (size 2 1.5) (layers F.Cu F.Paste F.Mask)
+ (net 11 "Net-(J2-Pad6)"))
+ (pad 1 smd rect (at -3.15 -2.3 180) (size 2 1.5) (layers F.Cu F.Paste F.Mask)
+ (net 1 GND))
+ (model ${KISYS3DMOD}/TO_SOT_Packages_SMD.3dshapes/SOT-223.wrl
+ (at (xyz 0 0 0))
+ (scale (xyz 1 1 1))
+ (rotate (xyz 0 0 0))
+ )
+ )
+
+ (module MainWorking:DRA818 (layer F.Cu) (tedit 5ADFA6FB) (tstamp 5ADF81A6)
+ (at 142.875 103.505 90)
+ (tags "DRA818 radio module xvcr transmitter transciever receiver vhf uhf")
+ (path /5ADE6CB3)
+ (fp_text reference U1 (at -7.275 13.225 90) (layer F.SilkS)
+ (effects (font (size 1 1) (thickness 0.15)))
+ )
+ (fp_text value DRA818 (at -7.15 10.825 90) (layer F.Fab)
+ (effects (font (size 1 1) (thickness 0.15)))
+ )
+ (fp_line (start -13.775 26.225) (end 21.85 26.175) (layer F.SilkS) (width 0.15))
+ (fp_line (start 21.85 7.1) (end -13.775 7.1) (layer F.SilkS) (width 0.15))
+ (fp_line (start -13.775 7.125) (end -13.775 26.2) (layer F.SilkS) (width 0.15))
+ (fp_line (start 21.844 7.112) (end 21.844 26.162) (layer F.SilkS) (width 0.15))
+ (pad 18 smd rect (at -9.35 26.15 180) (size 3.6 1.8) (layers F.Cu F.Paste F.Mask)
+ (net 5 "Net-(J1-Pad5)"))
+ (pad 17 smd rect (at -4.9 26.15 180) (size 3.6 1.8) (layers F.Cu F.Paste F.Mask)
+ (net 4 "Net-(J1-Pad4)"))
+ (pad 16 smd rect (at -0.45 26.15 180) (size 3.6 1.8) (layers F.Cu F.Paste F.Mask)
+ (net 3 "Net-(J1-Pad3)"))
+ (pad 15 smd rect (at 4 26.15 180) (size 3.6 1.8) (layers F.Cu F.Paste F.Mask))
+ (pad 14 smd rect (at 8.45 26.15 180) (size 3.6 1.8) (layers F.Cu F.Paste F.Mask))
+ (pad 13 smd rect (at 12.9 26.175 180) (size 3.6 1.8) (layers F.Cu F.Paste F.Mask))
+ (pad 12 smd rect (at 17.35 26.175 180) (size 3.6 1.8) (layers F.Cu F.Paste F.Mask)
+ (net 2 "Net-(J1-Pad2)"))
+ (pad 7 smd rect (at 17.4 7.125 180) (size 3.6 1.8) (layers F.Cu F.Paste F.Mask)
+ (net 10 "Net-(J2-Pad5)"))
+ (pad 6 smd rect (at 12.95 7.125 180) (size 3.6 1.8) (layers F.Cu F.Paste F.Mask)
+ (net 9 "Net-(J2-Pad4)"))
+ (pad 5 smd rect (at 8.5 7.1 180) (size 3.6 1.8) (layers F.Cu F.Paste F.Mask)
+ (net 8 "Net-(J2-Pad3)"))
+ (pad 4 smd rect (at 4.05 7.1 180) (size 3.6 1.8) (layers F.Cu F.Paste F.Mask))
+ (pad 3 smd rect (at -0.4 7.1 180) (size 3.6 1.8) (layers F.Cu F.Paste F.Mask)
+ (net 7 "Net-(J2-Pad2)"))
+ (pad 2 smd rect (at -4.85 7.1 180) (size 3.6 1.8) (layers F.Cu F.Paste F.Mask))
+ (pad 1 smd rect (at -9.3 7.1 180) (size 3.6 1.8) (layers F.Cu F.Paste F.Mask)
+ (net 6 "Net-(J2-Pad1)"))
+ (pad 8 smd rect (at 21.825 9.725 180) (size 1.8 3.6) (layers F.Cu F.Paste F.Mask)
+ (net 12 +3V3))
+ (pad 9 smd rect (at 21.85 14.325 180) (size 1.8 3.6) (layers F.Cu F.Paste F.Mask)
+ (net 1 GND))
+ (pad 10 smd rect (at 21.85 18.925 180) (size 1.8 3.6) (layers F.Cu F.Paste F.Mask)
+ (net 1 GND))
+ (pad 11 smd rect (at 21.85 23.525 180) (size 1.8 3.6) (layers F.Cu F.Paste F.Mask))
+ (pad 10 smd rect (at -13.225 10.675 90) (size 1 7) (layers F.Cu F.Paste F.Mask)
+ (net 1 GND))
+ (pad 10 smd trapezoid (at -13.225 23.425 90) (size 1 5.5) (layers F.Cu F.Paste F.Mask)
+ (net 1 GND))
+ )
+
+ (module Pin_Headers:Pin_Header_Straight_1x02_Pitch2.54mm (layer F.Cu) (tedit 59650532) (tstamp 5AE4D6EF)
+ (at 174.244 108.458 90)
+ (descr "Through hole straight pin header, 1x02, 2.54mm pitch, single row")
+ (tags "Through hole pin header THT 1x02 2.54mm single row")
+ (path /5AE4D5AD)
+ (fp_text reference J6 (at 0 -2.33 90) (layer F.SilkS)
+ (effects (font (size 1 1) (thickness 0.15)))
+ )
+ (fp_text value txjump (at 0 4.87 90) (layer F.Fab)
+ (effects (font (size 1 1) (thickness 0.15)))
+ )
+ (fp_line (start -0.635 -1.27) (end 1.27 -1.27) (layer F.Fab) (width 0.1))
+ (fp_line (start 1.27 -1.27) (end 1.27 3.81) (layer F.Fab) (width 0.1))
+ (fp_line (start 1.27 3.81) (end -1.27 3.81) (layer F.Fab) (width 0.1))
+ (fp_line (start -1.27 3.81) (end -1.27 -0.635) (layer F.Fab) (width 0.1))
+ (fp_line (start -1.27 -0.635) (end -0.635 -1.27) (layer F.Fab) (width 0.1))
+ (fp_line (start -1.33 3.87) (end 1.33 3.87) (layer F.SilkS) (width 0.12))
+ (fp_line (start -1.33 1.27) (end -1.33 3.87) (layer F.SilkS) (width 0.12))
+ (fp_line (start 1.33 1.27) (end 1.33 3.87) (layer F.SilkS) (width 0.12))
+ (fp_line (start -1.33 1.27) (end 1.33 1.27) (layer F.SilkS) (width 0.12))
+ (fp_line (start -1.33 0) (end -1.33 -1.33) (layer F.SilkS) (width 0.12))
+ (fp_line (start -1.33 -1.33) (end 0 -1.33) (layer F.SilkS) (width 0.12))
+ (fp_line (start -1.8 -1.8) (end -1.8 4.35) (layer F.CrtYd) (width 0.05))
+ (fp_line (start -1.8 4.35) (end 1.8 4.35) (layer F.CrtYd) (width 0.05))
+ (fp_line (start 1.8 4.35) (end 1.8 -1.8) (layer F.CrtYd) (width 0.05))
+ (fp_line (start 1.8 -1.8) (end -1.8 -1.8) (layer F.CrtYd) (width 0.05))
+ (fp_text user %R (at 0 1.27 180) (layer F.Fab)
+ (effects (font (size 1 1) (thickness 0.15)))
+ )
+ (pad 1 thru_hole rect (at 0 0 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
+ (net 4 "Net-(J1-Pad4)"))
+ (pad 2 thru_hole oval (at 0 2.54 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
+ (net 13 "Net-(J6-Pad2)"))
+ (model ${KISYS3DMOD}/Pin_Headers.3dshapes/Pin_Header_Straight_1x02_Pitch2.54mm.wrl
+ (at (xyz 0 0 0))
+ (scale (xyz 1 1 1))
+ (rotate (xyz 0 0 0))
+ )
+ )
+
+ (module Pin_Headers:Pin_Header_Straight_1x02_Pitch2.54mm (layer F.Cu) (tedit 59650532) (tstamp 5AE4D6F5)
+ (at 184.404 87.376)
+ (descr "Through hole straight pin header, 1x02, 2.54mm pitch, single row")
+ (tags "Through hole pin header THT 1x02 2.54mm single row")
+ (path /5AE4E280)
+ (fp_text reference J7 (at 0 -2.33) (layer F.SilkS)
+ (effects (font (size 1 1) (thickness 0.15)))
+ )
+ (fp_text value 5vTTL (at 0 4.87) (layer F.Fab)
+ (effects (font (size 1 1) (thickness 0.15)))
+ )
+ (fp_line (start -0.635 -1.27) (end 1.27 -1.27) (layer F.Fab) (width 0.1))
+ (fp_line (start 1.27 -1.27) (end 1.27 3.81) (layer F.Fab) (width 0.1))
+ (fp_line (start 1.27 3.81) (end -1.27 3.81) (layer F.Fab) (width 0.1))
+ (fp_line (start -1.27 3.81) (end -1.27 -0.635) (layer F.Fab) (width 0.1))
+ (fp_line (start -1.27 -0.635) (end -0.635 -1.27) (layer F.Fab) (width 0.1))
+ (fp_line (start -1.33 3.87) (end 1.33 3.87) (layer F.SilkS) (width 0.12))
+ (fp_line (start -1.33 1.27) (end -1.33 3.87) (layer F.SilkS) (width 0.12))
+ (fp_line (start 1.33 1.27) (end 1.33 3.87) (layer F.SilkS) (width 0.12))
+ (fp_line (start -1.33 1.27) (end 1.33 1.27) (layer F.SilkS) (width 0.12))
+ (fp_line (start -1.33 0) (end -1.33 -1.33) (layer F.SilkS) (width 0.12))
+ (fp_line (start -1.33 -1.33) (end 0 -1.33) (layer F.SilkS) (width 0.12))
+ (fp_line (start -1.8 -1.8) (end -1.8 4.35) (layer F.CrtYd) (width 0.05))
+ (fp_line (start -1.8 4.35) (end 1.8 4.35) (layer F.CrtYd) (width 0.05))
+ (fp_line (start 1.8 4.35) (end 1.8 -1.8) (layer F.CrtYd) (width 0.05))
+ (fp_line (start 1.8 -1.8) (end -1.8 -1.8) (layer F.CrtYd) (width 0.05))
+ (fp_text user %R (at 0 1.27 90) (layer F.Fab)
+ (effects (font (size 1 1) (thickness 0.15)))
+ )
+ (pad 1 thru_hole rect (at 0 0) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
+ (net 14 "Net-(J7-Pad1)"))
+ (pad 2 thru_hole oval (at 0 2.54) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
+ (net 15 "Net-(J7-Pad2)"))
+ (model ${KISYS3DMOD}/Pin_Headers.3dshapes/Pin_Header_Straight_1x02_Pitch2.54mm.wrl
+ (at (xyz 0 0 0))
+ (scale (xyz 1 1 1))
+ (rotate (xyz 0 0 0))
+ )
+ )
+
+ (module Pin_Headers:Pin_Header_Straight_1x02_Pitch2.54mm (layer F.Cu) (tedit 59650532) (tstamp 5AE4D6FB)
+ (at 174.244 104.14 90)
+ (descr "Through hole straight pin header, 1x02, 2.54mm pitch, single row")
+ (tags "Through hole pin header THT 1x02 2.54mm single row")
+ (path /5AE4D547)
+ (fp_text reference J8 (at 0 -2.33 90) (layer F.SilkS)
+ (effects (font (size 1 1) (thickness 0.15)))
+ )
+ (fp_text value rxjump (at 0 4.87 90) (layer F.Fab)
+ (effects (font (size 1 1) (thickness 0.15)))
+ )
+ (fp_line (start -0.635 -1.27) (end 1.27 -1.27) (layer F.Fab) (width 0.1))
+ (fp_line (start 1.27 -1.27) (end 1.27 3.81) (layer F.Fab) (width 0.1))
+ (fp_line (start 1.27 3.81) (end -1.27 3.81) (layer F.Fab) (width 0.1))
+ (fp_line (start -1.27 3.81) (end -1.27 -0.635) (layer F.Fab) (width 0.1))
+ (fp_line (start -1.27 -0.635) (end -0.635 -1.27) (layer F.Fab) (width 0.1))
+ (fp_line (start -1.33 3.87) (end 1.33 3.87) (layer F.SilkS) (width 0.12))
+ (fp_line (start -1.33 1.27) (end -1.33 3.87) (layer F.SilkS) (width 0.12))
+ (fp_line (start 1.33 1.27) (end 1.33 3.87) (layer F.SilkS) (width 0.12))
+ (fp_line (start -1.33 1.27) (end 1.33 1.27) (layer F.SilkS) (width 0.12))
+ (fp_line (start -1.33 0) (end -1.33 -1.33) (layer F.SilkS) (width 0.12))
+ (fp_line (start -1.33 -1.33) (end 0 -1.33) (layer F.SilkS) (width 0.12))
+ (fp_line (start -1.8 -1.8) (end -1.8 4.35) (layer F.CrtYd) (width 0.05))
+ (fp_line (start -1.8 4.35) (end 1.8 4.35) (layer F.CrtYd) (width 0.05))
+ (fp_line (start 1.8 4.35) (end 1.8 -1.8) (layer F.CrtYd) (width 0.05))
+ (fp_line (start 1.8 -1.8) (end -1.8 -1.8) (layer F.CrtYd) (width 0.05))
+ (fp_text user %R (at 0 1.27 180) (layer F.Fab)
+ (effects (font (size 1 1) (thickness 0.15)))
+ )
+ (pad 1 thru_hole rect (at 0 0 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
+ (net 3 "Net-(J1-Pad3)"))
+ (pad 2 thru_hole oval (at 0 2.54 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
+ (net 16 "Net-(J8-Pad2)"))
+ (model ${KISYS3DMOD}/Pin_Headers.3dshapes/Pin_Header_Straight_1x02_Pitch2.54mm.wrl
+ (at (xyz 0 0 0))
+ (scale (xyz 1 1 1))
+ (rotate (xyz 0 0 0))
+ )
+ )
+
+ (module TO_SOT_Packages_SMD:SOT-23 (layer F.Cu) (tedit 5AE5F755) (tstamp 5AE4D702)
+ (at 176.657 85.725 90)
+ (descr "SOT-23, Standard")
+ (tags SOT-23)
+ (path /5AE4D897)
+ (attr smd)
+ (fp_text reference Q1 (at -0.254 -4.572 90) (layer F.SilkS)
+ (effects (font (size 1 1) (thickness 0.15)))
+ )
+ (fp_text value BSS138 (at 0 2.5 90) (layer F.Fab)
+ (effects (font (size 1 1) (thickness 0.15)))
+ )
+ (fp_text user %R (at 0 0 180) (layer F.Fab)
+ (effects (font (size 0.5 0.5) (thickness 0.075)))
+ )
+ (fp_line (start -0.7 -0.95) (end -0.7 1.5) (layer F.Fab) (width 0.1))
+ (fp_line (start -0.15 -1.52) (end 0.7 -1.52) (layer F.Fab) (width 0.1))
+ (fp_line (start -0.7 -0.95) (end -0.15 -1.52) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.7 -1.52) (end 0.7 1.52) (layer F.Fab) (width 0.1))
+ (fp_line (start -0.7 1.52) (end 0.7 1.52) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.76 1.58) (end 0.76 0.65) (layer F.SilkS) (width 0.12))
+ (fp_line (start 0.76 -1.58) (end 0.76 -0.65) (layer F.SilkS) (width 0.12))
+ (fp_line (start -1.7 -1.75) (end 1.7 -1.75) (layer F.CrtYd) (width 0.05))
+ (fp_line (start 1.7 -1.75) (end 1.7 1.75) (layer F.CrtYd) (width 0.05))
+ (fp_line (start 1.7 1.75) (end -1.7 1.75) (layer F.CrtYd) (width 0.05))
+ (fp_line (start -1.7 1.75) (end -1.7 -1.75) (layer F.CrtYd) (width 0.05))
+ (fp_line (start 0.76 -1.58) (end -1.4 -1.58) (layer F.SilkS) (width 0.12))
+ (fp_line (start 0.76 1.58) (end -0.7 1.58) (layer F.SilkS) (width 0.12))
+ (pad 1 smd rect (at -1 -0.95 90) (size 0.9 0.8) (layers F.Cu F.Paste F.Mask)
+ (net 12 +3V3))
+ (pad 2 smd rect (at -1 0.95 90) (size 0.9 0.8) (layers F.Cu F.Paste F.Mask)
+ (net 13 "Net-(J6-Pad2)"))
+ (pad 3 smd rect (at 1 0 90) (size 0.9 0.8) (layers F.Cu F.Paste F.Mask)
+ (net 15 "Net-(J7-Pad2)"))
+ (model ${KISYS3DMOD}/TO_SOT_Packages_SMD.3dshapes/SOT-23.wrl
+ (at (xyz 0 0 0))
+ (scale (xyz 1 1 1))
+ (rotate (xyz 0 0 0))
+ )
+ )
+
+ (module TO_SOT_Packages_SMD:SOT-23 (layer F.Cu) (tedit 58CE4E7E) (tstamp 5AE4D709)
+ (at 174.752 92.964 90)
+ (descr "SOT-23, Standard")
+ (tags SOT-23)
+ (path /5AE4D83B)
+ (attr smd)
+ (fp_text reference Q2 (at 0 -2.5 90) (layer F.SilkS)
+ (effects (font (size 1 1) (thickness 0.15)))
+ )
+ (fp_text value BSS138 (at 0 2.5 90) (layer F.Fab)
+ (effects (font (size 1 1) (thickness 0.15)))
+ )
+ (fp_text user %R (at 0 0 180) (layer F.Fab)
+ (effects (font (size 0.5 0.5) (thickness 0.075)))
+ )
+ (fp_line (start -0.7 -0.95) (end -0.7 1.5) (layer F.Fab) (width 0.1))
+ (fp_line (start -0.15 -1.52) (end 0.7 -1.52) (layer F.Fab) (width 0.1))
+ (fp_line (start -0.7 -0.95) (end -0.15 -1.52) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.7 -1.52) (end 0.7 1.52) (layer F.Fab) (width 0.1))
+ (fp_line (start -0.7 1.52) (end 0.7 1.52) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.76 1.58) (end 0.76 0.65) (layer F.SilkS) (width 0.12))
+ (fp_line (start 0.76 -1.58) (end 0.76 -0.65) (layer F.SilkS) (width 0.12))
+ (fp_line (start -1.7 -1.75) (end 1.7 -1.75) (layer F.CrtYd) (width 0.05))
+ (fp_line (start 1.7 -1.75) (end 1.7 1.75) (layer F.CrtYd) (width 0.05))
+ (fp_line (start 1.7 1.75) (end -1.7 1.75) (layer F.CrtYd) (width 0.05))
+ (fp_line (start -1.7 1.75) (end -1.7 -1.75) (layer F.CrtYd) (width 0.05))
+ (fp_line (start 0.76 -1.58) (end -1.4 -1.58) (layer F.SilkS) (width 0.12))
+ (fp_line (start 0.76 1.58) (end -0.7 1.58) (layer F.SilkS) (width 0.12))
+ (pad 1 smd rect (at -1 -0.95 90) (size 0.9 0.8) (layers F.Cu F.Paste F.Mask)
+ (net 12 +3V3))
+ (pad 2 smd rect (at -1 0.95 90) (size 0.9 0.8) (layers F.Cu F.Paste F.Mask)
+ (net 16 "Net-(J8-Pad2)"))
+ (pad 3 smd rect (at 1 0 90) (size 0.9 0.8) (layers F.Cu F.Paste F.Mask)
+ (net 14 "Net-(J7-Pad1)"))
+ (model ${KISYS3DMOD}/TO_SOT_Packages_SMD.3dshapes/SOT-23.wrl
+ (at (xyz 0 0 0))
+ (scale (xyz 1 1 1))
+ (rotate (xyz 0 0 0))
+ )
+ )
+
+ (module Resistors_SMD:R_0805 (layer F.Cu) (tedit 58E0A804) (tstamp 5AE4D70F)
+ (at 176.657 89.535 180)
+ (descr "Resistor SMD 0805, reflow soldering, Vishay (see dcrcw.pdf)")
+ (tags "resistor 0805")
+ (path /5AE4DC2C)
+ (attr smd)
+ (fp_text reference R1 (at 0 -1.65 180) (layer F.SilkS)
+ (effects (font (size 1 1) (thickness 0.15)))
+ )
+ (fp_text value 10k (at 0 1.75 180) (layer F.Fab)
+ (effects (font (size 1 1) (thickness 0.15)))
+ )
+ (fp_text user %R (at 0 0 180) (layer F.Fab)
+ (effects (font (size 0.5 0.5) (thickness 0.075)))
+ )
+ (fp_line (start -1 0.62) (end -1 -0.62) (layer F.Fab) (width 0.1))
+ (fp_line (start 1 0.62) (end -1 0.62) (layer F.Fab) (width 0.1))
+ (fp_line (start 1 -0.62) (end 1 0.62) (layer F.Fab) (width 0.1))
+ (fp_line (start -1 -0.62) (end 1 -0.62) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.6 0.88) (end -0.6 0.88) (layer F.SilkS) (width 0.12))
+ (fp_line (start -0.6 -0.88) (end 0.6 -0.88) (layer F.SilkS) (width 0.12))
+ (fp_line (start -1.55 -0.9) (end 1.55 -0.9) (layer F.CrtYd) (width 0.05))
+ (fp_line (start -1.55 -0.9) (end -1.55 0.9) (layer F.CrtYd) (width 0.05))
+ (fp_line (start 1.55 0.9) (end 1.55 -0.9) (layer F.CrtYd) (width 0.05))
+ (fp_line (start 1.55 0.9) (end -1.55 0.9) (layer F.CrtYd) (width 0.05))
+ (pad 1 smd rect (at -0.95 0 180) (size 0.7 1.3) (layers F.Cu F.Paste F.Mask)
+ (net 13 "Net-(J6-Pad2)"))
+ (pad 2 smd rect (at 0.95 0 180) (size 0.7 1.3) (layers F.Cu F.Paste F.Mask)
+ (net 12 +3V3))
+ (model ${KISYS3DMOD}/Resistors_SMD.3dshapes/R_0805.wrl
+ (at (xyz 0 0 0))
+ (scale (xyz 1 1 1))
+ (rotate (xyz 0 0 0))
+ )
+ )
+
+ (module Resistors_SMD:R_0805 (layer F.Cu) (tedit 58E0A804) (tstamp 5AE4D715)
+ (at 177.038 81.346 90)
+ (descr "Resistor SMD 0805, reflow soldering, Vishay (see dcrcw.pdf)")
+ (tags "resistor 0805")
+ (path /5AE4DF9A)
+ (attr smd)
+ (fp_text reference R2 (at 0 -1.65 90) (layer F.SilkS)
+ (effects (font (size 1 1) (thickness 0.15)))
+ )
+ (fp_text value 10k (at 0 1.75 90) (layer F.Fab)
+ (effects (font (size 1 1) (thickness 0.15)))
+ )
+ (fp_text user %R (at 0 0 90) (layer F.Fab)
+ (effects (font (size 0.5 0.5) (thickness 0.075)))
+ )
+ (fp_line (start -1 0.62) (end -1 -0.62) (layer F.Fab) (width 0.1))
+ (fp_line (start 1 0.62) (end -1 0.62) (layer F.Fab) (width 0.1))
+ (fp_line (start 1 -0.62) (end 1 0.62) (layer F.Fab) (width 0.1))
+ (fp_line (start -1 -0.62) (end 1 -0.62) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.6 0.88) (end -0.6 0.88) (layer F.SilkS) (width 0.12))
+ (fp_line (start -0.6 -0.88) (end 0.6 -0.88) (layer F.SilkS) (width 0.12))
+ (fp_line (start -1.55 -0.9) (end 1.55 -0.9) (layer F.CrtYd) (width 0.05))
+ (fp_line (start -1.55 -0.9) (end -1.55 0.9) (layer F.CrtYd) (width 0.05))
+ (fp_line (start 1.55 0.9) (end 1.55 -0.9) (layer F.CrtYd) (width 0.05))
+ (fp_line (start 1.55 0.9) (end -1.55 0.9) (layer F.CrtYd) (width 0.05))
+ (pad 1 smd rect (at -0.95 0 90) (size 0.7 1.3) (layers F.Cu F.Paste F.Mask)
+ (net 15 "Net-(J7-Pad2)"))
+ (pad 2 smd rect (at 0.95 0 90) (size 0.7 1.3) (layers F.Cu F.Paste F.Mask)
+ (net 17 +5V))
+ (model ${KISYS3DMOD}/Resistors_SMD.3dshapes/R_0805.wrl
+ (at (xyz 0 0 0))
+ (scale (xyz 1 1 1))
+ (rotate (xyz 0 0 0))
+ )
+ )
+
+ (module Resistors_SMD:R_0805 (layer F.Cu) (tedit 58E0A804) (tstamp 5AE4D71B)
+ (at 174.752 96.774 180)
+ (descr "Resistor SMD 0805, reflow soldering, Vishay (see dcrcw.pdf)")
+ (tags "resistor 0805")
+ (path /5AE4DD3C)
+ (attr smd)
+ (fp_text reference R3 (at 0 -1.65 180) (layer F.SilkS)
+ (effects (font (size 1 1) (thickness 0.15)))
+ )
+ (fp_text value 10k (at 0 1.75 180) (layer F.Fab)
+ (effects (font (size 1 1) (thickness 0.15)))
+ )
+ (fp_text user %R (at 0 0 180) (layer F.Fab)
+ (effects (font (size 0.5 0.5) (thickness 0.075)))
+ )
+ (fp_line (start -1 0.62) (end -1 -0.62) (layer F.Fab) (width 0.1))
+ (fp_line (start 1 0.62) (end -1 0.62) (layer F.Fab) (width 0.1))
+ (fp_line (start 1 -0.62) (end 1 0.62) (layer F.Fab) (width 0.1))
+ (fp_line (start -1 -0.62) (end 1 -0.62) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.6 0.88) (end -0.6 0.88) (layer F.SilkS) (width 0.12))
+ (fp_line (start -0.6 -0.88) (end 0.6 -0.88) (layer F.SilkS) (width 0.12))
+ (fp_line (start -1.55 -0.9) (end 1.55 -0.9) (layer F.CrtYd) (width 0.05))
+ (fp_line (start -1.55 -0.9) (end -1.55 0.9) (layer F.CrtYd) (width 0.05))
+ (fp_line (start 1.55 0.9) (end 1.55 -0.9) (layer F.CrtYd) (width 0.05))
+ (fp_line (start 1.55 0.9) (end -1.55 0.9) (layer F.CrtYd) (width 0.05))
+ (pad 1 smd rect (at -0.95 0 180) (size 0.7 1.3) (layers F.Cu F.Paste F.Mask)
+ (net 16 "Net-(J8-Pad2)"))
+ (pad 2 smd rect (at 0.95 0 180) (size 0.7 1.3) (layers F.Cu F.Paste F.Mask)
+ (net 12 +3V3))
+ (model ${KISYS3DMOD}/Resistors_SMD.3dshapes/R_0805.wrl
+ (at (xyz 0 0 0))
+ (scale (xyz 1 1 1))
+ (rotate (xyz 0 0 0))
+ )
+ )
+
+ (module Resistors_SMD:R_0805 (layer F.Cu) (tedit 58E0A804) (tstamp 5AE4D721)
+ (at 173.99 81.346 90)
+ (descr "Resistor SMD 0805, reflow soldering, Vishay (see dcrcw.pdf)")
+ (tags "resistor 0805")
+ (path /5AE4DFCF)
+ (attr smd)
+ (fp_text reference R4 (at 0 -1.65 90) (layer F.SilkS)
+ (effects (font (size 1 1) (thickness 0.15)))
+ )
+ (fp_text value 10k (at 0 1.75 90) (layer F.Fab)
+ (effects (font (size 1 1) (thickness 0.15)))
+ )
+ (fp_text user %R (at 0 0 90) (layer F.Fab)
+ (effects (font (size 0.5 0.5) (thickness 0.075)))
+ )
+ (fp_line (start -1 0.62) (end -1 -0.62) (layer F.Fab) (width 0.1))
+ (fp_line (start 1 0.62) (end -1 0.62) (layer F.Fab) (width 0.1))
+ (fp_line (start 1 -0.62) (end 1 0.62) (layer F.Fab) (width 0.1))
+ (fp_line (start -1 -0.62) (end 1 -0.62) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.6 0.88) (end -0.6 0.88) (layer F.SilkS) (width 0.12))
+ (fp_line (start -0.6 -0.88) (end 0.6 -0.88) (layer F.SilkS) (width 0.12))
+ (fp_line (start -1.55 -0.9) (end 1.55 -0.9) (layer F.CrtYd) (width 0.05))
+ (fp_line (start -1.55 -0.9) (end -1.55 0.9) (layer F.CrtYd) (width 0.05))
+ (fp_line (start 1.55 0.9) (end 1.55 -0.9) (layer F.CrtYd) (width 0.05))
+ (fp_line (start 1.55 0.9) (end -1.55 0.9) (layer F.CrtYd) (width 0.05))
+ (pad 1 smd rect (at -0.95 0 90) (size 0.7 1.3) (layers F.Cu F.Paste F.Mask)
+ (net 14 "Net-(J7-Pad1)"))
+ (pad 2 smd rect (at 0.95 0 90) (size 0.7 1.3) (layers F.Cu F.Paste F.Mask)
+ (net 17 +5V))
+ (model ${KISYS3DMOD}/Resistors_SMD.3dshapes/R_0805.wrl
+ (at (xyz 0 0 0))
+ (scale (xyz 1 1 1))
+ (rotate (xyz 0 0 0))
+ )
+ )
+
+ (segment (start 158.852 71.896) (end 157.748 71.896) (width 0.762) (layer F.Cu) (net 1))
+ (segment (start 157.748 71.896) (end 156.718 70.866) (width 0.762) (layer F.Cu) (net 1))
+ (segment (start 158.242 64.77) (end 161.865919 64.77) (width 0.762) (layer F.Cu) (net 1))
+ (segment (start 156.718 70.866) (end 156.718 66.294) (width 0.762) (layer F.Cu) (net 1))
+ (segment (start 156.718 66.294) (end 158.242 64.77) (width 0.762) (layer F.Cu) (net 1))
+ (segment (start 161.865919 64.77) (end 163.068 64.77) (width 0.762) (layer F.Cu) (net 1))
+ (segment (start 174.244 104.14) (end 169.21 104.14) (width 0.762) (layer F.Cu) (net 3))
+ (segment (start 169.21 104.14) (end 169.025 103.955) (width 0.762) (layer F.Cu) (net 3) (tstamp 5AE5F87C))
+ (segment (start 174.244 108.458) (end 169.078 108.458) (width 0.762) (layer F.Cu) (net 4))
+ (segment (start 169.078 108.458) (end 169.025 108.405) (width 0.762) (layer F.Cu) (net 4) (tstamp 5AE5F87F))
+ (segment (start 163.068 67.31) (end 158.866 67.31) (width 1.016) (layer F.Cu) (net 11))
+ (segment (start 158.866 67.31) (end 158.852 67.296) (width 1.016) (layer F.Cu) (net 11) (tstamp 5AE5FB8B))
+ (segment (start 175.707 85.513) (end 175.707 86.725) (width 0.762) (layer F.Cu) (net 12))
+ (segment (start 175.675999 85.481999) (end 175.707 85.513) (width 0.762) (layer F.Cu) (net 12))
+ (segment (start 174.932998 77.396998) (end 175.675999 78.139999) (width 0.762) (layer F.Cu) (net 12))
+ (segment (start 172.904003 77.396998) (end 174.932998 77.396998) (width 0.762) (layer F.Cu) (net 12))
+ (segment (start 175.675999 78.139999) (end 175.675999 85.481999) (width 0.762) (layer F.Cu) (net 12))
+ (segment (start 172.212 78.089001) (end 172.904003 77.396998) (width 0.762) (layer F.Cu) (net 12))
+ (segment (start 163.83 76.454) (end 164.629999 77.253999) (width 0.762) (layer F.Cu) (net 12))
+ (segment (start 164.629999 77.253999) (end 171.376998 77.253999) (width 0.762) (layer F.Cu) (net 12))
+ (segment (start 171.376998 77.253999) (end 172.212 78.089001) (width 0.762) (layer F.Cu) (net 12))
+ (segment (start 158.852 69.596) (end 159.347802 69.596) (width 0.762) (layer F.Cu) (net 12))
+ (segment (start 159.347802 69.596) (end 163.83 74.078198) (width 0.762) (layer F.Cu) (net 12))
+ (segment (start 163.83 74.078198) (end 163.83 75.32263) (width 0.762) (layer F.Cu) (net 12))
+ (segment (start 163.83 75.32263) (end 163.83 76.454) (width 0.762) (layer F.Cu) (net 12))
+ (segment (start 173.802 93.964) (end 173.802 92.752) (width 0.762) (layer F.Cu) (net 12))
+ (segment (start 173.802 92.752) (end 172.212 91.162) (width 0.762) (layer F.Cu) (net 12))
+ (segment (start 172.212 91.162) (end 172.212 78.089001) (width 0.762) (layer F.Cu) (net 12))
+ (segment (start 175.707 89.535) (end 175.707 86.725) (width 0.762) (layer F.Cu) (net 12))
+ (segment (start 173.802 96.774) (end 173.802 93.964) (width 0.762) (layer F.Cu) (net 12))
+ (segment (start 177.607 89.535) (end 177.607 86.725) (width 0.762) (layer F.Cu) (net 13))
+ (segment (start 176.784 108.458) (end 178.215001 107.026999) (width 0.762) (layer F.Cu) (net 13))
+ (segment (start 178.215001 107.026999) (end 178.215001 91.555001) (width 0.762) (layer F.Cu) (net 13))
+ (segment (start 178.215001 91.555001) (end 177.607 90.947) (width 0.762) (layer F.Cu) (net 13))
+ (segment (start 177.607 90.947) (end 177.607 89.535) (width 0.762) (layer F.Cu) (net 13))
+ (segment (start 173.99 82.296) (end 173.99 91.202) (width 0.762) (layer F.Cu) (net 14))
+ (segment (start 173.99 91.202) (end 174.752 91.964) (width 0.762) (layer F.Cu) (net 14))
+ (segment (start 176.657 84.725) (end 176.657 82.677) (width 0.762) (layer F.Cu) (net 15))
+ (segment (start 176.657 82.677) (end 177.038 82.296) (width 0.762) (layer F.Cu) (net 15))
+ (segment (start 176.926 98.298) (end 176.784 98.44) (width 0.762) (layer F.Cu) (net 16))
+ (segment (start 176.784 98.44) (end 176.784 104.14) (width 0.762) (layer F.Cu) (net 16))
+ (segment (start 175.702 96.774) (end 175.702 97.074) (width 0.762) (layer F.Cu) (net 16))
+ (segment (start 175.702 97.074) (end 176.926 98.298) (width 0.762) (layer F.Cu) (net 16))
+ (segment (start 175.702 93.964) (end 175.702 96.774) (width 0.762) (layer F.Cu) (net 16))
+ (segment (start 176.276 74.93) (end 177.038 75.692) (width 0.762) (layer F.Cu) (net 17))
+ (segment (start 177.038 75.692) (end 177.038 80.396) (width 0.762) (layer F.Cu) (net 17))
+ (segment (start 173.99 74.93) (end 176.276 74.93) (width 0.762) (layer F.Cu) (net 17))
+ (segment (start 173.99 78.74) (end 173.99 74.93) (width 0.762) (layer B.Cu) (net 17))
+ (via (at 173.99 74.93) (size 1.524) (drill 0.889) (layers F.Cu B.Cu) (net 17))
+ (segment (start 173.99 80.396) (end 173.99 78.74) (width 0.762) (layer F.Cu) (net 17))
+ (via (at 173.99 78.74) (size 1.524) (drill 0.889) (layers F.Cu B.Cu) (net 17))
+
+)
diff --git a/DRA818testbed/DRA818testbed.net b/DRA818testbed/DRA818testbed.net
new file mode 100644
index 0000000..18b5c43
--- /dev/null
+++ b/DRA818testbed/DRA818testbed.net
@@ -0,0 +1,329 @@
+(export (version D)
+ (design
+ (source /home/cale/Kicad/DRA818testbed/DRA818testbed.sch)
+ (date "Sun 29 Apr 2018 11:25:32 AM MDT")
+ (tool "Eeschema 4.0.7-e2-6376~58~ubuntu16.04.1")
+ (sheet (number 1) (name /) (tstamps /)
+ (title_block
+ (title)
+ (company)
+ (rev)
+ (date)
+ (source DRA818testbed.sch)
+ (comment (number 1) (value ""))
+ (comment (number 2) (value ""))
+ (comment (number 3) (value ""))
+ (comment (number 4) (value "")))))
+ (components
+ (comp (ref U1)
+ (value DRA818)
+ (footprint MainWorking:DRA818)
+ (libsource (lib MainWorking) (part DRA818))
+ (sheetpath (names /) (tstamps /))
+ (tstamp 5ADE6CB3))
+ (comp (ref J2)
+ (value Conn_01x06)
+ (footprint Pin_Headers:Pin_Header_Straight_1x06_Pitch2.54mm)
+ (libsource (lib conn) (part Conn_01x06))
+ (sheetpath (names /) (tstamps /))
+ (tstamp 5ADE6D3C))
+ (comp (ref C1)
+ (value 10uf)
+ (footprint Capacitors_THT:C_Disc_D8.0mm_W2.5mm_P5.00mm)
+ (libsource (lib device) (part C))
+ (sheetpath (names /) (tstamps /))
+ (tstamp 5ADE7263))
+ (comp (ref J3)
+ (value ant)
+ (footprint Pin_Headers:Pin_Header_Straight_1x01_Pitch2.54mm)
+ (libsource (lib conn) (part Conn_01x01))
+ (sheetpath (names /) (tstamps /))
+ (tstamp 5ADE73C1))
+ (comp (ref U2)
+ (value AP1117-33)
+ (footprint TO_SOT_Packages_SMD:SOT-223-3_TabPin2)
+ (libsource (lib regul) (part AP1117-25))
+ (sheetpath (names /) (tstamps /))
+ (tstamp 5ADF804B))
+ (comp (ref J5)
+ (value Power)
+ (footprint Pin_Headers:Pin_Header_Straight_1x02_Pitch2.54mm)
+ (libsource (lib conn) (part Conn_01x02))
+ (sheetpath (names /) (tstamps /))
+ (tstamp 5ADF82D9))
+ (comp (ref J8)
+ (value rxjump)
+ (footprint Pin_Headers:Pin_Header_Straight_1x02_Pitch2.54mm)
+ (libsource (lib conn) (part Conn_01x02))
+ (sheetpath (names /) (tstamps /))
+ (tstamp 5AE4D547))
+ (comp (ref J6)
+ (value txjump)
+ (footprint Pin_Headers:Pin_Header_Straight_1x02_Pitch2.54mm)
+ (libsource (lib conn) (part Conn_01x02))
+ (sheetpath (names /) (tstamps /))
+ (tstamp 5AE4D5AD))
+ (comp (ref Q2)
+ (value BSS138)
+ (footprint TO_SOT_Packages_SMD:SOT-23)
+ (libsource (lib transistors) (part BSS138))
+ (sheetpath (names /) (tstamps /))
+ (tstamp 5AE4D83B))
+ (comp (ref Q1)
+ (value BSS138)
+ (footprint TO_SOT_Packages_SMD:SOT-23)
+ (libsource (lib transistors) (part BSS138))
+ (sheetpath (names /) (tstamps /))
+ (tstamp 5AE4D897))
+ (comp (ref R1)
+ (value 10k)
+ (footprint Resistors_SMD:R_0805)
+ (libsource (lib device) (part R))
+ (sheetpath (names /) (tstamps /))
+ (tstamp 5AE4DC2C))
+ (comp (ref R3)
+ (value 10k)
+ (footprint Resistors_SMD:R_0805)
+ (libsource (lib device) (part R))
+ (sheetpath (names /) (tstamps /))
+ (tstamp 5AE4DD3C))
+ (comp (ref R2)
+ (value 10k)
+ (footprint Resistors_SMD:R_0805)
+ (libsource (lib device) (part R))
+ (sheetpath (names /) (tstamps /))
+ (tstamp 5AE4DF9A))
+ (comp (ref R4)
+ (value 10k)
+ (footprint Resistors_SMD:R_0805)
+ (libsource (lib device) (part R))
+ (sheetpath (names /) (tstamps /))
+ (tstamp 5AE4DFCF))
+ (comp (ref J7)
+ (value 5vTTL)
+ (footprint Pin_Headers:Pin_Header_Straight_1x02_Pitch2.54mm)
+ (libsource (lib conn) (part Conn_01x02))
+ (sheetpath (names /) (tstamps /))
+ (tstamp 5AE4E280))
+ (comp (ref J1)
+ (value audio)
+ (footprint Pin_Headers:Pin_Header_Straight_1x01_Pitch2.54mm)
+ (libsource (lib conn) (part Conn_01x01))
+ (sheetpath (names /) (tstamps /))
+ (tstamp 5AE60A6D)))
+ (libparts
+ (libpart (lib regul) (part AP1117-15)
+ (aliases
+ (alias AP1117-18)
+ (alias AP1117-25)
+ (alias AP1117-33)
+ (alias AP1117-50)
+ (alias LD1117S33TR_SOT223)
+ (alias LD1117S12TR_SOT223)
+ (alias LD1117S18TR_SOT223)
+ (alias LD1117S25TR_SOT223)
+ (alias LD1117S50TR_SOT223)
+ (alias NCP1117-12_SOT223)
+ (alias NCP1117-1.5_SOT223)
+ (alias NCP1117-1.8_SOT223)
+ (alias NCP1117-2.0_SOT223)
+ (alias NCP1117-2.5_SOT223)
+ (alias NCP1117-2.85_SOT223)
+ (alias NCP1117-3.3_SOT223)
+ (alias NCP1117-5.0_SOT223))
+ (description "1A Low Dropout regulator, positive, 1.5V fixed output, SOT-223")
+ (docs http://www.diodes.com/datasheets/AP1117.pdf)
+ (footprints
+ (fp SOT?223*TabPin2*))
+ (fields
+ (field (name Reference) U)
+ (field (name Value) AP1117-15)
+ (field (name Footprint) TO_SOT_Packages_SMD:SOT-223-3Lead_TabPin2))
+ (pins
+ (pin (num 1) (name GND) (type power_in))
+ (pin (num 2) (name VO) (type passive))
+ (pin (num 3) (name VI) (type power_in))))
+ (libpart (lib transistors) (part BSS138)
+ (aliases
+ (alias 2N7002)
+ (alias MMBF170))
+ (description "50V Vds, 0.22 A Id, N-channel MOSFET, SOT-23")
+ (docs https://www.fairchildsemi.com/datasheets/BS/BSS138.pdf)
+ (footprints
+ (fp SOT?23*))
+ (fields
+ (field (name Reference) Q)
+ (field (name Value) BSS138)
+ (field (name Footprint) TO_SOT_Packages_SMD:SOT-23))
+ (pins
+ (pin (num 1) (name G) (type input))
+ (pin (num 2) (name S) (type passive))
+ (pin (num 3) (name D) (type passive))))
+ (libpart (lib device) (part C)
+ (description "Unpolarized capacitor")
+ (footprints
+ (fp C_*))
+ (fields
+ (field (name Reference) C)
+ (field (name Value) C))
+ (pins
+ (pin (num 1) (name ~) (type passive))
+ (pin (num 2) (name ~) (type passive))))
+ (libpart (lib conn) (part Conn_01x01)
+ (description "Generic connector, single row, 01x01")
+ (docs ~)
+ (footprints
+ (fp Connector*:*_??x*mm*)
+ (fp Connector*:*1x??x*mm*)
+ (fp Pin?Header?Straight?1X*)
+ (fp Pin?Header?Angled?1X*)
+ (fp Socket?Strip?Straight?1X*)
+ (fp Socket?Strip?Angled?1X*))
+ (fields
+ (field (name Reference) J)
+ (field (name Value) Conn_01x01))
+ (pins
+ (pin (num 1) (name Pin_1) (type passive))))
+ (libpart (lib conn) (part Conn_01x02)
+ (description "Generic connector, single row, 01x02")
+ (docs ~)
+ (footprints
+ (fp Connector*:*_??x*mm*)
+ (fp Connector*:*1x??x*mm*)
+ (fp Pin?Header?Straight?1X*)
+ (fp Pin?Header?Angled?1X*)
+ (fp Socket?Strip?Straight?1X*)
+ (fp Socket?Strip?Angled?1X*))
+ (fields
+ (field (name Reference) J)
+ (field (name Value) Conn_01x02))
+ (pins
+ (pin (num 1) (name Pin_1) (type passive))
+ (pin (num 2) (name Pin_2) (type passive))))
+ (libpart (lib conn) (part Conn_01x06)
+ (description "Generic connector, single row, 01x06")
+ (docs ~)
+ (footprints
+ (fp Connector*:*_??x*mm*)
+ (fp Connector*:*1x??x*mm*)
+ (fp Pin?Header?Straight?1X*)
+ (fp Pin?Header?Angled?1X*)
+ (fp Socket?Strip?Straight?1X*)
+ (fp Socket?Strip?Angled?1X*))
+ (fields
+ (field (name Reference) J)
+ (field (name Value) Conn_01x06))
+ (pins
+ (pin (num 1) (name Pin_1) (type passive))
+ (pin (num 2) (name Pin_2) (type passive))
+ (pin (num 3) (name Pin_3) (type passive))
+ (pin (num 4) (name Pin_4) (type passive))
+ (pin (num 5) (name Pin_5) (type passive))
+ (pin (num 6) (name Pin_6) (type passive))))
+ (libpart (lib MainWorking) (part DRA818)
+ (docs /home/cale/Engineering/Electrical/Datasheets/DRA818V.pdf)
+ (footprints
+ (fp DRA818))
+ (fields
+ (field (name Reference) U)
+ (field (name Value) DRA818))
+ (pins
+ (pin (num 1) (name SQ) (type output))
+ (pin (num 3) (name AF_OUT) (type output))
+ (pin (num 5) (name PTT) (type input))
+ (pin (num 6) (name PD) (type input))
+ (pin (num 7) (name H/L) (type input))
+ (pin (num 8) (name VBAT) (type power_in))
+ (pin (num 9) (name GND) (type input))
+ (pin (num 10) (name GND) (type input))
+ (pin (num 12) (name ANT) (type output))
+ (pin (num 16) (name RXD) (type input))
+ (pin (num 17) (name TXD) (type output))
+ (pin (num 18) (name MIC_IN) (type input))))
+ (libpart (lib device) (part R)
+ (description Resistor)
+ (footprints
+ (fp R_*)
+ (fp R_*))
+ (fields
+ (field (name Reference) R)
+ (field (name Value) R))
+ (pins
+ (pin (num 1) (name ~) (type passive))
+ (pin (num 2) (name ~) (type passive)))))
+ (libraries
+ (library (logical transistors)
+ (uri /usr/share/kicad/library/transistors.lib))
+ (library (logical device)
+ (uri /usr/share/kicad/library/device.lib))
+ (library (logical conn)
+ (uri /usr/share/kicad/library/conn.lib))
+ (library (logical regul)
+ (uri /usr/share/kicad/library/regul.lib))
+ (library (logical MainWorking)
+ (uri /home/cale/Kicad/MyLibraries/MainWorking.lib)))
+ (nets
+ (net (code 1) (name +3V3)
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+ (node (ref U1) (pin 8))
+ (node (ref C1) (pin 1))
+ (node (ref Q1) (pin 1))
+ (node (ref Q2) (pin 1))
+ (node (ref R3) (pin 2))
+ (node (ref R1) (pin 2)))
+ (net (code 2) (name "Net-(J8-Pad2)")
+ (node (ref J8) (pin 2))
+ (node (ref Q2) (pin 2))
+ (node (ref R3) (pin 1)))
+ (net (code 3) (name "Net-(J8-Pad1)")
+ (node (ref J8) (pin 1))
+ (node (ref U1) (pin 16)))
+ (net (code 4) (name "Net-(J6-Pad2)")
+ (node (ref Q1) (pin 2))
+ (node (ref J6) (pin 2))
+ (node (ref R1) (pin 1)))
+ (net (code 5) (name "Net-(J2-Pad6)")
+ (node (ref J2) (pin 6)))
+ (net (code 6) (name "Net-(J7-Pad2)")
+ (node (ref J7) (pin 2))
+ (node (ref Q1) (pin 3))
+ (node (ref R2) (pin 1)))
+ (net (code 7) (name "Net-(J7-Pad1)")
+ (node (ref R4) (pin 1))
+ (node (ref Q2) (pin 3))
+ (node (ref J7) (pin 1)))
+ (net (code 8) (name "Net-(J2-Pad1)")
+ (node (ref J2) (pin 1))
+ (node (ref U1) (pin 1)))
+ (net (code 9) (name "Net-(J2-Pad2)")
+ (node (ref J2) (pin 2))
+ (node (ref U1) (pin 3)))
+ (net (code 10) (name "Net-(J2-Pad3)")
+ (node (ref U1) (pin 5))
+ (node (ref J2) (pin 3)))
+ (net (code 11) (name "Net-(J2-Pad4)")
+ (node (ref U1) (pin 6))
+ (node (ref J2) (pin 4)))
+ (net (code 12) (name "Net-(J2-Pad5)")
+ (node (ref U1) (pin 7))
+ (node (ref J2) (pin 5)))
+ (net (code 13) (name GND)
+ (node (ref C1) (pin 2))
+ (node (ref U2) (pin 1))
+ (node (ref J5) (pin 2))
+ (node (ref U1) (pin 10))
+ (node (ref U1) (pin 9)))
+ (net (code 14) (name "Net-(J6-Pad1)")
+ (node (ref U1) (pin 17))
+ (node (ref J6) (pin 1)))
+ (net (code 15) (name "Net-(J1-Pad1)")
+ (node (ref U1) (pin 18))
+ (node (ref J1) (pin 1)))
+ (net (code 16) (name "Net-(J3-Pad1)")
+ (node (ref U1) (pin 12))
+ (node (ref J3) (pin 1)))
+ (net (code 17) (name +5V)
+ (node (ref U2) (pin 3))
+ (node (ref J5) (pin 1))
+ (node (ref R2) (pin 2))
+ (node (ref R4) (pin 2)))))
\ No newline at end of file
diff --git a/DRA818testbed/DRA818testbed.pro b/DRA818testbed/DRA818testbed.pro
new file mode 100644
index 0000000..4923085
--- /dev/null
+++ b/DRA818testbed/DRA818testbed.pro
@@ -0,0 +1,64 @@
+update=Mon 23 Apr 2018 05:30:48 PM MDT
+version=1
+last_client=kicad
+[pcbnew]
+version=1
+LastNetListRead=
+UseCmpFile=1
+PadDrill=0.600000000000
+PadDrillOvalY=0.600000000000
+PadSizeH=1.500000000000
+PadSizeV=1.500000000000
+PcbTextSizeV=1.500000000000
+PcbTextSizeH=1.500000000000
+PcbTextThickness=0.300000000000
+ModuleTextSizeV=1.000000000000
+ModuleTextSizeH=1.000000000000
+ModuleTextSizeThickness=0.150000000000
+SolderMaskClearance=0.000000000000
+SolderMaskMinWidth=0.000000000000
+DrawSegmentWidth=0.200000000000
+BoardOutlineThickness=0.100000000000
+ModuleOutlineThickness=0.150000000000
+[cvpcb]
+version=1
+NetIExt=net
+[general]
+version=1
+[eeschema]
+version=1
+LibDir=
+[eeschema/libraries]
+LibName1=power
+LibName2=device
+LibName3=switches
+LibName4=relays
+LibName5=motors
+LibName6=transistors
+LibName7=conn
+LibName8=linear
+LibName9=regul
+LibName10=74xx
+LibName11=cmos4000
+LibName12=adc-dac
+LibName13=memory
+LibName14=xilinx
+LibName15=microcontrollers
+LibName16=dsp
+LibName17=microchip
+LibName18=analog_switches
+LibName19=motorola
+LibName20=texas
+LibName21=intel
+LibName22=audio
+LibName23=interface
+LibName24=digital-audio
+LibName25=philips
+LibName26=display
+LibName27=cypress
+LibName28=siliconi
+LibName29=opto
+LibName30=atmel
+LibName31=contrib
+LibName32=valves
+LibName33=/home/cale/Kicad/MyLibraries/MainWorking
diff --git a/DRA818testbed/DRA818testbed.sch b/DRA818testbed/DRA818testbed.sch
new file mode 100644
index 0000000..09729e3
--- /dev/null
+++ b/DRA818testbed/DRA818testbed.sch
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+EESchema Schematic File Version 2
+LIBS:power
+LIBS:device
+LIBS:switches
+LIBS:relays
+LIBS:motors
+LIBS:transistors
+LIBS:conn
+LIBS:linear
+LIBS:regul
+LIBS:74xx
+LIBS:cmos4000
+LIBS:adc-dac
+LIBS:memory
+LIBS:xilinx
+LIBS:microcontrollers
+LIBS:dsp
+LIBS:microchip
+LIBS:analog_switches
+LIBS:motorola
+LIBS:texas
+LIBS:intel
+LIBS:audio
+LIBS:interface
+LIBS:digital-audio
+LIBS:philips
+LIBS:display
+LIBS:cypress
+LIBS:siliconi
+LIBS:opto
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+LIBS:contrib
+LIBS:valves
+LIBS:MainWorking
+LIBS:DRA818testbed-cache
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+EELAYER END
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