From da23e464184bef9d82e267f21040ceb34ff9258b Mon Sep 17 00:00:00 2001 From: emb Date: Tue, 23 Jan 2018 19:58:44 -0500 Subject: [PATCH] Revert "Revert "prgm sample transfer"" This reverts commit 1bd48f8bed356edd957f2bf463991185dcc4017c. --- apps/bees/src/app_bees.c | 27 +++++++++++ apps/bees/src/files.c | 72 +++++++++++++++++++++++++++++ apps/bees/src/files.h | 5 ++ avr32/src/bfin.c | 64 ++++++++++++++++++++++++++ avr32/src/bfin.h | 5 ++ avr32/src/filesystem.c | 99 ++++++++++++++++++++++++++++------------ avr32/src/filesystem.h | 5 +- avr32/src/interrupts.c | 32 +++++++------ bfin_lib/src/spi.c | 57 +++++++++++++++++++++++ common/protocol.h | 16 +++++++ 10 files changed, 338 insertions(+), 44 deletions(-) diff --git a/apps/bees/src/app_bees.c b/apps/bees/src/app_bees.c index cc6586f0c..ce81a7309 100644 --- a/apps/bees/src/app_bees.c +++ b/apps/bees/src/app_bees.c @@ -168,6 +168,33 @@ u8 app_launch(eLaunchState state) { print_dbg("\r\n pages_init..."); pages_init(); + //PRGM SAMPLE TRANSFER PR + //MAYBE NOT NECESSARY TO DO THIS EXACTLY HERE, BUT SOMEWHERE NEEDS TO BE A PLACE TO INITIATE AND COUNT THE SAMPLE TRANSFERS.. + // ------------------------------------------------------------------------- + bfin_disable(); + + render_boot("loading samples..."); + for (smpl = N_BUFFERS+1; smpl < n_samples; smpl++) + { + if (smpl < N_SAMPLES) + { + files_load_sample(smpl); + } + else + { + render_boot("sample file limit error"); + } + } + + // set last sample loop point and send to bfin + sample[smpl]->offset = sample[smpl-1]->offset + sample[smpl-1]->loop + 0xf; + + // THIS IS BECAUSE THE PRGM MODULE IS SETUP TO STORE THE OFFSETS, SO THAT THEY CAN BE CHANGED BY ONLY SENDING THE SAMPLE ID/NUMBER, ONE PARAMETER CHANGE INSTEAD OF TWO.. + ctl_param_change(smpl, eParamSampleMarker, sample[smpl]->offset); + + bfin_enable(); + // ------------------------------------------------------------------------- + print_dbg("\r\n play_init..."); play_init(); diff --git a/apps/bees/src/files.c b/apps/bees/src/files.c index 7787e0d8a..ca1f4068b 100644 --- a/apps/bees/src/files.c +++ b/apps/bees/src/files.c @@ -622,4 +622,76 @@ extern u8 files_load_desc(const char* name) { return ret; } +//PRGM SAMPLE TRANSFER PR +void files_load_sample(u8 n) { + void *fp; + u32 fsize, foffset; + uint32_t chunk; + + delay_ms(10); + + //THIS COULD BE REPLACED WITH A COMMON WAY TO SCAN A FOLDER FOR SAMPLE FILES, IN PRGM ALL SAMPLE PATHS ARE SCANNED FIRST, BUT THEY COULD ALSO BE CHECKED ON THE GO, HOWEVER THE OFFSETS WILL NEED TO BE SAVED SOMEWHERE + fp = fl_fopen(sample_filepath(n-(N_BUFFERS+1)), "r"); + fsize = ((FL_FILE*)(fp))->filelength; + foffset = ((FL_FILE*)(fp))->bytenum % FAT_SECTOR_SIZE; + + //OFFSETS ARE SAVED IN AN ARRAY OF STRUCTS, THIS COULD MAYBE BE CHANGED INTO A BEES SAMPLE OPERATOR + sample[n]->loop = fsize / sizeof(s32); + + //THIS IS JUST A SIMPLE COUNT DOWN TO AVOID GOING OVER 64 MB (STARTS AT 0x4000000 ATM) + bfinMemCheck -= sample[n]->loop; + + // check SDRAM size limit + if (bfinMemCheck > 0) + { + // set sample start point and send to bfin + sample[n]->offset = sample[n-1]->offset + sample[n-1]->loop + 0xf; + ctl_param_change(n, eParamSampleMarker, sample[n]->offset); + + if (fp != NULL) + { + render_boot(sample_name[n-N_BUFFERS]); + + app_pause(); + + bfin_sample_start(sample[n]->offset); + + do + { + if (fsize < FAT_SECTOR_SIZE) + { + chunk = fsize; + } + else + { + chunk = FAT_SECTOR_SIZE; + } + fsize -= chunk; + + bfin_sample_transfer(fl_return_sector(fp, foffset), chunk); + + foffset += 1; + ((FL_FILE*)(fp))->bytenum += chunk; + } + while (fsize > 0); + + bfin_sample_end(); + + fl_fclose(fp); + + app_resume(); + } + else + { + render_boot("sample file error"); + fl_fclose(fp); + } + } + else + { + render_boot("SDRAM size limit error"); + smpl = N_OFFSETS + 1; + fl_fclose(fp); + } +} diff --git a/apps/bees/src/files.h b/apps/bees/src/files.h index e5543038b..3cacfe630 100644 --- a/apps/bees/src/files.h +++ b/apps/bees/src/files.h @@ -76,5 +76,10 @@ extern bool check_ext(char* str, const char* ext ); // strip extension from the end of a string extern bool strip_ext(char* str); + + +//PRGM SAMPLE TRANSFER PR +extern void files_load_sample(u8 n); + EXTERN_C_END #endif // header guard diff --git a/avr32/src/bfin.c b/avr32/src/bfin.c index 2fd444099..476bb04ae 100644 --- a/avr32/src/bfin.c +++ b/avr32/src/bfin.c @@ -412,3 +412,67 @@ void bfin_fill_buffer(const s32* src, u32 bytes) { app_resume(); } + +// PRGM SAMPLE TRANSFER PR +void bfin_sample_start(s32 offset) { + ParamValueSwap o; + + // send offset + o.asInt = offset; + + bfin_wait(); + spi_selectChip(BFIN_SPI, BFIN_SPI_NPCS); + + // set command + spi_write(BFIN_SPI, MSG_OFFSET_COM); + while (!(BFIN_SPI->sr & AVR32_SPI_SR_TXEMPTY_MASK)) { ;; }; + + // byte 1 + spi_write(BFIN_SPI, o.asByte[0]); + while (!(BFIN_SPI->sr & AVR32_SPI_SR_TXEMPTY_MASK)) { ;; }; + + // byte 2 + spi_write(BFIN_SPI, o.asByte[1]); + while (!(BFIN_SPI->sr & AVR32_SPI_SR_TXEMPTY_MASK)) { ;; }; + + // byte 3 + spi_write(BFIN_SPI, o.asByte[2]); + while (!(BFIN_SPI->sr & AVR32_SPI_SR_TXEMPTY_MASK)) { ;; }; + + // byte 4 + spi_write(BFIN_SPI, o.asByte[3]); + while (!(BFIN_SPI->sr & AVR32_SPI_SR_TXEMPTY_MASK)) { ;; }; +} + +void bfin_sample(s32 sample) { + ParamValueSwap s; + + // send sample + s.asInt = sample; + + // set command + while (gpio_get_pin_value(BFIN_HWAIT_PIN)); + BFIN_SPI->tdr = MSG_SAMPLE_COM << AVR32_SPI_TDR_TD_OFFSET; + + // byte 1 + while (gpio_get_pin_value(BFIN_HWAIT_PIN)); + BFIN_SPI->tdr = s.asByte[0] << AVR32_SPI_TDR_TD_OFFSET; + + // byte 2 + while (gpio_get_pin_value(BFIN_HWAIT_PIN)); + BFIN_SPI->tdr = s.asByte[1] << AVR32_SPI_TDR_TD_OFFSET; + + // byte 3 + while (gpio_get_pin_value(BFIN_HWAIT_PIN)); + BFIN_SPI->tdr = s.asByte[2] << AVR32_SPI_TDR_TD_OFFSET; + + // byte 4 + while (gpio_get_pin_value(BFIN_HWAIT_PIN)); + BFIN_SPI->tdr = s.asByte[3] << AVR32_SPI_TDR_TD_OFFSET; +} + + +void bfin_sample_end(void) { + bfin_wait(); + spi_unselectChip(BFIN_SPI, BFIN_SPI_NPCS); +} diff --git a/avr32/src/bfin.h b/avr32/src/bfin.h index 4e4959b6c..56fd1d88f 100644 --- a/avr32/src/bfin.h +++ b/avr32/src/bfin.h @@ -57,4 +57,9 @@ extern s32 bfin_get_control_cpu(void); //! fill a buffer on the blackfin with arbitrary data extern void bfin_fill_buffer(const s32* src, u32 bytes); +//SAMPLE TRANSFER FROM PRGM +extern void bfin_sample_start(s32 offset); +extern void bfin_sample(s32 sample); +extern void bfin_sample_end(void); + #endif // header guard diff --git a/avr32/src/filesystem.c b/avr32/src/filesystem.c index 03daeb7ad..577436b43 100644 --- a/avr32/src/filesystem.c +++ b/avr32/src/filesystem.c @@ -21,7 +21,7 @@ volatile U8 pdcaRxBuf[FS_BUF_SIZE]; volatile U8 pdcaTxBuf[FS_BUF_SIZE]; // Used to indicate the end of PDCA transfer -volatile u8 fsEndTransfer; +//volatile u8 fsEndTransfer; //---- static // PDCA Channel pointer @@ -34,41 +34,40 @@ volatile avr32_pdca_channel_t *pdcaTxChan; //---- low level i/o int media_read(unsigned long sector, unsigned char *buffer, unsigned long sector_count); -int media_read(unsigned long sector, unsigned char *buffer, - unsigned long sector_count) { - unsigned long i; - - for (i = 0; i < sector_count; i++) { - pdca_load_channel(AVR32_PDCA_CHANNEL_SPI_RX, &pdcaRxBuf, FS_BUF_SIZE); - - pdca_load_channel(AVR32_PDCA_CHANNEL_SPI_TX, (void *)&pdcaTxBuf, - FS_BUF_SIZE); // send dummy to activate the clock - - fsEndTransfer = false; - - if (sd_mmc_spi_read_open_PDCA(sector)) { - spi_write(SD_MMC_SPI, 0xFF); // dummy byte synchronizes transfer +// PRGM SAMPLE TRANSFER PR, REMOVED FLAG! +int media_read(unsigned long sector, unsigned char *buffer, unsigned long sector_count) { + unsigned long i; + + for (i=0;icr = - AVR32_PDCA_TEN_MASK; // Enable RX PDCA transfer first - pdcaTxChan->cr = AVR32_PDCA_TEN_MASK; // and TX PDCA transfer + pdcaRxChan =(volatile avr32_pdca_channel_t*) pdca_get_handler(AVR32_PDCA_CHANNEL_SPI_RX); + pdcaTxChan =(volatile avr32_pdca_channel_t*) pdca_get_handler(AVR32_PDCA_CHANNEL_SPI_TX); + pdcaRxChan->cr = AVR32_PDCA_TEN_MASK; // Enable RX PDCA transfer first + pdcaTxChan->cr = AVR32_PDCA_TEN_MASK; // and TX PDCA transfer // wait for signal from ISR - while (!fsEndTransfer) { - ; - ; - } + while (!(pdcaRxChan->isr & AVR32_PDCA_ISR_TRC_MASK)); // copy FIXME: could optimize away - for (i = 0; i < FS_BUF_SIZE; i++) { buffer[i] = pdcaRxBuf[i]; } + for(i=0; iisr & AVR32_PDCA_ISR_TRC_MASK)); + + // spi transfer + for (i=0; itdr = MSG_SAMPLE_COM << AVR32_SPI_TDR_TD_OFFSET; + while (!(BFIN_SPI->sr & AVR32_SPI_SR_TXEMPTY_MASK)) { ;; }; + + BFIN_SPI->tdr = pdcaRxBuf[i] << AVR32_SPI_TDR_TD_OFFSET; + while (!(BFIN_SPI->sr & AVR32_SPI_SR_TXEMPTY_MASK)) { ;; }; + + BFIN_SPI->tdr = pdcaRxBuf[i + 1] << AVR32_SPI_TDR_TD_OFFSET; + while (!(BFIN_SPI->sr & AVR32_SPI_SR_TXEMPTY_MASK)) { ;; }; + + BFIN_SPI->tdr = pdcaRxBuf[i + 2] << AVR32_SPI_TDR_TD_OFFSET; + while (!(BFIN_SPI->sr & AVR32_SPI_SR_TXEMPTY_MASK)) { ;; }; + + BFIN_SPI->tdr = pdcaRxBuf[i + 3] << AVR32_SPI_TDR_TD_OFFSET; + while (!(BFIN_SPI->sr & AVR32_SPI_SR_TXEMPTY_MASK)) { ;; }; + } + } + return 1; +} + diff --git a/avr32/src/filesystem.h b/avr32/src/filesystem.h index d988b9978..c592e0d4a 100644 --- a/avr32/src/filesystem.h +++ b/avr32/src/filesystem.h @@ -9,7 +9,7 @@ //===================================== //==== vars // transfer-done flag -extern volatile u8 fsEndTransfer; +//extern volatile u8 fsEndTransfer; // Local RAM buffer to store data to/from the SD/MMC card extern volatile U8 pdcaRxBuf[FS_BUF_SIZE]; extern volatile U8 pdcaTxBuf[FS_BUF_SIZE]; @@ -21,4 +21,7 @@ extern volatile avr32_pdca_channel_t* pdcaTxChan; //==== funcs extern int fat_init(void); +//PRGM SAMPLE TRANSFER PR +extern int bfin_sample_transfer(unsigned long sector, unsigned long bytes); + #endif // h guard diff --git a/avr32/src/interrupts.c b/avr32/src/interrupts.c index 30fb0341a..a03a0c3f3 100644 --- a/avr32/src/interrupts.c +++ b/avr32/src/interrupts.c @@ -62,26 +62,30 @@ __attribute__((__interrupt__)) static void irq_usart(void); //--------------------------------- //----- static function definitions -__attribute__((__interrupt__)) static void irq_pdca(void) { - // Disable all interrupts. - // Disable_global_interrupt(); + +//PRGM SAMPLE TRANSFER PR +__attribute__((__interrupt__)) +static void irq_pdca(void) { + // disable all interrupts. cpu_irq_disable(); - // Disable interrupt channel. + + // disable interrupt channel. pdca_disable_interrupt_transfer_complete(AVR32_PDCA_CHANNEL_SPI_RX); - // unselects the SD/MMC memory. + + // unselects the SD/MMC memory. sd_mmc_spi_read_close_PDCA(); - //.... example has a 5000 clock gimpy delay here. - // using delay_us instead - delay_ms(10); - // delay_ms(2); - // Disable unnecessary channel + + //REDUCED DELAY FROM MS TO US + delay_us(10); + + // disable unnecessary channel pdca_disable(AVR32_PDCA_CHANNEL_SPI_TX); pdca_disable(AVR32_PDCA_CHANNEL_SPI_RX); - // Enable all interrupts. + + // enable all interrupts. cpu_irq_enable(); - // Enable_global_interrupt(); - // print_dbg("\r\n handled PDCA interrupt. \r\n"); - fsEndTransfer = true; + + //REMOVED FLAG, SEE filesystem.c } // timer irq diff --git a/bfin_lib/src/spi.c b/bfin_lib/src/spi.c index bf09f9aa9..cf54f9732 100644 --- a/bfin_lib/src/spi.c +++ b/bfin_lib/src/spi.c @@ -62,6 +62,15 @@ u8 spi_process(u8 rx) { processAudio = 0; return processAudio; break; + + case MSG_OFFSET_COM : + byte = eOffset0; + break; + + case MSG_SAMPLE_COM : + byte = eSample0; + break; + default: break; } @@ -259,6 +268,54 @@ u8 spi_process(u8 rx) { return 0; // don't care break; + + // set offset + case eOffset0 : + byte = eOffset1; + o.asByte[3] = rx; + return 0; + break; + case eOffset1 : + byte = eOffset2; + o.asByte[2] = rx; + return 0; + break; + case eOffset2 : + byte = eOffset3; + o.asByte[1] = rx; + return 0; + break; + case eOffset3 : + o.asByte[0] = rx; + module_set_offset(o.asInt); + byte = eCom; + return 0; + break; + + // set sample + case eSample0 : + byte = eSample1; + s.asByte[3] = rx; + return 0; + break; + case eSample1 : + byte = eSample2; + s.asByte[2] = rx; + return 0; + break; + case eSample2 : + byte = eSample3; + s.asByte[1] = rx; + return 0; + break; + case eSample3 : + s.asByte[0] = rx; + module_set_sample(s.asInt); + byte = eCom; + return 0; + break; + + default: byte = eCom; // reset return 0; diff --git a/common/protocol.h b/common/protocol.h index 7c97e11d6..98a5d4137 100644 --- a/common/protocol.h +++ b/common/protocol.h @@ -32,6 +32,10 @@ // get param change CPU use (0 - 0x7fffffff) #define MSG_GET_CONTROL_CPU_COM 10 +// PRGM SAMPLE TRANSFER, THESE WOULD BE ADDED WITH APPROPRIATE ID's! +#define MSG_OFFSET_COM X +#define MSG_SAMPLE_COM Y + // enumerate state-machine nodes for sending and receiving SPI. /// WARNING! @@ -107,6 +111,18 @@ typedef enum { eGetControlCpuData0, eGetControlCpuData1, eGetControlCpuData2, + + // offset + eOffset0, + eOffset1, + eOffset2, + eOffset3, + + // sample + eSample0, + eSample1, + eSample2, + eSample3, eNumSpiBytes } eSpiByte;