[Discussion] Long term design

[DrSensor]

Just dumping my quick notes from my phone
Need to elaborate more

Motivation

TBD

Design

Variant of DSL

eDSL (embedded DSL)

FSM, aliasing and import statement

xDSL (external DSL)

eDSL, Statecharts, Formal Verification, spec definition
Problem:> should parallel state be included 🤔

exDSL (extended DSL)

xDSL, embed another language (similar mechanism like in Julia or Markdown)

Compiler design

StateMachine as a runtime

• compile to s-expr (wasm)
  universal runtime: wasm3

• compile to bytecode (llvm)
  use cases: static or shared lib

• standalone runtime
  use cases: custom rules engine utilizing exDSL

StateMachine as generated code

• embedded compiler
  use cases: eDSL via procedural macro

• integrated compiler
  use cases: build-system's plugin for xDSL

• compile to C 🤔
  use cases: statically link to gcc microcontroller or just use it along with the main code

Construct

when prototyping a solution
(no particular order)

Develop - Design - Verify
eDSL + proglang -> xDSL -> test script + formal verification

Design - Verify - Develop
xDSL -> formal verification -> proglang + unit test

Design - Develop - Verify
xDSL -> proglang -> test script

Verify - Design - Develop
spec + test definition -> transition definition -> implemenration

• Spec Definition - Describe available states, events, actions, etc. In short, it's like type declaration
• Transition Definition - Describe the StateMachine itself
• Test Definition - Describe rules that Transition Definiton must follow. In other words, this is the formal verification of statemachine