From f70e6a30bbb699e3924440ee1b7dd2643e14c8bb Mon Sep 17 00:00:00 2001 From: Conor Dooley Date: Wed, 18 Mar 2026 16:37:32 +0000 Subject: [PATCH 01/13] net: macb: rename macb_default_usrio to at91_default_usrio as not all platforms have mii mode control in usrio Calling this structure macb_default_usrio is misleading, I believe, as it implies that it should be used if your platform has nothing special to do in usrio. Since usrio is platform dependent, the default here is probably for each usrio to do nothing, with the macb documentation I have access to prescribing no standard behaviour here. We noticed that this was problematic because on mpfs, a bit that macb_default_usrio sets to deal with the MII mode actually changes the source for the tsu_clk to something with how the majority of mpfs devices are actually configured! Rename it to at91_default_usrio, since that's where the values actually come from for these. I have no idea if any of the other platforms that use the default actually copied at91's usrio configuration or if they have usrio configurations where what the driver does has no impact. Gate touching these bits behind a capability, like the clken refclock usrio knob, so that platforms without the MII mode stuff can avoid running this code. Signed-off-by: Conor Dooley Signed-off-by: Linux RISC-V bot --- drivers/net/ethernet/cadence/macb.h | 1 + drivers/net/ethernet/cadence/macb_main.c | 108 +++++++++++++---------- 2 files changed, 63 insertions(+), 46 deletions(-) diff --git a/drivers/net/ethernet/cadence/macb.h b/drivers/net/ethernet/cadence/macb.h index 87414a2ddf6e3a..8cb0b3778ee9e1 100644 --- a/drivers/net/ethernet/cadence/macb.h +++ b/drivers/net/ethernet/cadence/macb.h @@ -779,6 +779,7 @@ #define MACB_CAPS_DMA_PTP BIT(22) #define MACB_CAPS_RSC BIT(23) #define MACB_CAPS_NO_LSO BIT(24) +#define MACB_CAPS_USRIO_HAS_MII BIT(25) /* LSO settings */ #define MACB_LSO_UFO_ENABLE 0x01 diff --git a/drivers/net/ethernet/cadence/macb_main.c b/drivers/net/ethernet/cadence/macb_main.c index 43cd013bb70e6b..18805cd0af6d54 100644 --- a/drivers/net/ethernet/cadence/macb_main.c +++ b/drivers/net/ethernet/cadence/macb_main.c @@ -4613,13 +4613,15 @@ static int macb_init(struct platform_device *pdev) if (!(bp->caps & MACB_CAPS_USRIO_DISABLED)) { val = 0; - if (phy_interface_mode_is_rgmii(bp->phy_interface)) - val = bp->usrio->rgmii; - else if (bp->phy_interface == PHY_INTERFACE_MODE_RMII && - (bp->caps & MACB_CAPS_USRIO_DEFAULT_IS_MII_GMII)) - val = bp->usrio->rmii; - else if (!(bp->caps & MACB_CAPS_USRIO_DEFAULT_IS_MII_GMII)) - val = bp->usrio->mii; + if (bp->caps & MACB_CAPS_USRIO_HAS_MII) { + if (phy_interface_mode_is_rgmii(bp->phy_interface)) + val = bp->usrio->rgmii; + else if (bp->phy_interface == PHY_INTERFACE_MODE_RMII && + (bp->caps & MACB_CAPS_USRIO_DEFAULT_IS_MII_GMII)) + val = bp->usrio->rmii; + else if (!(bp->caps & MACB_CAPS_USRIO_DEFAULT_IS_MII_GMII)) + val = bp->usrio->mii; + } if (bp->caps & MACB_CAPS_USRIO_HAS_CLKEN) val |= bp->usrio->refclk; @@ -4637,13 +4639,6 @@ static int macb_init(struct platform_device *pdev) return 0; } -static const struct macb_usrio_config macb_default_usrio = { - .mii = MACB_BIT(MII), - .rmii = MACB_BIT(RMII), - .rgmii = GEM_BIT(RGMII), - .refclk = MACB_BIT(CLKEN), -}; - #if defined(CONFIG_OF) /* 1518 rounded up */ #define AT91ETHER_MAX_RBUFF_SZ 0x600 @@ -5218,6 +5213,13 @@ static int eyeq5_init(struct platform_device *pdev) return ret; } +static const struct macb_usrio_config at91_default_usrio = { + .mii = MACB_BIT(MII), + .rmii = MACB_BIT(RMII), + .rgmii = GEM_BIT(RGMII), + .refclk = MACB_BIT(CLKEN), +}; + static const struct macb_usrio_config sama7g5_usrio = { .mii = 0, .rmii = 1, @@ -5228,104 +5230,114 @@ static const struct macb_usrio_config sama7g5_usrio = { static const struct macb_config fu540_c000_config = { .caps = MACB_CAPS_GIGABIT_MODE_AVAILABLE | MACB_CAPS_JUMBO | - MACB_CAPS_GEM_HAS_PTP, + MACB_CAPS_GEM_HAS_PTP | MACB_CAPS_USRIO_HAS_MII, .dma_burst_length = 16, .clk_init = fu540_c000_clk_init, .init = fu540_c000_init, .jumbo_max_len = 10240, - .usrio = &macb_default_usrio, + .usrio = &at91_default_usrio, }; static const struct macb_config at91sam9260_config = { - .caps = MACB_CAPS_USRIO_HAS_CLKEN | MACB_CAPS_USRIO_DEFAULT_IS_MII_GMII, + .caps = MACB_CAPS_USRIO_HAS_CLKEN | MACB_CAPS_USRIO_DEFAULT_IS_MII_GMII | + MACB_CAPS_USRIO_HAS_MII, .clk_init = macb_clk_init, .init = macb_init, - .usrio = &macb_default_usrio, + .usrio = &at91_default_usrio, }; static const struct macb_config sama5d3macb_config = { .caps = MACB_CAPS_SG_DISABLED | - MACB_CAPS_USRIO_HAS_CLKEN | MACB_CAPS_USRIO_DEFAULT_IS_MII_GMII, + MACB_CAPS_USRIO_HAS_CLKEN | MACB_CAPS_USRIO_DEFAULT_IS_MII_GMII | + MACB_CAPS_USRIO_HAS_MII, .clk_init = macb_clk_init, .init = macb_init, - .usrio = &macb_default_usrio, + .usrio = &at91_default_usrio, }; static const struct macb_config pc302gem_config = { - .caps = MACB_CAPS_SG_DISABLED | MACB_CAPS_GIGABIT_MODE_AVAILABLE, + .caps = MACB_CAPS_SG_DISABLED | MACB_CAPS_GIGABIT_MODE_AVAILABLE | + MACB_CAPS_USRIO_HAS_MII, .dma_burst_length = 16, .clk_init = macb_clk_init, .init = macb_init, - .usrio = &macb_default_usrio, + .usrio = &at91_default_usrio, }; static const struct macb_config sama5d2_config = { - .caps = MACB_CAPS_USRIO_DEFAULT_IS_MII_GMII | MACB_CAPS_JUMBO, + .caps = MACB_CAPS_USRIO_DEFAULT_IS_MII_GMII | MACB_CAPS_JUMBO | + MACB_CAPS_USRIO_HAS_MII, .dma_burst_length = 16, .clk_init = macb_clk_init, .init = macb_init, .jumbo_max_len = 10240, - .usrio = &macb_default_usrio, + .usrio = &at91_default_usrio, }; static const struct macb_config sama5d29_config = { - .caps = MACB_CAPS_USRIO_DEFAULT_IS_MII_GMII | MACB_CAPS_GEM_HAS_PTP, + .caps = MACB_CAPS_USRIO_DEFAULT_IS_MII_GMII | MACB_CAPS_GEM_HAS_PTP | + MACB_CAPS_USRIO_HAS_MII, .dma_burst_length = 16, .clk_init = macb_clk_init, .init = macb_init, - .usrio = &macb_default_usrio, + .usrio = &at91_default_usrio, }; static const struct macb_config sama5d3_config = { .caps = MACB_CAPS_SG_DISABLED | MACB_CAPS_GIGABIT_MODE_AVAILABLE | - MACB_CAPS_USRIO_DEFAULT_IS_MII_GMII | MACB_CAPS_JUMBO, + MACB_CAPS_USRIO_DEFAULT_IS_MII_GMII | MACB_CAPS_JUMBO | + MACB_CAPS_USRIO_HAS_MII, .dma_burst_length = 16, .clk_init = macb_clk_init, .init = macb_init, .jumbo_max_len = 10240, - .usrio = &macb_default_usrio, + .usrio = &at91_default_usrio, }; static const struct macb_config sama5d4_config = { - .caps = MACB_CAPS_USRIO_DEFAULT_IS_MII_GMII, + .caps = MACB_CAPS_USRIO_DEFAULT_IS_MII_GMII | + MACB_CAPS_USRIO_HAS_MII, .dma_burst_length = 4, .clk_init = macb_clk_init, .init = macb_init, - .usrio = &macb_default_usrio, + .usrio = &at91_default_usrio, }; static const struct macb_config emac_config = { - .caps = MACB_CAPS_NEEDS_RSTONUBR | MACB_CAPS_MACB_IS_EMAC, + .caps = MACB_CAPS_NEEDS_RSTONUBR | MACB_CAPS_MACB_IS_EMAC | + MACB_CAPS_USRIO_HAS_MII, .clk_init = at91ether_clk_init, .init = at91ether_init, - .usrio = &macb_default_usrio, + .usrio = &at91_default_usrio, }; static const struct macb_config np4_config = { .caps = MACB_CAPS_USRIO_DISABLED, .clk_init = macb_clk_init, .init = macb_init, - .usrio = &macb_default_usrio, + .usrio = &at91_default_usrio, }; static const struct macb_config zynqmp_config = { .caps = MACB_CAPS_GIGABIT_MODE_AVAILABLE | MACB_CAPS_JUMBO | - MACB_CAPS_GEM_HAS_PTP | MACB_CAPS_BD_RD_PREFETCH, + MACB_CAPS_GEM_HAS_PTP | MACB_CAPS_BD_RD_PREFETCH | + MACB_CAPS_USRIO_HAS_MII, .dma_burst_length = 16, .clk_init = macb_clk_init, .init = init_reset_optional, .jumbo_max_len = 10240, - .usrio = &macb_default_usrio, + .usrio = &at91_default_usrio, }; static const struct macb_config zynq_config = { .caps = MACB_CAPS_GIGABIT_MODE_AVAILABLE | MACB_CAPS_NO_GIGABIT_HALF | - MACB_CAPS_NEEDS_RSTONUBR, + MACB_CAPS_NEEDS_RSTONUBR | + MACB_CAPS_USRIO_HAS_MII, .dma_burst_length = 16, .clk_init = macb_clk_init, .init = macb_init, - .usrio = &macb_default_usrio, + .usrio = &at91_default_usrio, }; static const struct macb_config mpfs_config = { @@ -5335,7 +5347,7 @@ static const struct macb_config mpfs_config = { .dma_burst_length = 16, .clk_init = macb_clk_init, .init = init_reset_optional, - .usrio = &macb_default_usrio, + .usrio = &at91_default_usrio, .max_tx_length = 4040, /* Cadence Erratum 1686 */ .jumbo_max_len = 4040, }; @@ -5343,7 +5355,8 @@ static const struct macb_config mpfs_config = { static const struct macb_config sama7g5_gem_config = { .caps = MACB_CAPS_GIGABIT_MODE_AVAILABLE | MACB_CAPS_CLK_HW_CHG | MACB_CAPS_USRIO_DEFAULT_IS_MII_GMII | - MACB_CAPS_MIIONRGMII | MACB_CAPS_GEM_HAS_PTP, + MACB_CAPS_MIIONRGMII | MACB_CAPS_GEM_HAS_PTP | + MACB_CAPS_USRIO_HAS_MII, .dma_burst_length = 16, .clk_init = macb_clk_init, .init = macb_init, @@ -5353,7 +5366,8 @@ static const struct macb_config sama7g5_gem_config = { static const struct macb_config sama7g5_emac_config = { .caps = MACB_CAPS_USRIO_DEFAULT_IS_MII_GMII | MACB_CAPS_USRIO_HAS_CLKEN | MACB_CAPS_MIIONRGMII | - MACB_CAPS_GEM_HAS_PTP, + MACB_CAPS_GEM_HAS_PTP | + MACB_CAPS_USRIO_HAS_MII, .dma_burst_length = 16, .clk_init = macb_clk_init, .init = macb_init, @@ -5364,12 +5378,13 @@ static const struct macb_config versal_config = { .caps = MACB_CAPS_GIGABIT_MODE_AVAILABLE | MACB_CAPS_JUMBO | MACB_CAPS_GEM_HAS_PTP | MACB_CAPS_BD_RD_PREFETCH | MACB_CAPS_NEED_TSUCLK | MACB_CAPS_QUEUE_DISABLE | - MACB_CAPS_QBV, + MACB_CAPS_QBV | + MACB_CAPS_USRIO_HAS_MII, .dma_burst_length = 16, .clk_init = macb_clk_init, .init = init_reset_optional, .jumbo_max_len = 10240, - .usrio = &macb_default_usrio, + .usrio = &at91_default_usrio, }; static const struct macb_config eyeq5_config = { @@ -5380,17 +5395,18 @@ static const struct macb_config eyeq5_config = { .clk_init = macb_clk_init, .init = eyeq5_init, .jumbo_max_len = 10240, - .usrio = &macb_default_usrio, + .usrio = &at91_default_usrio, }; static const struct macb_config raspberrypi_rp1_config = { .caps = MACB_CAPS_GIGABIT_MODE_AVAILABLE | MACB_CAPS_CLK_HW_CHG | MACB_CAPS_JUMBO | - MACB_CAPS_GEM_HAS_PTP, + MACB_CAPS_GEM_HAS_PTP | + MACB_CAPS_USRIO_HAS_MII, .dma_burst_length = 16, .clk_init = macb_clk_init, .init = macb_init, - .usrio = &macb_default_usrio, + .usrio = &at91_default_usrio, .jumbo_max_len = 10240, }; @@ -5431,7 +5447,7 @@ static const struct macb_config default_gem_config = { .dma_burst_length = 16, .clk_init = macb_clk_init, .init = macb_init, - .usrio = &macb_default_usrio, + .usrio = NULL, .jumbo_max_len = 10240, }; From 03a32b14968deade1589153078b0e86aeac5cdd7 Mon Sep 17 00:00:00 2001 From: Conor Dooley Date: Wed, 18 Mar 2026 16:37:33 +0000 Subject: [PATCH 02/13] net: macb: split USRIO_HAS_CLKEN capability in two While trying to rework the internal/external refclk selection on sama7g5, Ryan and I noticed that the sama7g5 was "overloading" the meaning of MACB_CAPS_USRIO_HAS_CLKEN, using it differently to how it was originally intended. Originally, on the macb hardware on sam9620 et al, MACB_CAPS_USRIO_HAS_CLKEN represented the hardware having a bit that needed to be set to turn on the input clock to the transceivers. The sama7g5 doesn't have this bit, so for some reason the decision was made to reuse this capability flag to control selection of internal/external references. Split the caps in two, so that capabilities do what they say on the tin, and allow reworking the refclk selection handling without impacting the older devices that use MACB_CAPS_USRIO_CLKEN for its original purpose. Signed-off-by: Conor Dooley Signed-off-by: Linux RISC-V bot --- drivers/net/ethernet/cadence/macb.h | 2 ++ drivers/net/ethernet/cadence/macb_main.c | 11 ++++++++--- 2 files changed, 10 insertions(+), 3 deletions(-) diff --git a/drivers/net/ethernet/cadence/macb.h b/drivers/net/ethernet/cadence/macb.h index 8cb0b3778ee9e1..baf48f02d7e275 100644 --- a/drivers/net/ethernet/cadence/macb.h +++ b/drivers/net/ethernet/cadence/macb.h @@ -780,6 +780,7 @@ #define MACB_CAPS_RSC BIT(23) #define MACB_CAPS_NO_LSO BIT(24) #define MACB_CAPS_USRIO_HAS_MII BIT(25) +#define MACB_CAPS_USRIO_HAS_REFCLK_SOURCE BIT(26) /* LSO settings */ #define MACB_LSO_UFO_ENABLE 0x01 @@ -1211,6 +1212,7 @@ struct macb_usrio_config { u32 rmii; u32 rgmii; u32 refclk; + u32 clken; u32 hdfctlen; }; diff --git a/drivers/net/ethernet/cadence/macb_main.c b/drivers/net/ethernet/cadence/macb_main.c index 18805cd0af6d54..6297d9e58dcd5c 100644 --- a/drivers/net/ethernet/cadence/macb_main.c +++ b/drivers/net/ethernet/cadence/macb_main.c @@ -4357,7 +4357,7 @@ static void macb_configure_caps(struct macb *bp, } if (refclk_ext) - bp->caps |= MACB_CAPS_USRIO_HAS_CLKEN; + bp->caps |= MACB_CAPS_USRIO_HAS_REFCLK_SOURCE; dev_dbg(&bp->pdev->dev, "Cadence caps 0x%08x\n", bp->caps); } @@ -4624,6 +4624,9 @@ static int macb_init(struct platform_device *pdev) } if (bp->caps & MACB_CAPS_USRIO_HAS_CLKEN) + val |= bp->usrio->clken; + + if (bp->caps & MACB_CAPS_USRIO_HAS_REFCLK_SOURCE) val |= bp->usrio->refclk; macb_or_gem_writel(bp, USRIO, val); @@ -5217,7 +5220,7 @@ static const struct macb_usrio_config at91_default_usrio = { .mii = MACB_BIT(MII), .rmii = MACB_BIT(RMII), .rgmii = GEM_BIT(RGMII), - .refclk = MACB_BIT(CLKEN), + .clken = MACB_BIT(CLKEN), }; static const struct macb_usrio_config sama7g5_usrio = { @@ -5355,6 +5358,7 @@ static const struct macb_config mpfs_config = { static const struct macb_config sama7g5_gem_config = { .caps = MACB_CAPS_GIGABIT_MODE_AVAILABLE | MACB_CAPS_CLK_HW_CHG | MACB_CAPS_USRIO_DEFAULT_IS_MII_GMII | + MACB_CAPS_USRIO_HAS_REFCLK_SOURCE | MACB_CAPS_MIIONRGMII | MACB_CAPS_GEM_HAS_PTP | MACB_CAPS_USRIO_HAS_MII, .dma_burst_length = 16, @@ -5365,7 +5369,8 @@ static const struct macb_config sama7g5_gem_config = { static const struct macb_config sama7g5_emac_config = { .caps = MACB_CAPS_USRIO_DEFAULT_IS_MII_GMII | - MACB_CAPS_USRIO_HAS_CLKEN | MACB_CAPS_MIIONRGMII | + MACB_CAPS_MIIONRGMII | + MACB_CAPS_USRIO_HAS_REFCLK_SOURCE | MACB_CAPS_GEM_HAS_PTP | MACB_CAPS_USRIO_HAS_MII, .dma_burst_length = 16, From b717481db800cfbb0334fb0f1e42ad9790959910 Mon Sep 17 00:00:00 2001 From: Conor Dooley Date: Wed, 18 Mar 2026 16:37:34 +0000 Subject: [PATCH 03/13] dt-bindings: net: cdns,macb: replace cdns,refclk-ext with cdns,refclk-source Ryan added cdns,refclk-ext with the intent of decoupling the source of the reference clock on sama7g5 (and related platforms) from the compatible. Unfortunately, the default for sama7g5-emac is an external reference clock, so this property had no effect there, so that compatibility with older devicetrees is preserved. Replace cdns,refclk-ext with one that supports both default states and therefore is usable for sama7g5-emac. For now, limit it to only the platforms that have USRIO controlled reference clock selection, but this could be generalised in the future. The existing property only works on devices that are compatible with sama7g5-gem, so mark it deprecated, and limit its use to that specific scenario. Signed-off-by: Conor Dooley Signed-off-by: Linux RISC-V bot --- .../devicetree/bindings/net/cdns,macb.yaml | 56 ++++++++++++++++++- 1 file changed, 53 insertions(+), 3 deletions(-) diff --git a/Documentation/devicetree/bindings/net/cdns,macb.yaml b/Documentation/devicetree/bindings/net/cdns,macb.yaml index cb14c35ba99693..f6df793c4af656 100644 --- a/Documentation/devicetree/bindings/net/cdns,macb.yaml +++ b/Documentation/devicetree/bindings/net/cdns,macb.yaml @@ -122,10 +122,23 @@ properties: cdns,refclk-ext: type: boolean + deprecated: true + description: | + This selects if the REFCLK for RMII is provided by an external source. + For RGMII mode this selects if the 125MHz REF clock is provided by an external + source. + + This property has been replaced by cdns,refclk-source, as it only works + for devices that use an internal reference clock by default. + + cdns,refclk-source: + $ref: /schemas/types.yaml#/definitions/string + enum: + - internal + - external description: - This selects if the REFCLK for RMII is provided by an external source. - For RGMII mode this selects if the 125MHz REF clock is provided by an external - source. + Select whether or not the refclk for RGMII or RMII is provided by an + internal or external source. The default is device specific. cdns,rx-watermark: $ref: /schemas/types.yaml#/definitions/uint32 @@ -196,6 +209,43 @@ allOf: required: - phys + - if: + not: + properties: + compatible: + contains: + enum: + - microchip,sama7g5-gem + - microchip,sama7g5-emac + then: + properties: + cdns,refclk-source: false + + - if: + not: + properties: + compatible: + contains: + const: microchip,sama7g5-gem + then: + properties: + cdns,refclk-ext: false + + - if: + properties: + compatible: + contains: + enum: + - microchip,sama7g5-emac + then: + properties: + cdns,refclk-source: + default: external + else: + properties: + cdns,refclk-source: + default: internal + unevaluatedProperties: false examples: From a0bed9f75a29d5b5100fa20186b39c538baa936b Mon Sep 17 00:00:00 2001 From: Conor Dooley Date: Wed, 18 Mar 2026 16:37:35 +0000 Subject: [PATCH 04/13] net: macb: rework usrio refclk selection code The USRIO based refclk selection code abuses a capability flag to set the refclk to an external source based on match data/compatible on sama7g5-emac and use an internal source for the gmac. Ryan previously added a property in an attempt to decouple the refclk source from the compatible, because this is not fixed by compatible and there's variance based on the choices made by board designers. Originally when Ryan added it, he removed the capability flag entirely from match data, but this changed the default for the sama7g5-emac and the removal had to be reverted for these devices. Because these devices default to an external refclk, and the current property is only capable of communicating external refclks, there's no way to make the sama7g5-emac use an internal refclk. Additionally, this property has no limiting based on compatible, and if used on a platform with an external refclk that is not controlled by USRIO the capability would be erroneously set. Because of the reuse of the at91_default_usrio struct by non-at91 devices, this could cause the refclk bit to be set in error, on a system where the refclk is externally provided without usrio settings being required. Change the new capability flag so that it actually represents the hardware being capable of controlling the refclk source via USRIO, and move the selection of default behaviour into the macb_usrio_config struct provided as part of match data. Modify the devicetree code to support a new property, "cdns,refclk-source" which will support devices with either default, retaining support for "cdns,refclk-external" for compatibility reasons. Signed-off-by: Conor Dooley Signed-off-by: Linux RISC-V bot --- drivers/net/ethernet/cadence/macb.h | 1 + drivers/net/ethernet/cadence/macb_main.c | 55 ++++++++++++++++++------ 2 files changed, 44 insertions(+), 12 deletions(-) diff --git a/drivers/net/ethernet/cadence/macb.h b/drivers/net/ethernet/cadence/macb.h index baf48f02d7e275..9cd565cb87e4c3 100644 --- a/drivers/net/ethernet/cadence/macb.h +++ b/drivers/net/ethernet/cadence/macb.h @@ -1214,6 +1214,7 @@ struct macb_usrio_config { u32 refclk; u32 clken; u32 hdfctlen; + bool refclk_default_external; }; struct macb_config { diff --git a/drivers/net/ethernet/cadence/macb_main.c b/drivers/net/ethernet/cadence/macb_main.c index 6297d9e58dcd5c..aa551723b77c3b 100644 --- a/drivers/net/ethernet/cadence/macb_main.c +++ b/drivers/net/ethernet/cadence/macb_main.c @@ -4318,12 +4318,8 @@ static const struct net_device_ops macb_netdev_ops = { static void macb_configure_caps(struct macb *bp, const struct macb_config *dt_conf) { - struct device_node *np = bp->pdev->dev.of_node; - bool refclk_ext; u32 dcfg; - refclk_ext = of_property_read_bool(np, "cdns,refclk-ext"); - if (dt_conf) bp->caps = dt_conf->caps; @@ -4356,9 +4352,6 @@ static void macb_configure_caps(struct macb *bp, } } - if (refclk_ext) - bp->caps |= MACB_CAPS_USRIO_HAS_REFCLK_SOURCE; - dev_dbg(&bp->pdev->dev, "Cadence caps 0x%08x\n", bp->caps); } @@ -4626,8 +4619,36 @@ static int macb_init(struct platform_device *pdev) if (bp->caps & MACB_CAPS_USRIO_HAS_CLKEN) val |= bp->usrio->clken; - if (bp->caps & MACB_CAPS_USRIO_HAS_REFCLK_SOURCE) - val |= bp->usrio->refclk; + if (bp->caps & MACB_CAPS_USRIO_HAS_REFCLK_SOURCE) { + const char *prop; + bool refclk_ext; + int ret; + + /* Default to whatever was set in the match data for + * this device. There's two properties for refclk + * control, but the boolean one is deprecated so is + * a lower priority to check, no device should have + * both. + */ + refclk_ext = bp->usrio->refclk_default_external; + + ret = of_property_read_string(pdev->dev.of_node, + "cdns,refclk-source", &prop); + if (!ret) { + if (!strcmp(prop, "external")) + refclk_ext = true; + else + refclk_ext = false; + } else { + ret = of_property_read_bool(pdev->dev.of_node, + "cdns,refclk-ext"); + if (ret) + refclk_ext = true; + } + + if (refclk_ext) + val |= bp->usrio->refclk; + } macb_or_gem_writel(bp, USRIO, val); } @@ -5223,11 +5244,21 @@ static const struct macb_usrio_config at91_default_usrio = { .clken = MACB_BIT(CLKEN), }; -static const struct macb_usrio_config sama7g5_usrio = { +static const struct macb_usrio_config sama7g5_gem_usrio = { + .mii = 0, + .rmii = 1, + .rgmii = 2, + .refclk = BIT(2), + .refclk_default_external = false, + .hdfctlen = BIT(6), +}; + +static const struct macb_usrio_config sama7g5_emac_usrio = { .mii = 0, .rmii = 1, .rgmii = 2, .refclk = BIT(2), + .refclk_default_external = true, .hdfctlen = BIT(6), }; @@ -5364,7 +5395,7 @@ static const struct macb_config sama7g5_gem_config = { .dma_burst_length = 16, .clk_init = macb_clk_init, .init = macb_init, - .usrio = &sama7g5_usrio, + .usrio = &sama7g5_gem_usrio, }; static const struct macb_config sama7g5_emac_config = { @@ -5376,7 +5407,7 @@ static const struct macb_config sama7g5_emac_config = { .dma_burst_length = 16, .clk_init = macb_clk_init, .init = macb_init, - .usrio = &sama7g5_usrio, + .usrio = &sama7g5_emac_usrio, }; static const struct macb_config versal_config = { From 7225d8d7d5bace140bebf37e32bc2db0eb4f33d8 Mon Sep 17 00:00:00 2001 From: Conor Dooley Date: Wed, 18 Mar 2026 16:37:36 +0000 Subject: [PATCH 05/13] net: macb: np4 doesn't need a usrio pointer USRIO is disabled on this platform, having a pointer to a usrio config structure doesn't actually do anything other than look weird. Signed-off-by: Conor Dooley Signed-off-by: Linux RISC-V bot --- drivers/net/ethernet/cadence/macb_main.c | 1 - 1 file changed, 1 deletion(-) diff --git a/drivers/net/ethernet/cadence/macb_main.c b/drivers/net/ethernet/cadence/macb_main.c index aa551723b77c3b..6a2586991b1302 100644 --- a/drivers/net/ethernet/cadence/macb_main.c +++ b/drivers/net/ethernet/cadence/macb_main.c @@ -5349,7 +5349,6 @@ static const struct macb_config np4_config = { .caps = MACB_CAPS_USRIO_DISABLED, .clk_init = macb_clk_init, .init = macb_init, - .usrio = &at91_default_usrio, }; static const struct macb_config zynqmp_config = { From f1bdf7c8fa1caffb4f00bc1a5cbc1b88fa4f73de Mon Sep 17 00:00:00 2001 From: Conor Dooley Date: Wed, 18 Mar 2026 16:37:37 +0000 Subject: [PATCH 06/13] net: macb: add mpfs specific usrio configuration On mpfs the driver needs to make sure the tsu clock source is not the fabric, as this requires that the hardware is in Timer Adjust mode, which is not compatible with the linux driver trying to control the hardware. It is unlikely that this will be set, as the peripheral is reset during probe, but if the resets are not provided in devicetree it's probable that this bit is set incorrectly, as U-Boot's macb driver has the same issue with using usrio settings for at91 platforms as the default. Fixes: 8aad66aa59be5 ("net: macb: add polarfire soc reset support") Signed-off-by: Conor Dooley Signed-off-by: Linux RISC-V bot --- drivers/net/ethernet/cadence/macb.h | 2 ++ drivers/net/ethernet/cadence/macb_main.c | 12 ++++++++++-- 2 files changed, 12 insertions(+), 2 deletions(-) diff --git a/drivers/net/ethernet/cadence/macb.h b/drivers/net/ethernet/cadence/macb.h index 9cd565cb87e4c3..cdb9fb2218c6f7 100644 --- a/drivers/net/ethernet/cadence/macb.h +++ b/drivers/net/ethernet/cadence/macb.h @@ -781,6 +781,7 @@ #define MACB_CAPS_NO_LSO BIT(24) #define MACB_CAPS_USRIO_HAS_MII BIT(25) #define MACB_CAPS_USRIO_HAS_REFCLK_SOURCE BIT(26) +#define MACB_CAPS_USRIO_HAS_TSUCLK_SOURCE BIT(27) /* LSO settings */ #define MACB_LSO_UFO_ENABLE 0x01 @@ -1214,6 +1215,7 @@ struct macb_usrio_config { u32 refclk; u32 clken; u32 hdfctlen; + u32 tsu_source; bool refclk_default_external; }; diff --git a/drivers/net/ethernet/cadence/macb_main.c b/drivers/net/ethernet/cadence/macb_main.c index 6a2586991b1302..841733b5817c7c 100644 --- a/drivers/net/ethernet/cadence/macb_main.c +++ b/drivers/net/ethernet/cadence/macb_main.c @@ -4650,6 +4650,9 @@ static int macb_init(struct platform_device *pdev) val |= bp->usrio->refclk; } + if (bp->caps & MACB_CAPS_USRIO_HAS_TSUCLK_SOURCE) + val |= bp->usrio->tsu_source; + macb_or_gem_writel(bp, USRIO, val); } @@ -5244,6 +5247,10 @@ static const struct macb_usrio_config at91_default_usrio = { .clken = MACB_BIT(CLKEN), }; +static const struct macb_usrio_config mpfs_usrio = { + .tsu_source = 0, +}; + static const struct macb_usrio_config sama7g5_gem_usrio = { .mii = 0, .rmii = 1, @@ -5376,11 +5383,12 @@ static const struct macb_config zynq_config = { static const struct macb_config mpfs_config = { .caps = MACB_CAPS_GIGABIT_MODE_AVAILABLE | MACB_CAPS_JUMBO | - MACB_CAPS_GEM_HAS_PTP, + MACB_CAPS_GEM_HAS_PTP | + MACB_CAPS_USRIO_HAS_TSUCLK_SOURCE, .dma_burst_length = 16, .clk_init = macb_clk_init, .init = init_reset_optional, - .usrio = &at91_default_usrio, + .usrio = &mpfs_usrio, .max_tx_length = 4040, /* Cadence Erratum 1686 */ .jumbo_max_len = 4040, }; From 736984eefd972b3635de6c98757fe8b461caa6a8 Mon Sep 17 00:00:00 2001 From: Conor Dooley Date: Wed, 18 Mar 2026 16:37:38 +0000 Subject: [PATCH 07/13] net: macb: warn on pclk use as a tsu_clk fallback The Candence GEM IP has a configuration parameter which determines the source of the clock used for the timestamp unit (if it is enabled), switching it between using the pclk and a dedicated input. When ptp support was added to the macb driver, a new tsu_clk was added to represent the dedicated input. While this is understandable, I think it is bug prone and that the tsu_clk should represent whatever clock is used for the timestamper and not just that specific input. >From a driver point of view, the benefit of taking the conceptual approach is avoiding misconfiguring the driver when the hardware supports ptp (and it is set as a capability in the relevant per-device structure) but no tsu_clk is provided in devicetree. At the moment, the timestamper will be registered and programmed with an increment that reflects the pclk in these cases, but will malfunction if the pclk and tsu_clk frequencies do not match. Obviously, this means the devicetree incorrectly represents the hardware, but this change in approach would make the driver more resilient without meaningfully impacting correctly described users. Out of the devices that claim MACB_CAPS_GEM_HAS_PTP the fu540, mpfs, sama5d2 and sama7g5-emac (but not sama7g5-gem) are at risk of having this problem with the in-kernel devicetrees. mpfs and sama7g5-emac have been confirmed to be incorrect, and sama5d2 is correct. It may be that the other platforms actually do use the pclk for the timestamper (either by supplying pclk to the tsu_clk input of the IP, or by having the IP block configured to use pclk instead of the tsu_clk input), but at least two are wrong, as they do not use pclk for the tsu_clk, so the driver is registering the ptp clock incorrectly. Add a warning if no tsu_clk is provided on a platform that uses the timerstamper, to encourage people to specifically provide a tsu_clk and avoid silently registering the timerstamper with the wrong clock. If the pclk is actually used, it can be provided as a tsu_clk for improved clarity in devicetrees. While this changes the meaning of the devicetree property, it is backwards compatible as there's no functional change for platforms that didn't provide a tsu_clk and the changed meaning of providing a tsu_clk in the devicetree does not impact platforms that already provided one as the decision about the tsu clock source is at IP instantiation time rather than at runtime, so there's no driver behaviour that needs to change based on the input to the IP used for the timestamping unit. Signed-off-by: Conor Dooley Signed-off-by: Linux RISC-V bot --- drivers/net/ethernet/cadence/macb_main.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/net/ethernet/cadence/macb_main.c b/drivers/net/ethernet/cadence/macb_main.c index 841733b5817c7c..0d306cfdd4d28d 100644 --- a/drivers/net/ethernet/cadence/macb_main.c +++ b/drivers/net/ethernet/cadence/macb_main.c @@ -3534,6 +3534,7 @@ static unsigned int gem_get_tsu_rate(struct macb *bp) else if (!IS_ERR(bp->pclk)) { tsu_clk = bp->pclk; tsu_rate = clk_get_rate(tsu_clk); + dev_warn(&bp->pdev->dev, "devicetree missing tsu_clk, using pclk as fallback\n"); } else return -ENOTSUPP; return tsu_rate; From 27e3b213bbcf873eb5f03c0f0ac6c72634496c85 Mon Sep 17 00:00:00 2001 From: Conor Dooley Date: Wed, 18 Mar 2026 16:37:39 +0000 Subject: [PATCH 08/13] net: macb: clean up tsu clk rate acquisition tsu_clk is grabbed during probe, so doesn't need to be re-grabbed here. pclk is mandatory, probe will fail if it is err/NULL, so there's no need to check it here or have a !pclk 3rd arm. Simplify gem_get_tsu_rate() to account for these facts. Signed-off-by: Conor Dooley Signed-off-by: Linux RISC-V bot --- drivers/net/ethernet/cadence/macb_main.c | 12 +++++------- 1 file changed, 5 insertions(+), 7 deletions(-) diff --git a/drivers/net/ethernet/cadence/macb_main.c b/drivers/net/ethernet/cadence/macb_main.c index 0d306cfdd4d28d..077b5c6dc45ea1 100644 --- a/drivers/net/ethernet/cadence/macb_main.c +++ b/drivers/net/ethernet/cadence/macb_main.c @@ -3527,16 +3527,14 @@ static unsigned int gem_get_tsu_rate(struct macb *bp) struct clk *tsu_clk; unsigned int tsu_rate; - tsu_clk = devm_clk_get(&bp->pdev->dev, "tsu_clk"); - if (!IS_ERR(tsu_clk)) - tsu_rate = clk_get_rate(tsu_clk); - /* try pclk instead */ - else if (!IS_ERR(bp->pclk)) { + if (!IS_ERR_OR_NULL(bp->tsu_clk)) { + tsu_rate = clk_get_rate(bp->tsu_clk); + } else { tsu_clk = bp->pclk; tsu_rate = clk_get_rate(tsu_clk); dev_warn(&bp->pdev->dev, "devicetree missing tsu_clk, using pclk as fallback\n"); - } else - return -ENOTSUPP; + } + return tsu_rate; } From 1bcedfc7b147862b18813549a347ff906df7585e Mon Sep 17 00:00:00 2001 From: Conor Dooley Date: Wed, 18 Mar 2026 16:37:40 +0000 Subject: [PATCH 09/13] dt-bindings: net: macb: add property indicating timer adjust mode The GEM IP has two methods for modifying the ptp timer. The first of these, named "increment mode", relies on software controlling the timer by setting tsu_timer_incr and tsu_timer_incr_sub_nsec and performing once-off adjustments via the tsu_timer_adjust register. This is what the macb driver uses. The second mechanism, "timer adjust mode" uses the gem_tsu_inc_ctrl and gem_tsu_ms signals to control the timer. These modes are not intended to be used in parallel, but both can be possible on the same device and which mode is used cannot be determined from the compatible on all devices, because some users of the GEM IP are SoC FPGAs that permit configuring how the IP is wired up. Add a property to indicate that gem_tsu_inc_ctrl and gem_tsu_ms are wired up for timer adjust mode. Reviewed-by: Krzysztof Kozlowski Signed-off-by: Conor Dooley Signed-off-by: Linux RISC-V bot --- .../devicetree/bindings/net/cdns,macb.yaml | 15 +++++++++++++++ 1 file changed, 15 insertions(+) diff --git a/Documentation/devicetree/bindings/net/cdns,macb.yaml b/Documentation/devicetree/bindings/net/cdns,macb.yaml index f6df793c4af656..b9caa7e5ef3280 100644 --- a/Documentation/devicetree/bindings/net/cdns,macb.yaml +++ b/Documentation/devicetree/bindings/net/cdns,macb.yaml @@ -150,6 +150,12 @@ properties: that need to be filled, before the forwarding process is activated. Width of the SRAM is platform dependent, and can be 4, 8 or 16 bytes. + cdns,timer-adjust: + type: boolean + description: + Set when the hardware is operating in timer-adjust mode, where the timer + is controlled by the gem_tsu_inc_ctrl and gem_tsu_ms inputs. + '#address-cells': const: 1 @@ -199,6 +205,15 @@ allOf: properties: reg: maxItems: 1 + - if: + not: + properties: + compatible: + contains: + const: microchip,mpfs-macb + then: + properties: + cdns,timer-adjust: false - if: properties: From 33299a48ad3b1480c9e8e0f8350156870474285a Mon Sep 17 00:00:00 2001 From: Conor Dooley Date: Wed, 18 Mar 2026 16:37:41 +0000 Subject: [PATCH 10/13] net: macb: timer adjust mode is not supported The ptp portion of this driver controls the tsu's timer using the controls for "increment mode", which is not compatible with the hardware trying to control it via the gem_tsu_inc_ctrl and gem_tsu_ms inputs in "timer adjust mode". Abort probe if the property signalling that the relevant signals have been wired up is present. Signed-off-by: Conor Dooley Signed-off-by: Linux RISC-V bot --- drivers/net/ethernet/cadence/macb_main.c | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/drivers/net/ethernet/cadence/macb_main.c b/drivers/net/ethernet/cadence/macb_main.c index 077b5c6dc45ea1..d2e0b0aaca18e9 100644 --- a/drivers/net/ethernet/cadence/macb_main.c +++ b/drivers/net/ethernet/cadence/macb_main.c @@ -5577,6 +5577,13 @@ static int macb_probe(struct platform_device *pdev) bp->usrio = macb_config->usrio; + if (of_property_read_bool(bp->pdev->dev.of_node, "cdns,timer-adjust") && + IS_ENABLED(CONFIG_MACB_USE_HWSTAMP)) { + dev_err(&pdev->dev, "Timer adjust mode is not supported\n"); + err = -EINVAL; + goto err_out_free_netdev; + } + /* By default we set to partial store and forward mode for zynqmp. * Disable if not set in devicetree. */ From d55ae45e91596eaf675d7507f4a6921ab369ce69 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Th=C3=A9o=20Lebrun?= Date: Wed, 18 Mar 2026 16:37:42 +0000 Subject: [PATCH 11/13] net: macb: runtime detect MACB_CAPS_USRIO_DISABLED MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit DCFG1 (design config 1 register) carries a bit indicating whether User I/O feature has been enabled or not. The MACB/GEM driver has a cap flag indicating that HW has the feature disabled (default is enabled). Add the missing connection between DCFG1 bit and MACB_CAPS_USRIO_DISABLED. Indirect impact: avoid useless writel() on USERIO register; this is not an important fix because USERIO is anyway read-only when feature is disabled. If for some reason a compatible sets USRIO_DISABLED but DCFG1 indicates it is enabled, we still keep the disabled capability flag. This ensures we don't break "cdns,np4-macb" that sets the flag from compatible match data. Signed-off-by: Théo Lebrun Signed-off-by: Conor Dooley Signed-off-by: Linux RISC-V bot --- drivers/net/ethernet/cadence/macb.h | 2 ++ drivers/net/ethernet/cadence/macb_main.c | 2 ++ 2 files changed, 4 insertions(+) diff --git a/drivers/net/ethernet/cadence/macb.h b/drivers/net/ethernet/cadence/macb.h index cdb9fb2218c6f7..bc025719f60080 100644 --- a/drivers/net/ethernet/cadence/macb.h +++ b/drivers/net/ethernet/cadence/macb.h @@ -518,6 +518,8 @@ #define GEM_IRQCOR_SIZE 1 #define GEM_DBWDEF_OFFSET 25 #define GEM_DBWDEF_SIZE 3 +#define GEM_USERIO_OFFSET 9 +#define GEM_USERIO_SIZE 1 #define GEM_NO_PCS_OFFSET 0 #define GEM_NO_PCS_SIZE 1 diff --git a/drivers/net/ethernet/cadence/macb_main.c b/drivers/net/ethernet/cadence/macb_main.c index d2e0b0aaca18e9..ffc86dbe9b2b1f 100644 --- a/drivers/net/ethernet/cadence/macb_main.c +++ b/drivers/net/ethernet/cadence/macb_main.c @@ -4330,6 +4330,8 @@ static void macb_configure_caps(struct macb *bp, bp->caps |= MACB_CAPS_ISR_CLEAR_ON_WRITE; if (GEM_BFEXT(NO_PCS, dcfg) == 0) bp->caps |= MACB_CAPS_PCS; + if (!(dcfg & GEM_BIT(USERIO))) + bp->caps |= MACB_CAPS_USRIO_DISABLED; dcfg = gem_readl(bp, DCFG12); if (GEM_BFEXT(HIGH_SPEED, dcfg) == 1) bp->caps |= MACB_CAPS_HIGH_SPEED; From d696985e0b1aae3093e98f3425878b7d2ece3326 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Th=C3=A9o=20Lebrun?= Date: Wed, 18 Mar 2026 16:37:43 +0000 Subject: [PATCH 12/13] net: macb: set MACB_CAPS_USRIO_DISABLED if no usrio config is provided MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit bp->usrio is copied directly from dt_conf->usrio in macb_probe(). If dt_conf->usrio is NULL, we do not want to land in USRIO write codepaths which dereference bp->usrio. Inherit automatically MACB_CAPS_USRIO_DISABLED to avoid those. This means a macb_config that wants to disable usrio can simply drop its .usrio field, rather than add the disabled capability explicitly. Nit: drop the dt_conf NULL check because the pointer is always valid. Signed-off-by: Théo Lebrun Signed-off-by: Conor Dooley Signed-off-by: Linux RISC-V bot --- drivers/net/ethernet/cadence/macb_main.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/drivers/net/ethernet/cadence/macb_main.c b/drivers/net/ethernet/cadence/macb_main.c index ffc86dbe9b2b1f..80344ffb0112fb 100644 --- a/drivers/net/ethernet/cadence/macb_main.c +++ b/drivers/net/ethernet/cadence/macb_main.c @@ -4319,8 +4319,10 @@ static void macb_configure_caps(struct macb *bp, { u32 dcfg; - if (dt_conf) - bp->caps = dt_conf->caps; + bp->caps = dt_conf->caps; + + if (!dt_conf->usrio) + bp->caps |= MACB_CAPS_USRIO_DISABLED; if (hw_is_gem(bp->regs, bp->native_io)) { bp->caps |= MACB_CAPS_MACB_IS_GEM; From acaed292aeb16ffb191c490335bedd7466374521 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Th=C3=A9o=20Lebrun?= Date: Wed, 18 Mar 2026 16:37:44 +0000 Subject: [PATCH 13/13] net: macb: drop usrio pointer on EyeQ5 config MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit USRIO is disabled on this platform, drop its inherited usrio config. We will end up with MACB_CAPS_USRIO_DISABLED on this platform: - We have no config->usrio so macb_configure_caps() deduces that the feature is disabled. - Anecdotally, we would also land in the runtime detection codepath that reads DCFG1. Signed-off-by: Théo Lebrun Signed-off-by: Conor Dooley Signed-off-by: Linux RISC-V bot --- drivers/net/ethernet/cadence/macb_main.c | 1 - 1 file changed, 1 deletion(-) diff --git a/drivers/net/ethernet/cadence/macb_main.c b/drivers/net/ethernet/cadence/macb_main.c index 80344ffb0112fb..95d5be888c7151 100644 --- a/drivers/net/ethernet/cadence/macb_main.c +++ b/drivers/net/ethernet/cadence/macb_main.c @@ -5441,7 +5441,6 @@ static const struct macb_config eyeq5_config = { .clk_init = macb_clk_init, .init = eyeq5_init, .jumbo_max_len = 10240, - .usrio = &at91_default_usrio, }; static const struct macb_config raspberrypi_rp1_config = {