Signal value stuck on "X"

[alpkoyun]

Hi,

In one of my tryouts, the system generated a tree node as below. Inside the always block, the signal is assigned to 0, but since there is no variable that triggers the always block, the o_reg is never assigned 0 and during the simulation, the value of the signal is stuck on "X".

 module class0_tree0(input wire [58:0] i, output wire [0:0] o);

reg [0:0] o_reg;
assign o = o_reg;

always @(*) begin
	o_reg = 0;
end

endmodule

A possible fix is to assign a default value when creating the "o_reg"

TreeLUT/src/treelut/treelutclassifier.py

Line 272 in ad9e70a

file.write(f"reg [{path_output_bit-1}:0] o_reg;\nassign o = o_reg;\n\nalways @(*) begin\n")