Skip to content

Create unittests for range-limited types #13

@kenkendk

Description

@kenkendk

Add an example that uses UInt2, UInt3, .. and tests that they work correctly in the full range (i.e. overflow/undeflow them). The test should verify both the simulation and generated C++ and VHDL code.


Want to back this issue? Post a bounty on it! We accept bounties via Bountysource.

Metadata

Metadata

Assignees

No one assigned

    Labels

    No labels
    No labels

    Projects

    No projects

    Milestone

    No milestone

    Relationships

    None yet

    Development

    No branches or pull requests

    Issue actions