Filelist Management and Auto-generation

[xfguo]

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Feature Description

project.yml should always be created when we run scratchip create PROJ, the project.yml should include everything for re-init the project. Also, a version should be specified to make it's easy to upgrade to new version.

# contents of project.yml
version: 0.2.1
filelist:
  rtl:
    - include 
    - rtl/verilog/ethmac.v
    - rtl/verilog/eth_clkgen.v
  sim:
    - inlucde: rtl
  syn:
    - include: rtl
  fpga:
    - include: rtl

1. support include other filelist
2. scratchip command to generate filelist with arguments, scratchip filelist
3. support include/include_dir
4. all filelist should be in pre-defined order

Type of Feature

Related Features

Additional context

Impact: unknown

Development Phase: proposal

[colin4124]

Configure

project.yml

filelist:
   rtl:
     defines:
       - FOO: 59
       - BAR
     files:
       - rtl/verilog/defines.v : is_include_file
       - rtl/verilog/subdir : is_include_dir
       - rtl/verilog/ethmac.v
       - rtl/verilog/eth_crc.v
     includes:
       - cpu.yml
       - an.yml
   sim:
     filesets: [rtl]
     files:
       - rtl/verilog/sim_defines.v : is_include_file
       - rtl/verilog/sim_rtl.v
   fpga:
     filesets: [sim]
     files:
       - rtl/verilog/fpga_defines.v : is_include_file
       - rtl/verilog/fpga.v

cpu.yml

defines:
  - CORES: 59
  - CACHE
files:
  - rtl/cpu/defines.v : is_include_file
  - rtl/cpu/subdir : is_include_dir
  - rtl/cpu/core.v

an.yml

defines:
  - AN_DELAY: 24
  - MDIO
files:
  - rtl/an/defines.v : is_include_file
  - rtl/an/subdir : is_include_dir
  - rtl/an/an.v

rtl, sim and fpga are targets. In a target, files is a list of path of verilog file; includes is other yaml filelist. filesets include other targets.

includes 's YAML should contain defines or files or both fields, such as:

defines:
  - CORES: 59
  - CACHE
files:
  - rtl/cpu/defines.v : is_include_file
  - rtl/cpu/subdir : is_include_dir
  - rtl/cpu/core.v

Usage

scratchip filelist would use default path 'PROJECT_ROOT/project.yml' to generate all tagets's filelist:

• builds/filelist/rtl.f
• builds/filelist/sim.f
• builds/filelist/fpga.f

scratchip filelist path/to/your/project_cfg.yml -t [target] would generate [target] 's filelist only. such as: scratchip filelist myproject.yml -t rtl

All filelist woulde be in pre-defined order.

[xfguo]

I think the filelist file included should not be ".f", should be another yml.