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With_valid.t gives names that are not supported by VHDL generation #27

@AliceFord

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@AliceFord

Take for example a field:

module O = struct
  type 'a t =
    {
      num_zeros : 'a With_valid.t [@bits num_bits]
    }
  [@@deriving hardcaml]
end

On RTL generation, we get:

"[Rtl_name.add_port_name] illegal port name" (name num_zeros$valid)

This seems wrong, as the With_valid.t interface can't be used when generating VHDL.

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