Skip to content

abs implementation in rvv #399

@Ag-Cu

Description

@Ag-Cu

I see your implementation for rvv, like this:

vabs_s16:                               # @vabs_s16
        vsetivli        zero, 4, e16, m1, ta, ma
        vsra.vi v9, v8, 15
        vxor.vv v8, v8, v9
        vsub.vv v8, v8, v9
        ret

So why we don't just use two instructions: vrsub and vmax to implement abs?

Metadata

Metadata

Assignees

No one assigned

    Labels

    Projects

    No projects

    Milestone

    No milestone

    Relationships

    None yet

    Development

    No branches or pull requests

    Issue actions