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I2C Application Note

Purpose

The purpose of this document is to present to the user different possibilities to make use of the I2C bus to interface with the different I2C devices on Enclustra hardware.

Summary

This document gives an overview of the I2C bus in general and lists all the different devices present on Enclustra hardware and their capabilities (in terms of I2C communication). A bare metal section shows examples and code snippets to implement I2C communication on the hardware. In the Linux section available drivers and the corresponding device tree entries are shown and presented.

License

Copyright 2021 by Enclustra GmbH, Switzerland.

Permission is hereby granted, free of charge, to any person obtaining a copy of this hardware, software, firmware, and associated documentation files (the ”Product”), to deal in the Product without restriction, including without limitation the rights to use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of the Product, and to permit persons to whom the Product is furnished to do so, subject to the following conditions:

The above copyright notice and this permission notice shall be included in all copies or substantial portions of the Product.

THE PRODUCT IS PROVIDED ”AS IS”, WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE PRODUCT OR THE USE OR OTHER DEALINGS IN THE PRODUCT.

Introduction

This chapter introduces the I2C bus and gives general information about the communication protocol. Furthermore, the I2C hardware chips used on Enclustra boards and modules are introduced. A table of all present I2C devices and the corresponding addresses can be found in the respective user manual of the hardware used.

General information

I2C is a low speed, low cost and simple bus mostly used for inter peripheral communication. It is a Master-Slave communication scheme needing just two bidirectional open drain signals, SCL and SDA. When no data transfer is taking place, both lines are pulled up. The number of nodes is limited by the address space and the total bus capacitance of 400 pF. The figure below shows an example data transfer procedure.

I2C timing diagram

  1. SDA being pulled low while SCL stays high signifies the start bit (S) of a data transfer.
  2. SCL is pulled low and the first data bit is set by SDA while SCL is kept low (during blue bar time).
  3. Data is sampled when SCL rises for the first bit (B1). SDA has to hold the data for the entire duration of the green bar for the bit to be valid.
  4. This process repeats: SDA transitions between the low times of SCL and the data is sampled while SCL is high (B2, . . ., BN)
  5. After the final bit a clock pulse follows during which SDA is pulled low in preparation for the stop bit.
  6. A stop bit (P) is signaled when SCL rises, followed by SDA rising.

The types of I2C chips used in Enclustra hardware are described in more detail in Chapter 2. The following chapter provides distinct examples on Enclustra hardware. The examples include sample code for all I2C devices used in Enclustra hardware.

Table of contents

References