ctech_clk_buf in aes_top

[redpanda3]

Hi, Dinesh,

During the verification in caravel_hkspi, there might be an inconsistency between the ctech_clk_buf in aes_top and ctech_clk_buf itself.

One solution is to reduce the power pins in ctech_clk_buf, another is to change the signal ports in aes_top or don't set USE_POWER_PINS in settings. I don't know which solution is adequate. So I submit an issue here.

Best,
Yuda