Footprint Tweak

[DominoTree]

Thank you for the time and effort you've put in to developing something amazing!

I built Gerbers and placed an order for some boards (with PCBWay) and they informed me that the pad-to-pad clearance for the FPGA was 0.02mm below their minimum tolerance for any soldermask color other than green. After checking the Xilinx spec sheet at https://www.xilinx.com/support/documents/package_specs/tq144.pdf it looks like the maximum pin width is 0.27mm, whereas the default KiCad package is 0.30mm.

I made a new package based with 0.27mm pins tweaked the wider track widths connecting to it, as well as made sure the smaller tracks were centered in the pads, and then built new Gerbers and submitted them. Hopefully they pass PCBWay's DRC with those changes. I'll post an update here if so or if I end up needing to do more.

My changes are at https://github.com/DominoTree/DFB if you'd like to swap footprints or anything. I used KiCad 6 and just modified the footprint on the PCB itself - if you want to use it and have trouble let me know and I'll re-generate it in KiCad 5 and save it as its own footprint. This could be a quick way to make these boards easier and cheaper for more folks to have manufactured.

Thanks again, and feel free to let me know if you have any questions or if there's anything I can help with!
Nick

[dh219]

Hi there.

I'm not ignoring this, but I've not yet decided on what the best course of action is. I'm unsure that changing the pad widths to be exactly the pin widths is a good idea. Currently I'm leaning towards leaving it as it is, as you've provided an alternative already and there is an option at PCBWay, just in the stock colour. I'll continue to mull this over and perhaps seek advice.

Cheers.

[DominoTree]

No worries - it's certainly nothing critical and it's an issue I'd never even considered until I ran into it! Makes me curious to find out whether other fabs doing purple soldermask have similar color-specific tolerance requirements. I don't recall coming across an actual design document from Xilinx with the suggested footprint for the package, but I believe there was still some "wiggle room" to make the pads slightly larger and still remain within the fab's requirements, so that might make sense if it works. The boards and stencil came out great and I just need to get a hold of some FPGAs to assemble one and confirm it all still works as expected.