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<!DOCTYPE html>
<html lang="en">
<head>
<meta charset="utf-8">
<title>Christian Garry — CV</title>
<meta name="viewport" content="width=device-width, initial-scale=1">
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margin-bottom: 24px;
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</head>
<body>
<div class="header">
<h1>Christian Garry</h1>
<div class="tagline">MSc Scientific Computing | Probability · Statistics · Optimisation | C++/Python</div>
<div class="contacts"><a href="mailto:christiangarry.southafrica@gmail.com">christiangarry.southafrica@gmail.com</a> | <a href="tel:+447932326827">+44 79 3232 6827</a> | <a href="https://christiangarry.com">christiangarry.com</a> | <a href="https://www.linkedin.com/in/christian-tt-garry/">linkedin.com/in/christian-tt-garry</a></div>
</div>
<h2>Education</h2>
<div class="entry">
<div class="entry-header">
<div class="entry-left"><strong>MSc Scientific Computing & Data Analysis (AI for Engineering)</strong>
</div>
<div class="entry-right">Durham, United Kingdom</div>
</div>
</div>
<div class="entry">
<div class="entry-header">
<div class="entry-left"><strong>Durham University</strong>
</div>
<div class="entry-right">Sep 2025 – Exp. Sep 2026</div>
</div>
</div>
<div class="spacer"></div>
<div class="onecol">
<ul>
<li>Current average: Distinction (89%).
</li><li><strong>Focus:</strong> probability, statistics, optimisation, numerical methods, Bayesian and regression models, HPC/GPU.
</li></ul>
</div>
<div class="entry">
<div class="entry-header">
<div class="entry-left"><strong>MEng Electronic Engineering</strong>
<em></em>
</div>
<div class="entry-right">Durham, United Kingdom</div>
</div>
</div>
<div class="entry">
<div class="entry-header">
<div class="entry-left"><strong>Durham University</strong>
</div>
<div class="entry-right">Sep 2020 – Jun 2024</div>
</div>
</div>
<div class="spacer"></div>
<div class="onecol">
<ul>
<li>Upper Second-Class Honours (2:1).
</li><li><strong>Dissertation:</strong> <em>Silicon Carbide JFET CPU</em> — simulation-driven CPU design with instruction-level verification.
</li></ul>
</div>
<h2>Experience</h2>
<div class="entry">
<div class="entry-header">
<div class="entry-left"><strong>Industrial Tutor</strong>
</div>
<div class="entry-right">Durham, United Kingdom</div>
</div>
</div>
<div class="entry">
<div class="entry-header">
<div class="entry-left"><strong>Durham University, Department of Engineering</strong>
</div>
<div class="entry-right">Sep 2025 – Present</div>
</div>
</div>
<div class="spacer"></div>
<div class="onecol">
<ul>
<li>Led weekly design tutorials, mentoring teams on feasibility-driven decision-making under cost, risk, and performance constraints.
</li><li>Assessed and provided structured feedback on technical feasibility, assumptions, and justification quality.
</li></ul>
</div>
<div class="entry">
<div class="entry-header">
<div class="entry-left"><strong>Graduate Communications Engineer</strong>
</div>
<div class="entry-right">Hebburn, United Kingdom</div>
</div>
</div>
<div class="entry">
<div class="entry-header">
<div class="entry-left"><strong>Siemens PLC</strong>
</div>
<div class="entry-right">Sep 2024 – Present</div>
</div>
</div>
<div class="spacer"></div>
<div class="onecol">
<ul>
<li>Implemented and adapted C/C++ communication components (TCP/IP, serial) to support data exchange between simulated systems and PC-based engineering tools.
</li><li>Developed a Python-based RAG pipeline to structure and query internal technical documentation and codebases using a retrieval-augmented workflow (local LLMs, vector search) reducing engineer time to answer by >90%.
</li></ul>
</div>
<h2>Projects & Research</h2>
<div class="entry">
<div class="entry-header">
<div class="entry-left"><strong>Silicon Carbide JFET CPU</strong>
</div>
<div class="entry-right">Durham, United Kingdom</div>
</div>
</div>
<div class="entry">
<div class="entry-header">
<div class="entry-left"><strong>Master's Dissertation</strong>
</div>
<div class="entry-right">Oct 2023 – Apr 2024</div>
</div>
</div>
<div class="spacer"></div>
<div class="onecol">
<ul>
<li>Independently designed and simulated a 4-bit CPU using SiC JFET logic in LTspice, targeting computation in extreme temperature and radiation environments.
</li><li>Constructed a full verification toolchain (C++ compiler, assembler, Python automation) and validated instruction-level behaviour via emulator parity checks and waveform-based state reconstruction.
</li><li>Investigated architectural trade-offs, race conditions, and storage constraints, explicitly documenting assumptions, limitations, and scalability bottlenecks.
</li></ul>
</div>
<h2>Certifications</h2>
<div class="onecol">
<ul>
<li>MITx 15.455x – Mathematical Methods for Quantitative Finance (In Progress)<br>
</li><li>Columbia University – Introduction to Financial Engineering and Risk Management<br>
</li></ul>
</div>
<h2>Leadership, Activities & Interests</h2>
<div class="onecol">
<strong>Research Interests:</strong> Time-series modelling, signal validation, regime dependence in financial systems. <br>
<strong>Leadership:</strong> Bishops Diocesan College Fencing Team Captain; Durham Fresher Representative (2022–23). <br>
<strong>Activities:</strong> Durham University Fencing Team; Boxing (Student Fight Night). <br>
<strong>Achievements:</strong> South Africa U17 Fencing Champion & Weldon le Huray Scholar; President’s Award (Gold).
</div>
<h2>Key Skills</h2>
<div class="onecol">
<ul>
Probability & Statistics; Numerical Methods; Optimisation; Monte Carlo Simulation; Python; C++; High-Performance Computing; Linear Algebra
</ul>
</div>
</body></html>