Edge connector

[kladogen]

I'm thinking about building a board that connects to the edge connector and get the signals from there. The only required signal that I did not see on the edge connector is CAS, but I think it better to have just one cable. Would you think it is possible?

[c0pperdragon]

I guess if you have the CPU clock signal as well as the Y (luminance & sync), you may very well be able to sync your implementation to the inner workings of the ULA. With all the other signals available as well, this should actually work.

Maybe you consider creating a Lumacode signal as well as RGB, so it could also be integrated in my new Lumacode infrastructure.

[kladogen]

Hi, also I was just reading the ZX Spectrum Service Manual that mentions "The RAS/CAS outputs from the ULA are generated in sequence in response to MREQ and A14 from the CPU.". Do you think it is possible for the FPGA to use theese signals instead of CAS and therefore the board could become an extension of the Spectrum on the Edge Connector? Probably it needs some work to define with a logic analyser to define exactly how CAS is produced from MREQ and A14 but its only 4 combinations.

[c0pperdragon]

It is actually much more involved than that. The ULA does create the CAS/RAS signals in behalf of the CPU when it wants to access the low RAM, but it also does such accesses on its own to get the video data. Even worse, when there is a conflict between CPU access and ULA access, the ULA stops the CPU clock until it is finished itself. So just using the CPU clock directly to drive the logic will not work without some means to bridge the time when no clock is generated.
All this is pretty difficult and needs some serious FPGA wizardry which is no project for the faint of heart. Maybe I will try it myself.

[c0pperdragon]

Thought about the idea with the edge connector a bit more, and I was basically mistaken here. It is not possible to sniff all the ULA data traffic on the edge connector because the ZX Spectrum has a split data bus of which only the CPU side of things is available on the edge connector. In the cases where the CPU executes code from the uncontested memory, the ULA can do its own thing completely independently and nothing of this will show up on the external data lines.

Only thing that may actually work would be to sniff the CPU write accesses to the video RAM and keep your own copy of this data and genereate the video from this. But this would be a completely different approach.

[kladogen]

That was my initial intention when I found your project. I was thinking of a project using a raspberry pico to monitor the address bus and data bus, store any writes into it's own RAM and from there produce a VGA output. However, since the IO pins of the pico are not enough to both monitor the IO and produce the VGA output, probably a Parallel to Serial register would be needed for the data bus. This could be done using raspberry pico PIO to get the data fast in the memory and then create the output picture according to the memory contents. That would work like an external graphics card. However, I'm not sure about the border - I don't think the data for that is in the Spectrum's graphics RAM, rather it is produced by the ULA according to other instructions maybe OUTs. Probably these could also be monitored but it would if someone knew what to look for.

[c0pperdragon]

Yes, the border color is not taken from RAM, but from the internal registers of the ULA. This is written by the CPU with an OUT instruction.