diff --git a/thorn/include/kernel/ethernet.h b/thorn/include/kernel/ethernet.h new file mode 100644 index 0000000..6ebd765 --- /dev/null +++ b/thorn/include/kernel/ethernet.h @@ -0,0 +1,13 @@ +#ifndef _ROSE_K_ETHERNET_H +#define _ROSE_K_ETHERNET_H + +#include "common/logging.h" +#include "common/printf.h" +#include "common/stddef.h" +#include "common/utils.h" +#include "kernel/peripherals/ethernet.h" + +void handle_ethernet_irq (); +bool init_ethernet (); + +#endif /*_ROSE_K_ETHERNET_H */ diff --git a/thorn/include/kernel/irq.h b/thorn/include/kernel/irq.h index d95cc0b..fbd01ee 100644 --- a/thorn/include/kernel/irq.h +++ b/thorn/include/kernel/irq.h @@ -8,6 +8,7 @@ #include "kernel/entry.h" #include "kernel/peripherals/irq.h" #include "kernel/timer.h" +#include "kernel/ethernet.h" #include "kernel/mini_uart.h" diff --git a/thorn/include/kernel/peripherals/ethernet.h b/thorn/include/kernel/peripherals/ethernet.h new file mode 100644 index 0000000..9a0204d --- /dev/null +++ b/thorn/include/kernel/peripherals/ethernet.h @@ -0,0 +1,31 @@ +#ifndef _ROSE_K_P_ETHERNET_H +#define _ROSE_K_P_ETHERNET_H + +#define ETHERNET_BASE 0xFD580000 +#define ETHERNET_MDIO (ETHERNET_BASE + 0x0E14) +#define ETHERNET_MDIO_END (ETHERNET_BASE + 0x0E1B) +#define ETHERNET_END (ETHERNET_BASE + 0xFFFF) + +// SYS registers +#define SYS (ETHERNET_BASE + 0x0000) +#define SYS_REV_CTRL (SYS + 0x0000) + +// GR_BRIDGE registers +#define GR_BRIDGE (ETHERNET_BASE + 0x0040) + +// EXT registers +#define EXT (ETHERNET_BASE + 0x0080) + +// INTRL2_0 registers +#define INTRL2_0 (ETHERNET_BASE + 0x0200) + +// INTRL2_1 registers +#define INTRL2_1 (ETHERNET_BASE + 0x0240) + +// RBUF registers +#define RBUF (ETHERNET_BASE + 0x0300) + +// UMAC registers +#define UMAC (ETHERNET_BASE + 0x0800) + +#endif /*_ROSE_K_P_ETHERNET_H */ diff --git a/thorn/include/kernel/peripherals/irq.h b/thorn/include/kernel/peripherals/irq.h index 54f51c7..a1eda13 100644 --- a/thorn/include/kernel/peripherals/irq.h +++ b/thorn/include/kernel/peripherals/irq.h @@ -21,10 +21,11 @@ * * IRQ 96-63 VideoCore interrupts */ -#define SYSTEM_TIMER_IRQ_0 (0x60)//96 -#define SYSTEM_TIMER_IRQ_1 (0x61)//97 -#define SYSTEM_TIMER_IRQ_2 (0x62)//98 -#define SYSTEM_TIMER_IRQ_3 (0x63)//99 -#define AUX_CUMULATIVE (0x7D)// 125 Cumulates UART1, SPI1, and SPI2 +#define SYSTEM_TIMER_IRQ_0 (0x60)//96 +#define SYSTEM_TIMER_IRQ_1 (0x61)//97 +#define SYSTEM_TIMER_IRQ_2 (0x62)//98 +#define SYSTEM_TIMER_IRQ_3 (0x63)//99 +#define AUX_CUMULATIVE (0x7D)// 125 Cumulates UART1, SPI1, and SPI2 +#define ETH_PCIE_L2_CUMULATIVE (0x9A)// 154 Cumulates 57 ETH_PCIE_L2 interrupts #endif /*_ROSE_K_P_IRQ_H */ diff --git a/thorn/src/kernel/ethernet.c b/thorn/src/kernel/ethernet.c new file mode 100644 index 0000000..5c4bc29 --- /dev/null +++ b/thorn/src/kernel/ethernet.c @@ -0,0 +1,86 @@ +#include "kernel/ethernet.h" + +void handle_ethernet_irq() { + printf ("ethernet interrupt received!\r\n"); +} + + +// #define UMAC_CMD 0x008 +// #define CMD_SW_RESET (1 << 13) +// #define CMD_LCL_LOOP_EN (1 << 15) +// #define SYS_RBUF_FLUSH_CTRL 0x08 + +// #define MIB_RESET_RX (1 << 0) +// #define MIB_RESET_RUNT (1 << 1) +// #define MIB_RESET_TX (1 << 2) + +// #define UMAC_MIB_CTRL 0x580 + +// #define ENET_MAX_MTU_SIZE 1536 // with padding + +// #define UMAC_MAX_FRAME_LEN 0x014 +// #define RBUF_CTRL 0x00 +// #define RBUF_ALIGN_2B (1 << 1) +// #define RBUF_TBUF_SIZE_CTRL 0xB4 +// #define SYS_REV_CTRL 0x00 + +// // Register block offsets +// #define GENET_SYS_OFF 0x0000 +// #define GENET_GR_BRIDGE_OFF 0x0040 +// #define GENET_EXT_OFF 0x0080 +// #define GENET_INTRL2_0_OFF 0x0200 +// #define GENET_INTRL2_1_OFF 0x0240 +// #define GENET_RBUF_OFF 0x0300 +// #define GENET_UMAC_OFF 0x0800 + +// // intrl2 interrupts +// #define UMAC_IRQ_LINK_UP (1 << 4) +// #define UMAC_IRQ_LINK_DOWN (1 << 5) +// #define UMAC_IRQ_LINK_EVENT (UMAC_IRQ_LINK_UP | UMAC_IRQ_LINK_DOWN) + +// // uniMac intrl2 registers +// #define INTRL2_CPU_STAT 0x00 +// #define INTRL2_CPU_SET 0x04 +// #define INTRL2_CPU_CLEAR 0x08 +// #define INTRL2_CPU_MASK_STATUS 0x0C +// #define INTRL2_CPU_MASK_SET 0x10 +// #define INTRL2_CPU_MASK_CLEAR 0x14 + +// // Generate I/O inline functions +// #define GENET_IO_MACRO(name, offset) \ +// static inline unsigned int name##_readl(unsigned int off) \ +// { \ +// return get32 (ETHERNET_BASE + offset + off); \ +// } \ +// static inline void name##_writel(unsigned int val, unsigned int off) \ +// { \ +// put32 (ETHERNET_BASE + offset + off, val); \ +// } + +// GENET_IO_MACRO(umac, GENET_UMAC_OFF); +// GENET_IO_MACRO(sys, GENET_SYS_OFF); +// GENET_IO_MACRO(intrl2_0, GENET_INTRL2_0_OFF); +// GENET_IO_MACRO(intrl2_1, GENET_INTRL2_1_OFF); +// GENET_IO_MACRO(rbuf, GENET_RBUF_OFF); + +// #define rbuf_ctrl_set(val) sys_writel(val, SYS_RBUF_FLUSH_CTRL) +// #define rbuf_ctrl_get() sys_readl(SYS_RBUF_FLUSH_CTRL) + +// #define BIT(n) (1U << (n)) + +bool init_ethernet (void) { + unsigned int revision = get32 (SYS_REV_CTRL); + + if (((revision >> 24) & 0x0F) != 6) { // major version + ERROR ("Ethernet controller major version not supported"); + return false; + } else if (((revision >> 16) & 0x0F) != 0) { // minor version + ERROR ("Ethernet controller minor version not supported"); + return false; + } else if ((revision & 0xFFFF) != 0) { // ephy version + ERROR ("Ethernet controller ephy version not supported"); + return false; + } + + return true; +} diff --git a/thorn/src/kernel/irq.c b/thorn/src/kernel/irq.c index 4f9b8b4..697eaff 100644 --- a/thorn/src/kernel/irq.c +++ b/thorn/src/kernel/irq.c @@ -28,11 +28,13 @@ void enable_interrupt_controller () { #ifdef _ROSE_K_MINI_UART_H assign_target (AUX_CUMULATIVE, 0); #endif + assign_target (ETH_PCIE_L2_CUMULATIVE, 0); enable_interrupt (SYSTEM_TIMER_IRQ_1); #ifdef _ROSE_K_MINI_UART_H enable_interrupt (AUX_CUMULATIVE); #endif + enable_interrupt (ETH_PCIE_L2_CUMULATIVE); } void handle_irq (void) { @@ -49,6 +51,10 @@ void handle_irq (void) { handle_mini_uart_irq (); break; #endif + case (ETH_PCIE_L2_CUMULATIVE): + put32 (GICC_EOIR, irq); + handle_ethernet_irq (); + break; default: printf ("Unhandled interrupt received: %x\r\n", irq); put32 (GICC_EOIR, irq);