I've implemented the xvc server in our custom project using yocto based on petalinux and vivado 2018.2
The server running in userspace works well with the kernel driver using IOCTL with the vivado hardware manager in version 2018.2
After starting my custom made application the whole linux system freezes, if I try to connect to the xvc server from Vivado hardware manager.
System is a zynq7000 board, linux kernel 4.14, debug_bridge_0 connected at 0x8000000 (AXI_1) which is the only participant on this AXI peripheral. My custom fpga ip-cores are all mapped to AXI_0 or ACP.
Is there any synchronization mechanism required in the kernel to secure access to the AXI peripheral?
I needed to patch some parts of your code to avoid the TCP SYN error ...
diff --git a/src/user/xvcServer.c b/src/user/xvcServer.c
index 29c484e..926ed4b 100644
--- a/xvcServer.c
+++ b/xvcServer.c
@@ -232,6 +232,8 @@ int main(int argc, char **argv) {
int fd_uio;
volatile jtag_t* ptr = NULL;
+ printf("Using Memory mapping with UIO\n");
+
fd_uio = open(UIO_PATH, O_RDWR);
if (fd_uio < 1) {
fprintf(stderr, "Failed to open uio: %s\n", UIO_PATH);
@@ -247,6 +249,8 @@ int main(int argc, char **argv) {
#else /* USE_IOCTL */
int fd_ioctl;
+ printf("Using IOCTL with char-device\n");
+
fd_ioctl = open(CHAR_DEV_PATH, O_RDWR | O_SYNC);
if (fd_ioctl < 1) {
fprintf(stderr, "Failed to open xvc ioctl device driver: %s\n", CHAR_DEV_PATH);
@@ -288,7 +292,7 @@ int main(int argc, char **argv) {
return 1;
}
- if (listen(s, 0) < 0) {
+ if (listen(s, 5) < 0) {
perror("listen");
return 1;
}
I've implemented the xvc server in our custom project using yocto based on petalinux and vivado 2018.2
The server running in userspace works well with the kernel driver using IOCTL with the vivado hardware manager in version 2018.2
After starting my custom made application the whole linux system freezes, if I try to connect to the xvc server from Vivado hardware manager.
System is a zynq7000 board, linux kernel 4.14, debug_bridge_0 connected at 0x8000000 (AXI_1) which is the only participant on this AXI peripheral. My custom fpga ip-cores are all mapped to AXI_0 or ACP.
Is there any synchronization mechanism required in the kernel to secure access to the AXI peripheral?
I needed to patch some parts of your code to avoid the TCP SYN error ...