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/*
driver.h - driver code for RP2040 ARM processors
Part of grblHAL
Copyright (c) 2021 Terje Io
Grbl is free software: you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation, either version 3 of the License, or
(at your option) any later version.
Grbl is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with Grbl. If not, see <http://www.gnu.org/licenses/>.
*/
//
// NOTE: do NOT change configuration here - edit my_machine.h instead!
//
#ifndef __DRIVER_H__
#define __DRIVER_H__
#include <stdbool.h>
#include <stdint.h>
#include "grbl/hal.h"
#include "grbl/grbl.h"
#include "grbl/nuts_bolts.h"
#ifndef OVERRIDE_MY_MACHINE
#include "my_machine.h"
#endif
// Read GPIO out register value
#define gpio_get_out_state(x) !!!!((1ul << x) & sio_hw->gpio_out)
// Configuration
// Set value to 1 to enable, 0 to disable
#ifndef USB_SERIAL_CDC
#define USB_SERIAL_CDC 0 // for UART comms
#endif
#ifndef SDCARD_ENABLE
#define SDCARD_ENABLE 0
#endif
#ifndef KEYPAD_ENABLE
#define KEYPAD_ENABLE 0
#endif
#ifndef ODOMETER_ENABLE
#define ODOMETER_ENABLE 0
#endif
#ifndef PPI_ENABLE
#define PPI_ENABLE 0
#endif
#ifndef EEPROM_ENABLE
#define EEPROM_ENABLE 0
#endif
#ifndef EEPROM_IS_FRAM
#define EEPROM_IS_FRAM 0
#endif
#ifndef TRINAMIC_ENABLE
#define TRINAMIC_ENABLE 0
#endif
#ifndef TRINAMIC_I2C
#define TRINAMIC_I2C 0
#endif
#ifndef TRINAMIC_DEV
#define TRINAMIC_DEV 0
#endif
#define CNC_BOOSTERPACK 0
// Define GPIO mode options
#define GPIO_SHIFT0 0
#define GPIO_SHIFT1 1
#define GPIO_SHIFT2 2
#define GPIO_SHIFT3 3
#define GPIO_SHIFT4 4
#define GPIO_SHIFT5 5
#define GPIO_SHIFT6 6
#define GPIO_SHIFT7 7
#define GPIO_SHIFT8 8
#define GPIO_SHIFT9 9
#define GPIO_SHIFT10 10
#define GPIO_SHIFT11 11
#define GPIO_SHIFT12 12
#define GPIO_SHIFT13 13
#define GPIO_MAP 14
#define GPIO_DIRECT 15
#define GPIO_IOEXPAND 16
// Define timer allocations.
/*
#define RPM_COUNTER_N 3
#define RPM_COUNTER timer(RPM_COUNTER_N)
#define RPM_COUNTER_IRQn timerINT(RPM_COUNTER_N)
#define RPM_COUNTER_IRQHandler timerHANDLER(RPM_COUNTER_N)
#define RPM_TIMER_N 2
#define RPM_TIMER timer(RPM_TIMER_N)
#define RPM_TIMER_IRQn timerINT(RPM_TIMER_N)
#define RPM_TIMER_IRQHandler timerHANDLER(RPM_TIMER_N)
#define PPI_TIMER_N 2
#define PPI_TIMER timer(PPI_TIMER_N)
#define PPI_TIMER_IRQn timerINT(PPI_TIMER_N)
#define PPI_TIMER_IRQHandler timerHANDLER(PPI_TIMER_N)
*/
#ifdef BOARD_CNC_BOOSTERPACK
#include "cnc_boosterpack_map.h"
#elif defined(BOARD_MY_MACHINE)
#include "my_machine_map.h"
#else // default board
#include "generic_map.h"
#endif
// Adjust STEP_PULSE_LATENCY to get accurate step pulse length when required, e.g if using high step rates.
// The default value is calibrated for 10 microseconds length.
// NOTE: step output mode, number of axes and compiler optimization settings may all affect this value.
#ifndef STEP_PULSE_LATENCY
#define STEP_PULSE_LATENCY 1.0f // microseconds
#endif
// End configuration
#if EEPROM_ENABLE == 0
#define FLASH_ENABLE 1
#else
#define FLASH_ENABLE 0
#endif
#if EEPROM_ENABLE || KEYPAD_ENABLE || IOEXPAND_ENABLE || (TRINAMIC_ENABLE && TRINAMIC_I2C)
#define I2C_PORT 1 // SCL_PIN = 27, SDA_PIN = 26
#endif
#if TRINAMIC_ENABLE
#ifndef TRINAMIC_MIXED_DRIVERS
#define TRINAMIC_MIXED_DRIVERS 1
#endif
#include "trinamic/trinamic.h"
#endif
#if MPG_MODE_ENABLE
#define SERIAL2_MOD
#endif
// End configuration
#if KEYPAD_ENABLE && !defined(KEYPAD_STROBE_PIN)
#error Keypad plugin not supported!
#endif
#if SDCARD_ENABLE && !defined(SD_CS_PIN)
#error SD card plugin not supported!
#endif
bool driver_init (void);
/**
\brief Enable IRQ Interrupts
\details Enables IRQ interrupts by clearing the I-bit in the CPSR.
Can only be executed in Privileged modes.
*/
// While waiting for CMSIS headers...:
static inline void __enable_irq(void)
{
__asm volatile ("cpsie i" : : : "memory");
}
/**
\brief Disable IRQ Interrupts
\details Disables IRQ interrupts by setting the I-bit in the CPSR.
Can only be executed in Privileged modes.
*/
static inline void __disable_irq(void)
{
__asm volatile ("cpsid i" : : : "memory");
}
#endif // __DRIVER_H__