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{"name":"Verificationexcellence.github.io","tagline":"Reference Examples and Project source code for Verification Excellence Courses","body":"## Welcome to Verification Excellence Git Hub !\r\n\r\nThis project is aimed at creating reference examples and short projects to demonstrate and facilitate learning SystemVerilog and other Verification Methodology !\r\n\r\nHere are the repositories in progress and what can be expected from them. (Note that the repositories are still in works and stay tuned for more updates on usages etc shortly)\r\n\r\n### 1) Browse Examples and Sample projects for Learning Verification using SystemVerilog Language - [SystemVerilogReference](https://github.com/VerificationExcellence/SystemVerilogReference)\r\n\r\nCourse is availabe here -> [SOC Verification Using SystemVerilog](http://verificationexcellence.usefedora.com/course/learn-systemverilog/)\r\n\r\n### 2) Browse Examples and Reference Code for Learning SystemVerilog Assertions and Functional Coverage - [SystemVerilogAssertions](https://github.com/VerificationExcellence/SystemVerilogAssertions)\r\n\r\nCourse is availabe here -> [Learn SystemVerilog Assertions and Functional Coverage coding](http://verificationexcellence.usefedora.com/course/learn-sva-coverage/)\r\n\r\nAlso stay tuned for further courses and projects !\r\n\r\nNote: If you want to check out a local copy of repositories - you need to install git and follow following:\r\n[Cloning VerificationExcellence repository from Github](http://www.verificationexcellence.in/?p=154#sthash.H9BJv4SG.dpbs)","google":"","note":"Don't delete this file! It's used internally to help with page regeneration."}