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[Perf] Implement x86 peephole and strength-reduction optimizations #3

@Simonsbs

Description

@Simonsbs

Goal

Reduce backend overhead and unlock runtime gains where GCC currently matches/exceeds us.

Scope

  • Implement x86 peephole pass for common patterns (redundant moves, zeroing idioms, simple fusion).
  • Add strength-reduction patterns for multiply/shift/add forms where valid.
  • Add before/after asm snapshots for benchmark kernels.

Acceptance

  • At least 3 measurable codegen wins on benchmark kernels.
  • No correctness regressions in make test and perf gates.
  • Runtime geometric mean improves by >=5% on expanded kernel suite.

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