diff --git a/board-support/efr32/efr32mg24/BRD2601B/autogen/sl_bluetooth.c b/board-support/efr32/efr32mg24/BRD2601B/autogen/sl_bluetooth.c index 4cac19436..0a5f1a969 100644 --- a/board-support/efr32/efr32mg24/BRD2601B/autogen/sl_bluetooth.c +++ b/board-support/efr32/efr32mg24/BRD2601B/autogen/sl_bluetooth.c @@ -30,6 +30,8 @@ #include #include "sl_bluetooth.h" +#include "sli_bt_api.h" +#include "sli_bgapi.h" #include "sl_assert.h" #include "sl_bt_stack_init.h" #include "sl_component_catalog.h" @@ -68,17 +70,23 @@ void sl_bt_step(void) { sl_bt_msg_t evt; + // Run the Bluetooth host stack processing step sl_bt_run(); - uint32_t event_len = sl_bt_event_pending_len(); - // For preventing from data loss, the event will be kept in the stack's queue - // if application cannot process it at the moment. + + // Check the length of the next event, if any, and verify that the application + // can process it. To prevent data loss, the event will be kept in the stack's + // queue if the application cannot process it at the moment. + size_t event_len = sli_bgapi_device_peek_event_len(&sli_bt_bgapi_device); if ((event_len == 0) || (!sl_bt_can_process_event(event_len))) { return; } - // Pop (non-blocking) a Bluetooth stack event from event queue. - sl_status_t status = sl_bt_pop_event(&evt); - if(status != SL_STATUS_OK){ + // Pop the event and process it if successful + sl_status_t status = sli_bgapi_device_pop_event(&sli_bt_bgapi_device, + sizeof(evt), + &evt); + + if (status != SL_STATUS_OK) { return; } sl_bt_process_event(&evt); diff --git a/board-support/efr32/efr32mg24/BRD2601B/autogen/sl_component_catalog.h b/board-support/efr32/efr32mg24/BRD2601B/autogen/sl_component_catalog.h index 9a374be5e..f9f41093d 100644 --- a/board-support/efr32/efr32mg24/BRD2601B/autogen/sl_component_catalog.h +++ b/board-support/efr32/efr32mg24/BRD2601B/autogen/sl_component_catalog.h @@ -3,6 +3,7 @@ // APIs present in project #define SL_CATALOG_BGAPI_PROTOCOL_PRESENT +#define SL_CATALOG_BGAPI_PROTOCOL_RTOS_ADAPTATION_PRESENT #define SL_CATALOG_BLUETOOTH_CONFIGURATION_PRESENT #define SL_CATALOG_BLUETOOTH_CTE_SUPPORT_PRESENT #define SL_CATALOG_BLUETOOTH_CS_SUPPORT_PRESENT @@ -24,7 +25,6 @@ #define SL_CATALOG_CMSIS_OS_COMMON_PRESENT #define SL_CATALOG_CPP_SUPPORT_PRESENT #define SL_CATALOG_DEVICE_INIT_PRESENT -#define SL_CATALOG_DEVICE_INIT_CORE_PRESENT #define SL_CATALOG_DEVICE_INIT_DCDC_PRESENT #define SL_CATALOG_EMLIB_CORE_PRESENT #define SL_CATALOG_EMLIB_RMU_PRESENT @@ -33,6 +33,7 @@ #define SL_CATALOG_GATT_CONFIGURATION_PRESENT #define SL_CATALOG_GPIO_PRESENT #define SL_CATALOG_GPIOINTERRUPT_PRESENT +#define SL_CATALOG_HAL_SYSTEM_PRESENT #define SL_CATALOG_HFXO_MANAGER_PRESENT #define SL_CATALOG_INTERRUPT_MANAGER_PRESENT #define SL_CATALOG_IOSTREAM_PRESENT @@ -48,11 +49,11 @@ #define SL_CATALOG_OT_GP_INTERFACE_PRESENT #define SL_CATALOG_OPENTHREAD_STACK_PRESENT #define SL_CATALOG_POWER_MANAGER_PRESENT +#define SL_CATALOG_POWER_MANAGER_DEEPSLEEP_PRESENT #define SL_CATALOG_PSA_CRYPTO_PRESENT #define SL_CATALOG_RADIO_PRIORITY_15_4_PRESENT #define SL_CATALOG_RAIL_LIB_PRESENT #define SL_CATALOG_RAIL_UTIL_PTI_PRESENT -#define SL_CATALOG_SE_MANAGER_PRESENT #define SL_CATALOG_SECURITY_MANAGER_PRESENT #define SL_CATALOG_SEGGER_RTT_PRESENT #define SL_CATALOG_BTN0_PRESENT diff --git a/board-support/efr32/efr32mg24/BRD2601B/autogen/sl_event_handler.c b/board-support/efr32/efr32mg24/BRD2601B/autogen/sl_event_handler.c index 24470bbaf..e0a480e06 100644 --- a/board-support/efr32/efr32mg24/BRD2601B/autogen/sl_event_handler.c +++ b/board-support/efr32/efr32mg24/BRD2601B/autogen/sl_event_handler.c @@ -3,7 +3,11 @@ #include "sl_board_init.h" #include "sl_clock_manager.h" #include "sl_hfxo_manager.h" -#include "pa_conversions_efr32.h" +#include "sl_rail_util_compatible_pa.h" +#if !(defined(SLI_SI91X_ENABLE_BLE) && SLI_SI91X_ENABLE_BLE) +#include "sl_bluetooth.h" +#include "sl_rail_util_power_manager_init.h" +#endif // !SLI_SI91X_ENABLE_BLE #include "sl_rail_util_power_manager_init.h" #include "sl_rail_util_pti.h" #include "sl_rail_util_rssi.h" @@ -11,8 +15,6 @@ #include "sl_board_control.h" #include "platform-efr32.h" #include "sl_bt_rtos_adaptation.h" -#include "sl_bluetooth.h" -#include "sl_debug_swo.h" #include "sl_gpio.h" #include "gpiointerrupt.h" #if defined(SL_MATTER_USE_SI70XX_SENSOR) && SL_MATTER_USE_SI70XX_SENSOR @@ -28,10 +30,9 @@ #else #include "sl_simple_led_instances.h" #endif //(SL_MATTER_RGB_LED_ENABLED) && SL_MATTER_RGB_LED_ENABLED == 1) - #if defined(CONFIG_ENABLE_UART) #include "sl_uartdrv_instances.h" -#endif +#endif // CONFIG_ENABLE_UART #include "psa/crypto.h" #include "sl_se_manager.h" #include "sli_protocol_crypto.h" @@ -39,7 +40,7 @@ #include "sl_iostream_init_instances.h" #include "cmsis_os2.h" #include "nvm3_default.h" -#include "sl_cos.h" + #include "sl_iostream_handles.h" void sli_driver_permanent_allocation(void) @@ -93,7 +94,9 @@ void sl_driver_init(void) #else sl_simple_led_init_instances(); #endif //(SL_MATTER_RGB_LED_ENABLED) && SL_MATTER_RGB_LED_ENABLED == 1) + #if defined(CONFIG_ENABLE_UART) sl_uartdrv_init_instances(); +#endif // CONFIG_ENABLE_UART } void sl_service_init(void) @@ -112,18 +115,24 @@ void sl_service_init(void) void sl_stack_init(void) { +#if !SLI_SI91X_ENABLE_BLE sl_rail_util_pa_init(); sl_rail_util_power_manager_init(); sl_rail_util_pti_init(); sl_rail_util_rssi_init(); - sl_ot_sys_init(); sli_bt_stack_functional_init(); +#endif // !SLI_SI91X_ENABLE_BLE +#ifdef SL_OT_ENABLE + sl_ot_sys_init(); +#endif // SL_OT_ENABLE } void sl_internal_app_init(void) { +#ifdef SL_OT_ENABLE sl_ot_rtos_stack_init(); sl_ot_rtos_app_init(); +#endif // SL_OT_ENABLE } void sl_iostream_init_instances_stage_1(void) diff --git a/board-support/efr32/efr32mg24/BRD2601B/autogen/sli_psa_config_autogen.h b/board-support/efr32/efr32mg24/BRD2601B/autogen/sli_psa_config_autogen.h index 055d8a95e..f90dd6e9a 100644 --- a/board-support/efr32/efr32mg24/BRD2601B/autogen/sli_psa_config_autogen.h +++ b/board-support/efr32/efr32mg24/BRD2601B/autogen/sli_psa_config_autogen.h @@ -24,7 +24,12 @@ #define PSA_WANT_ALG_TLS12_PSK_TO_MS 1 #define MBEDTLS_PSA_CRYPTO_EXTERNAL_RNG +#if defined(KSU_MAX_KEY_SLOTS) +#include "sli_ksu_keyslots_config.h" +#define MBEDTLS_PSA_KEY_SLOT_COUNT (22 + 15 + 1 + SL_PSA_KEY_USER_SLOT_COUNT + SLI_KSU_MAX_KEY_SLOTS - SLI_KSU_KEY_SLOT_USER_START + 1) +#else #define MBEDTLS_PSA_KEY_SLOT_COUNT (22 + 15 + 1 + SL_PSA_KEY_USER_SLOT_COUNT + 1) +#endif #ifndef SL_PSA_ITS_MAX_FILES #define SL_PSA_ITS_MAX_FILES (1 + SL_PSA_ITS_USER_MAX_FILES) #endif diff --git a/board-support/efr32/efr32mg24/BRD2601B/config/pin_config.h b/board-support/efr32/efr32mg24/BRD2601B/config/pin_config.h new file mode 100644 index 000000000..c2127fdac --- /dev/null +++ b/board-support/efr32/efr32mg24/BRD2601B/config/pin_config.h @@ -0,0 +1,244 @@ +#ifndef PIN_CONFIG_H +#define PIN_CONFIG_H + +// $[CMU] +// [CMU]$ + +// $[LFXO] +// [LFXO]$ + +// $[PRS.ASYNCH0] +// [PRS.ASYNCH0]$ + +// $[PRS.ASYNCH1] +// [PRS.ASYNCH1]$ + +// $[PRS.ASYNCH2] +// [PRS.ASYNCH2]$ + +// $[PRS.ASYNCH3] +// [PRS.ASYNCH3]$ + +// $[PRS.ASYNCH4] +// [PRS.ASYNCH4]$ + +// $[PRS.ASYNCH5] +// [PRS.ASYNCH5]$ + +// $[PRS.ASYNCH6] +// [PRS.ASYNCH6]$ + +// $[PRS.ASYNCH7] +// [PRS.ASYNCH7]$ + +// $[PRS.ASYNCH8] +// [PRS.ASYNCH8]$ + +// $[PRS.ASYNCH9] +// [PRS.ASYNCH9]$ + +// $[PRS.ASYNCH10] +// [PRS.ASYNCH10]$ + +// $[PRS.ASYNCH11] +// [PRS.ASYNCH11]$ + +// $[PRS.ASYNCH12] +// [PRS.ASYNCH12]$ + +// $[PRS.ASYNCH13] +// [PRS.ASYNCH13]$ + +// $[PRS.ASYNCH14] +// [PRS.ASYNCH14]$ + +// $[PRS.ASYNCH15] +// [PRS.ASYNCH15]$ + +// $[PRS.SYNCH0] +// [PRS.SYNCH0]$ + +// $[PRS.SYNCH1] +// [PRS.SYNCH1]$ + +// $[PRS.SYNCH2] +// [PRS.SYNCH2]$ + +// $[PRS.SYNCH3] +// [PRS.SYNCH3]$ + +// $[GPIO] +// GPIO SWV on PA03 +#ifndef GPIO_SWV_PORT +#define GPIO_SWV_PORT SL_GPIO_PORT_A +#endif +#ifndef GPIO_SWV_PIN +#define GPIO_SWV_PIN 3 +#endif + +// [GPIO]$ + +// $[TIMER0] +// [TIMER0]$ + +// $[TIMER1] +// [TIMER1]$ + +// $[TIMER2] +// [TIMER2]$ + +// $[TIMER3] +// [TIMER3]$ + +// $[TIMER4] +// [TIMER4]$ + +// $[USART0] +// [USART0]$ + +// $[I2C1] +// I2C1 SCL on PC04 +#ifndef I2C1_SCL_PORT +#define I2C1_SCL_PORT SL_GPIO_PORT_C +#endif +#ifndef I2C1_SCL_PIN +#define I2C1_SCL_PIN 4 +#endif + +// I2C1 SDA on PC05 +#ifndef I2C1_SDA_PORT +#define I2C1_SDA_PORT SL_GPIO_PORT_C +#endif +#ifndef I2C1_SDA_PIN +#define I2C1_SDA_PIN 5 +#endif + +// [I2C1]$ + +// $[EUSART1] +// [EUSART1]$ + +// $[KEYSCAN] +// [KEYSCAN]$ + +// $[LETIMER0] +// [LETIMER0]$ + +// $[IADC0] +// [IADC0]$ + +// $[ACMP0] +// [ACMP0]$ + +// $[ACMP1] +// [ACMP1]$ + +// $[VDAC0] +// [VDAC0]$ + +// $[VDAC1] +// [VDAC1]$ + +// $[PCNT0] +// [PCNT0]$ + +// $[HFXO0] +// [HFXO0]$ + +// $[I2C0] +// [I2C0]$ + +// $[EUSART0] +// EUSART0 CTS on PB02 +#ifndef EUSART0_CTS_PORT +#define EUSART0_CTS_PORT SL_GPIO_PORT_B +#endif +#ifndef EUSART0_CTS_PIN +#define EUSART0_CTS_PIN 2 +#endif + +// EUSART0 RX on PA06 +#ifndef EUSART0_RX_PORT +#define EUSART0_RX_PORT SL_GPIO_PORT_A +#endif +#ifndef EUSART0_RX_PIN +#define EUSART0_RX_PIN 6 +#endif + +// EUSART0 TX on PA05 +#ifndef EUSART0_TX_PORT +#define EUSART0_TX_PORT SL_GPIO_PORT_A +#endif +#ifndef EUSART0_TX_PIN +#define EUSART0_TX_PIN 5 +#endif + +// [EUSART0]$ + +// $[PTI] +// PTI DFRAME on PC07 +#ifndef PTI_DFRAME_PORT +#define PTI_DFRAME_PORT SL_GPIO_PORT_C +#endif +#ifndef PTI_DFRAME_PIN +#define PTI_DFRAME_PIN 7 +#endif + +// PTI DOUT on PC06 +#ifndef PTI_DOUT_PORT +#define PTI_DOUT_PORT SL_GPIO_PORT_C +#endif +#ifndef PTI_DOUT_PIN +#define PTI_DOUT_PIN 6 +#endif + +// [PTI]$ + +// $[MODEM] +// [MODEM]$ + +// $[CUSTOM_PIN_NAME] +#ifndef _PORT +#define _PORT SL_GPIO_PORT_A +#endif +#ifndef _PIN +#define _PIN 0 +#endif + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +// [CUSTOM_PIN_NAME]$ + + +#endif // PIN_CONFIG_H + + diff --git a/board-support/efr32/efr32mg24/BRD2601B/config/psa_crypto_config.h b/board-support/efr32/efr32mg24/BRD2601B/config/psa_crypto_config.h index 20703b41d..773ce99e0 100644 --- a/board-support/efr32/efr32mg24/BRD2601B/config/psa_crypto_config.h +++ b/board-support/efr32/efr32mg24/BRD2601B/config/psa_crypto_config.h @@ -27,26 +27,32 @@ // Default: 4 #define SL_PSA_KEY_USER_SLOT_COUNT (4) -// PSA Maximum User Persistent Keys Count <0-1024> +// Maximum User Persistent PSA Key Count <0-1024> // Maximum amount of keys (or other files) that can be stored persistently -// by the application through the PSA interface, when persistent storage -// support for PSA Crypto is included in the project. -// Due to caching logic, this setting does have an impact on static RAM usage. -// Note that this number is added to the potential requirements from other -// software components in the project, such that the total amount of keys -// which can be stored through the ITS backend can be higher than what is -// configured here. +// by the user application, when PSA ITS (Internal Trusted Storage) support +// is included in the project. +// NOTE: +// In addition to SL_PSA_ITS_USER_MAX_FILES (number of user keys) the +// application may be configured to include SDK components that require an +// additional number of keys. The sum of user keys and SDK component keys +// is computed and the result, called SL_PSA_ITS_MAX_FILES, is used +// internally in the PSA ITS driver. // -// WARNING: When changing this setting on an application that is already -// deployed, and thus will get the change through an application upgrade, -// care should be taken to ensure that the setting is only ever increased, -// and never decreased. Decreasing this setting might cause previously -// stored keys/files to become inaccessible. +// WARNING: +// For applications using PSA ITS driver version 1 or 2, when changing the +// SL_PSA_ITS_USER_MAX_FILES in an application that is already depeloyed, +// and thus will get the change through an application upgrade, care should +// be taken to ensure that the total sum of keys SL_PSA_ITS_MAX_FILES is +// only ever equal or increased, and never decreased. Decreasing this +// setting might cause previously stored keys/files to become inaccessible, +// ITS should be cleared and all files need to be stored again. // -// It is not possible to change this setting when using V3 ITS Driver. -// The file-storage indexing is dependent on the maximum number of files, -// and if SL_PSA_ITS_USER_MAX_FILES is changed, ITS should be cleared and -// all files need to be stored again. +// For applications using PSA ITS driver version 3, it is not possible to +// change this setting because the file-storage indexing is dependent on the +// maximum number of files (SL_PSA_ITS_MAX_FILES) being consistent, and if +// the sum of SDK component keys and user keys (SL_PSA_ITS_USER_MAX_FILES) +// is changed, may cause previously stored keys/files to become inaccessible +// ITS should be cleared and all files need to be stored again. // Default: 128 #define SL_PSA_ITS_USER_MAX_FILES (128) diff --git a/board-support/efr32/efr32mg24/BRD2601B/config/sl_bluetooth_config.h b/board-support/efr32/efr32mg24/BRD2601B/config/sl_bluetooth_config.h index 9b6a804e0..93bfbbcc4 100644 --- a/board-support/efr32/efr32mg24/BRD2601B/config/sl_bluetooth_config.h +++ b/board-support/efr32/efr32mg24/BRD2601B/config/sl_bluetooth_config.h @@ -99,6 +99,7 @@ // if the LE Power Control feature is enabled. // When this configuration is passed into stack initialization, the stack // will select the closest value that the device supports. +// API sl_bt_system_set_tx_power() can be used to set the minimum TX power at runtime. // API sl_bt_system_get_tx_power_setting() can be used to query the selected value. #define SL_BT_CONFIG_MIN_TX_POWER (-30) @@ -108,6 +109,7 @@ // advertising, scanning and DTM testing. // When this configuration is passed into stack initialization, the stack // will select the closest value that the device supports. +// API sl_bt_system_set_tx_power() can be used to set the maximum TX power at runtime. // API sl_bt_system_get_tx_power_setting() can be used to query the selected value. #define SL_BT_CONFIG_MAX_TX_POWER (80) diff --git a/board-support/efr32/efr32mg24/BRD2601B/config/sl_board_control_config.h b/board-support/efr32/efr32mg24/BRD2601B/config/sl_board_control_config.h index 1b866587a..79caa1fd9 100644 --- a/board-support/efr32/efr32mg24/BRD2601B/config/sl_board_control_config.h +++ b/board-support/efr32/efr32mg24/BRD2601B/config/sl_board_control_config.h @@ -67,38 +67,62 @@ // SL_BOARD_ENABLE_SENSOR_RHT // $[GPIO_SL_BOARD_ENABLE_SENSOR_RHT] -#define SL_BOARD_ENABLE_SENSOR_RHT_PORT SL_GPIO_PORT_C -#define SL_BOARD_ENABLE_SENSOR_RHT_PIN 9 +#ifndef SL_BOARD_ENABLE_SENSOR_RHT_PORT +#define SL_BOARD_ENABLE_SENSOR_RHT_PORT SL_GPIO_PORT_C +#endif +#ifndef SL_BOARD_ENABLE_SENSOR_RHT_PIN +#define SL_BOARD_ENABLE_SENSOR_RHT_PIN 9 +#endif // [GPIO_SL_BOARD_ENABLE_SENSOR_RHT]$ // SL_BOARD_ENABLE_SENSOR_HALL // $[GPIO_SL_BOARD_ENABLE_SENSOR_HALL] -#define SL_BOARD_ENABLE_SENSOR_HALL_PORT SL_GPIO_PORT_C -#define SL_BOARD_ENABLE_SENSOR_HALL_PIN 9 +#ifndef SL_BOARD_ENABLE_SENSOR_HALL_PORT +#define SL_BOARD_ENABLE_SENSOR_HALL_PORT SL_GPIO_PORT_C +#endif +#ifndef SL_BOARD_ENABLE_SENSOR_HALL_PIN +#define SL_BOARD_ENABLE_SENSOR_HALL_PIN 9 +#endif // [GPIO_SL_BOARD_ENABLE_SENSOR_HALL]$ // SL_BOARD_ENABLE_SENSOR_PRESSURE // $[GPIO_SL_BOARD_ENABLE_SENSOR_PRESSURE] -#define SL_BOARD_ENABLE_SENSOR_PRESSURE_PORT SL_GPIO_PORT_C -#define SL_BOARD_ENABLE_SENSOR_PRESSURE_PIN 9 +#ifndef SL_BOARD_ENABLE_SENSOR_PRESSURE_PORT +#define SL_BOARD_ENABLE_SENSOR_PRESSURE_PORT SL_GPIO_PORT_C +#endif +#ifndef SL_BOARD_ENABLE_SENSOR_PRESSURE_PIN +#define SL_BOARD_ENABLE_SENSOR_PRESSURE_PIN 9 +#endif // [GPIO_SL_BOARD_ENABLE_SENSOR_PRESSURE]$ // SL_BOARD_ENABLE_SENSOR_LIGHT // $[GPIO_SL_BOARD_ENABLE_SENSOR_LIGHT] -#define SL_BOARD_ENABLE_SENSOR_LIGHT_PORT SL_GPIO_PORT_C -#define SL_BOARD_ENABLE_SENSOR_LIGHT_PIN 9 +#ifndef SL_BOARD_ENABLE_SENSOR_LIGHT_PORT +#define SL_BOARD_ENABLE_SENSOR_LIGHT_PORT SL_GPIO_PORT_C +#endif +#ifndef SL_BOARD_ENABLE_SENSOR_LIGHT_PIN +#define SL_BOARD_ENABLE_SENSOR_LIGHT_PIN 9 +#endif // [GPIO_SL_BOARD_ENABLE_SENSOR_LIGHT]$ // SL_BOARD_ENABLE_SENSOR_IMU // $[GPIO_SL_BOARD_ENABLE_SENSOR_IMU] -#define SL_BOARD_ENABLE_SENSOR_IMU_PORT SL_GPIO_PORT_C -#define SL_BOARD_ENABLE_SENSOR_IMU_PIN 9 +#ifndef SL_BOARD_ENABLE_SENSOR_IMU_PORT +#define SL_BOARD_ENABLE_SENSOR_IMU_PORT SL_GPIO_PORT_C +#endif +#ifndef SL_BOARD_ENABLE_SENSOR_IMU_PIN +#define SL_BOARD_ENABLE_SENSOR_IMU_PIN 9 +#endif // [GPIO_SL_BOARD_ENABLE_SENSOR_IMU]$ // SL_BOARD_ENABLE_SENSOR_MICROPHONE // $[GPIO_SL_BOARD_ENABLE_SENSOR_MICROPHONE] -#define SL_BOARD_ENABLE_SENSOR_MICROPHONE_PORT SL_GPIO_PORT_C -#define SL_BOARD_ENABLE_SENSOR_MICROPHONE_PIN 8 +#ifndef SL_BOARD_ENABLE_SENSOR_MICROPHONE_PORT +#define SL_BOARD_ENABLE_SENSOR_MICROPHONE_PORT SL_GPIO_PORT_C +#endif +#ifndef SL_BOARD_ENABLE_SENSOR_MICROPHONE_PIN +#define SL_BOARD_ENABLE_SENSOR_MICROPHONE_PIN 8 +#endif // [GPIO_SL_BOARD_ENABLE_SENSOR_MICROPHONE]$ // <<< sl:end pin_tool >>> diff --git a/board-support/efr32/efr32mg24/BRD2601B/config/sl_btctrl_config.h b/board-support/efr32/efr32mg24/BRD2601B/config/sl_btctrl_config.h index ed75a2d0e..403df1ffe 100644 --- a/board-support/efr32/efr32mg24/BRD2601B/config/sl_btctrl_config.h +++ b/board-support/efr32/efr32mg24/BRD2601B/config/sl_btctrl_config.h @@ -146,15 +146,27 @@ #define SL_BT_CONTROLLER_ADAPTIVITY_MODE (SL_BTCTRL_CHANNELMAP_FLAG_ACTIVE_ADAPTIVITY) #endif -// Power Amplifier (PA) Configuration -// Automode PA configuration -// Highest available PA configuration -// RAIL Utility component PA configuration -// Select the Power Amplifier configuration -// Default: RAIL Utility component PA configuration -#ifndef SL_BT_CONTROLLER_PA_CONFIG -#define SL_BT_CONTROLLER_PA_CONFIG SL_BT_BLUETOOTH_RAIL_UTIL_PA -#endif +// Advertising Configuration +// Include TX Power in the extended header of primary extended advertising packets +// This is default setting to all advertising sets unless it is specifically overridden by VS_SiliconLabs_Set_Advertising_Config_Bits. +// Default: 0 +// Enabling this option takes effect only if permitted by Le_Set_Extended_Advertising_Parameters +// According to Link Layer specification, Vol 6, Part B, Table 2.4 and Table 2.5: +// Optional in 1M PHY when the advertiser is connectable or scannable, or with auxiliary pointer. +// In other cases, the Extended Advertising TX Power is always optional by settings. +#define SL_BT_CONTROLLER_PRIMARY_EXT_PACKET_INCLUDE_TX_POWER (0) +// +// Include Advertiser Address in the header of primary extended advertising packets +// This is default setting to all advertising sets unless it is specifically overridden by VS_SiliconLabs_Set_Advertising_Config_Bits. +// Default: 0 +// Enabling this option takes effect only if permitted by Le_Set_Extended_Advertising_Parameters +// According to Link Layer specification, Vol 6, Part B, Table 2.4 and Table 2.5: +// Optional in 1M PHY when the advertiser is non-connectable and non-scannable, with auxiliary pointer. +// Mandatory when the advertiser is non-connectable and non-scannable, without auxiliary pointer. +// Forbidden when the advertiser is connectable or scannable. +#define SL_BT_CONTROLLER_PRIMARY_EXT_PACKET_INCLUDE_ADDRESS (0) +// +// Advertising Configuration // Bluetooth Controller Configuration // <<< end of configuration section >>> diff --git a/board-support/efr32/efr32mg24/BRD2601B/config/sl_clock_manager_tree_config.h b/board-support/efr32/efr32mg24/BRD2601B/config/sl_clock_manager_tree_config.h index 8c0be95e9..1f6f2a089 100644 --- a/board-support/efr32/efr32mg24/BRD2601B/config/sl_clock_manager_tree_config.h +++ b/board-support/efr32/efr32mg24/BRD2601B/config/sl_clock_manager_tree_config.h @@ -105,9 +105,9 @@ #endif // PCLK branch divider -// MIN // DIV1 // DIV2 +// MIN // PCLK branch is derived from HCLK. This clock drives the APB bus interface. // SL_CLOCK_MANAGER_PCLK_DIV_MIN #ifndef SL_CLOCK_MANAGER_PCLK_DIVIDER diff --git a/board-support/efr32/efr32mg24/BRD2601B/config/sl_i2cspm_sensor_config.h b/board-support/efr32/efr32mg24/BRD2601B/config/sl_i2cspm_sensor_config.h index 474a5bbf8..5be07c21e 100644 --- a/board-support/efr32/efr32mg24/BRD2601B/config/sl_i2cspm_sensor_config.h +++ b/board-support/efr32/efr32mg24/BRD2601B/config/sl_i2cspm_sensor_config.h @@ -54,17 +54,28 @@ // <<< sl:start pin_tool >>> // SL_I2CSPM_SENSOR // $[I2C_SL_I2CSPM_SENSOR] +#ifndef SL_I2CSPM_SENSOR_PERIPHERAL #define SL_I2CSPM_SENSOR_PERIPHERAL I2C1 +#endif +#ifndef SL_I2CSPM_SENSOR_PERIPHERAL_NO #define SL_I2CSPM_SENSOR_PERIPHERAL_NO 1 +#endif // I2C1 SCL on PC04 +#ifndef SL_I2CSPM_SENSOR_SCL_PORT #define SL_I2CSPM_SENSOR_SCL_PORT SL_GPIO_PORT_C +#endif +#ifndef SL_I2CSPM_SENSOR_SCL_PIN #define SL_I2CSPM_SENSOR_SCL_PIN 4 +#endif // I2C1 SDA on PC05 +#ifndef SL_I2CSPM_SENSOR_SDA_PORT #define SL_I2CSPM_SENSOR_SDA_PORT SL_GPIO_PORT_C +#endif +#ifndef SL_I2CSPM_SENSOR_SDA_PIN #define SL_I2CSPM_SENSOR_SDA_PIN 5 - +#endif // [I2C_SL_I2CSPM_SENSOR]$ // <<< sl:end pin_tool >>> diff --git a/board-support/efr32/efr32mg24/BRD2601B/config/sl_mbedtls_config.h b/board-support/efr32/efr32mg24/BRD2601B/config/sl_mbedtls_config.h index e249b4d1b..7146ba648 100644 --- a/board-support/efr32/efr32mg24/BRD2601B/config/sl_mbedtls_config.h +++ b/board-support/efr32/efr32mg24/BRD2601B/config/sl_mbedtls_config.h @@ -71,9 +71,14 @@ // Default: 1 // This option is enabled assuming all buffers passed to any PSA function reside // in memory that is accessible only to the PSA function during its execution. +// This improves performance by avoiding extra buffer copies, reducing memory +// usage and allocation overhead. However, it is NOT the most secure option and +// should only be enabled if all buffers passed to PSA functions are exclusively +// accessible to PSA and never shared with untrusted code. // This option MUST be disabled whenever buffer arguments are in memory shared // with an untrusted party, for example where arguments to PSA calls are passed -// across a trust boundary. +// across a trust boundary, e.g. if TrustZone is enabled, and the PSA Crypto core +// is placed in the Secure domain. #define SL_MBEDTLS_PSA_ASSUME_EXCLUSIVE_BUFFERS 1 // diff --git a/board-support/efr32/efr32mg24/BRD2601B/config/sl_memory_manager_config.h b/board-support/efr32/efr32mg24/BRD2601B/config/sl_memory_manager_config.h index 26b84b107..4a16c29fe 100644 --- a/board-support/efr32/efr32mg24/BRD2601B/config/sl_memory_manager_config.h +++ b/board-support/efr32/efr32mg24/BRD2601B/config/sl_memory_manager_config.h @@ -51,4 +51,11 @@ // <<< end of configuration section >>> +// Keep this configuration outside the configuration section until the feature is ready for release. +// Enables the heap fallback mechanism. +// Setting this configuration to 0 will disable the fallback mechanism on DTCM and PSRAM. +// If this configuration is disabled, the memory manager will not attempt to use alternative memory regions for allocations even if using the fallback parameters. +// Default: 1 +#define SL_MEMORY_MANAGER_HEAP_FALLBACK_EN 1 + #endif /* SL_MEMORY_MANAGER_CONFIG_H */ diff --git a/board-support/efr32/efr32mg24/BRD2601B/config/sl_openthread_features_config.h b/board-support/efr32/efr32mg24/BRD2601B/config/sl_openthread_features_config.h index 22340498d..a3697f8af 100644 --- a/board-support/efr32/efr32mg24/BRD2601B/config/sl_openthread_features_config.h +++ b/board-support/efr32/efr32mg24/BRD2601B/config/sl_openthread_features_config.h @@ -65,6 +65,7 @@ #define OPENTHREAD_CONFIG_MAC_CSL_RECEIVER_ENABLE 1 #endif // CSL Scheduling Uncertainty (±10 us units) <12..999:1> +// Left unchanged the value will be set to 175 for RCPs, 20 for FTDs, and 12 for MTDs #ifndef SL_OPENTHREAD_CSL_TX_UNCERTAINTY #if OPENTHREAD_RADIO #define SL_OPENTHREAD_CSL_TX_UNCERTAINTY 175 @@ -142,12 +143,10 @@ #define OPENTHREAD_CONFIG_CHANNEL_MONITOR_ENABLE 0 #endif // - -// Commissioner +// Commissioner #ifndef OPENTHREAD_CONFIG_COMMISSIONER_ENABLE #define OPENTHREAD_CONFIG_COMMISSIONER_ENABLE 0 #endif - // Max Joiner Entries // The maximum number of Joiner entries maintained by the Commissioner. // 2 @@ -155,7 +154,6 @@ #define OPENTHREAD_CONFIG_COMMISSIONER_MAX_JOINER_ENTRIES 2 #endif // - // COAP API #ifndef OPENTHREAD_CONFIG_COAP_API_ENABLE #define OPENTHREAD_CONFIG_COAP_API_ENABLE 0 @@ -171,6 +169,11 @@ #define OPENTHREAD_CONFIG_COAP_SECURE_API_ENABLE 0 #endif // +// COAP Blockwise Transfer +#ifndef OPENTHREAD_CONFIG_COAP_BLOCKWISE_TRANSFER_ENABLE +#define OPENTHREAD_CONFIG_COAP_BLOCKWISE_TRANSFER_ENABLE 0 +#endif +// // DHCP6 Client #ifndef OPENTHREAD_CONFIG_DHCP6_CLIENT_ENABLE #define OPENTHREAD_CONFIG_DHCP6_CLIENT_ENABLE 0 @@ -196,16 +199,27 @@ #define OPENTHREAD_CONFIG_IP6_FRAGMENTATION_ENABLE 0 #endif // -// Maximum number of IPv6 unicast addresses allowed to be externally added +// IPv6 Limits +// Maximum IPv6 external unicast addresses +// Maximum number of IPv6 unicast addresses allowed to be externally added +// 4 #ifndef OPENTHREAD_CONFIG_IP6_MAX_EXT_UCAST_ADDRS #define OPENTHREAD_CONFIG_IP6_MAX_EXT_UCAST_ADDRS 4 #endif -// -// Maximum number of IPv6 multicast addresses allowed to be externally added +// Maximum IPv6 external multicast addresses +// Maximum number of IPv6 multicast addresses allowed to be externally added +// 4 #ifndef OPENTHREAD_CONFIG_IP6_MAX_EXT_MCAST_ADDRS #define OPENTHREAD_CONFIG_IP6_MAX_EXT_MCAST_ADDRS 4 #endif -// +// Maximum IPv6 address registrations for MTD +// The maximum number of IPv6 address registrations for MTD. +// If left unchanged will default to the value of OPENTHREAD_CONFIG_MLE_IP_ADDRS_PER_CHILD +// 4 +#ifndef OPENTHREAD_CONFIG_MLE_IP_ADDRS_TO_REGISTER +#define OPENTHREAD_CONFIG_MLE_IP_ADDRS_TO_REGISTER (OPENTHREAD_CONFIG_MLE_IP_ADDRS_PER_CHILD) +#endif +// // Jam Detection #ifndef OPENTHREAD_CONFIG_JAM_DETECTION_ENABLE #define OPENTHREAD_CONFIG_JAM_DETECTION_ENABLE 0 @@ -226,6 +240,14 @@ #define OPENTHREAD_CONFIG_MAC_FILTER_ENABLE 0 #endif // +// MLE Children +// Maximum number of Thread children supported by the device +// Default is 10. Used by the Thread stack to configure the size of child table. +// 10 +#ifndef OPENTHREAD_CONFIG_MLE_MAX_CHILDREN +#define OPENTHREAD_CONFIG_MLE_MAX_CHILDREN 10 +#endif +// // MLE Long Routes extension (experimental) #ifndef OPENTHREAD_CONFIG_MLE_LONG_ROUTES_ENABLE #define OPENTHREAD_CONFIG_MLE_LONG_ROUTES_ENABLE 0 @@ -235,27 +257,66 @@ #ifndef OPENTHREAD_CONFIG_MULTIPAN_RCP_ENABLE #define OPENTHREAD_CONFIG_MULTIPAN_RCP_ENABLE 0 #endif +// Broadcast IID for spinel frames +// Define broadcast IID for spinel frames dedicated to all hosts in multipan configuration +// 0 +#ifndef OPENTHREAD_SPINEL_CONFIG_BROADCAST_IID +#define OPENTHREAD_SPINEL_CONFIG_BROADCAST_IID 0 +#endif +#if OPENTHREAD_CONFIG_MULTIPAN_RCP_ENABLE +// Maximum number of Zigbee children for multiprotocol (DMP) builds +// Ensures correct table sizing for Zigbee when DMP/multipan is enabled. +// 6 +#ifndef SL_ZIGBEE_MAX_END_DEVICE_CHILDREN +#define SL_ZIGBEE_MAX_END_DEVICE_CHILDREN 6 +#endif +#endif // // Multiple OpenThread Instances #ifndef OPENTHREAD_CONFIG_MULTIPLE_INSTANCE_ENABLE #define OPENTHREAD_CONFIG_MULTIPLE_INSTANCE_ENABLE 0 #endif -// // Multiple Static Instance Support #ifndef OPENTHREAD_CONFIG_MULTIPLE_STATIC_INSTANCE_ENABLE #define OPENTHREAD_CONFIG_MULTIPLE_STATIC_INSTANCE_ENABLE 0 #endif -// -// Number of OpenThread Instances For Static Buffer Allocation +// Number of OpenThread Instances +// Default is 2. Number of OpenThread Instances For Static Buffer Allocation. +// 2 #ifndef OPENTHREAD_CONFIG_MULTIPLE_INSTANCE_NUM #define OPENTHREAD_CONFIG_MULTIPLE_INSTANCE_NUM 2 #endif // -// Define broadcast IID for spinel frames dedicated to all hosts in multipan configuration -#ifndef OPENTHREAD_SPINEL_CONFIG_BROADCAST_IID -#define OPENTHREAD_SPINEL_CONFIG_BROADCAST_IID 0 -#endif // +// Define maximum total source match table entries for both OT and Zigbee. +// In multi-instance builds (SoC or RCP/host), table must support all OT instances + Zigbee. +// For single instance (default), table sized to just OT children. +// This value is used to size all source match tables in both OT and Zigbee code. +// Note: this is purposedly not being setup with CMSIS annotations. +#ifndef RADIO_CONFIG_MAX_SRC_MATCH_ENTRIES +#if OPENTHREAD_CONFIG_MULTIPLE_INSTANCE_ENABLE +#if SL_ZIGBEE_MAX_END_DEVICE_CHILDREN +// Multipan / DMP case: OT + Zigbee +#define RADIO_CONFIG_MAX_SRC_MATCH_ENTRIES \ + ((OPENTHREAD_CONFIG_MLE_MAX_CHILDREN * (OPENTHREAD_CONFIG_MULTIPLE_INSTANCE_NUM - 1)) \ + + SL_ZIGBEE_MAX_END_DEVICE_CHILDREN) +#else +// Multi-instance OT-only case +#define RADIO_CONFIG_MAX_SRC_MATCH_ENTRIES \ + (OPENTHREAD_CONFIG_MLE_MAX_CHILDREN * OPENTHREAD_CONFIG_MULTIPLE_INSTANCE_NUM) +#endif +#else +// Single-instance OT (SoC / NCP / non-multipan RCP) +#define RADIO_CONFIG_MAX_SRC_MATCH_ENTRIES OPENTHREAD_CONFIG_MLE_MAX_CHILDREN +#endif +#endif +// Spinel Match Table +// Maximum number of spinel source match table entries +// Ensure that this value is the total of the number of openthread children times the number of openthread instances plus the number of Zigbee children. +#ifndef OPENTHREAD_SPINEL_CONFIG_MAX_SRC_MATCH_ENTRIES +#define OPENTHREAD_SPINEL_CONFIG_MAX_SRC_MATCH_ENTRIES RADIO_CONFIG_MAX_SRC_MATCH_ENTRIES +#endif +// // OTNS (OpenThread Network Simulator) #ifndef OPENTHREAD_CONFIG_OTNS_ENABLE #define OPENTHREAD_CONFIG_OTNS_ENABLE 0 @@ -265,13 +326,23 @@ #ifndef OPENTHREAD_CONFIG_PING_SENDER_ENABLE #define OPENTHREAD_CONFIG_PING_SENDER_ENABLE 1 #endif - // // Power Calibration Module (RCP only configuration) #ifndef OPENTHREAD_CONFIG_POWER_CALIBRATION_ENABLE #define OPENTHREAD_CONFIG_POWER_CALIBRATION_ENABLE 0 #endif - +// Maximum raw power calibration length +// Max raw power calibration length +// 4 +#ifndef SL_OPENTHREAD_RAW_POWER_CALIBRATION_LENGTH +#define SL_OPENTHREAD_RAW_POWER_CALIBRATION_LENGTH 4 +#endif +// Maximum FEM config setting length +// Max FEM config setting length +// 4 +#ifndef SL_OPENTHREAD_FEM_SETTING_LENGTH +#define SL_OPENTHREAD_FEM_SETTING_LENGTH 4 +#endif // // Platform UDP #ifndef OPENTHREAD_CONFIG_PLATFORM_UDP_ENABLE @@ -309,7 +380,14 @@ #endif // // Time Synchronization Service +#ifndef OPENTHREAD_CONFIG_TIME_SYNC_ENABLE #define OPENTHREAD_CONFIG_TIME_SYNC_ENABLE 0 +#endif +// +// Uptime of OpenThread instance +#ifndef OPENTHREAD_CONFIG_UPTIME_ENABLE +#define OPENTHREAD_CONFIG_UPTIME_ENABLE 1 +#endif // // UDP Forward #ifndef OPENTHREAD_CONFIG_UDP_FORWARD_ENABLE @@ -321,28 +399,22 @@ #define OPENTHREAD_CONFIG_MAC_BEACON_PAYLOAD_PARSING_ENABLE 1 #endif // -// Max raw power calibration length. -#ifndef SL_OPENTHREAD_RAW_POWER_CALIBRATION_LENGTH -#define SL_OPENTHREAD_RAW_POWER_CALIBRATION_LENGTH 4 -#endif -// -// Max FEM config setting length. -#ifndef SL_OPENTHREAD_FEM_SETTING_LENGTH -#define SL_OPENTHREAD_FEM_SETTING_LENGTH 4 -#endif -// -// The maximum number of RX buffers to use in the radio driver. -// 16 +// Radio Driver RX buffers +// Maximum number of RX buffers +// The maximum number of RX buffers to use in the radio driver. +// 16 #ifndef SL_OPENTHREAD_RADIO_RX_BUFFER_COUNT #define SL_OPENTHREAD_RADIO_RX_BUFFER_COUNT 16 #endif // +// // Logging // LOG_OUTPUT // NONE // APP // PLATFORM_DEFINED -// Default: OPENTHREAD_CONFIG_LOG_OUTPUT_PLATFORM_DEFINED +// Default: OPENTHREAD_CONFIG_LOG_OUTPUT_APP +// OPENTHREAD_CONFIG_LOG_OUTPUT_APP #ifndef OPENTHREAD_CONFIG_LOG_OUTPUT #define OPENTHREAD_CONFIG_LOG_OUTPUT OPENTHREAD_CONFIG_LOG_OUTPUT_APP #endif @@ -365,6 +437,7 @@ // INFO // DEBG // Default: OT_LOG_LEVEL_DEBG +// OT_LOG_LEVEL_DEBG #ifndef OPENTHREAD_CONFIG_LOG_LEVEL #define OPENTHREAD_CONFIG_LOG_LEVEL OT_LOG_LEVEL_DEBG #endif @@ -387,11 +460,10 @@ #endif // OPENTHREAD_FULL_LOGS_ENABLE -// Log crash dump after initialization +// Log crash dump after initialization #ifndef OPENTHREAD_CONFIG_PLATFORM_LOG_CRASH_DUMP_ENABLE #define OPENTHREAD_CONFIG_PLATFORM_LOG_CRASH_DUMP_ENABLE 0 #endif -// // // diff --git a/board-support/efr32/efr32mg24/BRD2601B/config/sl_power_manager_config.h b/board-support/efr32/efr32mg24/BRD2601B/config/sl_power_manager_config.h index 3c240b843..86b9fef27 100644 --- a/board-support/efr32/efr32mg24/BRD2601B/config/sl_power_manager_config.h +++ b/board-support/efr32/efr32mg24/BRD2601B/config/sl_power_manager_config.h @@ -37,24 +37,40 @@ // Enable custom IRQ handler for external HF oscillator. // Enable if CMU_IRQHandler/HFXO0_IRQHandler is needed from your application. -// The function sl_power_manager_irq_handler() will have to be called from you custom handler if this is enabled. +// The function sl_power_manager_irq_handler() will have to be called from your custom handler if this is enabled. // Default: 0 +#ifndef SL_POWER_MANAGER_CUSTOM_HF_OSCILLATOR_IRQ_HANDLER #define SL_POWER_MANAGER_CUSTOM_HF_OSCILLATOR_IRQ_HANDLER 0 +#endif // Enable fast wakeup (disable voltage scaling in EM2/3 mode) // Enable or disable voltage scaling in EM2/3 modes (when available). This decreases wakeup time by about 30 us. // Deprecated. It is replaced by the function sl_power_manager_em23_voltage_scaling_enable_fast_wakeup() // Default: 0 +#ifndef SL_POWER_MANAGER_CONFIG_VOLTAGE_SCALING_FAST_WAKEUP #define SL_POWER_MANAGER_CONFIG_VOLTAGE_SCALING_FAST_WAKEUP 0 +#endif + +// Enable voltage scaling in EM0 and EM1 mode. +// Enable or disable voltage scaling in EM0/1 modes. With this config enabled, the voltage +// scaling will be configured at the lowest possible level based on the system clock. +// Default: 0 +#ifndef SL_POWER_MANAGER_ENABLE_EM01_VOLTAGE_SCALING +#define SL_POWER_MANAGER_ENABLE_EM01_VOLTAGE_SCALING 0 +#endif // Enable debugging feature // Enable or disable debugging features (trace the different modules that have requirements). // Default: 0 +#ifndef SL_POWER_MANAGER_DEBUG #define SL_POWER_MANAGER_DEBUG 0 +#endif // Maximum numbers of requirements that can be logged // Default: 10 +#ifndef SL_POWER_MANAGER_DEBUG_POOL_SIZE #define SL_POWER_MANAGER_DEBUG_POOL_SIZE 10 +#endif // // Pin retention mode @@ -63,14 +79,18 @@ // Retention through EM4 // Retention through EM4 and wakeup // power_manager_pin_retention_disable +#ifndef SL_POWER_MANAGER_INIT_EMU_EM4_PIN_RETENTION_MODE #define SL_POWER_MANAGER_INIT_EMU_EM4_PIN_RETENTION_MODE EMU_EM4CTRL_EM4IORETMODE_DISABLE +#endif // Enable EM2 debugging feature // Enable or disable debugging features. // Force PD0B/PD0D to stay on during EM2 entry. This allows the debugger to remain connected in EM2 and EM3. // Enabling debug connectivity results in an increased power consumption in EM2/EM3. // Default: 1 +#ifndef SL_POWER_MANAGER_INIT_EMU_EM2_DEBUG_ENABLE #define SL_POWER_MANAGER_INIT_EMU_EM2_DEBUG_ENABLE 1 +#endif // // diff --git a/board-support/efr32/mgm24/BRD4318A/config/sl_simple_led_led1_config.h b/board-support/efr32/efr32mg24/BRD2601B/config/sl_rail_util_pa_tables_config.h similarity index 61% rename from board-support/efr32/mgm24/BRD4318A/config/sl_simple_led_led1_config.h rename to board-support/efr32/efr32mg24/BRD2601B/config/sl_rail_util_pa_tables_config.h index 80a6b5541..bd05ea57d 100644 --- a/board-support/efr32/mgm24/BRD4318A/config/sl_simple_led_led1_config.h +++ b/board-support/efr32/efr32mg24/BRD2601B/config/sl_rail_util_pa_tables_config.h @@ -1,9 +1,9 @@ /***************************************************************************//** * @file - * @brief Simple Led Driver Configuration + * @brief PA Tables configuration file. ******************************************************************************* * # License - * Copyright 2019 Silicon Laboratories Inc. www.silabs.com + * Copyright 2025 Silicon Laboratories Inc. www.silabs.com ******************************************************************************* * * SPDX-License-Identifier: Zlib @@ -28,30 +28,22 @@ * ******************************************************************************/ -#ifndef SL_SIMPLE_LED_LED1_CONFIG_H -#define SL_SIMPLE_LED_LED1_CONFIG_H +#ifndef SL_RAIL_UTIL_PA_TABLES_CONFIG_H +#define SL_RAIL_UTIL_PA_TABLES_CONFIG_H // <<< Use Configuration Wizard in Context Menu >>> -// Simple LED configuration -// -// Active low -// Active high -// Default: SL_SIMPLE_LED_POLARITY_ACTIVE_HIGH -#define SL_SIMPLE_LED_LED1_POLARITY SL_SIMPLE_LED_POLARITY_ACTIVE_HIGH -// end led configuration +// PA Table Configuration +// PA Table Selection +// <"sl_rail_util_pa_dbm_powersetting_mapping_table_10dbm.h"=> 10dBm PA powersetting mapping table +// <"sl_rail_util_pa_dbm_powersetting_mapping_table_0dbm.h"=> 0dBm PA powersetting mapping table +// <"sl_rail_util_pa_dbm_powersetting_mapping_table_automode_0_10dbm.h"=> 0dBm-10dBm automode PA powersetting mapping table +// Default: "sl_rail_util_pa_dbm_powersetting_mapping_table_automode_0_10dbm.h" +#define SL_RAIL_UTIL_PA_TABLE_HEADER "sl_rail_util_pa_dbm_powersetting_mapping_table_automode_0_10dbm.h" +// // <<< end of configuration section >>> -// <<< sl:start pin_tool >>> +#include SL_RAIL_UTIL_PA_TABLE_HEADER -// SL_SIMPLE_LED_LED1 -// $[GPIO_SL_SIMPLE_LED_LED1] -#define SL_SIMPLE_LED_LED1_PORT SL_GPIO_PORT_B -#define SL_SIMPLE_LED_LED1_PIN 4 - -// [GPIO_SL_SIMPLE_LED_LED1]$ - -// <<< sl:end pin_tool >>> - -#endif // SL_SIMPLE_LED_LED1_CONFIG_H +#endif // SL_RAIL_UTIL_PA_TABLES_CONFIG_H diff --git a/board-support/efr32/efr32mg24/BRD2601B/config/sl_rail_util_pti_config.h b/board-support/efr32/efr32mg24/BRD2601B/config/sl_rail_util_pti_config.h index 2a82ab599..aaaa66c37 100644 --- a/board-support/efr32/efr32mg24/BRD2601B/config/sl_rail_util_pti_config.h +++ b/board-support/efr32/efr32mg24/BRD2601B/config/sl_rail_util_pti_config.h @@ -35,12 +35,12 @@ // PTI Configuration // PTI mode -// UART -// UART onewire -// SPI -// Disabled -// Default: RAIL_PTI_MODE_UART -#define SL_RAIL_UTIL_PTI_MODE RAIL_PTI_MODE_UART +// UART +// UART onewire +// SPI +// Disabled +// Default: SL_RAIL_PTI_MODE_UART +#define SL_RAIL_UTIL_PTI_MODE SL_RAIL_PTI_MODE_UART // PTI Baud Rate (Hertz) // <147800-20000000:1> diff --git a/board-support/efr32/efr32mg24/BRD2601B/config/sl_simple_button_btn0_config.h b/board-support/efr32/efr32mg24/BRD2601B/config/sl_simple_button_btn0_config.h index 547fc60c1..0e6b0d977 100644 --- a/board-support/efr32/efr32mg24/BRD2601B/config/sl_simple_button_btn0_config.h +++ b/board-support/efr32/efr32mg24/BRD2601B/config/sl_simple_button_btn0_config.h @@ -48,9 +48,12 @@ // SL_SIMPLE_BUTTON_BTN0 // $[GPIO_SL_SIMPLE_BUTTON_BTN0] +#ifndef SL_SIMPLE_BUTTON_BTN0_PORT #define SL_SIMPLE_BUTTON_BTN0_PORT SL_GPIO_PORT_B +#endif +#ifndef SL_SIMPLE_BUTTON_BTN0_PIN #define SL_SIMPLE_BUTTON_BTN0_PIN 2 - +#endif // [GPIO_SL_SIMPLE_BUTTON_BTN0]$ // <<< sl:end pin_tool >>> diff --git a/board-support/efr32/efr32mg24/BRD2601B/config/sl_simple_button_btn1_config.h b/board-support/efr32/efr32mg24/BRD2601B/config/sl_simple_button_btn1_config.h index 928a4d5c2..1df1ce0a1 100644 --- a/board-support/efr32/efr32mg24/BRD2601B/config/sl_simple_button_btn1_config.h +++ b/board-support/efr32/efr32mg24/BRD2601B/config/sl_simple_button_btn1_config.h @@ -48,9 +48,12 @@ // SL_SIMPLE_BUTTON_BTN1 // $[GPIO_SL_SIMPLE_BUTTON_BTN1] +#ifndef SL_SIMPLE_BUTTON_BTN1_PORT #define SL_SIMPLE_BUTTON_BTN1_PORT SL_GPIO_PORT_B +#endif +#ifndef SL_SIMPLE_BUTTON_BTN1_PIN #define SL_SIMPLE_BUTTON_BTN1_PIN 3 - +#endif // [GPIO_SL_SIMPLE_BUTTON_BTN1]$ // <<< sl:end pin_tool >>> diff --git a/board-support/efr32/efr32mg24/BRD2703A/autogen/sl_bluetooth.c b/board-support/efr32/efr32mg24/BRD2703A/autogen/sl_bluetooth.c index 4cac19436..0a5f1a969 100644 --- a/board-support/efr32/efr32mg24/BRD2703A/autogen/sl_bluetooth.c +++ b/board-support/efr32/efr32mg24/BRD2703A/autogen/sl_bluetooth.c @@ -30,6 +30,8 @@ #include #include "sl_bluetooth.h" +#include "sli_bt_api.h" +#include "sli_bgapi.h" #include "sl_assert.h" #include "sl_bt_stack_init.h" #include "sl_component_catalog.h" @@ -68,17 +70,23 @@ void sl_bt_step(void) { sl_bt_msg_t evt; + // Run the Bluetooth host stack processing step sl_bt_run(); - uint32_t event_len = sl_bt_event_pending_len(); - // For preventing from data loss, the event will be kept in the stack's queue - // if application cannot process it at the moment. + + // Check the length of the next event, if any, and verify that the application + // can process it. To prevent data loss, the event will be kept in the stack's + // queue if the application cannot process it at the moment. + size_t event_len = sli_bgapi_device_peek_event_len(&sli_bt_bgapi_device); if ((event_len == 0) || (!sl_bt_can_process_event(event_len))) { return; } - // Pop (non-blocking) a Bluetooth stack event from event queue. - sl_status_t status = sl_bt_pop_event(&evt); - if(status != SL_STATUS_OK){ + // Pop the event and process it if successful + sl_status_t status = sli_bgapi_device_pop_event(&sli_bt_bgapi_device, + sizeof(evt), + &evt); + + if (status != SL_STATUS_OK) { return; } sl_bt_process_event(&evt); diff --git a/board-support/efr32/efr32mg24/BRD2703A/autogen/sl_component_catalog.h b/board-support/efr32/efr32mg24/BRD2703A/autogen/sl_component_catalog.h index b04448dfe..9a6a129b0 100644 --- a/board-support/efr32/efr32mg24/BRD2703A/autogen/sl_component_catalog.h +++ b/board-support/efr32/efr32mg24/BRD2703A/autogen/sl_component_catalog.h @@ -3,6 +3,7 @@ // APIs present in project #define SL_CATALOG_BGAPI_PROTOCOL_PRESENT +#define SL_CATALOG_BGAPI_PROTOCOL_RTOS_ADAPTATION_PRESENT #define SL_CATALOG_BLUETOOTH_CONFIGURATION_PRESENT #define SL_CATALOG_BLUETOOTH_CTE_SUPPORT_PRESENT #define SL_CATALOG_BLUETOOTH_CS_SUPPORT_PRESENT @@ -24,7 +25,6 @@ #define SL_CATALOG_CMSIS_OS_COMMON_PRESENT #define SL_CATALOG_CPP_SUPPORT_PRESENT #define SL_CATALOG_DEVICE_INIT_PRESENT -#define SL_CATALOG_DEVICE_INIT_CORE_PRESENT #define SL_CATALOG_DEVICE_INIT_DCDC_PRESENT #define SL_CATALOG_EMLIB_CORE_PRESENT #define SL_CATALOG_EMLIB_RMU_PRESENT @@ -33,6 +33,7 @@ #define SL_CATALOG_GATT_CONFIGURATION_PRESENT #define SL_CATALOG_GPIO_PRESENT #define SL_CATALOG_GPIOINTERRUPT_PRESENT +#define SL_CATALOG_HAL_SYSTEM_PRESENT #define SL_CATALOG_HFXO_MANAGER_PRESENT #define SL_CATALOG_INTERRUPT_MANAGER_PRESENT #define SL_CATALOG_IOSTREAM_PRESENT @@ -44,13 +45,12 @@ #define SL_CATALOG_OPENTHREAD_CLI_PRESENT #define SL_CATALOG_OT_GP_INTERFACE_PRESENT #define SL_CATALOG_OPENTHREAD_STACK_PRESENT -#define SL_CATALOG_OPENTHREAD_UART_PRESENT #define SL_CATALOG_POWER_MANAGER_PRESENT +#define SL_CATALOG_POWER_MANAGER_DEEPSLEEP_PRESENT #define SL_CATALOG_PSA_CRYPTO_PRESENT #define SL_CATALOG_RADIO_PRIORITY_15_4_PRESENT #define SL_CATALOG_RAIL_LIB_PRESENT #define SL_CATALOG_RAIL_UTIL_PTI_PRESENT -#define SL_CATALOG_SE_MANAGER_PRESENT #define SL_CATALOG_SECURITY_MANAGER_PRESENT #define SL_CATALOG_SEGGER_RTT_PRESENT #define SL_CATALOG_BTN0_PRESENT diff --git a/board-support/efr32/efr32mg24/BRD2703A/autogen/sl_event_handler.c b/board-support/efr32/efr32mg24/BRD2703A/autogen/sl_event_handler.c index 38b265d78..5c330bc93 100644 --- a/board-support/efr32/efr32mg24/BRD2703A/autogen/sl_event_handler.c +++ b/board-support/efr32/efr32mg24/BRD2703A/autogen/sl_event_handler.c @@ -3,7 +3,11 @@ #include "sl_board_init.h" #include "sl_clock_manager.h" #include "sl_hfxo_manager.h" -#include "pa_conversions_efr32.h" +#include "sl_rail_util_compatible_pa.h" +#if !(defined(SLI_SI91X_ENABLE_BLE) && SLI_SI91X_ENABLE_BLE) +#include "sl_bluetooth.h" +#include "sl_rail_util_power_manager_init.h" +#endif // !SLI_SI91X_ENABLE_BLE #include "sl_rail_util_power_manager_init.h" #include "sl_rail_util_pti.h" #include "sl_rail_util_rssi.h" @@ -19,10 +23,15 @@ #include "sl_mbedtls.h" #include "sl_ot_rtos_adaptation.h" #include "sl_simple_button_instances.h" + +#if (defined(SL_MATTER_RGB_LED_ENABLED) && SL_MATTER_RGB_LED_ENABLED == 1) +#include "sl_simple_rgb_pwm_led_instances.h" +#else #include "sl_simple_led_instances.h" +#endif //(SL_MATTER_RGB_LED_ENABLED) && SL_MATTER_RGB_LED_ENABLED == 1) #if defined(CONFIG_ENABLE_UART) #include "sl_uartdrv_instances.h" -#endif +#endif // CONFIG_ENABLE_UART #include "psa/crypto.h" #include "sl_se_manager.h" #include "sli_protocol_crypto.h" @@ -30,7 +39,7 @@ #include "sl_iostream_init_instances.h" #include "cmsis_os2.h" #include "nvm3_default.h" -#include "sl_cos.h" + #include "sl_iostream_handles.h" void sli_driver_permanent_allocation(void) @@ -77,9 +86,9 @@ void sl_driver_init(void) GPIOINT_Init(); sl_simple_button_init_instances(); sl_simple_led_init_instances(); -#if defined(CONFIG_ENABLE_UART) + #if defined(CONFIG_ENABLE_UART) sl_uartdrv_init_instances(); -#endif +#endif // CONFIG_ENABLE_UART } void sl_service_init(void) @@ -98,18 +107,24 @@ void sl_service_init(void) void sl_stack_init(void) { +#if !SLI_SI91X_ENABLE_BLE sl_rail_util_pa_init(); sl_rail_util_power_manager_init(); sl_rail_util_pti_init(); sl_rail_util_rssi_init(); - sl_ot_sys_init(); sli_bt_stack_functional_init(); +#endif // !SLI_SI91X_ENABLE_BLE +#ifdef SL_OT_ENABLE + sl_ot_sys_init(); +#endif // SL_OT_ENABLE } void sl_internal_app_init(void) { +#ifdef SL_OT_ENABLE sl_ot_rtos_stack_init(); sl_ot_rtos_app_init(); +#endif // SL_OT_ENABLE } void sl_iostream_init_instances_stage_1(void) @@ -121,4 +136,3 @@ void sl_iostream_init_instances_stage_2(void) { sl_iostream_set_console_instance(); } - diff --git a/board-support/efr32/efr32mg24/BRD2703A/autogen/sli_psa_config_autogen.h b/board-support/efr32/efr32mg24/BRD2703A/autogen/sli_psa_config_autogen.h index 055d8a95e..f90dd6e9a 100644 --- a/board-support/efr32/efr32mg24/BRD2703A/autogen/sli_psa_config_autogen.h +++ b/board-support/efr32/efr32mg24/BRD2703A/autogen/sli_psa_config_autogen.h @@ -24,7 +24,12 @@ #define PSA_WANT_ALG_TLS12_PSK_TO_MS 1 #define MBEDTLS_PSA_CRYPTO_EXTERNAL_RNG +#if defined(KSU_MAX_KEY_SLOTS) +#include "sli_ksu_keyslots_config.h" +#define MBEDTLS_PSA_KEY_SLOT_COUNT (22 + 15 + 1 + SL_PSA_KEY_USER_SLOT_COUNT + SLI_KSU_MAX_KEY_SLOTS - SLI_KSU_KEY_SLOT_USER_START + 1) +#else #define MBEDTLS_PSA_KEY_SLOT_COUNT (22 + 15 + 1 + SL_PSA_KEY_USER_SLOT_COUNT + 1) +#endif #ifndef SL_PSA_ITS_MAX_FILES #define SL_PSA_ITS_MAX_FILES (1 + SL_PSA_ITS_USER_MAX_FILES) #endif diff --git a/board-support/efr32/efr32mg24/BRD2703A/config/pin_config.h b/board-support/efr32/efr32mg24/BRD2703A/config/pin_config.h new file mode 100644 index 000000000..da346efd2 --- /dev/null +++ b/board-support/efr32/efr32mg24/BRD2703A/config/pin_config.h @@ -0,0 +1,236 @@ +#ifndef PIN_CONFIG_H +#define PIN_CONFIG_H + +// $[CMU] +// [CMU]$ + +// $[LFXO] +// [LFXO]$ + +// $[PRS.ASYNCH0] +// [PRS.ASYNCH0]$ + +// $[PRS.ASYNCH1] +// [PRS.ASYNCH1]$ + +// $[PRS.ASYNCH2] +// [PRS.ASYNCH2]$ + +// $[PRS.ASYNCH3] +// [PRS.ASYNCH3]$ + +// $[PRS.ASYNCH4] +// [PRS.ASYNCH4]$ + +// $[PRS.ASYNCH5] +// [PRS.ASYNCH5]$ + +// $[PRS.ASYNCH6] +// [PRS.ASYNCH6]$ + +// $[PRS.ASYNCH7] +// [PRS.ASYNCH7]$ + +// $[PRS.ASYNCH8] +// [PRS.ASYNCH8]$ + +// $[PRS.ASYNCH9] +// [PRS.ASYNCH9]$ + +// $[PRS.ASYNCH10] +// [PRS.ASYNCH10]$ + +// $[PRS.ASYNCH11] +// [PRS.ASYNCH11]$ + +// $[PRS.ASYNCH12] +// [PRS.ASYNCH12]$ + +// $[PRS.ASYNCH13] +// [PRS.ASYNCH13]$ + +// $[PRS.ASYNCH14] +// [PRS.ASYNCH14]$ + +// $[PRS.ASYNCH15] +// [PRS.ASYNCH15]$ + +// $[PRS.SYNCH0] +// [PRS.SYNCH0]$ + +// $[PRS.SYNCH1] +// [PRS.SYNCH1]$ + +// $[PRS.SYNCH2] +// [PRS.SYNCH2]$ + +// $[PRS.SYNCH3] +// [PRS.SYNCH3]$ + +// $[GPIO] +// GPIO SWV on PA03 +#ifndef GPIO_SWV_PORT +#define GPIO_SWV_PORT SL_GPIO_PORT_A +#endif +#ifndef GPIO_SWV_PIN +#define GPIO_SWV_PIN 3 +#endif + +// [GPIO]$ + +// $[TIMER0] +// [TIMER0]$ + +// $[TIMER1] +// [TIMER1]$ + +// $[TIMER2] +// [TIMER2]$ + +// $[TIMER3] +// [TIMER3]$ + +// $[TIMER4] +// [TIMER4]$ + +// $[USART0] +// [USART0]$ + +// $[I2C1] +// [I2C1]$ + +// $[EUSART1] +// [EUSART1]$ + +// $[KEYSCAN] +// [KEYSCAN]$ + +// $[LETIMER0] +// [LETIMER0]$ + +// $[IADC0] +// [IADC0]$ + +// $[ACMP0] +// [ACMP0]$ + +// $[ACMP1] +// [ACMP1]$ + +// $[VDAC0] +// [VDAC0]$ + +// $[VDAC1] +// [VDAC1]$ + +// $[PCNT0] +// [PCNT0]$ + +// $[HFXO0] +// [HFXO0]$ + +// $[I2C0] +// [I2C0]$ + +// $[EUSART0] +// EUSART0 CTS on PA09 +#ifndef EUSART0_CTS_PORT +#define EUSART0_CTS_PORT SL_GPIO_PORT_A +#endif +#ifndef EUSART0_CTS_PIN +#define EUSART0_CTS_PIN 9 +#endif + +// EUSART0 RTS on PA08 +#ifndef EUSART0_RTS_PORT +#define EUSART0_RTS_PORT SL_GPIO_PORT_A +#endif +#ifndef EUSART0_RTS_PIN +#define EUSART0_RTS_PIN 8 +#endif + +// EUSART0 RX on PA06 +#ifndef EUSART0_RX_PORT +#define EUSART0_RX_PORT SL_GPIO_PORT_A +#endif +#ifndef EUSART0_RX_PIN +#define EUSART0_RX_PIN 6 +#endif + +// EUSART0 TX on PA05 +#ifndef EUSART0_TX_PORT +#define EUSART0_TX_PORT SL_GPIO_PORT_A +#endif +#ifndef EUSART0_TX_PIN +#define EUSART0_TX_PIN 5 +#endif + +// [EUSART0]$ + +// $[PTI] +// PTI DFRAME on PC07 +#ifndef PTI_DFRAME_PORT +#define PTI_DFRAME_PORT SL_GPIO_PORT_C +#endif +#ifndef PTI_DFRAME_PIN +#define PTI_DFRAME_PIN 7 +#endif + +// PTI DOUT on PC06 +#ifndef PTI_DOUT_PORT +#define PTI_DOUT_PORT SL_GPIO_PORT_C +#endif +#ifndef PTI_DOUT_PIN +#define PTI_DOUT_PIN 6 +#endif + +// [PTI]$ + +// $[MODEM] +// [MODEM]$ + +// $[CUSTOM_PIN_NAME] +#ifndef _PORT +#define _PORT SL_GPIO_PORT_A +#endif +#ifndef _PIN +#define _PIN 0 +#endif + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +// [CUSTOM_PIN_NAME]$ + + +#endif // PIN_CONFIG_H + + diff --git a/board-support/efr32/efr32mg24/BRD2703A/config/psa_crypto_config.h b/board-support/efr32/efr32mg24/BRD2703A/config/psa_crypto_config.h index 20703b41d..773ce99e0 100644 --- a/board-support/efr32/efr32mg24/BRD2703A/config/psa_crypto_config.h +++ b/board-support/efr32/efr32mg24/BRD2703A/config/psa_crypto_config.h @@ -27,26 +27,32 @@ // Default: 4 #define SL_PSA_KEY_USER_SLOT_COUNT (4) -// PSA Maximum User Persistent Keys Count <0-1024> +// Maximum User Persistent PSA Key Count <0-1024> // Maximum amount of keys (or other files) that can be stored persistently -// by the application through the PSA interface, when persistent storage -// support for PSA Crypto is included in the project. -// Due to caching logic, this setting does have an impact on static RAM usage. -// Note that this number is added to the potential requirements from other -// software components in the project, such that the total amount of keys -// which can be stored through the ITS backend can be higher than what is -// configured here. +// by the user application, when PSA ITS (Internal Trusted Storage) support +// is included in the project. +// NOTE: +// In addition to SL_PSA_ITS_USER_MAX_FILES (number of user keys) the +// application may be configured to include SDK components that require an +// additional number of keys. The sum of user keys and SDK component keys +// is computed and the result, called SL_PSA_ITS_MAX_FILES, is used +// internally in the PSA ITS driver. // -// WARNING: When changing this setting on an application that is already -// deployed, and thus will get the change through an application upgrade, -// care should be taken to ensure that the setting is only ever increased, -// and never decreased. Decreasing this setting might cause previously -// stored keys/files to become inaccessible. +// WARNING: +// For applications using PSA ITS driver version 1 or 2, when changing the +// SL_PSA_ITS_USER_MAX_FILES in an application that is already depeloyed, +// and thus will get the change through an application upgrade, care should +// be taken to ensure that the total sum of keys SL_PSA_ITS_MAX_FILES is +// only ever equal or increased, and never decreased. Decreasing this +// setting might cause previously stored keys/files to become inaccessible, +// ITS should be cleared and all files need to be stored again. // -// It is not possible to change this setting when using V3 ITS Driver. -// The file-storage indexing is dependent on the maximum number of files, -// and if SL_PSA_ITS_USER_MAX_FILES is changed, ITS should be cleared and -// all files need to be stored again. +// For applications using PSA ITS driver version 3, it is not possible to +// change this setting because the file-storage indexing is dependent on the +// maximum number of files (SL_PSA_ITS_MAX_FILES) being consistent, and if +// the sum of SDK component keys and user keys (SL_PSA_ITS_USER_MAX_FILES) +// is changed, may cause previously stored keys/files to become inaccessible +// ITS should be cleared and all files need to be stored again. // Default: 128 #define SL_PSA_ITS_USER_MAX_FILES (128) diff --git a/board-support/efr32/efr32mg24/BRD2703A/config/sl_bluetooth_config.h b/board-support/efr32/efr32mg24/BRD2703A/config/sl_bluetooth_config.h index 9b6a804e0..93bfbbcc4 100644 --- a/board-support/efr32/efr32mg24/BRD2703A/config/sl_bluetooth_config.h +++ b/board-support/efr32/efr32mg24/BRD2703A/config/sl_bluetooth_config.h @@ -99,6 +99,7 @@ // if the LE Power Control feature is enabled. // When this configuration is passed into stack initialization, the stack // will select the closest value that the device supports. +// API sl_bt_system_set_tx_power() can be used to set the minimum TX power at runtime. // API sl_bt_system_get_tx_power_setting() can be used to query the selected value. #define SL_BT_CONFIG_MIN_TX_POWER (-30) @@ -108,6 +109,7 @@ // advertising, scanning and DTM testing. // When this configuration is passed into stack initialization, the stack // will select the closest value that the device supports. +// API sl_bt_system_set_tx_power() can be used to set the maximum TX power at runtime. // API sl_bt_system_get_tx_power_setting() can be used to query the selected value. #define SL_BT_CONFIG_MAX_TX_POWER (80) diff --git a/board-support/efr32/efr32mg24/BRD2703A/config/sl_btctrl_config.h b/board-support/efr32/efr32mg24/BRD2703A/config/sl_btctrl_config.h index ed75a2d0e..403df1ffe 100644 --- a/board-support/efr32/efr32mg24/BRD2703A/config/sl_btctrl_config.h +++ b/board-support/efr32/efr32mg24/BRD2703A/config/sl_btctrl_config.h @@ -146,15 +146,27 @@ #define SL_BT_CONTROLLER_ADAPTIVITY_MODE (SL_BTCTRL_CHANNELMAP_FLAG_ACTIVE_ADAPTIVITY) #endif -// Power Amplifier (PA) Configuration -// Automode PA configuration -// Highest available PA configuration -// RAIL Utility component PA configuration -// Select the Power Amplifier configuration -// Default: RAIL Utility component PA configuration -#ifndef SL_BT_CONTROLLER_PA_CONFIG -#define SL_BT_CONTROLLER_PA_CONFIG SL_BT_BLUETOOTH_RAIL_UTIL_PA -#endif +// Advertising Configuration +// Include TX Power in the extended header of primary extended advertising packets +// This is default setting to all advertising sets unless it is specifically overridden by VS_SiliconLabs_Set_Advertising_Config_Bits. +// Default: 0 +// Enabling this option takes effect only if permitted by Le_Set_Extended_Advertising_Parameters +// According to Link Layer specification, Vol 6, Part B, Table 2.4 and Table 2.5: +// Optional in 1M PHY when the advertiser is connectable or scannable, or with auxiliary pointer. +// In other cases, the Extended Advertising TX Power is always optional by settings. +#define SL_BT_CONTROLLER_PRIMARY_EXT_PACKET_INCLUDE_TX_POWER (0) +// +// Include Advertiser Address in the header of primary extended advertising packets +// This is default setting to all advertising sets unless it is specifically overridden by VS_SiliconLabs_Set_Advertising_Config_Bits. +// Default: 0 +// Enabling this option takes effect only if permitted by Le_Set_Extended_Advertising_Parameters +// According to Link Layer specification, Vol 6, Part B, Table 2.4 and Table 2.5: +// Optional in 1M PHY when the advertiser is non-connectable and non-scannable, with auxiliary pointer. +// Mandatory when the advertiser is non-connectable and non-scannable, without auxiliary pointer. +// Forbidden when the advertiser is connectable or scannable. +#define SL_BT_CONTROLLER_PRIMARY_EXT_PACKET_INCLUDE_ADDRESS (0) +// +// Advertising Configuration // Bluetooth Controller Configuration // <<< end of configuration section >>> diff --git a/board-support/efr32/efr32mg24/BRD2703A/config/sl_clock_manager_tree_config.h b/board-support/efr32/efr32mg24/BRD2703A/config/sl_clock_manager_tree_config.h index 8c0be95e9..1f6f2a089 100644 --- a/board-support/efr32/efr32mg24/BRD2703A/config/sl_clock_manager_tree_config.h +++ b/board-support/efr32/efr32mg24/BRD2703A/config/sl_clock_manager_tree_config.h @@ -105,9 +105,9 @@ #endif // PCLK branch divider -// MIN // DIV1 // DIV2 +// MIN // PCLK branch is derived from HCLK. This clock drives the APB bus interface. // SL_CLOCK_MANAGER_PCLK_DIV_MIN #ifndef SL_CLOCK_MANAGER_PCLK_DIVIDER diff --git a/board-support/efr32/efr32mg24/BRD2703A/config/sl_mbedtls_config.h b/board-support/efr32/efr32mg24/BRD2703A/config/sl_mbedtls_config.h index e249b4d1b..7146ba648 100644 --- a/board-support/efr32/efr32mg24/BRD2703A/config/sl_mbedtls_config.h +++ b/board-support/efr32/efr32mg24/BRD2703A/config/sl_mbedtls_config.h @@ -71,9 +71,14 @@ // Default: 1 // This option is enabled assuming all buffers passed to any PSA function reside // in memory that is accessible only to the PSA function during its execution. +// This improves performance by avoiding extra buffer copies, reducing memory +// usage and allocation overhead. However, it is NOT the most secure option and +// should only be enabled if all buffers passed to PSA functions are exclusively +// accessible to PSA and never shared with untrusted code. // This option MUST be disabled whenever buffer arguments are in memory shared // with an untrusted party, for example where arguments to PSA calls are passed -// across a trust boundary. +// across a trust boundary, e.g. if TrustZone is enabled, and the PSA Crypto core +// is placed in the Secure domain. #define SL_MBEDTLS_PSA_ASSUME_EXCLUSIVE_BUFFERS 1 // diff --git a/board-support/efr32/efr32mg24/BRD2703A/config/sl_memory_manager_config.h b/board-support/efr32/efr32mg24/BRD2703A/config/sl_memory_manager_config.h index 26b84b107..4a16c29fe 100644 --- a/board-support/efr32/efr32mg24/BRD2703A/config/sl_memory_manager_config.h +++ b/board-support/efr32/efr32mg24/BRD2703A/config/sl_memory_manager_config.h @@ -51,4 +51,11 @@ // <<< end of configuration section >>> +// Keep this configuration outside the configuration section until the feature is ready for release. +// Enables the heap fallback mechanism. +// Setting this configuration to 0 will disable the fallback mechanism on DTCM and PSRAM. +// If this configuration is disabled, the memory manager will not attempt to use alternative memory regions for allocations even if using the fallback parameters. +// Default: 1 +#define SL_MEMORY_MANAGER_HEAP_FALLBACK_EN 1 + #endif /* SL_MEMORY_MANAGER_CONFIG_H */ diff --git a/board-support/efr32/efr32mg24/BRD2703A/config/sl_openthread_features_config.h b/board-support/efr32/efr32mg24/BRD2703A/config/sl_openthread_features_config.h index 22340498d..a3697f8af 100644 --- a/board-support/efr32/efr32mg24/BRD2703A/config/sl_openthread_features_config.h +++ b/board-support/efr32/efr32mg24/BRD2703A/config/sl_openthread_features_config.h @@ -65,6 +65,7 @@ #define OPENTHREAD_CONFIG_MAC_CSL_RECEIVER_ENABLE 1 #endif // CSL Scheduling Uncertainty (±10 us units) <12..999:1> +// Left unchanged the value will be set to 175 for RCPs, 20 for FTDs, and 12 for MTDs #ifndef SL_OPENTHREAD_CSL_TX_UNCERTAINTY #if OPENTHREAD_RADIO #define SL_OPENTHREAD_CSL_TX_UNCERTAINTY 175 @@ -142,12 +143,10 @@ #define OPENTHREAD_CONFIG_CHANNEL_MONITOR_ENABLE 0 #endif // - -// Commissioner +// Commissioner #ifndef OPENTHREAD_CONFIG_COMMISSIONER_ENABLE #define OPENTHREAD_CONFIG_COMMISSIONER_ENABLE 0 #endif - // Max Joiner Entries // The maximum number of Joiner entries maintained by the Commissioner. // 2 @@ -155,7 +154,6 @@ #define OPENTHREAD_CONFIG_COMMISSIONER_MAX_JOINER_ENTRIES 2 #endif // - // COAP API #ifndef OPENTHREAD_CONFIG_COAP_API_ENABLE #define OPENTHREAD_CONFIG_COAP_API_ENABLE 0 @@ -171,6 +169,11 @@ #define OPENTHREAD_CONFIG_COAP_SECURE_API_ENABLE 0 #endif // +// COAP Blockwise Transfer +#ifndef OPENTHREAD_CONFIG_COAP_BLOCKWISE_TRANSFER_ENABLE +#define OPENTHREAD_CONFIG_COAP_BLOCKWISE_TRANSFER_ENABLE 0 +#endif +// // DHCP6 Client #ifndef OPENTHREAD_CONFIG_DHCP6_CLIENT_ENABLE #define OPENTHREAD_CONFIG_DHCP6_CLIENT_ENABLE 0 @@ -196,16 +199,27 @@ #define OPENTHREAD_CONFIG_IP6_FRAGMENTATION_ENABLE 0 #endif // -// Maximum number of IPv6 unicast addresses allowed to be externally added +// IPv6 Limits +// Maximum IPv6 external unicast addresses +// Maximum number of IPv6 unicast addresses allowed to be externally added +// 4 #ifndef OPENTHREAD_CONFIG_IP6_MAX_EXT_UCAST_ADDRS #define OPENTHREAD_CONFIG_IP6_MAX_EXT_UCAST_ADDRS 4 #endif -// -// Maximum number of IPv6 multicast addresses allowed to be externally added +// Maximum IPv6 external multicast addresses +// Maximum number of IPv6 multicast addresses allowed to be externally added +// 4 #ifndef OPENTHREAD_CONFIG_IP6_MAX_EXT_MCAST_ADDRS #define OPENTHREAD_CONFIG_IP6_MAX_EXT_MCAST_ADDRS 4 #endif -// +// Maximum IPv6 address registrations for MTD +// The maximum number of IPv6 address registrations for MTD. +// If left unchanged will default to the value of OPENTHREAD_CONFIG_MLE_IP_ADDRS_PER_CHILD +// 4 +#ifndef OPENTHREAD_CONFIG_MLE_IP_ADDRS_TO_REGISTER +#define OPENTHREAD_CONFIG_MLE_IP_ADDRS_TO_REGISTER (OPENTHREAD_CONFIG_MLE_IP_ADDRS_PER_CHILD) +#endif +// // Jam Detection #ifndef OPENTHREAD_CONFIG_JAM_DETECTION_ENABLE #define OPENTHREAD_CONFIG_JAM_DETECTION_ENABLE 0 @@ -226,6 +240,14 @@ #define OPENTHREAD_CONFIG_MAC_FILTER_ENABLE 0 #endif // +// MLE Children +// Maximum number of Thread children supported by the device +// Default is 10. Used by the Thread stack to configure the size of child table. +// 10 +#ifndef OPENTHREAD_CONFIG_MLE_MAX_CHILDREN +#define OPENTHREAD_CONFIG_MLE_MAX_CHILDREN 10 +#endif +// // MLE Long Routes extension (experimental) #ifndef OPENTHREAD_CONFIG_MLE_LONG_ROUTES_ENABLE #define OPENTHREAD_CONFIG_MLE_LONG_ROUTES_ENABLE 0 @@ -235,27 +257,66 @@ #ifndef OPENTHREAD_CONFIG_MULTIPAN_RCP_ENABLE #define OPENTHREAD_CONFIG_MULTIPAN_RCP_ENABLE 0 #endif +// Broadcast IID for spinel frames +// Define broadcast IID for spinel frames dedicated to all hosts in multipan configuration +// 0 +#ifndef OPENTHREAD_SPINEL_CONFIG_BROADCAST_IID +#define OPENTHREAD_SPINEL_CONFIG_BROADCAST_IID 0 +#endif +#if OPENTHREAD_CONFIG_MULTIPAN_RCP_ENABLE +// Maximum number of Zigbee children for multiprotocol (DMP) builds +// Ensures correct table sizing for Zigbee when DMP/multipan is enabled. +// 6 +#ifndef SL_ZIGBEE_MAX_END_DEVICE_CHILDREN +#define SL_ZIGBEE_MAX_END_DEVICE_CHILDREN 6 +#endif +#endif // // Multiple OpenThread Instances #ifndef OPENTHREAD_CONFIG_MULTIPLE_INSTANCE_ENABLE #define OPENTHREAD_CONFIG_MULTIPLE_INSTANCE_ENABLE 0 #endif -// // Multiple Static Instance Support #ifndef OPENTHREAD_CONFIG_MULTIPLE_STATIC_INSTANCE_ENABLE #define OPENTHREAD_CONFIG_MULTIPLE_STATIC_INSTANCE_ENABLE 0 #endif -// -// Number of OpenThread Instances For Static Buffer Allocation +// Number of OpenThread Instances +// Default is 2. Number of OpenThread Instances For Static Buffer Allocation. +// 2 #ifndef OPENTHREAD_CONFIG_MULTIPLE_INSTANCE_NUM #define OPENTHREAD_CONFIG_MULTIPLE_INSTANCE_NUM 2 #endif // -// Define broadcast IID for spinel frames dedicated to all hosts in multipan configuration -#ifndef OPENTHREAD_SPINEL_CONFIG_BROADCAST_IID -#define OPENTHREAD_SPINEL_CONFIG_BROADCAST_IID 0 -#endif // +// Define maximum total source match table entries for both OT and Zigbee. +// In multi-instance builds (SoC or RCP/host), table must support all OT instances + Zigbee. +// For single instance (default), table sized to just OT children. +// This value is used to size all source match tables in both OT and Zigbee code. +// Note: this is purposedly not being setup with CMSIS annotations. +#ifndef RADIO_CONFIG_MAX_SRC_MATCH_ENTRIES +#if OPENTHREAD_CONFIG_MULTIPLE_INSTANCE_ENABLE +#if SL_ZIGBEE_MAX_END_DEVICE_CHILDREN +// Multipan / DMP case: OT + Zigbee +#define RADIO_CONFIG_MAX_SRC_MATCH_ENTRIES \ + ((OPENTHREAD_CONFIG_MLE_MAX_CHILDREN * (OPENTHREAD_CONFIG_MULTIPLE_INSTANCE_NUM - 1)) \ + + SL_ZIGBEE_MAX_END_DEVICE_CHILDREN) +#else +// Multi-instance OT-only case +#define RADIO_CONFIG_MAX_SRC_MATCH_ENTRIES \ + (OPENTHREAD_CONFIG_MLE_MAX_CHILDREN * OPENTHREAD_CONFIG_MULTIPLE_INSTANCE_NUM) +#endif +#else +// Single-instance OT (SoC / NCP / non-multipan RCP) +#define RADIO_CONFIG_MAX_SRC_MATCH_ENTRIES OPENTHREAD_CONFIG_MLE_MAX_CHILDREN +#endif +#endif +// Spinel Match Table +// Maximum number of spinel source match table entries +// Ensure that this value is the total of the number of openthread children times the number of openthread instances plus the number of Zigbee children. +#ifndef OPENTHREAD_SPINEL_CONFIG_MAX_SRC_MATCH_ENTRIES +#define OPENTHREAD_SPINEL_CONFIG_MAX_SRC_MATCH_ENTRIES RADIO_CONFIG_MAX_SRC_MATCH_ENTRIES +#endif +// // OTNS (OpenThread Network Simulator) #ifndef OPENTHREAD_CONFIG_OTNS_ENABLE #define OPENTHREAD_CONFIG_OTNS_ENABLE 0 @@ -265,13 +326,23 @@ #ifndef OPENTHREAD_CONFIG_PING_SENDER_ENABLE #define OPENTHREAD_CONFIG_PING_SENDER_ENABLE 1 #endif - // // Power Calibration Module (RCP only configuration) #ifndef OPENTHREAD_CONFIG_POWER_CALIBRATION_ENABLE #define OPENTHREAD_CONFIG_POWER_CALIBRATION_ENABLE 0 #endif - +// Maximum raw power calibration length +// Max raw power calibration length +// 4 +#ifndef SL_OPENTHREAD_RAW_POWER_CALIBRATION_LENGTH +#define SL_OPENTHREAD_RAW_POWER_CALIBRATION_LENGTH 4 +#endif +// Maximum FEM config setting length +// Max FEM config setting length +// 4 +#ifndef SL_OPENTHREAD_FEM_SETTING_LENGTH +#define SL_OPENTHREAD_FEM_SETTING_LENGTH 4 +#endif // // Platform UDP #ifndef OPENTHREAD_CONFIG_PLATFORM_UDP_ENABLE @@ -309,7 +380,14 @@ #endif // // Time Synchronization Service +#ifndef OPENTHREAD_CONFIG_TIME_SYNC_ENABLE #define OPENTHREAD_CONFIG_TIME_SYNC_ENABLE 0 +#endif +// +// Uptime of OpenThread instance +#ifndef OPENTHREAD_CONFIG_UPTIME_ENABLE +#define OPENTHREAD_CONFIG_UPTIME_ENABLE 1 +#endif // // UDP Forward #ifndef OPENTHREAD_CONFIG_UDP_FORWARD_ENABLE @@ -321,28 +399,22 @@ #define OPENTHREAD_CONFIG_MAC_BEACON_PAYLOAD_PARSING_ENABLE 1 #endif // -// Max raw power calibration length. -#ifndef SL_OPENTHREAD_RAW_POWER_CALIBRATION_LENGTH -#define SL_OPENTHREAD_RAW_POWER_CALIBRATION_LENGTH 4 -#endif -// -// Max FEM config setting length. -#ifndef SL_OPENTHREAD_FEM_SETTING_LENGTH -#define SL_OPENTHREAD_FEM_SETTING_LENGTH 4 -#endif -// -// The maximum number of RX buffers to use in the radio driver. -// 16 +// Radio Driver RX buffers +// Maximum number of RX buffers +// The maximum number of RX buffers to use in the radio driver. +// 16 #ifndef SL_OPENTHREAD_RADIO_RX_BUFFER_COUNT #define SL_OPENTHREAD_RADIO_RX_BUFFER_COUNT 16 #endif // +// // Logging // LOG_OUTPUT // NONE // APP // PLATFORM_DEFINED -// Default: OPENTHREAD_CONFIG_LOG_OUTPUT_PLATFORM_DEFINED +// Default: OPENTHREAD_CONFIG_LOG_OUTPUT_APP +// OPENTHREAD_CONFIG_LOG_OUTPUT_APP #ifndef OPENTHREAD_CONFIG_LOG_OUTPUT #define OPENTHREAD_CONFIG_LOG_OUTPUT OPENTHREAD_CONFIG_LOG_OUTPUT_APP #endif @@ -365,6 +437,7 @@ // INFO // DEBG // Default: OT_LOG_LEVEL_DEBG +// OT_LOG_LEVEL_DEBG #ifndef OPENTHREAD_CONFIG_LOG_LEVEL #define OPENTHREAD_CONFIG_LOG_LEVEL OT_LOG_LEVEL_DEBG #endif @@ -387,11 +460,10 @@ #endif // OPENTHREAD_FULL_LOGS_ENABLE -// Log crash dump after initialization +// Log crash dump after initialization #ifndef OPENTHREAD_CONFIG_PLATFORM_LOG_CRASH_DUMP_ENABLE #define OPENTHREAD_CONFIG_PLATFORM_LOG_CRASH_DUMP_ENABLE 0 #endif -// // // diff --git a/board-support/efr32/efr32mg24/BRD2703A/config/sl_power_manager_config.h b/board-support/efr32/efr32mg24/BRD2703A/config/sl_power_manager_config.h index 3c240b843..86b9fef27 100644 --- a/board-support/efr32/efr32mg24/BRD2703A/config/sl_power_manager_config.h +++ b/board-support/efr32/efr32mg24/BRD2703A/config/sl_power_manager_config.h @@ -37,24 +37,40 @@ // Enable custom IRQ handler for external HF oscillator. // Enable if CMU_IRQHandler/HFXO0_IRQHandler is needed from your application. -// The function sl_power_manager_irq_handler() will have to be called from you custom handler if this is enabled. +// The function sl_power_manager_irq_handler() will have to be called from your custom handler if this is enabled. // Default: 0 +#ifndef SL_POWER_MANAGER_CUSTOM_HF_OSCILLATOR_IRQ_HANDLER #define SL_POWER_MANAGER_CUSTOM_HF_OSCILLATOR_IRQ_HANDLER 0 +#endif // Enable fast wakeup (disable voltage scaling in EM2/3 mode) // Enable or disable voltage scaling in EM2/3 modes (when available). This decreases wakeup time by about 30 us. // Deprecated. It is replaced by the function sl_power_manager_em23_voltage_scaling_enable_fast_wakeup() // Default: 0 +#ifndef SL_POWER_MANAGER_CONFIG_VOLTAGE_SCALING_FAST_WAKEUP #define SL_POWER_MANAGER_CONFIG_VOLTAGE_SCALING_FAST_WAKEUP 0 +#endif + +// Enable voltage scaling in EM0 and EM1 mode. +// Enable or disable voltage scaling in EM0/1 modes. With this config enabled, the voltage +// scaling will be configured at the lowest possible level based on the system clock. +// Default: 0 +#ifndef SL_POWER_MANAGER_ENABLE_EM01_VOLTAGE_SCALING +#define SL_POWER_MANAGER_ENABLE_EM01_VOLTAGE_SCALING 0 +#endif // Enable debugging feature // Enable or disable debugging features (trace the different modules that have requirements). // Default: 0 +#ifndef SL_POWER_MANAGER_DEBUG #define SL_POWER_MANAGER_DEBUG 0 +#endif // Maximum numbers of requirements that can be logged // Default: 10 +#ifndef SL_POWER_MANAGER_DEBUG_POOL_SIZE #define SL_POWER_MANAGER_DEBUG_POOL_SIZE 10 +#endif // // Pin retention mode @@ -63,14 +79,18 @@ // Retention through EM4 // Retention through EM4 and wakeup // power_manager_pin_retention_disable +#ifndef SL_POWER_MANAGER_INIT_EMU_EM4_PIN_RETENTION_MODE #define SL_POWER_MANAGER_INIT_EMU_EM4_PIN_RETENTION_MODE EMU_EM4CTRL_EM4IORETMODE_DISABLE +#endif // Enable EM2 debugging feature // Enable or disable debugging features. // Force PD0B/PD0D to stay on during EM2 entry. This allows the debugger to remain connected in EM2 and EM3. // Enabling debug connectivity results in an increased power consumption in EM2/EM3. // Default: 1 +#ifndef SL_POWER_MANAGER_INIT_EMU_EM2_DEBUG_ENABLE #define SL_POWER_MANAGER_INIT_EMU_EM2_DEBUG_ENABLE 1 +#endif // // diff --git a/board-support/efr32/mgm24/BRD4316A/config/sl_memlcd_usart_config.h b/board-support/efr32/efr32mg24/BRD2703A/config/sl_rail_util_pa_tables_config.h similarity index 54% rename from board-support/efr32/mgm24/BRD4316A/config/sl_memlcd_usart_config.h rename to board-support/efr32/efr32mg24/BRD2703A/config/sl_rail_util_pa_tables_config.h index 4f4770c76..bd05ea57d 100644 --- a/board-support/efr32/mgm24/BRD4316A/config/sl_memlcd_usart_config.h +++ b/board-support/efr32/efr32mg24/BRD2703A/config/sl_rail_util_pa_tables_config.h @@ -1,9 +1,9 @@ /***************************************************************************//** * @file - * @brief SPI abstraction used by memory lcd display + * @brief PA Tables configuration file. ******************************************************************************* * # License - * Copyright 2022 Silicon Laboratories Inc. www.silabs.com + * Copyright 2025 Silicon Laboratories Inc. www.silabs.com ******************************************************************************* * * SPDX-License-Identifier: Zlib @@ -28,39 +28,22 @@ * ******************************************************************************/ -#ifndef SL_MEMLCD_CONFIG_H -#define SL_MEMLCD_CONFIG_H +#ifndef SL_RAIL_UTIL_PA_TABLES_CONFIG_H +#define SL_RAIL_UTIL_PA_TABLES_CONFIG_H -// <<< sl:start pin_tool >>> -// SL_MEMLCD_SPI -// $[USART_SL_MEMLCD_SPI] -#define SL_MEMLCD_SPI_PERIPHERAL USART0 -#define SL_MEMLCD_SPI_PERIPHERAL_NO 0 +// <<< Use Configuration Wizard in Context Menu >>> -// USART0 TX on PC00 -#define SL_MEMLCD_SPI_TX_PORT SL_GPIO_PORT_C -#define SL_MEMLCD_SPI_TX_PIN 0 +// PA Table Configuration +// PA Table Selection +// <"sl_rail_util_pa_dbm_powersetting_mapping_table_10dbm.h"=> 10dBm PA powersetting mapping table +// <"sl_rail_util_pa_dbm_powersetting_mapping_table_0dbm.h"=> 0dBm PA powersetting mapping table +// <"sl_rail_util_pa_dbm_powersetting_mapping_table_automode_0_10dbm.h"=> 0dBm-10dBm automode PA powersetting mapping table +// Default: "sl_rail_util_pa_dbm_powersetting_mapping_table_automode_0_10dbm.h" +#define SL_RAIL_UTIL_PA_TABLE_HEADER "sl_rail_util_pa_dbm_powersetting_mapping_table_automode_0_10dbm.h" +// -// USART0 CLK on PC02 -#define SL_MEMLCD_SPI_CLK_PORT SL_GPIO_PORT_C -#define SL_MEMLCD_SPI_CLK_PIN 2 +// <<< end of configuration section >>> -// [USART_SL_MEMLCD_SPI]$ +#include SL_RAIL_UTIL_PA_TABLE_HEADER -// SL_MEMLCD_SPI_CS -// $[GPIO_SL_MEMLCD_SPI_CS] -#define SL_MEMLCD_SPI_CS_PORT SL_GPIO_PORT_C -#define SL_MEMLCD_SPI_CS_PIN 6 - -// [GPIO_SL_MEMLCD_SPI_CS]$ - -// SL_MEMLCD_EXTCOMIN -// $[GPIO_SL_MEMLCD_EXTCOMIN] -#define SL_MEMLCD_EXTCOMIN_PORT SL_GPIO_PORT_A -#define SL_MEMLCD_EXTCOMIN_PIN 0 - -// [GPIO_SL_MEMLCD_EXTCOMIN]$ - -// <<< sl:end pin_tool >>> - -#endif +#endif // SL_RAIL_UTIL_PA_TABLES_CONFIG_H diff --git a/board-support/efr32/efr32mg24/BRD2703A/config/sl_rail_util_pti_config.h b/board-support/efr32/efr32mg24/BRD2703A/config/sl_rail_util_pti_config.h index 2a82ab599..eb6de3865 100644 --- a/board-support/efr32/efr32mg24/BRD2703A/config/sl_rail_util_pti_config.h +++ b/board-support/efr32/efr32mg24/BRD2703A/config/sl_rail_util_pti_config.h @@ -35,12 +35,12 @@ // PTI Configuration // PTI mode -// UART -// UART onewire -// SPI -// Disabled -// Default: RAIL_PTI_MODE_UART -#define SL_RAIL_UTIL_PTI_MODE RAIL_PTI_MODE_UART +// UART +// UART onewire +// SPI +// Disabled +// Default: SL_RAIL_PTI_MODE_UART +#define SL_RAIL_UTIL_PTI_MODE SL_RAIL_PTI_MODE_UART // PTI Baud Rate (Hertz) // <147800-20000000:1> @@ -53,15 +53,17 @@ // <<< sl:start pin_tool >>> // SL_RAIL_UTIL_PTI // $[PTI_SL_RAIL_UTIL_PTI] +#ifndef SL_RAIL_UTIL_PTI_PERIPHERAL #define SL_RAIL_UTIL_PTI_PERIPHERAL PTI +#endif // PTI DOUT on PC06 +#ifndef SL_RAIL_UTIL_PTI_DOUT_PORT #define SL_RAIL_UTIL_PTI_DOUT_PORT SL_GPIO_PORT_C +#endif +#ifndef SL_RAIL_UTIL_PTI_DOUT_PIN #define SL_RAIL_UTIL_PTI_DOUT_PIN 6 - -// PTI DFRAME on PC07 -#define SL_RAIL_UTIL_PTI_DFRAME_PORT SL_GPIO_PORT_C -#define SL_RAIL_UTIL_PTI_DFRAME_PIN 7 +#endif // [PTI_SL_RAIL_UTIL_PTI]$ diff --git a/board-support/efr32/efr32mg24/BRD2703A/config/sl_simple_button_btn0_config.h b/board-support/efr32/efr32mg24/BRD2703A/config/sl_simple_button_btn0_config.h index 547fc60c1..0e6b0d977 100644 --- a/board-support/efr32/efr32mg24/BRD2703A/config/sl_simple_button_btn0_config.h +++ b/board-support/efr32/efr32mg24/BRD2703A/config/sl_simple_button_btn0_config.h @@ -48,9 +48,12 @@ // SL_SIMPLE_BUTTON_BTN0 // $[GPIO_SL_SIMPLE_BUTTON_BTN0] +#ifndef SL_SIMPLE_BUTTON_BTN0_PORT #define SL_SIMPLE_BUTTON_BTN0_PORT SL_GPIO_PORT_B +#endif +#ifndef SL_SIMPLE_BUTTON_BTN0_PIN #define SL_SIMPLE_BUTTON_BTN0_PIN 2 - +#endif // [GPIO_SL_SIMPLE_BUTTON_BTN0]$ // <<< sl:end pin_tool >>> diff --git a/board-support/efr32/efr32mg24/BRD2703A/config/sl_simple_button_btn1_config.h b/board-support/efr32/efr32mg24/BRD2703A/config/sl_simple_button_btn1_config.h index 928a4d5c2..1df1ce0a1 100644 --- a/board-support/efr32/efr32mg24/BRD2703A/config/sl_simple_button_btn1_config.h +++ b/board-support/efr32/efr32mg24/BRD2703A/config/sl_simple_button_btn1_config.h @@ -48,9 +48,12 @@ // SL_SIMPLE_BUTTON_BTN1 // $[GPIO_SL_SIMPLE_BUTTON_BTN1] +#ifndef SL_SIMPLE_BUTTON_BTN1_PORT #define SL_SIMPLE_BUTTON_BTN1_PORT SL_GPIO_PORT_B +#endif +#ifndef SL_SIMPLE_BUTTON_BTN1_PIN #define SL_SIMPLE_BUTTON_BTN1_PIN 3 - +#endif // [GPIO_SL_SIMPLE_BUTTON_BTN1]$ // <<< sl:end pin_tool >>> diff --git a/board-support/efr32/efr32mg24/BRD2703A/config/sl_simple_led_led0_config.h b/board-support/efr32/efr32mg24/BRD2703A/config/sl_simple_led_led0_config.h index 854c1bc7a..a6ea62817 100644 --- a/board-support/efr32/efr32mg24/BRD2703A/config/sl_simple_led_led0_config.h +++ b/board-support/efr32/efr32mg24/BRD2703A/config/sl_simple_led_led0_config.h @@ -47,9 +47,12 @@ // SL_SIMPLE_LED_LED0 // $[GPIO_SL_SIMPLE_LED_LED0] +#ifndef SL_SIMPLE_LED_LED0_PORT #define SL_SIMPLE_LED_LED0_PORT SL_GPIO_PORT_A +#endif +#ifndef SL_SIMPLE_LED_LED0_PIN #define SL_SIMPLE_LED_LED0_PIN 4 - +#endif // [GPIO_SL_SIMPLE_LED_LED0]$ // <<< sl:end pin_tool >>> diff --git a/board-support/efr32/efr32mg24/BRD2703A/config/sl_simple_led_led1_config.h b/board-support/efr32/efr32mg24/BRD2703A/config/sl_simple_led_led1_config.h index 9ebda3560..b8ee6e8a7 100644 --- a/board-support/efr32/efr32mg24/BRD2703A/config/sl_simple_led_led1_config.h +++ b/board-support/efr32/efr32mg24/BRD2703A/config/sl_simple_led_led1_config.h @@ -47,9 +47,12 @@ // SL_SIMPLE_LED_LED1 // $[GPIO_SL_SIMPLE_LED_LED1] +#ifndef SL_SIMPLE_LED_LED1_PORT #define SL_SIMPLE_LED_LED1_PORT SL_GPIO_PORT_A +#endif +#ifndef SL_SIMPLE_LED_LED1_PIN #define SL_SIMPLE_LED_LED1_PIN 7 - +#endif // [GPIO_SL_SIMPLE_LED_LED1]$ // <<< sl:end pin_tool >>> diff --git a/board-support/efr32/efr32mg24/BRD4186A/autogen/sl_bluetooth.c b/board-support/efr32/efr32mg24/BRD4186A/autogen/sl_bluetooth.c index 4cac19436..0a5f1a969 100644 --- a/board-support/efr32/efr32mg24/BRD4186A/autogen/sl_bluetooth.c +++ b/board-support/efr32/efr32mg24/BRD4186A/autogen/sl_bluetooth.c @@ -30,6 +30,8 @@ #include #include "sl_bluetooth.h" +#include "sli_bt_api.h" +#include "sli_bgapi.h" #include "sl_assert.h" #include "sl_bt_stack_init.h" #include "sl_component_catalog.h" @@ -68,17 +70,23 @@ void sl_bt_step(void) { sl_bt_msg_t evt; + // Run the Bluetooth host stack processing step sl_bt_run(); - uint32_t event_len = sl_bt_event_pending_len(); - // For preventing from data loss, the event will be kept in the stack's queue - // if application cannot process it at the moment. + + // Check the length of the next event, if any, and verify that the application + // can process it. To prevent data loss, the event will be kept in the stack's + // queue if the application cannot process it at the moment. + size_t event_len = sli_bgapi_device_peek_event_len(&sli_bt_bgapi_device); if ((event_len == 0) || (!sl_bt_can_process_event(event_len))) { return; } - // Pop (non-blocking) a Bluetooth stack event from event queue. - sl_status_t status = sl_bt_pop_event(&evt); - if(status != SL_STATUS_OK){ + // Pop the event and process it if successful + sl_status_t status = sli_bgapi_device_pop_event(&sli_bt_bgapi_device, + sizeof(evt), + &evt); + + if (status != SL_STATUS_OK) { return; } sl_bt_process_event(&evt); diff --git a/board-support/efr32/efr32mg24/BRD4186A/autogen/sl_component_catalog.h b/board-support/efr32/efr32mg24/BRD4186A/autogen/sl_component_catalog.h index e32be25c7..fb05f93bb 100644 --- a/board-support/efr32/efr32mg24/BRD4186A/autogen/sl_component_catalog.h +++ b/board-support/efr32/efr32mg24/BRD4186A/autogen/sl_component_catalog.h @@ -3,6 +3,7 @@ // APIs present in project #define SL_CATALOG_BGAPI_PROTOCOL_PRESENT +#define SL_CATALOG_BGAPI_PROTOCOL_RTOS_ADAPTATION_PRESENT #define SL_CATALOG_BLUETOOTH_CONFIGURATION_PRESENT #define SL_CATALOG_BLUETOOTH_CTE_SUPPORT_PRESENT #define SL_CATALOG_BLUETOOTH_CS_SUPPORT_PRESENT @@ -24,7 +25,6 @@ #define SL_CATALOG_CMSIS_OS_COMMON_PRESENT #define SL_CATALOG_CPP_SUPPORT_PRESENT #define SL_CATALOG_DEVICE_INIT_PRESENT -#define SL_CATALOG_DEVICE_INIT_CORE_PRESENT #define SL_CATALOG_DEVICE_INIT_DCDC_PRESENT #define SL_CATALOG_EMLIB_CORE_PRESENT #define SL_CATALOG_EMLIB_RMU_PRESENT @@ -33,6 +33,7 @@ #define SL_CATALOG_GATT_CONFIGURATION_PRESENT #define SL_CATALOG_GPIO_PRESENT #define SL_CATALOG_GPIOINTERRUPT_PRESENT +#define SL_CATALOG_HAL_SYSTEM_PRESENT #define SL_CATALOG_HFXO_MANAGER_PRESENT #define SL_CATALOG_INTERRUPT_MANAGER_PRESENT #define SL_CATALOG_IOSTREAM_PRESENT @@ -51,13 +52,12 @@ #define SL_CATALOG_OPENTHREAD_CLI_PRESENT #define SL_CATALOG_OT_GP_INTERFACE_PRESENT #define SL_CATALOG_OPENTHREAD_STACK_PRESENT -#define SL_CATALOG_OPENTHREAD_UART_PRESENT #define SL_CATALOG_POWER_MANAGER_PRESENT +#define SL_CATALOG_POWER_MANAGER_DEEPSLEEP_PRESENT #define SL_CATALOG_PSA_CRYPTO_PRESENT #define SL_CATALOG_RADIO_PRIORITY_15_4_PRESENT #define SL_CATALOG_RAIL_LIB_PRESENT #define SL_CATALOG_RAIL_UTIL_PTI_PRESENT -#define SL_CATALOG_SE_MANAGER_PRESENT #define SL_CATALOG_SECURITY_MANAGER_PRESENT #define SL_CATALOG_SEGGER_RTT_PRESENT #define SL_CATALOG_BTN0_PRESENT @@ -77,4 +77,5 @@ #if defined(CONFIG_ENABLE_UART) #define SL_CATALOG_UARTDRV_EUSART_PRESENT #endif + #endif // SL_COMPONENT_CATALOG_H diff --git a/board-support/efr32/efr32mg24/BRD4186A/autogen/sl_event_handler.c b/board-support/efr32/efr32mg24/BRD4186A/autogen/sl_event_handler.c index 9bf97197b..357a278f8 100644 --- a/board-support/efr32/efr32mg24/BRD4186A/autogen/sl_event_handler.c +++ b/board-support/efr32/efr32mg24/BRD4186A/autogen/sl_event_handler.c @@ -3,7 +3,11 @@ #include "sl_board_init.h" #include "sl_clock_manager.h" #include "sl_hfxo_manager.h" -#include "pa_conversions_efr32.h" +#include "sl_rail_util_compatible_pa.h" +#if !(defined(SLI_SI91X_ENABLE_BLE) && SLI_SI91X_ENABLE_BLE) +#include "sl_bluetooth.h" +#include "sl_rail_util_power_manager_init.h" +#endif // !SLI_SI91X_ENABLE_BLE #include "sl_rail_util_power_manager_init.h" #include "sl_rail_util_pti.h" #include "sl_rail_util_rssi.h" @@ -22,10 +26,15 @@ #include "sl_mbedtls.h" #include "sl_ot_rtos_adaptation.h" #include "sl_simple_button_instances.h" + +#if (defined(SL_MATTER_RGB_LED_ENABLED) && SL_MATTER_RGB_LED_ENABLED == 1) +#include "sl_simple_rgb_pwm_led_instances.h" +#else #include "sl_simple_led_instances.h" +#endif //(SL_MATTER_RGB_LED_ENABLED) && SL_MATTER_RGB_LED_ENABLED == 1) #if defined(CONFIG_ENABLE_UART) #include "sl_uartdrv_instances.h" -#endif +#endif // CONFIG_ENABLE_UART #include "psa/crypto.h" #include "sl_se_manager.h" #include "sli_protocol_crypto.h" @@ -33,7 +42,7 @@ #include "sl_iostream_init_instances.h" #include "cmsis_os2.h" #include "nvm3_default.h" -#include "sl_cos.h" + #include "sl_iostream_handles.h" void sli_driver_permanent_allocation(void) @@ -46,13 +55,8 @@ void sli_service_permanent_allocation(void) void sli_stack_permanent_allocation(void) { - #if !SLI_SI91X_ENABLE_BLE sli_bt_stack_permanent_allocation(); -#endif - -#ifdef SL_OT_ENABLE sl_ot_rtos_perm_allocation(); -#endif } void sli_internal_permanent_allocation(void) @@ -87,8 +91,12 @@ void sl_driver_init(void) sl_i2cspm_init_instances(); #endif // defined(SL_MATTER_USE_SI70XX_SENSOR) && SL_MATTER_USE_SI70XX_SENSOR sl_simple_button_init_instances(); +#if (defined(SL_MATTER_RGB_LED_ENABLED) && SL_MATTER_RGB_LED_ENABLED == 1) + sl_simple_rgb_pwm_led_init_instances(); +#else sl_simple_led_init_instances(); -#if defined(CONFIG_ENABLE_UART) +#endif //(SL_MATTER_RGB_LED_ENABLED) && SL_MATTER_RGB_LED_ENABLED == 1) + #if defined(CONFIG_ENABLE_UART) sl_uartdrv_init_instances(); #endif // CONFIG_ENABLE_UART } @@ -109,12 +117,13 @@ void sl_service_init(void) void sl_stack_init(void) { +#if !SLI_SI91X_ENABLE_BLE sl_rail_util_pa_init(); sl_rail_util_power_manager_init(); sl_rail_util_pti_init(); sl_rail_util_rssi_init(); sli_bt_stack_functional_init(); - +#endif // !SLI_SI91X_ENABLE_BLE #ifdef SL_OT_ENABLE sl_ot_sys_init(); #endif // SL_OT_ENABLE diff --git a/board-support/efr32/efr32mg24/BRD4186A/autogen/sli_psa_config_autogen.h b/board-support/efr32/efr32mg24/BRD4186A/autogen/sli_psa_config_autogen.h index 055d8a95e..f90dd6e9a 100644 --- a/board-support/efr32/efr32mg24/BRD4186A/autogen/sli_psa_config_autogen.h +++ b/board-support/efr32/efr32mg24/BRD4186A/autogen/sli_psa_config_autogen.h @@ -24,7 +24,12 @@ #define PSA_WANT_ALG_TLS12_PSK_TO_MS 1 #define MBEDTLS_PSA_CRYPTO_EXTERNAL_RNG +#if defined(KSU_MAX_KEY_SLOTS) +#include "sli_ksu_keyslots_config.h" +#define MBEDTLS_PSA_KEY_SLOT_COUNT (22 + 15 + 1 + SL_PSA_KEY_USER_SLOT_COUNT + SLI_KSU_MAX_KEY_SLOTS - SLI_KSU_KEY_SLOT_USER_START + 1) +#else #define MBEDTLS_PSA_KEY_SLOT_COUNT (22 + 15 + 1 + SL_PSA_KEY_USER_SLOT_COUNT + 1) +#endif #ifndef SL_PSA_ITS_MAX_FILES #define SL_PSA_ITS_MAX_FILES (1 + SL_PSA_ITS_USER_MAX_FILES) #endif diff --git a/board-support/efr32/efr32mg24/BRD4186A/config/brd4186c.h b/board-support/efr32/efr32mg24/BRD4186A/config/brd4186c.h deleted file mode 100644 index 2a86c4d9c..000000000 --- a/board-support/efr32/efr32mg24/BRD4186A/config/brd4186c.h +++ /dev/null @@ -1,31 +0,0 @@ -#ifndef _BRD4186C_H_ -#define _BRD4186C_H_ - -#define PIN_OUT_SET 1 -#define PIN_OUT_CLEAR 0 - -#define MY_USART USART0 -#define MY_USART_CLOCK cmuClock_USART0 -#define MY_USART_TX_SIGNAL dmadrvPeripheralSignal_USART0_TXBL -#define MY_USART_RX_SIGNAL dmadrvPeripheralSignal_USART0_RXDATAV - -#define SL_WFX_HOST_PINOUT_RESET_PORT SL_GPIO_PORT_A -#define SL_WFX_HOST_PINOUT_RESET_PIN 5 -#define SL_WFX_HOST_PINOUT_SPI_WIRQ_PORT SL_GPIO_PORT_A /* SPI IRQ port*/ -#define SL_WFX_HOST_PINOUT_SPI_WIRQ_PIN 8 /* SPI IRQ pin */ -#define SL_WFX_HOST_PINOUT_WUP_PORT SL_GPIO_PORT_B -#define SL_WFX_HOST_PINOUT_WUP_PIN 5 - -#define SL_WFX_HOST_PINOUT_SPI_TX_PORT SL_GPIO_PORT_C -#define SL_WFX_HOST_PINOUT_SPI_TX_PIN 1 - -#define SL_WFX_HOST_PINOUT_SPI_RX_PORT SL_GPIO_PORT_C -#define SL_WFX_HOST_PINOUT_SPI_RX_PIN 2 - -#define SL_WFX_HOST_PINOUT_SPI_CLK_PORT SL_GPIO_PORT_C -#define SL_WFX_HOST_PINOUT_SPI_CLK_PIN 3 - -#define SL_WFX_HOST_PINOUT_SPI_CS_PORT SL_GPIO_PORT_C -#define SL_WFX_HOST_PINOUT_SPI_CS_PIN 0 - -#endif /* _BRD4186C_H_ */ diff --git a/board-support/efr32/efr32mg24/BRD4186A/config/pin_config.h b/board-support/efr32/efr32mg24/BRD4186A/config/pin_config.h new file mode 100644 index 000000000..5f72d8949 --- /dev/null +++ b/board-support/efr32/efr32mg24/BRD4186A/config/pin_config.h @@ -0,0 +1,252 @@ +#ifndef PIN_CONFIG_H +#define PIN_CONFIG_H + +// $[CMU] +// [CMU]$ + +// $[LFXO] +// [LFXO]$ + +// $[PRS.ASYNCH0] +// [PRS.ASYNCH0]$ + +// $[PRS.ASYNCH1] +// [PRS.ASYNCH1]$ + +// $[PRS.ASYNCH2] +// [PRS.ASYNCH2]$ + +// $[PRS.ASYNCH3] +// [PRS.ASYNCH3]$ + +// $[PRS.ASYNCH4] +// [PRS.ASYNCH4]$ + +// $[PRS.ASYNCH5] +// [PRS.ASYNCH5]$ + +// $[PRS.ASYNCH6] +// [PRS.ASYNCH6]$ + +// $[PRS.ASYNCH7] +// [PRS.ASYNCH7]$ + +// $[PRS.ASYNCH8] +// [PRS.ASYNCH8]$ + +// $[PRS.ASYNCH9] +// [PRS.ASYNCH9]$ + +// $[PRS.ASYNCH10] +// [PRS.ASYNCH10]$ + +// $[PRS.ASYNCH11] +// [PRS.ASYNCH11]$ + +// $[PRS.ASYNCH12] +// [PRS.ASYNCH12]$ + +// $[PRS.ASYNCH13] +// [PRS.ASYNCH13]$ + +// $[PRS.ASYNCH14] +// [PRS.ASYNCH14]$ + +// $[PRS.ASYNCH15] +// [PRS.ASYNCH15]$ + +// $[PRS.SYNCH0] +// [PRS.SYNCH0]$ + +// $[PRS.SYNCH1] +// [PRS.SYNCH1]$ + +// $[PRS.SYNCH2] +// [PRS.SYNCH2]$ + +// $[PRS.SYNCH3] +// [PRS.SYNCH3]$ + +// $[GPIO] +// GPIO SWV on PA03 +#ifndef GPIO_SWV_PORT +#define GPIO_SWV_PORT SL_GPIO_PORT_A +#endif +#ifndef GPIO_SWV_PIN +#define GPIO_SWV_PIN 3 +#endif + +// [GPIO]$ + +// $[TIMER0] +// [TIMER0]$ + +// $[TIMER1] +// [TIMER1]$ + +// $[TIMER2] +// [TIMER2]$ + +// $[TIMER3] +// [TIMER3]$ + +// $[TIMER4] +// [TIMER4]$ + +// $[USART0] +// USART0 CLK on PC03 +#ifndef USART0_CLK_PORT +#define USART0_CLK_PORT SL_GPIO_PORT_C +#endif +#ifndef USART0_CLK_PIN +#define USART0_CLK_PIN 3 +#endif + +// USART0 TX on PC01 +#ifndef USART0_TX_PORT +#define USART0_TX_PORT SL_GPIO_PORT_C +#endif +#ifndef USART0_TX_PIN +#define USART0_TX_PIN 1 +#endif + +// [USART0]$ + +// $[I2C1] +// I2C1 SCL on PC05 +#ifndef I2C1_SCL_PORT +#define I2C1_SCL_PORT SL_GPIO_PORT_C +#endif +#ifndef I2C1_SCL_PIN +#define I2C1_SCL_PIN 5 +#endif + +// I2C1 SDA on PC07 +#ifndef I2C1_SDA_PORT +#define I2C1_SDA_PORT SL_GPIO_PORT_C +#endif +#ifndef I2C1_SDA_PIN +#define I2C1_SDA_PIN 7 +#endif + +// [I2C1]$ + +// $[EUSART1] +// [EUSART1]$ + +// $[KEYSCAN] +// [KEYSCAN]$ + +// $[LETIMER0] +// [LETIMER0]$ + +// $[IADC0] +// [IADC0]$ + +// $[ACMP0] +// [ACMP0]$ + +// $[ACMP1] +// [ACMP1]$ + +// $[VDAC0] +// [VDAC0]$ + +// $[VDAC1] +// [VDAC1]$ + +// $[PCNT0] +// [PCNT0]$ + +// $[HFXO0] +// [HFXO0]$ + +// $[I2C0] +// [I2C0]$ + +// $[EUSART0] +// EUSART0 CTS on PB05 +#ifndef EUSART0_CTS_PORT +#define EUSART0_CTS_PORT SL_GPIO_PORT_B +#endif +#ifndef EUSART0_CTS_PIN +#define EUSART0_CTS_PIN 5 +#endif + +// EUSART0 RTS on PA00 +#ifndef EUSART0_RTS_PORT +#define EUSART0_RTS_PORT SL_GPIO_PORT_A +#endif +#ifndef EUSART0_RTS_PIN +#define EUSART0_RTS_PIN 0 +#endif + +// EUSART0 RX on PA09 +#ifndef EUSART0_RX_PORT +#define EUSART0_RX_PORT SL_GPIO_PORT_A +#endif +#ifndef EUSART0_RX_PIN +#define EUSART0_RX_PIN 9 +#endif + +// EUSART0 TX on PA08 +#ifndef EUSART0_TX_PORT +#define EUSART0_TX_PORT SL_GPIO_PORT_A +#endif +#ifndef EUSART0_TX_PIN +#define EUSART0_TX_PIN 8 +#endif + +// [EUSART0]$ + +// $[PTI] +// [PTI]$ + +// $[MODEM] +// [MODEM]$ + +// $[CUSTOM_PIN_NAME] +#ifndef _PORT +#define _PORT SL_GPIO_PORT_A +#endif +#ifndef _PIN +#define _PIN 0 +#endif + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +// [CUSTOM_PIN_NAME]$ + + +#endif // PIN_CONFIG_H + + diff --git a/board-support/efr32/efr32mg24/BRD4186A/config/psa_crypto_config.h b/board-support/efr32/efr32mg24/BRD4186A/config/psa_crypto_config.h index 20703b41d..773ce99e0 100644 --- a/board-support/efr32/efr32mg24/BRD4186A/config/psa_crypto_config.h +++ b/board-support/efr32/efr32mg24/BRD4186A/config/psa_crypto_config.h @@ -27,26 +27,32 @@ // Default: 4 #define SL_PSA_KEY_USER_SLOT_COUNT (4) -// PSA Maximum User Persistent Keys Count <0-1024> +// Maximum User Persistent PSA Key Count <0-1024> // Maximum amount of keys (or other files) that can be stored persistently -// by the application through the PSA interface, when persistent storage -// support for PSA Crypto is included in the project. -// Due to caching logic, this setting does have an impact on static RAM usage. -// Note that this number is added to the potential requirements from other -// software components in the project, such that the total amount of keys -// which can be stored through the ITS backend can be higher than what is -// configured here. +// by the user application, when PSA ITS (Internal Trusted Storage) support +// is included in the project. +// NOTE: +// In addition to SL_PSA_ITS_USER_MAX_FILES (number of user keys) the +// application may be configured to include SDK components that require an +// additional number of keys. The sum of user keys and SDK component keys +// is computed and the result, called SL_PSA_ITS_MAX_FILES, is used +// internally in the PSA ITS driver. // -// WARNING: When changing this setting on an application that is already -// deployed, and thus will get the change through an application upgrade, -// care should be taken to ensure that the setting is only ever increased, -// and never decreased. Decreasing this setting might cause previously -// stored keys/files to become inaccessible. +// WARNING: +// For applications using PSA ITS driver version 1 or 2, when changing the +// SL_PSA_ITS_USER_MAX_FILES in an application that is already depeloyed, +// and thus will get the change through an application upgrade, care should +// be taken to ensure that the total sum of keys SL_PSA_ITS_MAX_FILES is +// only ever equal or increased, and never decreased. Decreasing this +// setting might cause previously stored keys/files to become inaccessible, +// ITS should be cleared and all files need to be stored again. // -// It is not possible to change this setting when using V3 ITS Driver. -// The file-storage indexing is dependent on the maximum number of files, -// and if SL_PSA_ITS_USER_MAX_FILES is changed, ITS should be cleared and -// all files need to be stored again. +// For applications using PSA ITS driver version 3, it is not possible to +// change this setting because the file-storage indexing is dependent on the +// maximum number of files (SL_PSA_ITS_MAX_FILES) being consistent, and if +// the sum of SDK component keys and user keys (SL_PSA_ITS_USER_MAX_FILES) +// is changed, may cause previously stored keys/files to become inaccessible +// ITS should be cleared and all files need to be stored again. // Default: 128 #define SL_PSA_ITS_USER_MAX_FILES (128) diff --git a/board-support/efr32/efr32mg24/BRD4186A/config/sl_bluetooth_config.h b/board-support/efr32/efr32mg24/BRD4186A/config/sl_bluetooth_config.h index 9b6a804e0..93bfbbcc4 100644 --- a/board-support/efr32/efr32mg24/BRD4186A/config/sl_bluetooth_config.h +++ b/board-support/efr32/efr32mg24/BRD4186A/config/sl_bluetooth_config.h @@ -99,6 +99,7 @@ // if the LE Power Control feature is enabled. // When this configuration is passed into stack initialization, the stack // will select the closest value that the device supports. +// API sl_bt_system_set_tx_power() can be used to set the minimum TX power at runtime. // API sl_bt_system_get_tx_power_setting() can be used to query the selected value. #define SL_BT_CONFIG_MIN_TX_POWER (-30) @@ -108,6 +109,7 @@ // advertising, scanning and DTM testing. // When this configuration is passed into stack initialization, the stack // will select the closest value that the device supports. +// API sl_bt_system_set_tx_power() can be used to set the maximum TX power at runtime. // API sl_bt_system_get_tx_power_setting() can be used to query the selected value. #define SL_BT_CONFIG_MAX_TX_POWER (80) diff --git a/board-support/efr32/efr32mg24/BRD4186A/config/sl_board_control_config.h b/board-support/efr32/efr32mg24/BRD4186A/config/sl_board_control_config.h index f63c57de8..f474c7408 100644 --- a/board-support/efr32/efr32mg24/BRD4186A/config/sl_board_control_config.h +++ b/board-support/efr32/efr32mg24/BRD4186A/config/sl_board_control_config.h @@ -55,20 +55,32 @@ // SL_BOARD_ENABLE_VCOM // $[GPIO_SL_BOARD_ENABLE_VCOM] -#define SL_BOARD_ENABLE_VCOM_PORT SL_GPIO_PORT_B -#define SL_BOARD_ENABLE_VCOM_PIN 0 +#ifndef SL_BOARD_ENABLE_VCOM_PORT +#define SL_BOARD_ENABLE_VCOM_PORT SL_GPIO_PORT_B +#endif +#ifndef SL_BOARD_ENABLE_VCOM_PIN +#define SL_BOARD_ENABLE_VCOM_PIN 0 +#endif // [GPIO_SL_BOARD_ENABLE_VCOM]$ // SL_BOARD_ENABLE_DISPLAY // $[GPIO_SL_BOARD_ENABLE_DISPLAY] -#define SL_BOARD_ENABLE_DISPLAY_PORT SL_GPIO_PORT_C -#define SL_BOARD_ENABLE_DISPLAY_PIN 9 +#ifndef SL_BOARD_ENABLE_DISPLAY_PORT +#define SL_BOARD_ENABLE_DISPLAY_PORT SL_GPIO_PORT_C +#endif +#ifndef SL_BOARD_ENABLE_DISPLAY_PIN +#define SL_BOARD_ENABLE_DISPLAY_PIN 9 +#endif // [GPIO_SL_BOARD_ENABLE_DISPLAY]$ // SL_BOARD_ENABLE_SENSOR_RHT // $[GPIO_SL_BOARD_ENABLE_SENSOR_RHT] -#define SL_BOARD_ENABLE_SENSOR_RHT_PORT SL_GPIO_PORT_D -#define SL_BOARD_ENABLE_SENSOR_RHT_PIN 3 +#ifndef SL_BOARD_ENABLE_SENSOR_RHT_PORT +#define SL_BOARD_ENABLE_SENSOR_RHT_PORT SL_GPIO_PORT_D +#endif +#ifndef SL_BOARD_ENABLE_SENSOR_RHT_PIN +#define SL_BOARD_ENABLE_SENSOR_RHT_PIN 3 +#endif // [GPIO_SL_BOARD_ENABLE_SENSOR_RHT]$ // <<< sl:end pin_tool >>> diff --git a/board-support/efr32/efr32mg24/BRD4186A/config/sl_btctrl_config.h b/board-support/efr32/efr32mg24/BRD4186A/config/sl_btctrl_config.h index ed75a2d0e..403df1ffe 100644 --- a/board-support/efr32/efr32mg24/BRD4186A/config/sl_btctrl_config.h +++ b/board-support/efr32/efr32mg24/BRD4186A/config/sl_btctrl_config.h @@ -146,15 +146,27 @@ #define SL_BT_CONTROLLER_ADAPTIVITY_MODE (SL_BTCTRL_CHANNELMAP_FLAG_ACTIVE_ADAPTIVITY) #endif -// Power Amplifier (PA) Configuration -// Automode PA configuration -// Highest available PA configuration -// RAIL Utility component PA configuration -// Select the Power Amplifier configuration -// Default: RAIL Utility component PA configuration -#ifndef SL_BT_CONTROLLER_PA_CONFIG -#define SL_BT_CONTROLLER_PA_CONFIG SL_BT_BLUETOOTH_RAIL_UTIL_PA -#endif +// Advertising Configuration +// Include TX Power in the extended header of primary extended advertising packets +// This is default setting to all advertising sets unless it is specifically overridden by VS_SiliconLabs_Set_Advertising_Config_Bits. +// Default: 0 +// Enabling this option takes effect only if permitted by Le_Set_Extended_Advertising_Parameters +// According to Link Layer specification, Vol 6, Part B, Table 2.4 and Table 2.5: +// Optional in 1M PHY when the advertiser is connectable or scannable, or with auxiliary pointer. +// In other cases, the Extended Advertising TX Power is always optional by settings. +#define SL_BT_CONTROLLER_PRIMARY_EXT_PACKET_INCLUDE_TX_POWER (0) +// +// Include Advertiser Address in the header of primary extended advertising packets +// This is default setting to all advertising sets unless it is specifically overridden by VS_SiliconLabs_Set_Advertising_Config_Bits. +// Default: 0 +// Enabling this option takes effect only if permitted by Le_Set_Extended_Advertising_Parameters +// According to Link Layer specification, Vol 6, Part B, Table 2.4 and Table 2.5: +// Optional in 1M PHY when the advertiser is non-connectable and non-scannable, with auxiliary pointer. +// Mandatory when the advertiser is non-connectable and non-scannable, without auxiliary pointer. +// Forbidden when the advertiser is connectable or scannable. +#define SL_BT_CONTROLLER_PRIMARY_EXT_PACKET_INCLUDE_ADDRESS (0) +// +// Advertising Configuration // Bluetooth Controller Configuration // <<< end of configuration section >>> diff --git a/board-support/efr32/efr32mg24/BRD4186A/config/sl_clock_manager_tree_config.h b/board-support/efr32/efr32mg24/BRD4186A/config/sl_clock_manager_tree_config.h index 8c0be95e9..1f6f2a089 100644 --- a/board-support/efr32/efr32mg24/BRD4186A/config/sl_clock_manager_tree_config.h +++ b/board-support/efr32/efr32mg24/BRD4186A/config/sl_clock_manager_tree_config.h @@ -105,9 +105,9 @@ #endif // PCLK branch divider -// MIN // DIV1 // DIV2 +// MIN // PCLK branch is derived from HCLK. This clock drives the APB bus interface. // SL_CLOCK_MANAGER_PCLK_DIV_MIN #ifndef SL_CLOCK_MANAGER_PCLK_DIVIDER diff --git a/board-support/efr32/efr32mg24/BRD4186A/config/sl_i2cspm_sensor_config.h b/board-support/efr32/efr32mg24/BRD4186A/config/sl_i2cspm_sensor_config.h index 03c4886d4..9804ead6f 100644 --- a/board-support/efr32/efr32mg24/BRD4186A/config/sl_i2cspm_sensor_config.h +++ b/board-support/efr32/efr32mg24/BRD4186A/config/sl_i2cspm_sensor_config.h @@ -54,17 +54,28 @@ // <<< sl:start pin_tool >>> // SL_I2CSPM_SENSOR // $[I2C_SL_I2CSPM_SENSOR] +#ifndef SL_I2CSPM_SENSOR_PERIPHERAL #define SL_I2CSPM_SENSOR_PERIPHERAL I2C1 +#endif +#ifndef SL_I2CSPM_SENSOR_PERIPHERAL_NO #define SL_I2CSPM_SENSOR_PERIPHERAL_NO 1 +#endif // I2C1 SCL on PC05 +#ifndef SL_I2CSPM_SENSOR_SCL_PORT #define SL_I2CSPM_SENSOR_SCL_PORT SL_GPIO_PORT_C +#endif +#ifndef SL_I2CSPM_SENSOR_SCL_PIN #define SL_I2CSPM_SENSOR_SCL_PIN 5 +#endif // I2C1 SDA on PC07 +#ifndef SL_I2CSPM_SENSOR_SDA_PORT #define SL_I2CSPM_SENSOR_SDA_PORT SL_GPIO_PORT_C +#endif +#ifndef SL_I2CSPM_SENSOR_SDA_PIN #define SL_I2CSPM_SENSOR_SDA_PIN 7 - +#endif // [I2C_SL_I2CSPM_SENSOR]$ // <<< sl:end pin_tool >>> diff --git a/board-support/efr32/efr32mg24/BRD4186A/config/sl_mbedtls_config.h b/board-support/efr32/efr32mg24/BRD4186A/config/sl_mbedtls_config.h index e249b4d1b..7146ba648 100644 --- a/board-support/efr32/efr32mg24/BRD4186A/config/sl_mbedtls_config.h +++ b/board-support/efr32/efr32mg24/BRD4186A/config/sl_mbedtls_config.h @@ -71,9 +71,14 @@ // Default: 1 // This option is enabled assuming all buffers passed to any PSA function reside // in memory that is accessible only to the PSA function during its execution. +// This improves performance by avoiding extra buffer copies, reducing memory +// usage and allocation overhead. However, it is NOT the most secure option and +// should only be enabled if all buffers passed to PSA functions are exclusively +// accessible to PSA and never shared with untrusted code. // This option MUST be disabled whenever buffer arguments are in memory shared // with an untrusted party, for example where arguments to PSA calls are passed -// across a trust boundary. +// across a trust boundary, e.g. if TrustZone is enabled, and the PSA Crypto core +// is placed in the Secure domain. #define SL_MBEDTLS_PSA_ASSUME_EXCLUSIVE_BUFFERS 1 // diff --git a/board-support/efr32/efr32mg24/BRD4186A/config/sl_memory_manager_config.h b/board-support/efr32/efr32mg24/BRD4186A/config/sl_memory_manager_config.h index 26b84b107..4a16c29fe 100644 --- a/board-support/efr32/efr32mg24/BRD4186A/config/sl_memory_manager_config.h +++ b/board-support/efr32/efr32mg24/BRD4186A/config/sl_memory_manager_config.h @@ -51,4 +51,11 @@ // <<< end of configuration section >>> +// Keep this configuration outside the configuration section until the feature is ready for release. +// Enables the heap fallback mechanism. +// Setting this configuration to 0 will disable the fallback mechanism on DTCM and PSRAM. +// If this configuration is disabled, the memory manager will not attempt to use alternative memory regions for allocations even if using the fallback parameters. +// Default: 1 +#define SL_MEMORY_MANAGER_HEAP_FALLBACK_EN 1 + #endif /* SL_MEMORY_MANAGER_CONFIG_H */ diff --git a/board-support/efr32/efr32mg24/BRD4186A/config/sl_openthread_features_config.h b/board-support/efr32/efr32mg24/BRD4186A/config/sl_openthread_features_config.h index 22340498d..a3697f8af 100644 --- a/board-support/efr32/efr32mg24/BRD4186A/config/sl_openthread_features_config.h +++ b/board-support/efr32/efr32mg24/BRD4186A/config/sl_openthread_features_config.h @@ -65,6 +65,7 @@ #define OPENTHREAD_CONFIG_MAC_CSL_RECEIVER_ENABLE 1 #endif // CSL Scheduling Uncertainty (±10 us units) <12..999:1> +// Left unchanged the value will be set to 175 for RCPs, 20 for FTDs, and 12 for MTDs #ifndef SL_OPENTHREAD_CSL_TX_UNCERTAINTY #if OPENTHREAD_RADIO #define SL_OPENTHREAD_CSL_TX_UNCERTAINTY 175 @@ -142,12 +143,10 @@ #define OPENTHREAD_CONFIG_CHANNEL_MONITOR_ENABLE 0 #endif // - -// Commissioner +// Commissioner #ifndef OPENTHREAD_CONFIG_COMMISSIONER_ENABLE #define OPENTHREAD_CONFIG_COMMISSIONER_ENABLE 0 #endif - // Max Joiner Entries // The maximum number of Joiner entries maintained by the Commissioner. // 2 @@ -155,7 +154,6 @@ #define OPENTHREAD_CONFIG_COMMISSIONER_MAX_JOINER_ENTRIES 2 #endif // - // COAP API #ifndef OPENTHREAD_CONFIG_COAP_API_ENABLE #define OPENTHREAD_CONFIG_COAP_API_ENABLE 0 @@ -171,6 +169,11 @@ #define OPENTHREAD_CONFIG_COAP_SECURE_API_ENABLE 0 #endif // +// COAP Blockwise Transfer +#ifndef OPENTHREAD_CONFIG_COAP_BLOCKWISE_TRANSFER_ENABLE +#define OPENTHREAD_CONFIG_COAP_BLOCKWISE_TRANSFER_ENABLE 0 +#endif +// // DHCP6 Client #ifndef OPENTHREAD_CONFIG_DHCP6_CLIENT_ENABLE #define OPENTHREAD_CONFIG_DHCP6_CLIENT_ENABLE 0 @@ -196,16 +199,27 @@ #define OPENTHREAD_CONFIG_IP6_FRAGMENTATION_ENABLE 0 #endif // -// Maximum number of IPv6 unicast addresses allowed to be externally added +// IPv6 Limits +// Maximum IPv6 external unicast addresses +// Maximum number of IPv6 unicast addresses allowed to be externally added +// 4 #ifndef OPENTHREAD_CONFIG_IP6_MAX_EXT_UCAST_ADDRS #define OPENTHREAD_CONFIG_IP6_MAX_EXT_UCAST_ADDRS 4 #endif -// -// Maximum number of IPv6 multicast addresses allowed to be externally added +// Maximum IPv6 external multicast addresses +// Maximum number of IPv6 multicast addresses allowed to be externally added +// 4 #ifndef OPENTHREAD_CONFIG_IP6_MAX_EXT_MCAST_ADDRS #define OPENTHREAD_CONFIG_IP6_MAX_EXT_MCAST_ADDRS 4 #endif -// +// Maximum IPv6 address registrations for MTD +// The maximum number of IPv6 address registrations for MTD. +// If left unchanged will default to the value of OPENTHREAD_CONFIG_MLE_IP_ADDRS_PER_CHILD +// 4 +#ifndef OPENTHREAD_CONFIG_MLE_IP_ADDRS_TO_REGISTER +#define OPENTHREAD_CONFIG_MLE_IP_ADDRS_TO_REGISTER (OPENTHREAD_CONFIG_MLE_IP_ADDRS_PER_CHILD) +#endif +// // Jam Detection #ifndef OPENTHREAD_CONFIG_JAM_DETECTION_ENABLE #define OPENTHREAD_CONFIG_JAM_DETECTION_ENABLE 0 @@ -226,6 +240,14 @@ #define OPENTHREAD_CONFIG_MAC_FILTER_ENABLE 0 #endif // +// MLE Children +// Maximum number of Thread children supported by the device +// Default is 10. Used by the Thread stack to configure the size of child table. +// 10 +#ifndef OPENTHREAD_CONFIG_MLE_MAX_CHILDREN +#define OPENTHREAD_CONFIG_MLE_MAX_CHILDREN 10 +#endif +// // MLE Long Routes extension (experimental) #ifndef OPENTHREAD_CONFIG_MLE_LONG_ROUTES_ENABLE #define OPENTHREAD_CONFIG_MLE_LONG_ROUTES_ENABLE 0 @@ -235,27 +257,66 @@ #ifndef OPENTHREAD_CONFIG_MULTIPAN_RCP_ENABLE #define OPENTHREAD_CONFIG_MULTIPAN_RCP_ENABLE 0 #endif +// Broadcast IID for spinel frames +// Define broadcast IID for spinel frames dedicated to all hosts in multipan configuration +// 0 +#ifndef OPENTHREAD_SPINEL_CONFIG_BROADCAST_IID +#define OPENTHREAD_SPINEL_CONFIG_BROADCAST_IID 0 +#endif +#if OPENTHREAD_CONFIG_MULTIPAN_RCP_ENABLE +// Maximum number of Zigbee children for multiprotocol (DMP) builds +// Ensures correct table sizing for Zigbee when DMP/multipan is enabled. +// 6 +#ifndef SL_ZIGBEE_MAX_END_DEVICE_CHILDREN +#define SL_ZIGBEE_MAX_END_DEVICE_CHILDREN 6 +#endif +#endif // // Multiple OpenThread Instances #ifndef OPENTHREAD_CONFIG_MULTIPLE_INSTANCE_ENABLE #define OPENTHREAD_CONFIG_MULTIPLE_INSTANCE_ENABLE 0 #endif -// // Multiple Static Instance Support #ifndef OPENTHREAD_CONFIG_MULTIPLE_STATIC_INSTANCE_ENABLE #define OPENTHREAD_CONFIG_MULTIPLE_STATIC_INSTANCE_ENABLE 0 #endif -// -// Number of OpenThread Instances For Static Buffer Allocation +// Number of OpenThread Instances +// Default is 2. Number of OpenThread Instances For Static Buffer Allocation. +// 2 #ifndef OPENTHREAD_CONFIG_MULTIPLE_INSTANCE_NUM #define OPENTHREAD_CONFIG_MULTIPLE_INSTANCE_NUM 2 #endif // -// Define broadcast IID for spinel frames dedicated to all hosts in multipan configuration -#ifndef OPENTHREAD_SPINEL_CONFIG_BROADCAST_IID -#define OPENTHREAD_SPINEL_CONFIG_BROADCAST_IID 0 -#endif // +// Define maximum total source match table entries for both OT and Zigbee. +// In multi-instance builds (SoC or RCP/host), table must support all OT instances + Zigbee. +// For single instance (default), table sized to just OT children. +// This value is used to size all source match tables in both OT and Zigbee code. +// Note: this is purposedly not being setup with CMSIS annotations. +#ifndef RADIO_CONFIG_MAX_SRC_MATCH_ENTRIES +#if OPENTHREAD_CONFIG_MULTIPLE_INSTANCE_ENABLE +#if SL_ZIGBEE_MAX_END_DEVICE_CHILDREN +// Multipan / DMP case: OT + Zigbee +#define RADIO_CONFIG_MAX_SRC_MATCH_ENTRIES \ + ((OPENTHREAD_CONFIG_MLE_MAX_CHILDREN * (OPENTHREAD_CONFIG_MULTIPLE_INSTANCE_NUM - 1)) \ + + SL_ZIGBEE_MAX_END_DEVICE_CHILDREN) +#else +// Multi-instance OT-only case +#define RADIO_CONFIG_MAX_SRC_MATCH_ENTRIES \ + (OPENTHREAD_CONFIG_MLE_MAX_CHILDREN * OPENTHREAD_CONFIG_MULTIPLE_INSTANCE_NUM) +#endif +#else +// Single-instance OT (SoC / NCP / non-multipan RCP) +#define RADIO_CONFIG_MAX_SRC_MATCH_ENTRIES OPENTHREAD_CONFIG_MLE_MAX_CHILDREN +#endif +#endif +// Spinel Match Table +// Maximum number of spinel source match table entries +// Ensure that this value is the total of the number of openthread children times the number of openthread instances plus the number of Zigbee children. +#ifndef OPENTHREAD_SPINEL_CONFIG_MAX_SRC_MATCH_ENTRIES +#define OPENTHREAD_SPINEL_CONFIG_MAX_SRC_MATCH_ENTRIES RADIO_CONFIG_MAX_SRC_MATCH_ENTRIES +#endif +// // OTNS (OpenThread Network Simulator) #ifndef OPENTHREAD_CONFIG_OTNS_ENABLE #define OPENTHREAD_CONFIG_OTNS_ENABLE 0 @@ -265,13 +326,23 @@ #ifndef OPENTHREAD_CONFIG_PING_SENDER_ENABLE #define OPENTHREAD_CONFIG_PING_SENDER_ENABLE 1 #endif - // // Power Calibration Module (RCP only configuration) #ifndef OPENTHREAD_CONFIG_POWER_CALIBRATION_ENABLE #define OPENTHREAD_CONFIG_POWER_CALIBRATION_ENABLE 0 #endif - +// Maximum raw power calibration length +// Max raw power calibration length +// 4 +#ifndef SL_OPENTHREAD_RAW_POWER_CALIBRATION_LENGTH +#define SL_OPENTHREAD_RAW_POWER_CALIBRATION_LENGTH 4 +#endif +// Maximum FEM config setting length +// Max FEM config setting length +// 4 +#ifndef SL_OPENTHREAD_FEM_SETTING_LENGTH +#define SL_OPENTHREAD_FEM_SETTING_LENGTH 4 +#endif // // Platform UDP #ifndef OPENTHREAD_CONFIG_PLATFORM_UDP_ENABLE @@ -309,7 +380,14 @@ #endif // // Time Synchronization Service +#ifndef OPENTHREAD_CONFIG_TIME_SYNC_ENABLE #define OPENTHREAD_CONFIG_TIME_SYNC_ENABLE 0 +#endif +// +// Uptime of OpenThread instance +#ifndef OPENTHREAD_CONFIG_UPTIME_ENABLE +#define OPENTHREAD_CONFIG_UPTIME_ENABLE 1 +#endif // // UDP Forward #ifndef OPENTHREAD_CONFIG_UDP_FORWARD_ENABLE @@ -321,28 +399,22 @@ #define OPENTHREAD_CONFIG_MAC_BEACON_PAYLOAD_PARSING_ENABLE 1 #endif // -// Max raw power calibration length. -#ifndef SL_OPENTHREAD_RAW_POWER_CALIBRATION_LENGTH -#define SL_OPENTHREAD_RAW_POWER_CALIBRATION_LENGTH 4 -#endif -// -// Max FEM config setting length. -#ifndef SL_OPENTHREAD_FEM_SETTING_LENGTH -#define SL_OPENTHREAD_FEM_SETTING_LENGTH 4 -#endif -// -// The maximum number of RX buffers to use in the radio driver. -// 16 +// Radio Driver RX buffers +// Maximum number of RX buffers +// The maximum number of RX buffers to use in the radio driver. +// 16 #ifndef SL_OPENTHREAD_RADIO_RX_BUFFER_COUNT #define SL_OPENTHREAD_RADIO_RX_BUFFER_COUNT 16 #endif // +// // Logging // LOG_OUTPUT // NONE // APP // PLATFORM_DEFINED -// Default: OPENTHREAD_CONFIG_LOG_OUTPUT_PLATFORM_DEFINED +// Default: OPENTHREAD_CONFIG_LOG_OUTPUT_APP +// OPENTHREAD_CONFIG_LOG_OUTPUT_APP #ifndef OPENTHREAD_CONFIG_LOG_OUTPUT #define OPENTHREAD_CONFIG_LOG_OUTPUT OPENTHREAD_CONFIG_LOG_OUTPUT_APP #endif @@ -365,6 +437,7 @@ // INFO // DEBG // Default: OT_LOG_LEVEL_DEBG +// OT_LOG_LEVEL_DEBG #ifndef OPENTHREAD_CONFIG_LOG_LEVEL #define OPENTHREAD_CONFIG_LOG_LEVEL OT_LOG_LEVEL_DEBG #endif @@ -387,11 +460,10 @@ #endif // OPENTHREAD_FULL_LOGS_ENABLE -// Log crash dump after initialization +// Log crash dump after initialization #ifndef OPENTHREAD_CONFIG_PLATFORM_LOG_CRASH_DUMP_ENABLE #define OPENTHREAD_CONFIG_PLATFORM_LOG_CRASH_DUMP_ENABLE 0 #endif -// // // diff --git a/board-support/efr32/efr32mg24/BRD4186A/config/sl_power_manager_config.h b/board-support/efr32/efr32mg24/BRD4186A/config/sl_power_manager_config.h index 3c240b843..86b9fef27 100644 --- a/board-support/efr32/efr32mg24/BRD4186A/config/sl_power_manager_config.h +++ b/board-support/efr32/efr32mg24/BRD4186A/config/sl_power_manager_config.h @@ -37,24 +37,40 @@ // Enable custom IRQ handler for external HF oscillator. // Enable if CMU_IRQHandler/HFXO0_IRQHandler is needed from your application. -// The function sl_power_manager_irq_handler() will have to be called from you custom handler if this is enabled. +// The function sl_power_manager_irq_handler() will have to be called from your custom handler if this is enabled. // Default: 0 +#ifndef SL_POWER_MANAGER_CUSTOM_HF_OSCILLATOR_IRQ_HANDLER #define SL_POWER_MANAGER_CUSTOM_HF_OSCILLATOR_IRQ_HANDLER 0 +#endif // Enable fast wakeup (disable voltage scaling in EM2/3 mode) // Enable or disable voltage scaling in EM2/3 modes (when available). This decreases wakeup time by about 30 us. // Deprecated. It is replaced by the function sl_power_manager_em23_voltage_scaling_enable_fast_wakeup() // Default: 0 +#ifndef SL_POWER_MANAGER_CONFIG_VOLTAGE_SCALING_FAST_WAKEUP #define SL_POWER_MANAGER_CONFIG_VOLTAGE_SCALING_FAST_WAKEUP 0 +#endif + +// Enable voltage scaling in EM0 and EM1 mode. +// Enable or disable voltage scaling in EM0/1 modes. With this config enabled, the voltage +// scaling will be configured at the lowest possible level based on the system clock. +// Default: 0 +#ifndef SL_POWER_MANAGER_ENABLE_EM01_VOLTAGE_SCALING +#define SL_POWER_MANAGER_ENABLE_EM01_VOLTAGE_SCALING 0 +#endif // Enable debugging feature // Enable or disable debugging features (trace the different modules that have requirements). // Default: 0 +#ifndef SL_POWER_MANAGER_DEBUG #define SL_POWER_MANAGER_DEBUG 0 +#endif // Maximum numbers of requirements that can be logged // Default: 10 +#ifndef SL_POWER_MANAGER_DEBUG_POOL_SIZE #define SL_POWER_MANAGER_DEBUG_POOL_SIZE 10 +#endif // // Pin retention mode @@ -63,14 +79,18 @@ // Retention through EM4 // Retention through EM4 and wakeup // power_manager_pin_retention_disable +#ifndef SL_POWER_MANAGER_INIT_EMU_EM4_PIN_RETENTION_MODE #define SL_POWER_MANAGER_INIT_EMU_EM4_PIN_RETENTION_MODE EMU_EM4CTRL_EM4IORETMODE_DISABLE +#endif // Enable EM2 debugging feature // Enable or disable debugging features. // Force PD0B/PD0D to stay on during EM2 entry. This allows the debugger to remain connected in EM2 and EM3. // Enabling debug connectivity results in an increased power consumption in EM2/EM3. // Default: 1 +#ifndef SL_POWER_MANAGER_INIT_EMU_EM2_DEBUG_ENABLE #define SL_POWER_MANAGER_INIT_EMU_EM2_DEBUG_ENABLE 1 +#endif // // diff --git a/board-support/efr32/efr32mg24/BRD4186A/config/sl_rail_util_pa_tables_config.h b/board-support/efr32/efr32mg24/BRD4186A/config/sl_rail_util_pa_tables_config.h new file mode 100644 index 000000000..bd05ea57d --- /dev/null +++ b/board-support/efr32/efr32mg24/BRD4186A/config/sl_rail_util_pa_tables_config.h @@ -0,0 +1,49 @@ +/***************************************************************************//** + * @file + * @brief PA Tables configuration file. + ******************************************************************************* + * # License + * Copyright 2025 Silicon Laboratories Inc. www.silabs.com + ******************************************************************************* + * + * SPDX-License-Identifier: Zlib + * + * The licensor of this software is Silicon Laboratories Inc. + * + * This software is provided 'as-is', without any express or implied + * warranty. In no event will the authors be held liable for any damages + * arising from the use of this software. + * + * Permission is granted to anyone to use this software for any purpose, + * including commercial applications, and to alter it and redistribute it + * freely, subject to the following restrictions: + * + * 1. The origin of this software must not be misrepresented; you must not + * claim that you wrote the original software. If you use this software + * in a product, an acknowledgment in the product documentation would be + * appreciated but is not required. + * 2. Altered source versions must be plainly marked as such, and must not be + * misrepresented as being the original software. + * 3. This notice may not be removed or altered from any source distribution. + * + ******************************************************************************/ + +#ifndef SL_RAIL_UTIL_PA_TABLES_CONFIG_H +#define SL_RAIL_UTIL_PA_TABLES_CONFIG_H + +// <<< Use Configuration Wizard in Context Menu >>> + +// PA Table Configuration +// PA Table Selection +// <"sl_rail_util_pa_dbm_powersetting_mapping_table_10dbm.h"=> 10dBm PA powersetting mapping table +// <"sl_rail_util_pa_dbm_powersetting_mapping_table_0dbm.h"=> 0dBm PA powersetting mapping table +// <"sl_rail_util_pa_dbm_powersetting_mapping_table_automode_0_10dbm.h"=> 0dBm-10dBm automode PA powersetting mapping table +// Default: "sl_rail_util_pa_dbm_powersetting_mapping_table_automode_0_10dbm.h" +#define SL_RAIL_UTIL_PA_TABLE_HEADER "sl_rail_util_pa_dbm_powersetting_mapping_table_automode_0_10dbm.h" +// + +// <<< end of configuration section >>> + +#include SL_RAIL_UTIL_PA_TABLE_HEADER + +#endif // SL_RAIL_UTIL_PA_TABLES_CONFIG_H diff --git a/board-support/efr32/efr32mg24/BRD4186A/config/sl_rail_util_pti_config.h b/board-support/efr32/efr32mg24/BRD4186A/config/sl_rail_util_pti_config.h index bdd36734c..736b91558 100644 --- a/board-support/efr32/efr32mg24/BRD4186A/config/sl_rail_util_pti_config.h +++ b/board-support/efr32/efr32mg24/BRD4186A/config/sl_rail_util_pti_config.h @@ -35,12 +35,12 @@ // PTI Configuration // PTI mode -// UART -// UART onewire -// SPI -// Disabled -// Default: RAIL_PTI_MODE_UART -#define SL_RAIL_UTIL_PTI_MODE RAIL_PTI_MODE_UART +// UART +// UART onewire +// SPI +// Disabled +// Default: SL_RAIL_PTI_MODE_UART +#define SL_RAIL_UTIL_PTI_MODE SL_RAIL_PTI_MODE_UART // PTI Baud Rate (Hertz) // <147800-20000000:1> diff --git a/board-support/efr32/efr32mg24/BRD4186A/config/sl_simple_button_btn0_config.h b/board-support/efr32/efr32mg24/BRD4186A/config/sl_simple_button_btn0_config.h index 23e27379c..552aa94c9 100644 --- a/board-support/efr32/efr32mg24/BRD4186A/config/sl_simple_button_btn0_config.h +++ b/board-support/efr32/efr32mg24/BRD4186A/config/sl_simple_button_btn0_config.h @@ -48,9 +48,12 @@ // SL_SIMPLE_BUTTON_BTN0 // $[GPIO_SL_SIMPLE_BUTTON_BTN0] +#ifndef SL_SIMPLE_BUTTON_BTN0_PORT #define SL_SIMPLE_BUTTON_BTN0_PORT SL_GPIO_PORT_B +#endif +#ifndef SL_SIMPLE_BUTTON_BTN0_PIN #define SL_SIMPLE_BUTTON_BTN0_PIN 1 - +#endif // [GPIO_SL_SIMPLE_BUTTON_BTN0]$ // <<< sl:end pin_tool >>> diff --git a/board-support/efr32/efr32mg24/BRD4186A/config/sl_simple_button_btn1_config.h b/board-support/efr32/efr32mg24/BRD4186A/config/sl_simple_button_btn1_config.h index 928a4d5c2..1df1ce0a1 100644 --- a/board-support/efr32/efr32mg24/BRD4186A/config/sl_simple_button_btn1_config.h +++ b/board-support/efr32/efr32mg24/BRD4186A/config/sl_simple_button_btn1_config.h @@ -48,9 +48,12 @@ // SL_SIMPLE_BUTTON_BTN1 // $[GPIO_SL_SIMPLE_BUTTON_BTN1] +#ifndef SL_SIMPLE_BUTTON_BTN1_PORT #define SL_SIMPLE_BUTTON_BTN1_PORT SL_GPIO_PORT_B +#endif +#ifndef SL_SIMPLE_BUTTON_BTN1_PIN #define SL_SIMPLE_BUTTON_BTN1_PIN 3 - +#endif // [GPIO_SL_SIMPLE_BUTTON_BTN1]$ // <<< sl:end pin_tool >>> diff --git a/board-support/efr32/efr32mg24/BRD4186C/autogen/sl_bluetooth.c b/board-support/efr32/efr32mg24/BRD4186C/autogen/sl_bluetooth.c index 4cac19436..0a5f1a969 100644 --- a/board-support/efr32/efr32mg24/BRD4186C/autogen/sl_bluetooth.c +++ b/board-support/efr32/efr32mg24/BRD4186C/autogen/sl_bluetooth.c @@ -30,6 +30,8 @@ #include #include "sl_bluetooth.h" +#include "sli_bt_api.h" +#include "sli_bgapi.h" #include "sl_assert.h" #include "sl_bt_stack_init.h" #include "sl_component_catalog.h" @@ -68,17 +70,23 @@ void sl_bt_step(void) { sl_bt_msg_t evt; + // Run the Bluetooth host stack processing step sl_bt_run(); - uint32_t event_len = sl_bt_event_pending_len(); - // For preventing from data loss, the event will be kept in the stack's queue - // if application cannot process it at the moment. + + // Check the length of the next event, if any, and verify that the application + // can process it. To prevent data loss, the event will be kept in the stack's + // queue if the application cannot process it at the moment. + size_t event_len = sli_bgapi_device_peek_event_len(&sli_bt_bgapi_device); if ((event_len == 0) || (!sl_bt_can_process_event(event_len))) { return; } - // Pop (non-blocking) a Bluetooth stack event from event queue. - sl_status_t status = sl_bt_pop_event(&evt); - if(status != SL_STATUS_OK){ + // Pop the event and process it if successful + sl_status_t status = sli_bgapi_device_pop_event(&sli_bt_bgapi_device, + sizeof(evt), + &evt); + + if (status != SL_STATUS_OK) { return; } sl_bt_process_event(&evt); diff --git a/board-support/efr32/efr32mg24/BRD4186C/autogen/sl_component_catalog.h b/board-support/efr32/efr32mg24/BRD4186C/autogen/sl_component_catalog.h index 85cd79cb7..fb05f93bb 100644 --- a/board-support/efr32/efr32mg24/BRD4186C/autogen/sl_component_catalog.h +++ b/board-support/efr32/efr32mg24/BRD4186C/autogen/sl_component_catalog.h @@ -3,6 +3,7 @@ // APIs present in project #define SL_CATALOG_BGAPI_PROTOCOL_PRESENT +#define SL_CATALOG_BGAPI_PROTOCOL_RTOS_ADAPTATION_PRESENT #define SL_CATALOG_BLUETOOTH_CONFIGURATION_PRESENT #define SL_CATALOG_BLUETOOTH_CTE_SUPPORT_PRESENT #define SL_CATALOG_BLUETOOTH_CS_SUPPORT_PRESENT @@ -24,7 +25,6 @@ #define SL_CATALOG_CMSIS_OS_COMMON_PRESENT #define SL_CATALOG_CPP_SUPPORT_PRESENT #define SL_CATALOG_DEVICE_INIT_PRESENT -#define SL_CATALOG_DEVICE_INIT_CORE_PRESENT #define SL_CATALOG_DEVICE_INIT_DCDC_PRESENT #define SL_CATALOG_EMLIB_CORE_PRESENT #define SL_CATALOG_EMLIB_RMU_PRESENT @@ -33,6 +33,7 @@ #define SL_CATALOG_GATT_CONFIGURATION_PRESENT #define SL_CATALOG_GPIO_PRESENT #define SL_CATALOG_GPIOINTERRUPT_PRESENT +#define SL_CATALOG_HAL_SYSTEM_PRESENT #define SL_CATALOG_HFXO_MANAGER_PRESENT #define SL_CATALOG_INTERRUPT_MANAGER_PRESENT #define SL_CATALOG_IOSTREAM_PRESENT @@ -52,11 +53,11 @@ #define SL_CATALOG_OT_GP_INTERFACE_PRESENT #define SL_CATALOG_OPENTHREAD_STACK_PRESENT #define SL_CATALOG_POWER_MANAGER_PRESENT +#define SL_CATALOG_POWER_MANAGER_DEEPSLEEP_PRESENT #define SL_CATALOG_PSA_CRYPTO_PRESENT #define SL_CATALOG_RADIO_PRIORITY_15_4_PRESENT #define SL_CATALOG_RAIL_LIB_PRESENT #define SL_CATALOG_RAIL_UTIL_PTI_PRESENT -#define SL_CATALOG_SE_MANAGER_PRESENT #define SL_CATALOG_SECURITY_MANAGER_PRESENT #define SL_CATALOG_SEGGER_RTT_PRESENT #define SL_CATALOG_BTN0_PRESENT diff --git a/board-support/efr32/efr32mg24/BRD4186C/autogen/sl_event_handler.c b/board-support/efr32/efr32mg24/BRD4186C/autogen/sl_event_handler.c index 56dd859b5..72fdfb28e 100644 --- a/board-support/efr32/efr32mg24/BRD4186C/autogen/sl_event_handler.c +++ b/board-support/efr32/efr32mg24/BRD4186C/autogen/sl_event_handler.c @@ -3,10 +3,12 @@ #include "sl_board_init.h" #include "sl_clock_manager.h" #include "sl_hfxo_manager.h" -#include "pa_conversions_efr32.h" -#if !SLI_SI91X_ENABLE_BLE +#include "sl_rail_util_compatible_pa.h" +#if !(defined(SLI_SI91X_ENABLE_BLE) && SLI_SI91X_ENABLE_BLE) +#include "sl_bluetooth.h" +#include "sl_rail_util_power_manager_init.h" +#endif // !SLI_SI91X_ENABLE_BLE #include "sl_rail_util_power_manager_init.h" -#endif #include "sl_rail_util_pti.h" #include "sl_rail_util_rssi.h" #include "btl_interface.h" @@ -24,7 +26,12 @@ #include "sl_mbedtls.h" #include "sl_ot_rtos_adaptation.h" #include "sl_simple_button_instances.h" + +#if (defined(SL_MATTER_RGB_LED_ENABLED) && SL_MATTER_RGB_LED_ENABLED == 1) +#include "sl_simple_rgb_pwm_led_instances.h" +#else #include "sl_simple_led_instances.h" +#endif //(SL_MATTER_RGB_LED_ENABLED) && SL_MATTER_RGB_LED_ENABLED == 1) #if defined(CONFIG_ENABLE_UART) #include "sl_uartdrv_instances.h" #endif // CONFIG_ENABLE_UART @@ -38,7 +45,7 @@ #include "sl_iostream_init_instances.h" #include "cmsis_os2.h" #include "nvm3_default.h" -#include "sl_cos.h" + #include "sl_iostream_handles.h" void sli_driver_permanent_allocation(void) @@ -51,13 +58,8 @@ void sli_service_permanent_allocation(void) void sli_stack_permanent_allocation(void) { -#if !SLI_SI91X_ENABLE_BLE sli_bt_stack_permanent_allocation(); -#endif - -#ifdef SL_OT_ENABLE sl_ot_rtos_perm_allocation(); -#endif } void sli_internal_permanent_allocation(void) @@ -89,15 +91,17 @@ void sl_kernel_start(void) void sl_driver_init(void) { sl_gpio_init(); -#ifdef SL_WIFI - sl_spidrv_init_instances(); -#endif + GPIOINT_Init(); #if defined(SL_MATTER_USE_SI70XX_SENSOR) && SL_MATTER_USE_SI70XX_SENSOR sl_i2cspm_init_instances(); #endif // defined(SL_MATTER_USE_SI70XX_SENSOR) && SL_MATTER_USE_SI70XX_SENSOR sl_simple_button_init_instances(); +#if (defined(SL_MATTER_RGB_LED_ENABLED) && SL_MATTER_RGB_LED_ENABLED == 1) + sl_simple_rgb_pwm_led_init_instances(); +#else sl_simple_led_init_instances(); -#if defined(CONFIG_ENABLE_UART) +#endif //(SL_MATTER_RGB_LED_ENABLED) && SL_MATTER_RGB_LED_ENABLED == 1) + #if defined(CONFIG_ENABLE_UART) sl_uartdrv_init_instances(); #endif // CONFIG_ENABLE_UART } @@ -124,8 +128,7 @@ void sl_stack_init(void) sl_rail_util_pti_init(); sl_rail_util_rssi_init(); sli_bt_stack_functional_init(); -#endif - +#endif // !SLI_SI91X_ENABLE_BLE #ifdef SL_OT_ENABLE sl_ot_sys_init(); #endif // SL_OT_ENABLE diff --git a/board-support/efr32/efr32mg24/BRD4186C/autogen/sl_event_handler.h b/board-support/efr32/efr32mg24/BRD4186C/autogen/sl_event_handler.h index a092b8899..1d0468d03 100644 --- a/board-support/efr32/efr32mg24/BRD4186C/autogen/sl_event_handler.h +++ b/board-support/efr32/efr32mg24/BRD4186C/autogen/sl_event_handler.h @@ -12,7 +12,5 @@ void sl_driver_init(void); void sl_service_init(void); void sl_stack_init(void); void sl_internal_app_init(void); -void sl_iostream_init_instances_stage_1(void); -void sl_iostream_init_instances_stage_2(void); #endif // SL_EVENT_HANDLER_H diff --git a/board-support/efr32/efr32mg24/BRD4186C/autogen/sl_simple_led_instances.h b/board-support/efr32/efr32mg24/BRD4186C/autogen/sl_simple_led_instances.h index 08c8291ae..928fbe942 100644 --- a/board-support/efr32/efr32mg24/BRD4186C/autogen/sl_simple_led_instances.h +++ b/board-support/efr32/efr32mg24/BRD4186C/autogen/sl_simple_led_instances.h @@ -31,6 +31,10 @@ #ifndef SL_SIMPLE_LED_INSTANCES_H #define SL_SIMPLE_LED_INSTANCES_H +#ifdef __cplusplus +extern "C" { +#endif + #include "sl_simple_led.h" extern const sl_led_t sl_led_led0; @@ -43,4 +47,8 @@ extern const sl_led_t *sl_simple_led_array[]; void sl_simple_led_init_instances(void); +#ifdef __cplusplus +} +#endif + #endif // SL_SIMPLE_LED_INIT_H diff --git a/board-support/efr32/efr32mg24/BRD4186C/autogen/sl_spidrv_init.c b/board-support/efr32/efr32mg24/BRD4186C/autogen/sl_spidrv_init.c index c5b40d613..328954938 100644 --- a/board-support/efr32/efr32mg24/BRD4186C/autogen/sl_spidrv_init.c +++ b/board-support/efr32/efr32mg24/BRD4186C/autogen/sl_spidrv_init.c @@ -1,48 +1,46 @@ -#include "spidrv.h" -#include "sl_spidrv_instances.h" -#include "sl_assert.h" - -#include "sl_spidrv_exp_config.h" - -SPIDRV_HandleData_t sl_spidrv_exp_handle_data; -SPIDRV_Handle_t sl_spidrv_exp_handle = &sl_spidrv_exp_handle_data; - -SPIDRV_Init_t sl_spidrv_init_exp = { - .port = SL_SPIDRV_EXP_PERIPHERAL, -#if defined(_USART_ROUTELOC0_MASK) - .portLocationTx = SL_SPIDRV_EXP_TX_LOC, - .portLocationRx = SL_SPIDRV_EXP_RX_LOC, - .portLocationClk = SL_SPIDRV_EXP_CLK_LOC, -#if defined(SL_SPIDRV_EXP_CS_LOC) - .portLocationCs = SL_SPIDRV_EXP_CS_LOC, -#endif -#elif defined(_GPIO_USART_ROUTEEN_MASK) - .portTx = SL_SPIDRV_EXP_TX_PORT, - .portRx = SL_SPIDRV_EXP_RX_PORT, - .portClk = SL_SPIDRV_EXP_CLK_PORT, -#if defined(SL_SPIDRV_EXP_CS_PORT) - .portCs = SL_SPIDRV_EXP_CS_PORT, -#endif - .pinTx = SL_SPIDRV_EXP_TX_PIN, - .pinRx = SL_SPIDRV_EXP_RX_PIN, - .pinClk = SL_SPIDRV_EXP_CLK_PIN, -#if defined(SL_SPIDRV_EXP_CS_PIN) - .pinCs = SL_SPIDRV_EXP_CS_PIN, -#endif -#else - .portLocation = SL_SPIDRV_EXP_ROUTE_LOC, -#endif - .bitRate = SL_SPIDRV_EXP_BITRATE, - .frameLength = SL_SPIDRV_EXP_FRAME_LENGTH, - .dummyTxValue = 0, - .type = SL_SPIDRV_EXP_TYPE, - .bitOrder = SL_SPIDRV_EXP_BIT_ORDER, - .clockMode = SL_SPIDRV_EXP_CLOCK_MODE, - .csControl = SL_SPIDRV_EXP_CS_CONTROL, - .slaveStartMode = SL_SPIDRV_EXP_SLAVE_START_MODE, -}; - -void sl_spidrv_init_instances(void) -{ - SPIDRV_Init(sl_spidrv_exp_handle, &sl_spidrv_init_exp); -} +#include "spidrv.h" +#include "sl_spidrv_instances.h" +#include "sl_assert.h" + + +#include "sl_spidrv_exp_config.h" +SPIDRV_HandleData_t sl_spidrv_exp_handle_data; +SPIDRV_Handle_t sl_spidrv_exp_handle = &sl_spidrv_exp_handle_data; +SPIDRV_Init_t sl_spidrv_init_exp = { + .port = SL_SPIDRV_EXP_PERIPHERAL, +#if defined(_USART_ROUTELOC0_MASK) + .portLocationTx = SL_SPIDRV_EXP_TX_LOC, + .portLocationRx = SL_SPIDRV_EXP_RX_LOC, + .portLocationClk = SL_SPIDRV_EXP_CLK_LOC, +#if defined(SL_SPIDRV_EXP_CS_LOC) + .portLocationCs = SL_SPIDRV_EXP_CS_LOC, +#endif +#elif defined(_GPIO_USART_ROUTEEN_MASK) + .portTx = SL_SPIDRV_EXP_TX_PORT, + .portRx = SL_SPIDRV_EXP_RX_PORT, + .portClk = SL_SPIDRV_EXP_CLK_PORT, +#if defined(SL_SPIDRV_EXP_CS_PORT) + .portCs = SL_SPIDRV_EXP_CS_PORT, +#endif + .pinTx = SL_SPIDRV_EXP_TX_PIN, + .pinRx = SL_SPIDRV_EXP_RX_PIN, + .pinClk = SL_SPIDRV_EXP_CLK_PIN, +#if defined(SL_SPIDRV_EXP_CS_PIN) + .pinCs = SL_SPIDRV_EXP_CS_PIN, +#endif +#else + .portLocation = SL_SPIDRV_EXP_ROUTE_LOC, +#endif + .bitRate = SL_SPIDRV_EXP_BITRATE, + .frameLength = SL_SPIDRV_EXP_FRAME_LENGTH, + .dummyTxValue = 0, + .type = SL_SPIDRV_EXP_TYPE, + .bitOrder = SL_SPIDRV_EXP_BIT_ORDER, + .clockMode = SL_SPIDRV_EXP_CLOCK_MODE, + .csControl = SL_SPIDRV_EXP_CS_CONTROL, + .slaveStartMode = SL_SPIDRV_EXP_SLAVE_START_MODE, +}; + +void sl_spidrv_init_instances(void) { + SPIDRV_Init(sl_spidrv_exp_handle, &sl_spidrv_init_exp); +} diff --git a/board-support/efr32/efr32mg24/BRD4186C/autogen/sl_spidrv_instances.h b/board-support/efr32/efr32mg24/BRD4186C/autogen/sl_spidrv_instances.h index a0ea2e8c0..64e7c3b29 100644 --- a/board-support/efr32/efr32mg24/BRD4186C/autogen/sl_spidrv_instances.h +++ b/board-support/efr32/efr32mg24/BRD4186C/autogen/sl_spidrv_instances.h @@ -1,18 +1,17 @@ -#ifndef SL_SPIDRV_INSTANCES_H -#define SL_SPIDRV_INSTANCES_H - -#ifdef __cplusplus -extern "C" { -#endif - -#include "spidrv.h" - -extern SPIDRV_Handle_t sl_spidrv_exp_handle; - -void sl_spidrv_init_instances(void); - -#ifdef __cplusplus -} -#endif - -#endif // SL_SPIDRV_INSTANCES_H +#ifndef SL_SPIDRV_INSTANCES_H +#define SL_SPIDRV_INSTANCES_H + +#ifdef __cplusplus +extern "C" { +#endif + +#include "spidrv.h" +extern SPIDRV_Handle_t sl_spidrv_exp_handle; + +void sl_spidrv_init_instances(void); + +#ifdef __cplusplus +} +#endif + +#endif // SL_SPIDRV_INSTANCES_H diff --git a/board-support/efr32/efr32mg24/BRD4186C/config/brd4186c.h b/board-support/efr32/efr32mg24/BRD4186C/config/brd4186c.h deleted file mode 100644 index 2a86c4d9c..000000000 --- a/board-support/efr32/efr32mg24/BRD4186C/config/brd4186c.h +++ /dev/null @@ -1,31 +0,0 @@ -#ifndef _BRD4186C_H_ -#define _BRD4186C_H_ - -#define PIN_OUT_SET 1 -#define PIN_OUT_CLEAR 0 - -#define MY_USART USART0 -#define MY_USART_CLOCK cmuClock_USART0 -#define MY_USART_TX_SIGNAL dmadrvPeripheralSignal_USART0_TXBL -#define MY_USART_RX_SIGNAL dmadrvPeripheralSignal_USART0_RXDATAV - -#define SL_WFX_HOST_PINOUT_RESET_PORT SL_GPIO_PORT_A -#define SL_WFX_HOST_PINOUT_RESET_PIN 5 -#define SL_WFX_HOST_PINOUT_SPI_WIRQ_PORT SL_GPIO_PORT_A /* SPI IRQ port*/ -#define SL_WFX_HOST_PINOUT_SPI_WIRQ_PIN 8 /* SPI IRQ pin */ -#define SL_WFX_HOST_PINOUT_WUP_PORT SL_GPIO_PORT_B -#define SL_WFX_HOST_PINOUT_WUP_PIN 5 - -#define SL_WFX_HOST_PINOUT_SPI_TX_PORT SL_GPIO_PORT_C -#define SL_WFX_HOST_PINOUT_SPI_TX_PIN 1 - -#define SL_WFX_HOST_PINOUT_SPI_RX_PORT SL_GPIO_PORT_C -#define SL_WFX_HOST_PINOUT_SPI_RX_PIN 2 - -#define SL_WFX_HOST_PINOUT_SPI_CLK_PORT SL_GPIO_PORT_C -#define SL_WFX_HOST_PINOUT_SPI_CLK_PIN 3 - -#define SL_WFX_HOST_PINOUT_SPI_CS_PORT SL_GPIO_PORT_C -#define SL_WFX_HOST_PINOUT_SPI_CS_PIN 0 - -#endif /* _BRD4186C_H_ */ diff --git a/board-support/efr32/efr32mg24/BRD4186C/config/pin_config.h b/board-support/efr32/efr32mg24/BRD4186C/config/pin_config.h new file mode 100644 index 000000000..021b3ac21 --- /dev/null +++ b/board-support/efr32/efr32mg24/BRD4186C/config/pin_config.h @@ -0,0 +1,268 @@ +#ifndef PIN_CONFIG_H +#define PIN_CONFIG_H + +// $[CMU] +// [CMU]$ + +// $[LFXO] +// [LFXO]$ + +// $[PRS.ASYNCH0] +// [PRS.ASYNCH0]$ + +// $[PRS.ASYNCH1] +// [PRS.ASYNCH1]$ + +// $[PRS.ASYNCH2] +// [PRS.ASYNCH2]$ + +// $[PRS.ASYNCH3] +// [PRS.ASYNCH3]$ + +// $[PRS.ASYNCH4] +// [PRS.ASYNCH4]$ + +// $[PRS.ASYNCH5] +// [PRS.ASYNCH5]$ + +// $[PRS.ASYNCH6] +// [PRS.ASYNCH6]$ + +// $[PRS.ASYNCH7] +// [PRS.ASYNCH7]$ + +// $[PRS.ASYNCH8] +// [PRS.ASYNCH8]$ + +// $[PRS.ASYNCH9] +// [PRS.ASYNCH9]$ + +// $[PRS.ASYNCH10] +// [PRS.ASYNCH10]$ + +// $[PRS.ASYNCH11] +// [PRS.ASYNCH11]$ + +// $[PRS.ASYNCH12] +// [PRS.ASYNCH12]$ + +// $[PRS.ASYNCH13] +// [PRS.ASYNCH13]$ + +// $[PRS.ASYNCH14] +// [PRS.ASYNCH14]$ + +// $[PRS.ASYNCH15] +// [PRS.ASYNCH15]$ + +// $[PRS.SYNCH0] +// [PRS.SYNCH0]$ + +// $[PRS.SYNCH1] +// [PRS.SYNCH1]$ + +// $[PRS.SYNCH2] +// [PRS.SYNCH2]$ + +// $[PRS.SYNCH3] +// [PRS.SYNCH3]$ + +// $[GPIO] +// GPIO SWV on PA03 +#ifndef GPIO_SWV_PORT +#define GPIO_SWV_PORT SL_GPIO_PORT_A +#endif +#ifndef GPIO_SWV_PIN +#define GPIO_SWV_PIN 3 +#endif + +// [GPIO]$ + +// $[TIMER0] +// [TIMER0]$ + +// $[TIMER1] +// [TIMER1]$ + +// $[TIMER2] +// [TIMER2]$ + +// $[TIMER3] +// [TIMER3]$ + +// $[TIMER4] +// [TIMER4]$ + +// $[USART0] +// USART0 CLK on PC03 +#ifndef USART0_CLK_PORT +#define USART0_CLK_PORT SL_GPIO_PORT_C +#endif +#ifndef USART0_CLK_PIN +#define USART0_CLK_PIN 3 +#endif + +// USART0 TX on PC01 +#ifndef USART0_TX_PORT +#define USART0_TX_PORT SL_GPIO_PORT_C +#endif +#ifndef USART0_TX_PIN +#define USART0_TX_PIN 1 +#endif + +// [USART0]$ + +// $[I2C1] +// I2C1 SCL on PC05 +#ifndef I2C1_SCL_PORT +#define I2C1_SCL_PORT SL_GPIO_PORT_C +#endif +#ifndef I2C1_SCL_PIN +#define I2C1_SCL_PIN 5 +#endif + +// I2C1 SDA on PC07 +#ifndef I2C1_SDA_PORT +#define I2C1_SDA_PORT SL_GPIO_PORT_C +#endif +#ifndef I2C1_SDA_PIN +#define I2C1_SDA_PIN 7 +#endif + +// [I2C1]$ + +// $[EUSART1] +// [EUSART1]$ + +// $[KEYSCAN] +// [KEYSCAN]$ + +// $[LETIMER0] +// [LETIMER0]$ + +// $[IADC0] +// [IADC0]$ + +// $[ACMP0] +// [ACMP0]$ + +// $[ACMP1] +// [ACMP1]$ + +// $[VDAC0] +// [VDAC0]$ + +// $[VDAC1] +// [VDAC1]$ + +// $[PCNT0] +// [PCNT0]$ + +// $[HFXO0] +// [HFXO0]$ + +// $[I2C0] +// [I2C0]$ + +// $[EUSART0] +// EUSART0 CTS on PB05 +#ifndef EUSART0_CTS_PORT +#define EUSART0_CTS_PORT SL_GPIO_PORT_B +#endif +#ifndef EUSART0_CTS_PIN +#define EUSART0_CTS_PIN 5 +#endif + +// EUSART0 RTS on PA00 +#ifndef EUSART0_RTS_PORT +#define EUSART0_RTS_PORT SL_GPIO_PORT_A +#endif +#ifndef EUSART0_RTS_PIN +#define EUSART0_RTS_PIN 0 +#endif + +// EUSART0 RX on PA09 +#ifndef EUSART0_RX_PORT +#define EUSART0_RX_PORT SL_GPIO_PORT_A +#endif +#ifndef EUSART0_RX_PIN +#define EUSART0_RX_PIN 9 +#endif + +// EUSART0 TX on PA08 +#ifndef EUSART0_TX_PORT +#define EUSART0_TX_PORT SL_GPIO_PORT_A +#endif +#ifndef EUSART0_TX_PIN +#define EUSART0_TX_PIN 8 +#endif + +// [EUSART0]$ + +// $[PTI] +// PTI DFRAME on PD05 +#ifndef PTI_DFRAME_PORT +#define PTI_DFRAME_PORT SL_GPIO_PORT_D +#endif +#ifndef PTI_DFRAME_PIN +#define PTI_DFRAME_PIN 5 +#endif + +// PTI DOUT on PD04 +#ifndef PTI_DOUT_PORT +#define PTI_DOUT_PORT SL_GPIO_PORT_D +#endif +#ifndef PTI_DOUT_PIN +#define PTI_DOUT_PIN 4 +#endif + +// [PTI]$ + +// $[MODEM] +// [MODEM]$ + +// $[CUSTOM_PIN_NAME] +#ifndef _PORT +#define _PORT SL_GPIO_PORT_A +#endif +#ifndef _PIN +#define _PIN 0 +#endif + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +// [CUSTOM_PIN_NAME]$ + + +#endif // PIN_CONFIG_H + + diff --git a/board-support/efr32/efr32mg24/BRD4186C/config/psa_crypto_config.h b/board-support/efr32/efr32mg24/BRD4186C/config/psa_crypto_config.h index 20703b41d..773ce99e0 100644 --- a/board-support/efr32/efr32mg24/BRD4186C/config/psa_crypto_config.h +++ b/board-support/efr32/efr32mg24/BRD4186C/config/psa_crypto_config.h @@ -27,26 +27,32 @@ // Default: 4 #define SL_PSA_KEY_USER_SLOT_COUNT (4) -// PSA Maximum User Persistent Keys Count <0-1024> +// Maximum User Persistent PSA Key Count <0-1024> // Maximum amount of keys (or other files) that can be stored persistently -// by the application through the PSA interface, when persistent storage -// support for PSA Crypto is included in the project. -// Due to caching logic, this setting does have an impact on static RAM usage. -// Note that this number is added to the potential requirements from other -// software components in the project, such that the total amount of keys -// which can be stored through the ITS backend can be higher than what is -// configured here. +// by the user application, when PSA ITS (Internal Trusted Storage) support +// is included in the project. +// NOTE: +// In addition to SL_PSA_ITS_USER_MAX_FILES (number of user keys) the +// application may be configured to include SDK components that require an +// additional number of keys. The sum of user keys and SDK component keys +// is computed and the result, called SL_PSA_ITS_MAX_FILES, is used +// internally in the PSA ITS driver. // -// WARNING: When changing this setting on an application that is already -// deployed, and thus will get the change through an application upgrade, -// care should be taken to ensure that the setting is only ever increased, -// and never decreased. Decreasing this setting might cause previously -// stored keys/files to become inaccessible. +// WARNING: +// For applications using PSA ITS driver version 1 or 2, when changing the +// SL_PSA_ITS_USER_MAX_FILES in an application that is already depeloyed, +// and thus will get the change through an application upgrade, care should +// be taken to ensure that the total sum of keys SL_PSA_ITS_MAX_FILES is +// only ever equal or increased, and never decreased. Decreasing this +// setting might cause previously stored keys/files to become inaccessible, +// ITS should be cleared and all files need to be stored again. // -// It is not possible to change this setting when using V3 ITS Driver. -// The file-storage indexing is dependent on the maximum number of files, -// and if SL_PSA_ITS_USER_MAX_FILES is changed, ITS should be cleared and -// all files need to be stored again. +// For applications using PSA ITS driver version 3, it is not possible to +// change this setting because the file-storage indexing is dependent on the +// maximum number of files (SL_PSA_ITS_MAX_FILES) being consistent, and if +// the sum of SDK component keys and user keys (SL_PSA_ITS_USER_MAX_FILES) +// is changed, may cause previously stored keys/files to become inaccessible +// ITS should be cleared and all files need to be stored again. // Default: 128 #define SL_PSA_ITS_USER_MAX_FILES (128) diff --git a/board-support/efr32/efr32mg24/BRD4186C/config/sl_bluetooth_config.h b/board-support/efr32/efr32mg24/BRD4186C/config/sl_bluetooth_config.h index 9b6a804e0..93bfbbcc4 100644 --- a/board-support/efr32/efr32mg24/BRD4186C/config/sl_bluetooth_config.h +++ b/board-support/efr32/efr32mg24/BRD4186C/config/sl_bluetooth_config.h @@ -99,6 +99,7 @@ // if the LE Power Control feature is enabled. // When this configuration is passed into stack initialization, the stack // will select the closest value that the device supports. +// API sl_bt_system_set_tx_power() can be used to set the minimum TX power at runtime. // API sl_bt_system_get_tx_power_setting() can be used to query the selected value. #define SL_BT_CONFIG_MIN_TX_POWER (-30) @@ -108,6 +109,7 @@ // advertising, scanning and DTM testing. // When this configuration is passed into stack initialization, the stack // will select the closest value that the device supports. +// API sl_bt_system_set_tx_power() can be used to set the maximum TX power at runtime. // API sl_bt_system_get_tx_power_setting() can be used to query the selected value. #define SL_BT_CONFIG_MAX_TX_POWER (80) diff --git a/board-support/efr32/efr32mg24/BRD4186C/config/sl_board_control_config.h b/board-support/efr32/efr32mg24/BRD4186C/config/sl_board_control_config.h index f63c57de8..f474c7408 100644 --- a/board-support/efr32/efr32mg24/BRD4186C/config/sl_board_control_config.h +++ b/board-support/efr32/efr32mg24/BRD4186C/config/sl_board_control_config.h @@ -55,20 +55,32 @@ // SL_BOARD_ENABLE_VCOM // $[GPIO_SL_BOARD_ENABLE_VCOM] -#define SL_BOARD_ENABLE_VCOM_PORT SL_GPIO_PORT_B -#define SL_BOARD_ENABLE_VCOM_PIN 0 +#ifndef SL_BOARD_ENABLE_VCOM_PORT +#define SL_BOARD_ENABLE_VCOM_PORT SL_GPIO_PORT_B +#endif +#ifndef SL_BOARD_ENABLE_VCOM_PIN +#define SL_BOARD_ENABLE_VCOM_PIN 0 +#endif // [GPIO_SL_BOARD_ENABLE_VCOM]$ // SL_BOARD_ENABLE_DISPLAY // $[GPIO_SL_BOARD_ENABLE_DISPLAY] -#define SL_BOARD_ENABLE_DISPLAY_PORT SL_GPIO_PORT_C -#define SL_BOARD_ENABLE_DISPLAY_PIN 9 +#ifndef SL_BOARD_ENABLE_DISPLAY_PORT +#define SL_BOARD_ENABLE_DISPLAY_PORT SL_GPIO_PORT_C +#endif +#ifndef SL_BOARD_ENABLE_DISPLAY_PIN +#define SL_BOARD_ENABLE_DISPLAY_PIN 9 +#endif // [GPIO_SL_BOARD_ENABLE_DISPLAY]$ // SL_BOARD_ENABLE_SENSOR_RHT // $[GPIO_SL_BOARD_ENABLE_SENSOR_RHT] -#define SL_BOARD_ENABLE_SENSOR_RHT_PORT SL_GPIO_PORT_D -#define SL_BOARD_ENABLE_SENSOR_RHT_PIN 3 +#ifndef SL_BOARD_ENABLE_SENSOR_RHT_PORT +#define SL_BOARD_ENABLE_SENSOR_RHT_PORT SL_GPIO_PORT_D +#endif +#ifndef SL_BOARD_ENABLE_SENSOR_RHT_PIN +#define SL_BOARD_ENABLE_SENSOR_RHT_PIN 3 +#endif // [GPIO_SL_BOARD_ENABLE_SENSOR_RHT]$ // <<< sl:end pin_tool >>> diff --git a/board-support/efr32/efr32mg24/BRD4186C/config/sl_btctrl_config.h b/board-support/efr32/efr32mg24/BRD4186C/config/sl_btctrl_config.h index ed75a2d0e..403df1ffe 100644 --- a/board-support/efr32/efr32mg24/BRD4186C/config/sl_btctrl_config.h +++ b/board-support/efr32/efr32mg24/BRD4186C/config/sl_btctrl_config.h @@ -146,15 +146,27 @@ #define SL_BT_CONTROLLER_ADAPTIVITY_MODE (SL_BTCTRL_CHANNELMAP_FLAG_ACTIVE_ADAPTIVITY) #endif -// Power Amplifier (PA) Configuration -// Automode PA configuration -// Highest available PA configuration -// RAIL Utility component PA configuration -// Select the Power Amplifier configuration -// Default: RAIL Utility component PA configuration -#ifndef SL_BT_CONTROLLER_PA_CONFIG -#define SL_BT_CONTROLLER_PA_CONFIG SL_BT_BLUETOOTH_RAIL_UTIL_PA -#endif +// Advertising Configuration +// Include TX Power in the extended header of primary extended advertising packets +// This is default setting to all advertising sets unless it is specifically overridden by VS_SiliconLabs_Set_Advertising_Config_Bits. +// Default: 0 +// Enabling this option takes effect only if permitted by Le_Set_Extended_Advertising_Parameters +// According to Link Layer specification, Vol 6, Part B, Table 2.4 and Table 2.5: +// Optional in 1M PHY when the advertiser is connectable or scannable, or with auxiliary pointer. +// In other cases, the Extended Advertising TX Power is always optional by settings. +#define SL_BT_CONTROLLER_PRIMARY_EXT_PACKET_INCLUDE_TX_POWER (0) +// +// Include Advertiser Address in the header of primary extended advertising packets +// This is default setting to all advertising sets unless it is specifically overridden by VS_SiliconLabs_Set_Advertising_Config_Bits. +// Default: 0 +// Enabling this option takes effect only if permitted by Le_Set_Extended_Advertising_Parameters +// According to Link Layer specification, Vol 6, Part B, Table 2.4 and Table 2.5: +// Optional in 1M PHY when the advertiser is non-connectable and non-scannable, with auxiliary pointer. +// Mandatory when the advertiser is non-connectable and non-scannable, without auxiliary pointer. +// Forbidden when the advertiser is connectable or scannable. +#define SL_BT_CONTROLLER_PRIMARY_EXT_PACKET_INCLUDE_ADDRESS (0) +// +// Advertising Configuration // Bluetooth Controller Configuration // <<< end of configuration section >>> diff --git a/board-support/efr32/efr32mg24/BRD4186C/config/sl_clock_manager_tree_config.h b/board-support/efr32/efr32mg24/BRD4186C/config/sl_clock_manager_tree_config.h index 8c0be95e9..1f6f2a089 100644 --- a/board-support/efr32/efr32mg24/BRD4186C/config/sl_clock_manager_tree_config.h +++ b/board-support/efr32/efr32mg24/BRD4186C/config/sl_clock_manager_tree_config.h @@ -105,9 +105,9 @@ #endif // PCLK branch divider -// MIN // DIV1 // DIV2 +// MIN // PCLK branch is derived from HCLK. This clock drives the APB bus interface. // SL_CLOCK_MANAGER_PCLK_DIV_MIN #ifndef SL_CLOCK_MANAGER_PCLK_DIVIDER diff --git a/board-support/efr32/efr32mg24/BRD4186C/config/sl_i2cspm_sensor_config.h b/board-support/efr32/efr32mg24/BRD4186C/config/sl_i2cspm_sensor_config.h index 03c4886d4..9804ead6f 100644 --- a/board-support/efr32/efr32mg24/BRD4186C/config/sl_i2cspm_sensor_config.h +++ b/board-support/efr32/efr32mg24/BRD4186C/config/sl_i2cspm_sensor_config.h @@ -54,17 +54,28 @@ // <<< sl:start pin_tool >>> // SL_I2CSPM_SENSOR // $[I2C_SL_I2CSPM_SENSOR] +#ifndef SL_I2CSPM_SENSOR_PERIPHERAL #define SL_I2CSPM_SENSOR_PERIPHERAL I2C1 +#endif +#ifndef SL_I2CSPM_SENSOR_PERIPHERAL_NO #define SL_I2CSPM_SENSOR_PERIPHERAL_NO 1 +#endif // I2C1 SCL on PC05 +#ifndef SL_I2CSPM_SENSOR_SCL_PORT #define SL_I2CSPM_SENSOR_SCL_PORT SL_GPIO_PORT_C +#endif +#ifndef SL_I2CSPM_SENSOR_SCL_PIN #define SL_I2CSPM_SENSOR_SCL_PIN 5 +#endif // I2C1 SDA on PC07 +#ifndef SL_I2CSPM_SENSOR_SDA_PORT #define SL_I2CSPM_SENSOR_SDA_PORT SL_GPIO_PORT_C +#endif +#ifndef SL_I2CSPM_SENSOR_SDA_PIN #define SL_I2CSPM_SENSOR_SDA_PIN 7 - +#endif // [I2C_SL_I2CSPM_SENSOR]$ // <<< sl:end pin_tool >>> diff --git a/board-support/efr32/efr32mg24/BRD4186C/config/sl_mbedtls_config.h b/board-support/efr32/efr32mg24/BRD4186C/config/sl_mbedtls_config.h index e249b4d1b..7146ba648 100644 --- a/board-support/efr32/efr32mg24/BRD4186C/config/sl_mbedtls_config.h +++ b/board-support/efr32/efr32mg24/BRD4186C/config/sl_mbedtls_config.h @@ -71,9 +71,14 @@ // Default: 1 // This option is enabled assuming all buffers passed to any PSA function reside // in memory that is accessible only to the PSA function during its execution. +// This improves performance by avoiding extra buffer copies, reducing memory +// usage and allocation overhead. However, it is NOT the most secure option and +// should only be enabled if all buffers passed to PSA functions are exclusively +// accessible to PSA and never shared with untrusted code. // This option MUST be disabled whenever buffer arguments are in memory shared // with an untrusted party, for example where arguments to PSA calls are passed -// across a trust boundary. +// across a trust boundary, e.g. if TrustZone is enabled, and the PSA Crypto core +// is placed in the Secure domain. #define SL_MBEDTLS_PSA_ASSUME_EXCLUSIVE_BUFFERS 1 // diff --git a/board-support/efr32/efr32mg24/BRD4186C/config/sl_memlcd_usart_config.h b/board-support/efr32/efr32mg24/BRD4186C/config/sl_memlcd_usart_config.h index 81f6b8bfc..4adde175a 100644 --- a/board-support/efr32/efr32mg24/BRD4186C/config/sl_memlcd_usart_config.h +++ b/board-support/efr32/efr32mg24/BRD4186C/config/sl_memlcd_usart_config.h @@ -34,31 +34,48 @@ // <<< sl:start pin_tool >>> // SL_MEMLCD_SPI // $[USART_SL_MEMLCD_SPI] +#ifndef SL_MEMLCD_SPI_PERIPHERAL #define SL_MEMLCD_SPI_PERIPHERAL USART0 +#endif +#ifndef SL_MEMLCD_SPI_PERIPHERAL_NO #define SL_MEMLCD_SPI_PERIPHERAL_NO 0 +#endif // USART0 TX on PC01 +#ifndef SL_MEMLCD_SPI_TX_PORT #define SL_MEMLCD_SPI_TX_PORT SL_GPIO_PORT_C +#endif +#ifndef SL_MEMLCD_SPI_TX_PIN #define SL_MEMLCD_SPI_TX_PIN 1 +#endif // USART0 CLK on PC03 +#ifndef SL_MEMLCD_SPI_CLK_PORT #define SL_MEMLCD_SPI_CLK_PORT SL_GPIO_PORT_C +#endif +#ifndef SL_MEMLCD_SPI_CLK_PIN #define SL_MEMLCD_SPI_CLK_PIN 3 - +#endif // [USART_SL_MEMLCD_SPI]$ // SL_MEMLCD_SPI_CS // $[GPIO_SL_MEMLCD_SPI_CS] +#ifndef SL_MEMLCD_SPI_CS_PORT #define SL_MEMLCD_SPI_CS_PORT SL_GPIO_PORT_C +#endif +#ifndef SL_MEMLCD_SPI_CS_PIN #define SL_MEMLCD_SPI_CS_PIN 8 - +#endif // [GPIO_SL_MEMLCD_SPI_CS]$ // SL_MEMLCD_EXTCOMIN // $[GPIO_SL_MEMLCD_EXTCOMIN] +#ifndef SL_MEMLCD_EXTCOMIN_PORT #define SL_MEMLCD_EXTCOMIN_PORT SL_GPIO_PORT_C +#endif +#ifndef SL_MEMLCD_EXTCOMIN_PIN #define SL_MEMLCD_EXTCOMIN_PIN 6 - +#endif // [GPIO_SL_MEMLCD_EXTCOMIN]$ // <<< sl:end pin_tool >>> diff --git a/board-support/efr32/efr32mg24/BRD4186C/config/sl_memory_manager_config.h b/board-support/efr32/efr32mg24/BRD4186C/config/sl_memory_manager_config.h index 26b84b107..4a16c29fe 100644 --- a/board-support/efr32/efr32mg24/BRD4186C/config/sl_memory_manager_config.h +++ b/board-support/efr32/efr32mg24/BRD4186C/config/sl_memory_manager_config.h @@ -51,4 +51,11 @@ // <<< end of configuration section >>> +// Keep this configuration outside the configuration section until the feature is ready for release. +// Enables the heap fallback mechanism. +// Setting this configuration to 0 will disable the fallback mechanism on DTCM and PSRAM. +// If this configuration is disabled, the memory manager will not attempt to use alternative memory regions for allocations even if using the fallback parameters. +// Default: 1 +#define SL_MEMORY_MANAGER_HEAP_FALLBACK_EN 1 + #endif /* SL_MEMORY_MANAGER_CONFIG_H */ diff --git a/board-support/efr32/efr32mg24/BRD4186C/config/sl_mx25_flash_shutdown_usart_config.h b/board-support/efr32/efr32mg24/BRD4186C/config/sl_mx25_flash_shutdown_usart_config.h index 34b849d39..90f3faedd 100644 --- a/board-support/efr32/efr32mg24/BRD4186C/config/sl_mx25_flash_shutdown_usart_config.h +++ b/board-support/efr32/efr32mg24/BRD4186C/config/sl_mx25_flash_shutdown_usart_config.h @@ -54,9 +54,12 @@ // SL_MX25_FLASH_SHUTDOWN_CS // $[GPIO_SL_MX25_FLASH_SHUTDOWN_CS] +#ifndef SL_MX25_FLASH_SHUTDOWN_CS_PORT #define SL_MX25_FLASH_SHUTDOWN_CS_PORT SL_GPIO_PORT_C +#endif +#ifndef SL_MX25_FLASH_SHUTDOWN_CS_PIN #define SL_MX25_FLASH_SHUTDOWN_CS_PIN 4 - +#endif // [GPIO_SL_MX25_FLASH_SHUTDOWN_CS]$ // <<< sl:end pin_tool >>> diff --git a/board-support/efr32/efr32mg24/BRD4186C/config/sl_openthread_features_config.h b/board-support/efr32/efr32mg24/BRD4186C/config/sl_openthread_features_config.h index 22340498d..a3697f8af 100644 --- a/board-support/efr32/efr32mg24/BRD4186C/config/sl_openthread_features_config.h +++ b/board-support/efr32/efr32mg24/BRD4186C/config/sl_openthread_features_config.h @@ -65,6 +65,7 @@ #define OPENTHREAD_CONFIG_MAC_CSL_RECEIVER_ENABLE 1 #endif // CSL Scheduling Uncertainty (±10 us units) <12..999:1> +// Left unchanged the value will be set to 175 for RCPs, 20 for FTDs, and 12 for MTDs #ifndef SL_OPENTHREAD_CSL_TX_UNCERTAINTY #if OPENTHREAD_RADIO #define SL_OPENTHREAD_CSL_TX_UNCERTAINTY 175 @@ -142,12 +143,10 @@ #define OPENTHREAD_CONFIG_CHANNEL_MONITOR_ENABLE 0 #endif // - -// Commissioner +// Commissioner #ifndef OPENTHREAD_CONFIG_COMMISSIONER_ENABLE #define OPENTHREAD_CONFIG_COMMISSIONER_ENABLE 0 #endif - // Max Joiner Entries // The maximum number of Joiner entries maintained by the Commissioner. // 2 @@ -155,7 +154,6 @@ #define OPENTHREAD_CONFIG_COMMISSIONER_MAX_JOINER_ENTRIES 2 #endif // - // COAP API #ifndef OPENTHREAD_CONFIG_COAP_API_ENABLE #define OPENTHREAD_CONFIG_COAP_API_ENABLE 0 @@ -171,6 +169,11 @@ #define OPENTHREAD_CONFIG_COAP_SECURE_API_ENABLE 0 #endif // +// COAP Blockwise Transfer +#ifndef OPENTHREAD_CONFIG_COAP_BLOCKWISE_TRANSFER_ENABLE +#define OPENTHREAD_CONFIG_COAP_BLOCKWISE_TRANSFER_ENABLE 0 +#endif +// // DHCP6 Client #ifndef OPENTHREAD_CONFIG_DHCP6_CLIENT_ENABLE #define OPENTHREAD_CONFIG_DHCP6_CLIENT_ENABLE 0 @@ -196,16 +199,27 @@ #define OPENTHREAD_CONFIG_IP6_FRAGMENTATION_ENABLE 0 #endif // -// Maximum number of IPv6 unicast addresses allowed to be externally added +// IPv6 Limits +// Maximum IPv6 external unicast addresses +// Maximum number of IPv6 unicast addresses allowed to be externally added +// 4 #ifndef OPENTHREAD_CONFIG_IP6_MAX_EXT_UCAST_ADDRS #define OPENTHREAD_CONFIG_IP6_MAX_EXT_UCAST_ADDRS 4 #endif -// -// Maximum number of IPv6 multicast addresses allowed to be externally added +// Maximum IPv6 external multicast addresses +// Maximum number of IPv6 multicast addresses allowed to be externally added +// 4 #ifndef OPENTHREAD_CONFIG_IP6_MAX_EXT_MCAST_ADDRS #define OPENTHREAD_CONFIG_IP6_MAX_EXT_MCAST_ADDRS 4 #endif -// +// Maximum IPv6 address registrations for MTD +// The maximum number of IPv6 address registrations for MTD. +// If left unchanged will default to the value of OPENTHREAD_CONFIG_MLE_IP_ADDRS_PER_CHILD +// 4 +#ifndef OPENTHREAD_CONFIG_MLE_IP_ADDRS_TO_REGISTER +#define OPENTHREAD_CONFIG_MLE_IP_ADDRS_TO_REGISTER (OPENTHREAD_CONFIG_MLE_IP_ADDRS_PER_CHILD) +#endif +// // Jam Detection #ifndef OPENTHREAD_CONFIG_JAM_DETECTION_ENABLE #define OPENTHREAD_CONFIG_JAM_DETECTION_ENABLE 0 @@ -226,6 +240,14 @@ #define OPENTHREAD_CONFIG_MAC_FILTER_ENABLE 0 #endif // +// MLE Children +// Maximum number of Thread children supported by the device +// Default is 10. Used by the Thread stack to configure the size of child table. +// 10 +#ifndef OPENTHREAD_CONFIG_MLE_MAX_CHILDREN +#define OPENTHREAD_CONFIG_MLE_MAX_CHILDREN 10 +#endif +// // MLE Long Routes extension (experimental) #ifndef OPENTHREAD_CONFIG_MLE_LONG_ROUTES_ENABLE #define OPENTHREAD_CONFIG_MLE_LONG_ROUTES_ENABLE 0 @@ -235,27 +257,66 @@ #ifndef OPENTHREAD_CONFIG_MULTIPAN_RCP_ENABLE #define OPENTHREAD_CONFIG_MULTIPAN_RCP_ENABLE 0 #endif +// Broadcast IID for spinel frames +// Define broadcast IID for spinel frames dedicated to all hosts in multipan configuration +// 0 +#ifndef OPENTHREAD_SPINEL_CONFIG_BROADCAST_IID +#define OPENTHREAD_SPINEL_CONFIG_BROADCAST_IID 0 +#endif +#if OPENTHREAD_CONFIG_MULTIPAN_RCP_ENABLE +// Maximum number of Zigbee children for multiprotocol (DMP) builds +// Ensures correct table sizing for Zigbee when DMP/multipan is enabled. +// 6 +#ifndef SL_ZIGBEE_MAX_END_DEVICE_CHILDREN +#define SL_ZIGBEE_MAX_END_DEVICE_CHILDREN 6 +#endif +#endif // // Multiple OpenThread Instances #ifndef OPENTHREAD_CONFIG_MULTIPLE_INSTANCE_ENABLE #define OPENTHREAD_CONFIG_MULTIPLE_INSTANCE_ENABLE 0 #endif -// // Multiple Static Instance Support #ifndef OPENTHREAD_CONFIG_MULTIPLE_STATIC_INSTANCE_ENABLE #define OPENTHREAD_CONFIG_MULTIPLE_STATIC_INSTANCE_ENABLE 0 #endif -// -// Number of OpenThread Instances For Static Buffer Allocation +// Number of OpenThread Instances +// Default is 2. Number of OpenThread Instances For Static Buffer Allocation. +// 2 #ifndef OPENTHREAD_CONFIG_MULTIPLE_INSTANCE_NUM #define OPENTHREAD_CONFIG_MULTIPLE_INSTANCE_NUM 2 #endif // -// Define broadcast IID for spinel frames dedicated to all hosts in multipan configuration -#ifndef OPENTHREAD_SPINEL_CONFIG_BROADCAST_IID -#define OPENTHREAD_SPINEL_CONFIG_BROADCAST_IID 0 -#endif // +// Define maximum total source match table entries for both OT and Zigbee. +// In multi-instance builds (SoC or RCP/host), table must support all OT instances + Zigbee. +// For single instance (default), table sized to just OT children. +// This value is used to size all source match tables in both OT and Zigbee code. +// Note: this is purposedly not being setup with CMSIS annotations. +#ifndef RADIO_CONFIG_MAX_SRC_MATCH_ENTRIES +#if OPENTHREAD_CONFIG_MULTIPLE_INSTANCE_ENABLE +#if SL_ZIGBEE_MAX_END_DEVICE_CHILDREN +// Multipan / DMP case: OT + Zigbee +#define RADIO_CONFIG_MAX_SRC_MATCH_ENTRIES \ + ((OPENTHREAD_CONFIG_MLE_MAX_CHILDREN * (OPENTHREAD_CONFIG_MULTIPLE_INSTANCE_NUM - 1)) \ + + SL_ZIGBEE_MAX_END_DEVICE_CHILDREN) +#else +// Multi-instance OT-only case +#define RADIO_CONFIG_MAX_SRC_MATCH_ENTRIES \ + (OPENTHREAD_CONFIG_MLE_MAX_CHILDREN * OPENTHREAD_CONFIG_MULTIPLE_INSTANCE_NUM) +#endif +#else +// Single-instance OT (SoC / NCP / non-multipan RCP) +#define RADIO_CONFIG_MAX_SRC_MATCH_ENTRIES OPENTHREAD_CONFIG_MLE_MAX_CHILDREN +#endif +#endif +// Spinel Match Table +// Maximum number of spinel source match table entries +// Ensure that this value is the total of the number of openthread children times the number of openthread instances plus the number of Zigbee children. +#ifndef OPENTHREAD_SPINEL_CONFIG_MAX_SRC_MATCH_ENTRIES +#define OPENTHREAD_SPINEL_CONFIG_MAX_SRC_MATCH_ENTRIES RADIO_CONFIG_MAX_SRC_MATCH_ENTRIES +#endif +// // OTNS (OpenThread Network Simulator) #ifndef OPENTHREAD_CONFIG_OTNS_ENABLE #define OPENTHREAD_CONFIG_OTNS_ENABLE 0 @@ -265,13 +326,23 @@ #ifndef OPENTHREAD_CONFIG_PING_SENDER_ENABLE #define OPENTHREAD_CONFIG_PING_SENDER_ENABLE 1 #endif - // // Power Calibration Module (RCP only configuration) #ifndef OPENTHREAD_CONFIG_POWER_CALIBRATION_ENABLE #define OPENTHREAD_CONFIG_POWER_CALIBRATION_ENABLE 0 #endif - +// Maximum raw power calibration length +// Max raw power calibration length +// 4 +#ifndef SL_OPENTHREAD_RAW_POWER_CALIBRATION_LENGTH +#define SL_OPENTHREAD_RAW_POWER_CALIBRATION_LENGTH 4 +#endif +// Maximum FEM config setting length +// Max FEM config setting length +// 4 +#ifndef SL_OPENTHREAD_FEM_SETTING_LENGTH +#define SL_OPENTHREAD_FEM_SETTING_LENGTH 4 +#endif // // Platform UDP #ifndef OPENTHREAD_CONFIG_PLATFORM_UDP_ENABLE @@ -309,7 +380,14 @@ #endif // // Time Synchronization Service +#ifndef OPENTHREAD_CONFIG_TIME_SYNC_ENABLE #define OPENTHREAD_CONFIG_TIME_SYNC_ENABLE 0 +#endif +// +// Uptime of OpenThread instance +#ifndef OPENTHREAD_CONFIG_UPTIME_ENABLE +#define OPENTHREAD_CONFIG_UPTIME_ENABLE 1 +#endif // // UDP Forward #ifndef OPENTHREAD_CONFIG_UDP_FORWARD_ENABLE @@ -321,28 +399,22 @@ #define OPENTHREAD_CONFIG_MAC_BEACON_PAYLOAD_PARSING_ENABLE 1 #endif // -// Max raw power calibration length. -#ifndef SL_OPENTHREAD_RAW_POWER_CALIBRATION_LENGTH -#define SL_OPENTHREAD_RAW_POWER_CALIBRATION_LENGTH 4 -#endif -// -// Max FEM config setting length. -#ifndef SL_OPENTHREAD_FEM_SETTING_LENGTH -#define SL_OPENTHREAD_FEM_SETTING_LENGTH 4 -#endif -// -// The maximum number of RX buffers to use in the radio driver. -// 16 +// Radio Driver RX buffers +// Maximum number of RX buffers +// The maximum number of RX buffers to use in the radio driver. +// 16 #ifndef SL_OPENTHREAD_RADIO_RX_BUFFER_COUNT #define SL_OPENTHREAD_RADIO_RX_BUFFER_COUNT 16 #endif // +// // Logging // LOG_OUTPUT // NONE // APP // PLATFORM_DEFINED -// Default: OPENTHREAD_CONFIG_LOG_OUTPUT_PLATFORM_DEFINED +// Default: OPENTHREAD_CONFIG_LOG_OUTPUT_APP +// OPENTHREAD_CONFIG_LOG_OUTPUT_APP #ifndef OPENTHREAD_CONFIG_LOG_OUTPUT #define OPENTHREAD_CONFIG_LOG_OUTPUT OPENTHREAD_CONFIG_LOG_OUTPUT_APP #endif @@ -365,6 +437,7 @@ // INFO // DEBG // Default: OT_LOG_LEVEL_DEBG +// OT_LOG_LEVEL_DEBG #ifndef OPENTHREAD_CONFIG_LOG_LEVEL #define OPENTHREAD_CONFIG_LOG_LEVEL OT_LOG_LEVEL_DEBG #endif @@ -387,11 +460,10 @@ #endif // OPENTHREAD_FULL_LOGS_ENABLE -// Log crash dump after initialization +// Log crash dump after initialization #ifndef OPENTHREAD_CONFIG_PLATFORM_LOG_CRASH_DUMP_ENABLE #define OPENTHREAD_CONFIG_PLATFORM_LOG_CRASH_DUMP_ENABLE 0 #endif -// // // diff --git a/board-support/efr32/efr32mg24/BRD4186C/config/sl_power_manager_config.h b/board-support/efr32/efr32mg24/BRD4186C/config/sl_power_manager_config.h index 3c240b843..86b9fef27 100644 --- a/board-support/efr32/efr32mg24/BRD4186C/config/sl_power_manager_config.h +++ b/board-support/efr32/efr32mg24/BRD4186C/config/sl_power_manager_config.h @@ -37,24 +37,40 @@ // Enable custom IRQ handler for external HF oscillator. // Enable if CMU_IRQHandler/HFXO0_IRQHandler is needed from your application. -// The function sl_power_manager_irq_handler() will have to be called from you custom handler if this is enabled. +// The function sl_power_manager_irq_handler() will have to be called from your custom handler if this is enabled. // Default: 0 +#ifndef SL_POWER_MANAGER_CUSTOM_HF_OSCILLATOR_IRQ_HANDLER #define SL_POWER_MANAGER_CUSTOM_HF_OSCILLATOR_IRQ_HANDLER 0 +#endif // Enable fast wakeup (disable voltage scaling in EM2/3 mode) // Enable or disable voltage scaling in EM2/3 modes (when available). This decreases wakeup time by about 30 us. // Deprecated. It is replaced by the function sl_power_manager_em23_voltage_scaling_enable_fast_wakeup() // Default: 0 +#ifndef SL_POWER_MANAGER_CONFIG_VOLTAGE_SCALING_FAST_WAKEUP #define SL_POWER_MANAGER_CONFIG_VOLTAGE_SCALING_FAST_WAKEUP 0 +#endif + +// Enable voltage scaling in EM0 and EM1 mode. +// Enable or disable voltage scaling in EM0/1 modes. With this config enabled, the voltage +// scaling will be configured at the lowest possible level based on the system clock. +// Default: 0 +#ifndef SL_POWER_MANAGER_ENABLE_EM01_VOLTAGE_SCALING +#define SL_POWER_MANAGER_ENABLE_EM01_VOLTAGE_SCALING 0 +#endif // Enable debugging feature // Enable or disable debugging features (trace the different modules that have requirements). // Default: 0 +#ifndef SL_POWER_MANAGER_DEBUG #define SL_POWER_MANAGER_DEBUG 0 +#endif // Maximum numbers of requirements that can be logged // Default: 10 +#ifndef SL_POWER_MANAGER_DEBUG_POOL_SIZE #define SL_POWER_MANAGER_DEBUG_POOL_SIZE 10 +#endif // // Pin retention mode @@ -63,14 +79,18 @@ // Retention through EM4 // Retention through EM4 and wakeup // power_manager_pin_retention_disable +#ifndef SL_POWER_MANAGER_INIT_EMU_EM4_PIN_RETENTION_MODE #define SL_POWER_MANAGER_INIT_EMU_EM4_PIN_RETENTION_MODE EMU_EM4CTRL_EM4IORETMODE_DISABLE +#endif // Enable EM2 debugging feature // Enable or disable debugging features. // Force PD0B/PD0D to stay on during EM2 entry. This allows the debugger to remain connected in EM2 and EM3. // Enabling debug connectivity results in an increased power consumption in EM2/EM3. // Default: 1 +#ifndef SL_POWER_MANAGER_INIT_EMU_EM2_DEBUG_ENABLE #define SL_POWER_MANAGER_INIT_EMU_EM2_DEBUG_ENABLE 1 +#endif // // diff --git a/board-support/efr32/efr32mg24/BRD4186C/config/sl_rail_util_pa_tables_config.h b/board-support/efr32/efr32mg24/BRD4186C/config/sl_rail_util_pa_tables_config.h new file mode 100644 index 000000000..bd05ea57d --- /dev/null +++ b/board-support/efr32/efr32mg24/BRD4186C/config/sl_rail_util_pa_tables_config.h @@ -0,0 +1,49 @@ +/***************************************************************************//** + * @file + * @brief PA Tables configuration file. + ******************************************************************************* + * # License + * Copyright 2025 Silicon Laboratories Inc. www.silabs.com + ******************************************************************************* + * + * SPDX-License-Identifier: Zlib + * + * The licensor of this software is Silicon Laboratories Inc. + * + * This software is provided 'as-is', without any express or implied + * warranty. In no event will the authors be held liable for any damages + * arising from the use of this software. + * + * Permission is granted to anyone to use this software for any purpose, + * including commercial applications, and to alter it and redistribute it + * freely, subject to the following restrictions: + * + * 1. The origin of this software must not be misrepresented; you must not + * claim that you wrote the original software. If you use this software + * in a product, an acknowledgment in the product documentation would be + * appreciated but is not required. + * 2. Altered source versions must be plainly marked as such, and must not be + * misrepresented as being the original software. + * 3. This notice may not be removed or altered from any source distribution. + * + ******************************************************************************/ + +#ifndef SL_RAIL_UTIL_PA_TABLES_CONFIG_H +#define SL_RAIL_UTIL_PA_TABLES_CONFIG_H + +// <<< Use Configuration Wizard in Context Menu >>> + +// PA Table Configuration +// PA Table Selection +// <"sl_rail_util_pa_dbm_powersetting_mapping_table_10dbm.h"=> 10dBm PA powersetting mapping table +// <"sl_rail_util_pa_dbm_powersetting_mapping_table_0dbm.h"=> 0dBm PA powersetting mapping table +// <"sl_rail_util_pa_dbm_powersetting_mapping_table_automode_0_10dbm.h"=> 0dBm-10dBm automode PA powersetting mapping table +// Default: "sl_rail_util_pa_dbm_powersetting_mapping_table_automode_0_10dbm.h" +#define SL_RAIL_UTIL_PA_TABLE_HEADER "sl_rail_util_pa_dbm_powersetting_mapping_table_automode_0_10dbm.h" +// + +// <<< end of configuration section >>> + +#include SL_RAIL_UTIL_PA_TABLE_HEADER + +#endif // SL_RAIL_UTIL_PA_TABLES_CONFIG_H diff --git a/board-support/efr32/efr32mg24/BRD4186C/config/sl_rail_util_pti_config.h b/board-support/efr32/efr32mg24/BRD4186C/config/sl_rail_util_pti_config.h index bdd36734c..736b91558 100644 --- a/board-support/efr32/efr32mg24/BRD4186C/config/sl_rail_util_pti_config.h +++ b/board-support/efr32/efr32mg24/BRD4186C/config/sl_rail_util_pti_config.h @@ -35,12 +35,12 @@ // PTI Configuration // PTI mode -// UART -// UART onewire -// SPI -// Disabled -// Default: RAIL_PTI_MODE_UART -#define SL_RAIL_UTIL_PTI_MODE RAIL_PTI_MODE_UART +// UART +// UART onewire +// SPI +// Disabled +// Default: SL_RAIL_PTI_MODE_UART +#define SL_RAIL_UTIL_PTI_MODE SL_RAIL_PTI_MODE_UART // PTI Baud Rate (Hertz) // <147800-20000000:1> diff --git a/board-support/efr32/efr32mg24/BRD4186C/config/sl_simple_button_btn0_config.h b/board-support/efr32/efr32mg24/BRD4186C/config/sl_simple_button_btn0_config.h index 23e27379c..552aa94c9 100644 --- a/board-support/efr32/efr32mg24/BRD4186C/config/sl_simple_button_btn0_config.h +++ b/board-support/efr32/efr32mg24/BRD4186C/config/sl_simple_button_btn0_config.h @@ -48,9 +48,12 @@ // SL_SIMPLE_BUTTON_BTN0 // $[GPIO_SL_SIMPLE_BUTTON_BTN0] +#ifndef SL_SIMPLE_BUTTON_BTN0_PORT #define SL_SIMPLE_BUTTON_BTN0_PORT SL_GPIO_PORT_B +#endif +#ifndef SL_SIMPLE_BUTTON_BTN0_PIN #define SL_SIMPLE_BUTTON_BTN0_PIN 1 - +#endif // [GPIO_SL_SIMPLE_BUTTON_BTN0]$ // <<< sl:end pin_tool >>> diff --git a/board-support/efr32/efr32mg24/BRD4186C/config/sl_simple_button_btn1_config.h b/board-support/efr32/efr32mg24/BRD4186C/config/sl_simple_button_btn1_config.h index 928a4d5c2..1df1ce0a1 100644 --- a/board-support/efr32/efr32mg24/BRD4186C/config/sl_simple_button_btn1_config.h +++ b/board-support/efr32/efr32mg24/BRD4186C/config/sl_simple_button_btn1_config.h @@ -48,9 +48,12 @@ // SL_SIMPLE_BUTTON_BTN1 // $[GPIO_SL_SIMPLE_BUTTON_BTN1] +#ifndef SL_SIMPLE_BUTTON_BTN1_PORT #define SL_SIMPLE_BUTTON_BTN1_PORT SL_GPIO_PORT_B +#endif +#ifndef SL_SIMPLE_BUTTON_BTN1_PIN #define SL_SIMPLE_BUTTON_BTN1_PIN 3 - +#endif // [GPIO_SL_SIMPLE_BUTTON_BTN1]$ // <<< sl:end pin_tool >>> diff --git a/board-support/efr32/efr32mg24/BRD4187A/autogen/sl_bluetooth.c b/board-support/efr32/efr32mg24/BRD4187A/autogen/sl_bluetooth.c index 4cac19436..0a5f1a969 100644 --- a/board-support/efr32/efr32mg24/BRD4187A/autogen/sl_bluetooth.c +++ b/board-support/efr32/efr32mg24/BRD4187A/autogen/sl_bluetooth.c @@ -30,6 +30,8 @@ #include #include "sl_bluetooth.h" +#include "sli_bt_api.h" +#include "sli_bgapi.h" #include "sl_assert.h" #include "sl_bt_stack_init.h" #include "sl_component_catalog.h" @@ -68,17 +70,23 @@ void sl_bt_step(void) { sl_bt_msg_t evt; + // Run the Bluetooth host stack processing step sl_bt_run(); - uint32_t event_len = sl_bt_event_pending_len(); - // For preventing from data loss, the event will be kept in the stack's queue - // if application cannot process it at the moment. + + // Check the length of the next event, if any, and verify that the application + // can process it. To prevent data loss, the event will be kept in the stack's + // queue if the application cannot process it at the moment. + size_t event_len = sli_bgapi_device_peek_event_len(&sli_bt_bgapi_device); if ((event_len == 0) || (!sl_bt_can_process_event(event_len))) { return; } - // Pop (non-blocking) a Bluetooth stack event from event queue. - sl_status_t status = sl_bt_pop_event(&evt); - if(status != SL_STATUS_OK){ + // Pop the event and process it if successful + sl_status_t status = sli_bgapi_device_pop_event(&sli_bt_bgapi_device, + sizeof(evt), + &evt); + + if (status != SL_STATUS_OK) { return; } sl_bt_process_event(&evt); diff --git a/board-support/efr32/efr32mg24/BRD4187A/autogen/sl_component_catalog.h b/board-support/efr32/efr32mg24/BRD4187A/autogen/sl_component_catalog.h index 85cd79cb7..fb05f93bb 100644 --- a/board-support/efr32/efr32mg24/BRD4187A/autogen/sl_component_catalog.h +++ b/board-support/efr32/efr32mg24/BRD4187A/autogen/sl_component_catalog.h @@ -3,6 +3,7 @@ // APIs present in project #define SL_CATALOG_BGAPI_PROTOCOL_PRESENT +#define SL_CATALOG_BGAPI_PROTOCOL_RTOS_ADAPTATION_PRESENT #define SL_CATALOG_BLUETOOTH_CONFIGURATION_PRESENT #define SL_CATALOG_BLUETOOTH_CTE_SUPPORT_PRESENT #define SL_CATALOG_BLUETOOTH_CS_SUPPORT_PRESENT @@ -24,7 +25,6 @@ #define SL_CATALOG_CMSIS_OS_COMMON_PRESENT #define SL_CATALOG_CPP_SUPPORT_PRESENT #define SL_CATALOG_DEVICE_INIT_PRESENT -#define SL_CATALOG_DEVICE_INIT_CORE_PRESENT #define SL_CATALOG_DEVICE_INIT_DCDC_PRESENT #define SL_CATALOG_EMLIB_CORE_PRESENT #define SL_CATALOG_EMLIB_RMU_PRESENT @@ -33,6 +33,7 @@ #define SL_CATALOG_GATT_CONFIGURATION_PRESENT #define SL_CATALOG_GPIO_PRESENT #define SL_CATALOG_GPIOINTERRUPT_PRESENT +#define SL_CATALOG_HAL_SYSTEM_PRESENT #define SL_CATALOG_HFXO_MANAGER_PRESENT #define SL_CATALOG_INTERRUPT_MANAGER_PRESENT #define SL_CATALOG_IOSTREAM_PRESENT @@ -52,11 +53,11 @@ #define SL_CATALOG_OT_GP_INTERFACE_PRESENT #define SL_CATALOG_OPENTHREAD_STACK_PRESENT #define SL_CATALOG_POWER_MANAGER_PRESENT +#define SL_CATALOG_POWER_MANAGER_DEEPSLEEP_PRESENT #define SL_CATALOG_PSA_CRYPTO_PRESENT #define SL_CATALOG_RADIO_PRIORITY_15_4_PRESENT #define SL_CATALOG_RAIL_LIB_PRESENT #define SL_CATALOG_RAIL_UTIL_PTI_PRESENT -#define SL_CATALOG_SE_MANAGER_PRESENT #define SL_CATALOG_SECURITY_MANAGER_PRESENT #define SL_CATALOG_SEGGER_RTT_PRESENT #define SL_CATALOG_BTN0_PRESENT diff --git a/board-support/efr32/efr32mg24/BRD4187A/autogen/sl_event_handler.c b/board-support/efr32/efr32mg24/BRD4187A/autogen/sl_event_handler.c index 3ff8cff2c..357a278f8 100644 --- a/board-support/efr32/efr32mg24/BRD4187A/autogen/sl_event_handler.c +++ b/board-support/efr32/efr32mg24/BRD4187A/autogen/sl_event_handler.c @@ -1,22 +1,24 @@ #include "sl_event_handler.h" -#include "pa_conversions_efr32.h" #include "sl_board_init.h" #include "sl_clock_manager.h" #include "sl_hfxo_manager.h" -#if !SLI_SI91X_ENABLE_BLE +#include "sl_rail_util_compatible_pa.h" +#if !(defined(SLI_SI91X_ENABLE_BLE) && SLI_SI91X_ENABLE_BLE) +#include "sl_bluetooth.h" #include "sl_rail_util_power_manager_init.h" -#endif +#endif // !SLI_SI91X_ENABLE_BLE +#include "sl_rail_util_power_manager_init.h" +#include "sl_rail_util_pti.h" +#include "sl_rail_util_rssi.h" #include "btl_interface.h" -#include "gpiointerrupt.h" -#include "platform-efr32.h" -#include "sl_bluetooth.h" #include "sl_board_control.h" +#include "platform-efr32.h" #include "sl_bt_rtos_adaptation.h" +#include "sl_bluetooth.h" #include "sl_debug_swo.h" #include "sl_gpio.h" -#include "sl_rail_util_pti.h" -#include "sl_rail_util_rssi.h" +#include "gpiointerrupt.h" #if defined(SL_MATTER_USE_SI70XX_SENSOR) && SL_MATTER_USE_SI70XX_SENSOR #include "sl_i2cspm_instances.h" #endif // defined(SL_MATTER_USE_SI70XX_SENSOR) && SL_MATTER_USE_SI70XX_SENSOR @@ -24,22 +26,24 @@ #include "sl_mbedtls.h" #include "sl_ot_rtos_adaptation.h" #include "sl_simple_button_instances.h" + +#if (defined(SL_MATTER_RGB_LED_ENABLED) && SL_MATTER_RGB_LED_ENABLED == 1) +#include "sl_simple_rgb_pwm_led_instances.h" +#else #include "sl_simple_led_instances.h" +#endif //(SL_MATTER_RGB_LED_ENABLED) && SL_MATTER_RGB_LED_ENABLED == 1) #if defined(CONFIG_ENABLE_UART) #include "sl_uartdrv_instances.h" #endif // CONFIG_ENABLE_UART -#ifdef SL_WIFI -#include "sl_spidrv_instances.h" -#endif -#include "cmsis_os2.h" -#include "nvm3_default.h" #include "psa/crypto.h" -#include "sl_cos.h" -#include "sl_iostream_handles.h" -#include "sl_iostream_init_instances.h" #include "sl_se_manager.h" -#include "sli_crypto.h" #include "sli_protocol_crypto.h" +#include "sli_crypto.h" +#include "sl_iostream_init_instances.h" +#include "cmsis_os2.h" +#include "nvm3_default.h" + +#include "sl_iostream_handles.h" void sli_driver_permanent_allocation(void) { @@ -51,13 +55,8 @@ void sli_service_permanent_allocation(void) void sli_stack_permanent_allocation(void) { -#if !SLI_SI91X_ENABLE_BLE - sli_bt_stack_permanent_allocation(); -#endif // SLI_SI91X_ENABLE_BLE - -#ifdef SL_OT_ENABLE - sl_ot_rtos_perm_allocation(); -#endif // SL_OT_ENABLE + sli_bt_stack_permanent_allocation(); + sl_ot_rtos_perm_allocation(); } void sli_internal_permanent_allocation(void) @@ -66,12 +65,12 @@ void sli_internal_permanent_allocation(void) void sl_platform_init(void) { - sl_board_preinit(); - sl_clock_manager_runtime_init(); - sl_hfxo_manager_init_hardware(); - sl_board_init(); - bootloader_init(); - nvm3_initDefault(); + sl_board_preinit(); + sl_clock_manager_runtime_init(); + sl_hfxo_manager_init_hardware(); + sl_board_init(); + bootloader_init(); + nvm3_initDefault(); } void sli_internal_init_early(void) @@ -80,72 +79,70 @@ void sli_internal_init_early(void) void sl_kernel_start(void) { -#if !SLI_SI91X_ENABLE_BLE - sli_bt_rtos_adaptation_kernel_start(); -#endif // !SLI_SI91X_ENABLE_BLE - osKernelStart(); + sli_bt_rtos_adaptation_kernel_start(); + osKernelStart(); } void sl_driver_init(void) { - sl_gpio_init(); - GPIOINT_Init(); -#ifdef SL_WIFI - sl_spidrv_init_instances(); -#endif + sl_gpio_init(); + GPIOINT_Init(); #if defined(SL_MATTER_USE_SI70XX_SENSOR) && SL_MATTER_USE_SI70XX_SENSOR - sl_i2cspm_init_instances(); + sl_i2cspm_init_instances(); #endif // defined(SL_MATTER_USE_SI70XX_SENSOR) && SL_MATTER_USE_SI70XX_SENSOR - sl_simple_button_init_instances(); - sl_simple_led_init_instances(); -#if defined(CONFIG_ENABLE_UART) - sl_uartdrv_init_instances(); + sl_simple_button_init_instances(); +#if (defined(SL_MATTER_RGB_LED_ENABLED) && SL_MATTER_RGB_LED_ENABLED == 1) + sl_simple_rgb_pwm_led_init_instances(); +#else + sl_simple_led_init_instances(); +#endif //(SL_MATTER_RGB_LED_ENABLED) && SL_MATTER_RGB_LED_ENABLED == 1) + #if defined(CONFIG_ENABLE_UART) + sl_uartdrv_init_instances(); #endif // CONFIG_ENABLE_UART } void sl_service_init(void) { - sl_board_configure_vcom(); - sl_hfxo_manager_init(); - sl_mbedtls_init(); - psa_crypto_init(); - sl_se_init(); - sli_protocol_crypto_init(); - sli_crypto_init(); - sli_aes_seed_mask(); - sl_iostream_init_instances_stage_1(); - sl_iostream_init_instances_stage_2(); + sl_board_configure_vcom(); + sl_hfxo_manager_init(); + sl_mbedtls_init(); + psa_crypto_init(); + sl_se_init(); + sli_protocol_crypto_init(); + sli_crypto_init(); + sli_aes_seed_mask(); + sl_iostream_init_instances_stage_1(); + sl_iostream_init_instances_stage_2(); } void sl_stack_init(void) { #if !SLI_SI91X_ENABLE_BLE - sl_rail_util_pa_init(); - sl_rail_util_power_manager_init(); - sl_rail_util_pti_init(); - sl_rail_util_rssi_init(); - sli_bt_stack_functional_init(); -#endif - + sl_rail_util_pa_init(); + sl_rail_util_power_manager_init(); + sl_rail_util_pti_init(); + sl_rail_util_rssi_init(); + sli_bt_stack_functional_init(); +#endif // !SLI_SI91X_ENABLE_BLE #ifdef SL_OT_ENABLE - sl_ot_sys_init(); + sl_ot_sys_init(); #endif // SL_OT_ENABLE } void sl_internal_app_init(void) { #ifdef SL_OT_ENABLE - sl_ot_rtos_stack_init(); - sl_ot_rtos_app_init(); + sl_ot_rtos_stack_init(); + sl_ot_rtos_app_init(); #endif // SL_OT_ENABLE } void sl_iostream_init_instances_stage_1(void) { - sl_iostream_rtt_init(); + sl_iostream_rtt_init(); } void sl_iostream_init_instances_stage_2(void) { - sl_iostream_set_console_instance(); + sl_iostream_set_console_instance(); } diff --git a/board-support/efr32/efr32mg24/BRD4187A/autogen/sli_psa_config_autogen.h b/board-support/efr32/efr32mg24/BRD4187A/autogen/sli_psa_config_autogen.h index 055d8a95e..f90dd6e9a 100644 --- a/board-support/efr32/efr32mg24/BRD4187A/autogen/sli_psa_config_autogen.h +++ b/board-support/efr32/efr32mg24/BRD4187A/autogen/sli_psa_config_autogen.h @@ -24,7 +24,12 @@ #define PSA_WANT_ALG_TLS12_PSK_TO_MS 1 #define MBEDTLS_PSA_CRYPTO_EXTERNAL_RNG +#if defined(KSU_MAX_KEY_SLOTS) +#include "sli_ksu_keyslots_config.h" +#define MBEDTLS_PSA_KEY_SLOT_COUNT (22 + 15 + 1 + SL_PSA_KEY_USER_SLOT_COUNT + SLI_KSU_MAX_KEY_SLOTS - SLI_KSU_KEY_SLOT_USER_START + 1) +#else #define MBEDTLS_PSA_KEY_SLOT_COUNT (22 + 15 + 1 + SL_PSA_KEY_USER_SLOT_COUNT + 1) +#endif #ifndef SL_PSA_ITS_MAX_FILES #define SL_PSA_ITS_MAX_FILES (1 + SL_PSA_ITS_USER_MAX_FILES) #endif diff --git a/board-support/efr32/efr32mg24/BRD4187A/config/pin_config.h b/board-support/efr32/efr32mg24/BRD4187A/config/pin_config.h new file mode 100644 index 000000000..5f72d8949 --- /dev/null +++ b/board-support/efr32/efr32mg24/BRD4187A/config/pin_config.h @@ -0,0 +1,252 @@ +#ifndef PIN_CONFIG_H +#define PIN_CONFIG_H + +// $[CMU] +// [CMU]$ + +// $[LFXO] +// [LFXO]$ + +// $[PRS.ASYNCH0] +// [PRS.ASYNCH0]$ + +// $[PRS.ASYNCH1] +// [PRS.ASYNCH1]$ + +// $[PRS.ASYNCH2] +// [PRS.ASYNCH2]$ + +// $[PRS.ASYNCH3] +// [PRS.ASYNCH3]$ + +// $[PRS.ASYNCH4] +// [PRS.ASYNCH4]$ + +// $[PRS.ASYNCH5] +// [PRS.ASYNCH5]$ + +// $[PRS.ASYNCH6] +// [PRS.ASYNCH6]$ + +// $[PRS.ASYNCH7] +// [PRS.ASYNCH7]$ + +// $[PRS.ASYNCH8] +// [PRS.ASYNCH8]$ + +// $[PRS.ASYNCH9] +// [PRS.ASYNCH9]$ + +// $[PRS.ASYNCH10] +// [PRS.ASYNCH10]$ + +// $[PRS.ASYNCH11] +// [PRS.ASYNCH11]$ + +// $[PRS.ASYNCH12] +// [PRS.ASYNCH12]$ + +// $[PRS.ASYNCH13] +// [PRS.ASYNCH13]$ + +// $[PRS.ASYNCH14] +// [PRS.ASYNCH14]$ + +// $[PRS.ASYNCH15] +// [PRS.ASYNCH15]$ + +// $[PRS.SYNCH0] +// [PRS.SYNCH0]$ + +// $[PRS.SYNCH1] +// [PRS.SYNCH1]$ + +// $[PRS.SYNCH2] +// [PRS.SYNCH2]$ + +// $[PRS.SYNCH3] +// [PRS.SYNCH3]$ + +// $[GPIO] +// GPIO SWV on PA03 +#ifndef GPIO_SWV_PORT +#define GPIO_SWV_PORT SL_GPIO_PORT_A +#endif +#ifndef GPIO_SWV_PIN +#define GPIO_SWV_PIN 3 +#endif + +// [GPIO]$ + +// $[TIMER0] +// [TIMER0]$ + +// $[TIMER1] +// [TIMER1]$ + +// $[TIMER2] +// [TIMER2]$ + +// $[TIMER3] +// [TIMER3]$ + +// $[TIMER4] +// [TIMER4]$ + +// $[USART0] +// USART0 CLK on PC03 +#ifndef USART0_CLK_PORT +#define USART0_CLK_PORT SL_GPIO_PORT_C +#endif +#ifndef USART0_CLK_PIN +#define USART0_CLK_PIN 3 +#endif + +// USART0 TX on PC01 +#ifndef USART0_TX_PORT +#define USART0_TX_PORT SL_GPIO_PORT_C +#endif +#ifndef USART0_TX_PIN +#define USART0_TX_PIN 1 +#endif + +// [USART0]$ + +// $[I2C1] +// I2C1 SCL on PC05 +#ifndef I2C1_SCL_PORT +#define I2C1_SCL_PORT SL_GPIO_PORT_C +#endif +#ifndef I2C1_SCL_PIN +#define I2C1_SCL_PIN 5 +#endif + +// I2C1 SDA on PC07 +#ifndef I2C1_SDA_PORT +#define I2C1_SDA_PORT SL_GPIO_PORT_C +#endif +#ifndef I2C1_SDA_PIN +#define I2C1_SDA_PIN 7 +#endif + +// [I2C1]$ + +// $[EUSART1] +// [EUSART1]$ + +// $[KEYSCAN] +// [KEYSCAN]$ + +// $[LETIMER0] +// [LETIMER0]$ + +// $[IADC0] +// [IADC0]$ + +// $[ACMP0] +// [ACMP0]$ + +// $[ACMP1] +// [ACMP1]$ + +// $[VDAC0] +// [VDAC0]$ + +// $[VDAC1] +// [VDAC1]$ + +// $[PCNT0] +// [PCNT0]$ + +// $[HFXO0] +// [HFXO0]$ + +// $[I2C0] +// [I2C0]$ + +// $[EUSART0] +// EUSART0 CTS on PB05 +#ifndef EUSART0_CTS_PORT +#define EUSART0_CTS_PORT SL_GPIO_PORT_B +#endif +#ifndef EUSART0_CTS_PIN +#define EUSART0_CTS_PIN 5 +#endif + +// EUSART0 RTS on PA00 +#ifndef EUSART0_RTS_PORT +#define EUSART0_RTS_PORT SL_GPIO_PORT_A +#endif +#ifndef EUSART0_RTS_PIN +#define EUSART0_RTS_PIN 0 +#endif + +// EUSART0 RX on PA09 +#ifndef EUSART0_RX_PORT +#define EUSART0_RX_PORT SL_GPIO_PORT_A +#endif +#ifndef EUSART0_RX_PIN +#define EUSART0_RX_PIN 9 +#endif + +// EUSART0 TX on PA08 +#ifndef EUSART0_TX_PORT +#define EUSART0_TX_PORT SL_GPIO_PORT_A +#endif +#ifndef EUSART0_TX_PIN +#define EUSART0_TX_PIN 8 +#endif + +// [EUSART0]$ + +// $[PTI] +// [PTI]$ + +// $[MODEM] +// [MODEM]$ + +// $[CUSTOM_PIN_NAME] +#ifndef _PORT +#define _PORT SL_GPIO_PORT_A +#endif +#ifndef _PIN +#define _PIN 0 +#endif + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +// [CUSTOM_PIN_NAME]$ + + +#endif // PIN_CONFIG_H + + diff --git a/board-support/efr32/efr32mg24/BRD4187A/config/psa_crypto_config.h b/board-support/efr32/efr32mg24/BRD4187A/config/psa_crypto_config.h index 20703b41d..773ce99e0 100644 --- a/board-support/efr32/efr32mg24/BRD4187A/config/psa_crypto_config.h +++ b/board-support/efr32/efr32mg24/BRD4187A/config/psa_crypto_config.h @@ -27,26 +27,32 @@ // Default: 4 #define SL_PSA_KEY_USER_SLOT_COUNT (4) -// PSA Maximum User Persistent Keys Count <0-1024> +// Maximum User Persistent PSA Key Count <0-1024> // Maximum amount of keys (or other files) that can be stored persistently -// by the application through the PSA interface, when persistent storage -// support for PSA Crypto is included in the project. -// Due to caching logic, this setting does have an impact on static RAM usage. -// Note that this number is added to the potential requirements from other -// software components in the project, such that the total amount of keys -// which can be stored through the ITS backend can be higher than what is -// configured here. +// by the user application, when PSA ITS (Internal Trusted Storage) support +// is included in the project. +// NOTE: +// In addition to SL_PSA_ITS_USER_MAX_FILES (number of user keys) the +// application may be configured to include SDK components that require an +// additional number of keys. The sum of user keys and SDK component keys +// is computed and the result, called SL_PSA_ITS_MAX_FILES, is used +// internally in the PSA ITS driver. // -// WARNING: When changing this setting on an application that is already -// deployed, and thus will get the change through an application upgrade, -// care should be taken to ensure that the setting is only ever increased, -// and never decreased. Decreasing this setting might cause previously -// stored keys/files to become inaccessible. +// WARNING: +// For applications using PSA ITS driver version 1 or 2, when changing the +// SL_PSA_ITS_USER_MAX_FILES in an application that is already depeloyed, +// and thus will get the change through an application upgrade, care should +// be taken to ensure that the total sum of keys SL_PSA_ITS_MAX_FILES is +// only ever equal or increased, and never decreased. Decreasing this +// setting might cause previously stored keys/files to become inaccessible, +// ITS should be cleared and all files need to be stored again. // -// It is not possible to change this setting when using V3 ITS Driver. -// The file-storage indexing is dependent on the maximum number of files, -// and if SL_PSA_ITS_USER_MAX_FILES is changed, ITS should be cleared and -// all files need to be stored again. +// For applications using PSA ITS driver version 3, it is not possible to +// change this setting because the file-storage indexing is dependent on the +// maximum number of files (SL_PSA_ITS_MAX_FILES) being consistent, and if +// the sum of SDK component keys and user keys (SL_PSA_ITS_USER_MAX_FILES) +// is changed, may cause previously stored keys/files to become inaccessible +// ITS should be cleared and all files need to be stored again. // Default: 128 #define SL_PSA_ITS_USER_MAX_FILES (128) diff --git a/board-support/efr32/efr32mg24/BRD4187A/config/sl_bluetooth_config.h b/board-support/efr32/efr32mg24/BRD4187A/config/sl_bluetooth_config.h index 9b6a804e0..93bfbbcc4 100644 --- a/board-support/efr32/efr32mg24/BRD4187A/config/sl_bluetooth_config.h +++ b/board-support/efr32/efr32mg24/BRD4187A/config/sl_bluetooth_config.h @@ -99,6 +99,7 @@ // if the LE Power Control feature is enabled. // When this configuration is passed into stack initialization, the stack // will select the closest value that the device supports. +// API sl_bt_system_set_tx_power() can be used to set the minimum TX power at runtime. // API sl_bt_system_get_tx_power_setting() can be used to query the selected value. #define SL_BT_CONFIG_MIN_TX_POWER (-30) @@ -108,6 +109,7 @@ // advertising, scanning and DTM testing. // When this configuration is passed into stack initialization, the stack // will select the closest value that the device supports. +// API sl_bt_system_set_tx_power() can be used to set the maximum TX power at runtime. // API sl_bt_system_get_tx_power_setting() can be used to query the selected value. #define SL_BT_CONFIG_MAX_TX_POWER (80) diff --git a/board-support/efr32/efr32mg24/BRD4187A/config/sl_board_control_config.h b/board-support/efr32/efr32mg24/BRD4187A/config/sl_board_control_config.h index f63c57de8..f474c7408 100644 --- a/board-support/efr32/efr32mg24/BRD4187A/config/sl_board_control_config.h +++ b/board-support/efr32/efr32mg24/BRD4187A/config/sl_board_control_config.h @@ -55,20 +55,32 @@ // SL_BOARD_ENABLE_VCOM // $[GPIO_SL_BOARD_ENABLE_VCOM] -#define SL_BOARD_ENABLE_VCOM_PORT SL_GPIO_PORT_B -#define SL_BOARD_ENABLE_VCOM_PIN 0 +#ifndef SL_BOARD_ENABLE_VCOM_PORT +#define SL_BOARD_ENABLE_VCOM_PORT SL_GPIO_PORT_B +#endif +#ifndef SL_BOARD_ENABLE_VCOM_PIN +#define SL_BOARD_ENABLE_VCOM_PIN 0 +#endif // [GPIO_SL_BOARD_ENABLE_VCOM]$ // SL_BOARD_ENABLE_DISPLAY // $[GPIO_SL_BOARD_ENABLE_DISPLAY] -#define SL_BOARD_ENABLE_DISPLAY_PORT SL_GPIO_PORT_C -#define SL_BOARD_ENABLE_DISPLAY_PIN 9 +#ifndef SL_BOARD_ENABLE_DISPLAY_PORT +#define SL_BOARD_ENABLE_DISPLAY_PORT SL_GPIO_PORT_C +#endif +#ifndef SL_BOARD_ENABLE_DISPLAY_PIN +#define SL_BOARD_ENABLE_DISPLAY_PIN 9 +#endif // [GPIO_SL_BOARD_ENABLE_DISPLAY]$ // SL_BOARD_ENABLE_SENSOR_RHT // $[GPIO_SL_BOARD_ENABLE_SENSOR_RHT] -#define SL_BOARD_ENABLE_SENSOR_RHT_PORT SL_GPIO_PORT_D -#define SL_BOARD_ENABLE_SENSOR_RHT_PIN 3 +#ifndef SL_BOARD_ENABLE_SENSOR_RHT_PORT +#define SL_BOARD_ENABLE_SENSOR_RHT_PORT SL_GPIO_PORT_D +#endif +#ifndef SL_BOARD_ENABLE_SENSOR_RHT_PIN +#define SL_BOARD_ENABLE_SENSOR_RHT_PIN 3 +#endif // [GPIO_SL_BOARD_ENABLE_SENSOR_RHT]$ // <<< sl:end pin_tool >>> diff --git a/board-support/efr32/efr32mg24/BRD4187A/config/sl_btctrl_config.h b/board-support/efr32/efr32mg24/BRD4187A/config/sl_btctrl_config.h index ed75a2d0e..403df1ffe 100644 --- a/board-support/efr32/efr32mg24/BRD4187A/config/sl_btctrl_config.h +++ b/board-support/efr32/efr32mg24/BRD4187A/config/sl_btctrl_config.h @@ -146,15 +146,27 @@ #define SL_BT_CONTROLLER_ADAPTIVITY_MODE (SL_BTCTRL_CHANNELMAP_FLAG_ACTIVE_ADAPTIVITY) #endif -// Power Amplifier (PA) Configuration -// Automode PA configuration -// Highest available PA configuration -// RAIL Utility component PA configuration -// Select the Power Amplifier configuration -// Default: RAIL Utility component PA configuration -#ifndef SL_BT_CONTROLLER_PA_CONFIG -#define SL_BT_CONTROLLER_PA_CONFIG SL_BT_BLUETOOTH_RAIL_UTIL_PA -#endif +// Advertising Configuration +// Include TX Power in the extended header of primary extended advertising packets +// This is default setting to all advertising sets unless it is specifically overridden by VS_SiliconLabs_Set_Advertising_Config_Bits. +// Default: 0 +// Enabling this option takes effect only if permitted by Le_Set_Extended_Advertising_Parameters +// According to Link Layer specification, Vol 6, Part B, Table 2.4 and Table 2.5: +// Optional in 1M PHY when the advertiser is connectable or scannable, or with auxiliary pointer. +// In other cases, the Extended Advertising TX Power is always optional by settings. +#define SL_BT_CONTROLLER_PRIMARY_EXT_PACKET_INCLUDE_TX_POWER (0) +// +// Include Advertiser Address in the header of primary extended advertising packets +// This is default setting to all advertising sets unless it is specifically overridden by VS_SiliconLabs_Set_Advertising_Config_Bits. +// Default: 0 +// Enabling this option takes effect only if permitted by Le_Set_Extended_Advertising_Parameters +// According to Link Layer specification, Vol 6, Part B, Table 2.4 and Table 2.5: +// Optional in 1M PHY when the advertiser is non-connectable and non-scannable, with auxiliary pointer. +// Mandatory when the advertiser is non-connectable and non-scannable, without auxiliary pointer. +// Forbidden when the advertiser is connectable or scannable. +#define SL_BT_CONTROLLER_PRIMARY_EXT_PACKET_INCLUDE_ADDRESS (0) +// +// Advertising Configuration // Bluetooth Controller Configuration // <<< end of configuration section >>> diff --git a/board-support/efr32/efr32mg24/BRD4187A/config/sl_clock_manager_tree_config.h b/board-support/efr32/efr32mg24/BRD4187A/config/sl_clock_manager_tree_config.h index 8c0be95e9..1f6f2a089 100644 --- a/board-support/efr32/efr32mg24/BRD4187A/config/sl_clock_manager_tree_config.h +++ b/board-support/efr32/efr32mg24/BRD4187A/config/sl_clock_manager_tree_config.h @@ -105,9 +105,9 @@ #endif // PCLK branch divider -// MIN // DIV1 // DIV2 +// MIN // PCLK branch is derived from HCLK. This clock drives the APB bus interface. // SL_CLOCK_MANAGER_PCLK_DIV_MIN #ifndef SL_CLOCK_MANAGER_PCLK_DIVIDER diff --git a/board-support/efr32/efr32mg24/BRD4187A/config/sl_i2cspm_sensor_config.h b/board-support/efr32/efr32mg24/BRD4187A/config/sl_i2cspm_sensor_config.h index 03c4886d4..9804ead6f 100644 --- a/board-support/efr32/efr32mg24/BRD4187A/config/sl_i2cspm_sensor_config.h +++ b/board-support/efr32/efr32mg24/BRD4187A/config/sl_i2cspm_sensor_config.h @@ -54,17 +54,28 @@ // <<< sl:start pin_tool >>> // SL_I2CSPM_SENSOR // $[I2C_SL_I2CSPM_SENSOR] +#ifndef SL_I2CSPM_SENSOR_PERIPHERAL #define SL_I2CSPM_SENSOR_PERIPHERAL I2C1 +#endif +#ifndef SL_I2CSPM_SENSOR_PERIPHERAL_NO #define SL_I2CSPM_SENSOR_PERIPHERAL_NO 1 +#endif // I2C1 SCL on PC05 +#ifndef SL_I2CSPM_SENSOR_SCL_PORT #define SL_I2CSPM_SENSOR_SCL_PORT SL_GPIO_PORT_C +#endif +#ifndef SL_I2CSPM_SENSOR_SCL_PIN #define SL_I2CSPM_SENSOR_SCL_PIN 5 +#endif // I2C1 SDA on PC07 +#ifndef SL_I2CSPM_SENSOR_SDA_PORT #define SL_I2CSPM_SENSOR_SDA_PORT SL_GPIO_PORT_C +#endif +#ifndef SL_I2CSPM_SENSOR_SDA_PIN #define SL_I2CSPM_SENSOR_SDA_PIN 7 - +#endif // [I2C_SL_I2CSPM_SENSOR]$ // <<< sl:end pin_tool >>> diff --git a/board-support/efr32/efr32mg24/BRD4187A/config/sl_mbedtls_config.h b/board-support/efr32/efr32mg24/BRD4187A/config/sl_mbedtls_config.h index e249b4d1b..7146ba648 100644 --- a/board-support/efr32/efr32mg24/BRD4187A/config/sl_mbedtls_config.h +++ b/board-support/efr32/efr32mg24/BRD4187A/config/sl_mbedtls_config.h @@ -71,9 +71,14 @@ // Default: 1 // This option is enabled assuming all buffers passed to any PSA function reside // in memory that is accessible only to the PSA function during its execution. +// This improves performance by avoiding extra buffer copies, reducing memory +// usage and allocation overhead. However, it is NOT the most secure option and +// should only be enabled if all buffers passed to PSA functions are exclusively +// accessible to PSA and never shared with untrusted code. // This option MUST be disabled whenever buffer arguments are in memory shared // with an untrusted party, for example where arguments to PSA calls are passed -// across a trust boundary. +// across a trust boundary, e.g. if TrustZone is enabled, and the PSA Crypto core +// is placed in the Secure domain. #define SL_MBEDTLS_PSA_ASSUME_EXCLUSIVE_BUFFERS 1 // diff --git a/board-support/efr32/efr32mg24/BRD4187A/config/sl_memory_manager_config.h b/board-support/efr32/efr32mg24/BRD4187A/config/sl_memory_manager_config.h index 26b84b107..4a16c29fe 100644 --- a/board-support/efr32/efr32mg24/BRD4187A/config/sl_memory_manager_config.h +++ b/board-support/efr32/efr32mg24/BRD4187A/config/sl_memory_manager_config.h @@ -51,4 +51,11 @@ // <<< end of configuration section >>> +// Keep this configuration outside the configuration section until the feature is ready for release. +// Enables the heap fallback mechanism. +// Setting this configuration to 0 will disable the fallback mechanism on DTCM and PSRAM. +// If this configuration is disabled, the memory manager will not attempt to use alternative memory regions for allocations even if using the fallback parameters. +// Default: 1 +#define SL_MEMORY_MANAGER_HEAP_FALLBACK_EN 1 + #endif /* SL_MEMORY_MANAGER_CONFIG_H */ diff --git a/board-support/efr32/efr32mg24/BRD4187A/config/sl_openthread_features_config.h b/board-support/efr32/efr32mg24/BRD4187A/config/sl_openthread_features_config.h index 22340498d..a3697f8af 100644 --- a/board-support/efr32/efr32mg24/BRD4187A/config/sl_openthread_features_config.h +++ b/board-support/efr32/efr32mg24/BRD4187A/config/sl_openthread_features_config.h @@ -65,6 +65,7 @@ #define OPENTHREAD_CONFIG_MAC_CSL_RECEIVER_ENABLE 1 #endif // CSL Scheduling Uncertainty (±10 us units) <12..999:1> +// Left unchanged the value will be set to 175 for RCPs, 20 for FTDs, and 12 for MTDs #ifndef SL_OPENTHREAD_CSL_TX_UNCERTAINTY #if OPENTHREAD_RADIO #define SL_OPENTHREAD_CSL_TX_UNCERTAINTY 175 @@ -142,12 +143,10 @@ #define OPENTHREAD_CONFIG_CHANNEL_MONITOR_ENABLE 0 #endif // - -// Commissioner +// Commissioner #ifndef OPENTHREAD_CONFIG_COMMISSIONER_ENABLE #define OPENTHREAD_CONFIG_COMMISSIONER_ENABLE 0 #endif - // Max Joiner Entries // The maximum number of Joiner entries maintained by the Commissioner. // 2 @@ -155,7 +154,6 @@ #define OPENTHREAD_CONFIG_COMMISSIONER_MAX_JOINER_ENTRIES 2 #endif // - // COAP API #ifndef OPENTHREAD_CONFIG_COAP_API_ENABLE #define OPENTHREAD_CONFIG_COAP_API_ENABLE 0 @@ -171,6 +169,11 @@ #define OPENTHREAD_CONFIG_COAP_SECURE_API_ENABLE 0 #endif // +// COAP Blockwise Transfer +#ifndef OPENTHREAD_CONFIG_COAP_BLOCKWISE_TRANSFER_ENABLE +#define OPENTHREAD_CONFIG_COAP_BLOCKWISE_TRANSFER_ENABLE 0 +#endif +// // DHCP6 Client #ifndef OPENTHREAD_CONFIG_DHCP6_CLIENT_ENABLE #define OPENTHREAD_CONFIG_DHCP6_CLIENT_ENABLE 0 @@ -196,16 +199,27 @@ #define OPENTHREAD_CONFIG_IP6_FRAGMENTATION_ENABLE 0 #endif // -// Maximum number of IPv6 unicast addresses allowed to be externally added +// IPv6 Limits +// Maximum IPv6 external unicast addresses +// Maximum number of IPv6 unicast addresses allowed to be externally added +// 4 #ifndef OPENTHREAD_CONFIG_IP6_MAX_EXT_UCAST_ADDRS #define OPENTHREAD_CONFIG_IP6_MAX_EXT_UCAST_ADDRS 4 #endif -// -// Maximum number of IPv6 multicast addresses allowed to be externally added +// Maximum IPv6 external multicast addresses +// Maximum number of IPv6 multicast addresses allowed to be externally added +// 4 #ifndef OPENTHREAD_CONFIG_IP6_MAX_EXT_MCAST_ADDRS #define OPENTHREAD_CONFIG_IP6_MAX_EXT_MCAST_ADDRS 4 #endif -// +// Maximum IPv6 address registrations for MTD +// The maximum number of IPv6 address registrations for MTD. +// If left unchanged will default to the value of OPENTHREAD_CONFIG_MLE_IP_ADDRS_PER_CHILD +// 4 +#ifndef OPENTHREAD_CONFIG_MLE_IP_ADDRS_TO_REGISTER +#define OPENTHREAD_CONFIG_MLE_IP_ADDRS_TO_REGISTER (OPENTHREAD_CONFIG_MLE_IP_ADDRS_PER_CHILD) +#endif +// // Jam Detection #ifndef OPENTHREAD_CONFIG_JAM_DETECTION_ENABLE #define OPENTHREAD_CONFIG_JAM_DETECTION_ENABLE 0 @@ -226,6 +240,14 @@ #define OPENTHREAD_CONFIG_MAC_FILTER_ENABLE 0 #endif // +// MLE Children +// Maximum number of Thread children supported by the device +// Default is 10. Used by the Thread stack to configure the size of child table. +// 10 +#ifndef OPENTHREAD_CONFIG_MLE_MAX_CHILDREN +#define OPENTHREAD_CONFIG_MLE_MAX_CHILDREN 10 +#endif +// // MLE Long Routes extension (experimental) #ifndef OPENTHREAD_CONFIG_MLE_LONG_ROUTES_ENABLE #define OPENTHREAD_CONFIG_MLE_LONG_ROUTES_ENABLE 0 @@ -235,27 +257,66 @@ #ifndef OPENTHREAD_CONFIG_MULTIPAN_RCP_ENABLE #define OPENTHREAD_CONFIG_MULTIPAN_RCP_ENABLE 0 #endif +// Broadcast IID for spinel frames +// Define broadcast IID for spinel frames dedicated to all hosts in multipan configuration +// 0 +#ifndef OPENTHREAD_SPINEL_CONFIG_BROADCAST_IID +#define OPENTHREAD_SPINEL_CONFIG_BROADCAST_IID 0 +#endif +#if OPENTHREAD_CONFIG_MULTIPAN_RCP_ENABLE +// Maximum number of Zigbee children for multiprotocol (DMP) builds +// Ensures correct table sizing for Zigbee when DMP/multipan is enabled. +// 6 +#ifndef SL_ZIGBEE_MAX_END_DEVICE_CHILDREN +#define SL_ZIGBEE_MAX_END_DEVICE_CHILDREN 6 +#endif +#endif // // Multiple OpenThread Instances #ifndef OPENTHREAD_CONFIG_MULTIPLE_INSTANCE_ENABLE #define OPENTHREAD_CONFIG_MULTIPLE_INSTANCE_ENABLE 0 #endif -// // Multiple Static Instance Support #ifndef OPENTHREAD_CONFIG_MULTIPLE_STATIC_INSTANCE_ENABLE #define OPENTHREAD_CONFIG_MULTIPLE_STATIC_INSTANCE_ENABLE 0 #endif -// -// Number of OpenThread Instances For Static Buffer Allocation +// Number of OpenThread Instances +// Default is 2. Number of OpenThread Instances For Static Buffer Allocation. +// 2 #ifndef OPENTHREAD_CONFIG_MULTIPLE_INSTANCE_NUM #define OPENTHREAD_CONFIG_MULTIPLE_INSTANCE_NUM 2 #endif // -// Define broadcast IID for spinel frames dedicated to all hosts in multipan configuration -#ifndef OPENTHREAD_SPINEL_CONFIG_BROADCAST_IID -#define OPENTHREAD_SPINEL_CONFIG_BROADCAST_IID 0 -#endif // +// Define maximum total source match table entries for both OT and Zigbee. +// In multi-instance builds (SoC or RCP/host), table must support all OT instances + Zigbee. +// For single instance (default), table sized to just OT children. +// This value is used to size all source match tables in both OT and Zigbee code. +// Note: this is purposedly not being setup with CMSIS annotations. +#ifndef RADIO_CONFIG_MAX_SRC_MATCH_ENTRIES +#if OPENTHREAD_CONFIG_MULTIPLE_INSTANCE_ENABLE +#if SL_ZIGBEE_MAX_END_DEVICE_CHILDREN +// Multipan / DMP case: OT + Zigbee +#define RADIO_CONFIG_MAX_SRC_MATCH_ENTRIES \ + ((OPENTHREAD_CONFIG_MLE_MAX_CHILDREN * (OPENTHREAD_CONFIG_MULTIPLE_INSTANCE_NUM - 1)) \ + + SL_ZIGBEE_MAX_END_DEVICE_CHILDREN) +#else +// Multi-instance OT-only case +#define RADIO_CONFIG_MAX_SRC_MATCH_ENTRIES \ + (OPENTHREAD_CONFIG_MLE_MAX_CHILDREN * OPENTHREAD_CONFIG_MULTIPLE_INSTANCE_NUM) +#endif +#else +// Single-instance OT (SoC / NCP / non-multipan RCP) +#define RADIO_CONFIG_MAX_SRC_MATCH_ENTRIES OPENTHREAD_CONFIG_MLE_MAX_CHILDREN +#endif +#endif +// Spinel Match Table +// Maximum number of spinel source match table entries +// Ensure that this value is the total of the number of openthread children times the number of openthread instances plus the number of Zigbee children. +#ifndef OPENTHREAD_SPINEL_CONFIG_MAX_SRC_MATCH_ENTRIES +#define OPENTHREAD_SPINEL_CONFIG_MAX_SRC_MATCH_ENTRIES RADIO_CONFIG_MAX_SRC_MATCH_ENTRIES +#endif +// // OTNS (OpenThread Network Simulator) #ifndef OPENTHREAD_CONFIG_OTNS_ENABLE #define OPENTHREAD_CONFIG_OTNS_ENABLE 0 @@ -265,13 +326,23 @@ #ifndef OPENTHREAD_CONFIG_PING_SENDER_ENABLE #define OPENTHREAD_CONFIG_PING_SENDER_ENABLE 1 #endif - // // Power Calibration Module (RCP only configuration) #ifndef OPENTHREAD_CONFIG_POWER_CALIBRATION_ENABLE #define OPENTHREAD_CONFIG_POWER_CALIBRATION_ENABLE 0 #endif - +// Maximum raw power calibration length +// Max raw power calibration length +// 4 +#ifndef SL_OPENTHREAD_RAW_POWER_CALIBRATION_LENGTH +#define SL_OPENTHREAD_RAW_POWER_CALIBRATION_LENGTH 4 +#endif +// Maximum FEM config setting length +// Max FEM config setting length +// 4 +#ifndef SL_OPENTHREAD_FEM_SETTING_LENGTH +#define SL_OPENTHREAD_FEM_SETTING_LENGTH 4 +#endif // // Platform UDP #ifndef OPENTHREAD_CONFIG_PLATFORM_UDP_ENABLE @@ -309,7 +380,14 @@ #endif // // Time Synchronization Service +#ifndef OPENTHREAD_CONFIG_TIME_SYNC_ENABLE #define OPENTHREAD_CONFIG_TIME_SYNC_ENABLE 0 +#endif +// +// Uptime of OpenThread instance +#ifndef OPENTHREAD_CONFIG_UPTIME_ENABLE +#define OPENTHREAD_CONFIG_UPTIME_ENABLE 1 +#endif // // UDP Forward #ifndef OPENTHREAD_CONFIG_UDP_FORWARD_ENABLE @@ -321,28 +399,22 @@ #define OPENTHREAD_CONFIG_MAC_BEACON_PAYLOAD_PARSING_ENABLE 1 #endif // -// Max raw power calibration length. -#ifndef SL_OPENTHREAD_RAW_POWER_CALIBRATION_LENGTH -#define SL_OPENTHREAD_RAW_POWER_CALIBRATION_LENGTH 4 -#endif -// -// Max FEM config setting length. -#ifndef SL_OPENTHREAD_FEM_SETTING_LENGTH -#define SL_OPENTHREAD_FEM_SETTING_LENGTH 4 -#endif -// -// The maximum number of RX buffers to use in the radio driver. -// 16 +// Radio Driver RX buffers +// Maximum number of RX buffers +// The maximum number of RX buffers to use in the radio driver. +// 16 #ifndef SL_OPENTHREAD_RADIO_RX_BUFFER_COUNT #define SL_OPENTHREAD_RADIO_RX_BUFFER_COUNT 16 #endif // +// // Logging // LOG_OUTPUT // NONE // APP // PLATFORM_DEFINED -// Default: OPENTHREAD_CONFIG_LOG_OUTPUT_PLATFORM_DEFINED +// Default: OPENTHREAD_CONFIG_LOG_OUTPUT_APP +// OPENTHREAD_CONFIG_LOG_OUTPUT_APP #ifndef OPENTHREAD_CONFIG_LOG_OUTPUT #define OPENTHREAD_CONFIG_LOG_OUTPUT OPENTHREAD_CONFIG_LOG_OUTPUT_APP #endif @@ -365,6 +437,7 @@ // INFO // DEBG // Default: OT_LOG_LEVEL_DEBG +// OT_LOG_LEVEL_DEBG #ifndef OPENTHREAD_CONFIG_LOG_LEVEL #define OPENTHREAD_CONFIG_LOG_LEVEL OT_LOG_LEVEL_DEBG #endif @@ -387,11 +460,10 @@ #endif // OPENTHREAD_FULL_LOGS_ENABLE -// Log crash dump after initialization +// Log crash dump after initialization #ifndef OPENTHREAD_CONFIG_PLATFORM_LOG_CRASH_DUMP_ENABLE #define OPENTHREAD_CONFIG_PLATFORM_LOG_CRASH_DUMP_ENABLE 0 #endif -// // // diff --git a/board-support/efr32/efr32mg24/BRD4187A/config/sl_power_manager_config.h b/board-support/efr32/efr32mg24/BRD4187A/config/sl_power_manager_config.h index 3c240b843..86b9fef27 100644 --- a/board-support/efr32/efr32mg24/BRD4187A/config/sl_power_manager_config.h +++ b/board-support/efr32/efr32mg24/BRD4187A/config/sl_power_manager_config.h @@ -37,24 +37,40 @@ // Enable custom IRQ handler for external HF oscillator. // Enable if CMU_IRQHandler/HFXO0_IRQHandler is needed from your application. -// The function sl_power_manager_irq_handler() will have to be called from you custom handler if this is enabled. +// The function sl_power_manager_irq_handler() will have to be called from your custom handler if this is enabled. // Default: 0 +#ifndef SL_POWER_MANAGER_CUSTOM_HF_OSCILLATOR_IRQ_HANDLER #define SL_POWER_MANAGER_CUSTOM_HF_OSCILLATOR_IRQ_HANDLER 0 +#endif // Enable fast wakeup (disable voltage scaling in EM2/3 mode) // Enable or disable voltage scaling in EM2/3 modes (when available). This decreases wakeup time by about 30 us. // Deprecated. It is replaced by the function sl_power_manager_em23_voltage_scaling_enable_fast_wakeup() // Default: 0 +#ifndef SL_POWER_MANAGER_CONFIG_VOLTAGE_SCALING_FAST_WAKEUP #define SL_POWER_MANAGER_CONFIG_VOLTAGE_SCALING_FAST_WAKEUP 0 +#endif + +// Enable voltage scaling in EM0 and EM1 mode. +// Enable or disable voltage scaling in EM0/1 modes. With this config enabled, the voltage +// scaling will be configured at the lowest possible level based on the system clock. +// Default: 0 +#ifndef SL_POWER_MANAGER_ENABLE_EM01_VOLTAGE_SCALING +#define SL_POWER_MANAGER_ENABLE_EM01_VOLTAGE_SCALING 0 +#endif // Enable debugging feature // Enable or disable debugging features (trace the different modules that have requirements). // Default: 0 +#ifndef SL_POWER_MANAGER_DEBUG #define SL_POWER_MANAGER_DEBUG 0 +#endif // Maximum numbers of requirements that can be logged // Default: 10 +#ifndef SL_POWER_MANAGER_DEBUG_POOL_SIZE #define SL_POWER_MANAGER_DEBUG_POOL_SIZE 10 +#endif // // Pin retention mode @@ -63,14 +79,18 @@ // Retention through EM4 // Retention through EM4 and wakeup // power_manager_pin_retention_disable +#ifndef SL_POWER_MANAGER_INIT_EMU_EM4_PIN_RETENTION_MODE #define SL_POWER_MANAGER_INIT_EMU_EM4_PIN_RETENTION_MODE EMU_EM4CTRL_EM4IORETMODE_DISABLE +#endif // Enable EM2 debugging feature // Enable or disable debugging features. // Force PD0B/PD0D to stay on during EM2 entry. This allows the debugger to remain connected in EM2 and EM3. // Enabling debug connectivity results in an increased power consumption in EM2/EM3. // Default: 1 +#ifndef SL_POWER_MANAGER_INIT_EMU_EM2_DEBUG_ENABLE #define SL_POWER_MANAGER_INIT_EMU_EM2_DEBUG_ENABLE 1 +#endif // // diff --git a/board-support/efr32/efr32mg24/BRD4187A/config/sl_rail_util_pa_tables_config.h b/board-support/efr32/efr32mg24/BRD4187A/config/sl_rail_util_pa_tables_config.h new file mode 100644 index 000000000..bd05ea57d --- /dev/null +++ b/board-support/efr32/efr32mg24/BRD4187A/config/sl_rail_util_pa_tables_config.h @@ -0,0 +1,49 @@ +/***************************************************************************//** + * @file + * @brief PA Tables configuration file. + ******************************************************************************* + * # License + * Copyright 2025 Silicon Laboratories Inc. www.silabs.com + ******************************************************************************* + * + * SPDX-License-Identifier: Zlib + * + * The licensor of this software is Silicon Laboratories Inc. + * + * This software is provided 'as-is', without any express or implied + * warranty. In no event will the authors be held liable for any damages + * arising from the use of this software. + * + * Permission is granted to anyone to use this software for any purpose, + * including commercial applications, and to alter it and redistribute it + * freely, subject to the following restrictions: + * + * 1. The origin of this software must not be misrepresented; you must not + * claim that you wrote the original software. If you use this software + * in a product, an acknowledgment in the product documentation would be + * appreciated but is not required. + * 2. Altered source versions must be plainly marked as such, and must not be + * misrepresented as being the original software. + * 3. This notice may not be removed or altered from any source distribution. + * + ******************************************************************************/ + +#ifndef SL_RAIL_UTIL_PA_TABLES_CONFIG_H +#define SL_RAIL_UTIL_PA_TABLES_CONFIG_H + +// <<< Use Configuration Wizard in Context Menu >>> + +// PA Table Configuration +// PA Table Selection +// <"sl_rail_util_pa_dbm_powersetting_mapping_table_10dbm.h"=> 10dBm PA powersetting mapping table +// <"sl_rail_util_pa_dbm_powersetting_mapping_table_0dbm.h"=> 0dBm PA powersetting mapping table +// <"sl_rail_util_pa_dbm_powersetting_mapping_table_automode_0_10dbm.h"=> 0dBm-10dBm automode PA powersetting mapping table +// Default: "sl_rail_util_pa_dbm_powersetting_mapping_table_automode_0_10dbm.h" +#define SL_RAIL_UTIL_PA_TABLE_HEADER "sl_rail_util_pa_dbm_powersetting_mapping_table_automode_0_10dbm.h" +// + +// <<< end of configuration section >>> + +#include SL_RAIL_UTIL_PA_TABLE_HEADER + +#endif // SL_RAIL_UTIL_PA_TABLES_CONFIG_H diff --git a/board-support/efr32/efr32mg24/BRD4187A/config/sl_rail_util_pti_config.h b/board-support/efr32/efr32mg24/BRD4187A/config/sl_rail_util_pti_config.h index bdd36734c..736b91558 100644 --- a/board-support/efr32/efr32mg24/BRD4187A/config/sl_rail_util_pti_config.h +++ b/board-support/efr32/efr32mg24/BRD4187A/config/sl_rail_util_pti_config.h @@ -35,12 +35,12 @@ // PTI Configuration // PTI mode -// UART -// UART onewire -// SPI -// Disabled -// Default: RAIL_PTI_MODE_UART -#define SL_RAIL_UTIL_PTI_MODE RAIL_PTI_MODE_UART +// UART +// UART onewire +// SPI +// Disabled +// Default: SL_RAIL_PTI_MODE_UART +#define SL_RAIL_UTIL_PTI_MODE SL_RAIL_PTI_MODE_UART // PTI Baud Rate (Hertz) // <147800-20000000:1> diff --git a/board-support/efr32/efr32mg24/BRD4187A/config/sl_simple_button_btn0_config.h b/board-support/efr32/efr32mg24/BRD4187A/config/sl_simple_button_btn0_config.h index 23e27379c..552aa94c9 100644 --- a/board-support/efr32/efr32mg24/BRD4187A/config/sl_simple_button_btn0_config.h +++ b/board-support/efr32/efr32mg24/BRD4187A/config/sl_simple_button_btn0_config.h @@ -48,9 +48,12 @@ // SL_SIMPLE_BUTTON_BTN0 // $[GPIO_SL_SIMPLE_BUTTON_BTN0] +#ifndef SL_SIMPLE_BUTTON_BTN0_PORT #define SL_SIMPLE_BUTTON_BTN0_PORT SL_GPIO_PORT_B +#endif +#ifndef SL_SIMPLE_BUTTON_BTN0_PIN #define SL_SIMPLE_BUTTON_BTN0_PIN 1 - +#endif // [GPIO_SL_SIMPLE_BUTTON_BTN0]$ // <<< sl:end pin_tool >>> diff --git a/board-support/efr32/efr32mg24/BRD4187A/config/sl_simple_button_btn1_config.h b/board-support/efr32/efr32mg24/BRD4187A/config/sl_simple_button_btn1_config.h index 928a4d5c2..1df1ce0a1 100644 --- a/board-support/efr32/efr32mg24/BRD4187A/config/sl_simple_button_btn1_config.h +++ b/board-support/efr32/efr32mg24/BRD4187A/config/sl_simple_button_btn1_config.h @@ -48,9 +48,12 @@ // SL_SIMPLE_BUTTON_BTN1 // $[GPIO_SL_SIMPLE_BUTTON_BTN1] +#ifndef SL_SIMPLE_BUTTON_BTN1_PORT #define SL_SIMPLE_BUTTON_BTN1_PORT SL_GPIO_PORT_B +#endif +#ifndef SL_SIMPLE_BUTTON_BTN1_PIN #define SL_SIMPLE_BUTTON_BTN1_PIN 3 - +#endif // [GPIO_SL_SIMPLE_BUTTON_BTN1]$ // <<< sl:end pin_tool >>> diff --git a/board-support/efr32/efr32mg24/BRD4187C/autogen/sl_bluetooth.c b/board-support/efr32/efr32mg24/BRD4187C/autogen/sl_bluetooth.c index 4cac19436..0a5f1a969 100644 --- a/board-support/efr32/efr32mg24/BRD4187C/autogen/sl_bluetooth.c +++ b/board-support/efr32/efr32mg24/BRD4187C/autogen/sl_bluetooth.c @@ -30,6 +30,8 @@ #include #include "sl_bluetooth.h" +#include "sli_bt_api.h" +#include "sli_bgapi.h" #include "sl_assert.h" #include "sl_bt_stack_init.h" #include "sl_component_catalog.h" @@ -68,17 +70,23 @@ void sl_bt_step(void) { sl_bt_msg_t evt; + // Run the Bluetooth host stack processing step sl_bt_run(); - uint32_t event_len = sl_bt_event_pending_len(); - // For preventing from data loss, the event will be kept in the stack's queue - // if application cannot process it at the moment. + + // Check the length of the next event, if any, and verify that the application + // can process it. To prevent data loss, the event will be kept in the stack's + // queue if the application cannot process it at the moment. + size_t event_len = sli_bgapi_device_peek_event_len(&sli_bt_bgapi_device); if ((event_len == 0) || (!sl_bt_can_process_event(event_len))) { return; } - // Pop (non-blocking) a Bluetooth stack event from event queue. - sl_status_t status = sl_bt_pop_event(&evt); - if(status != SL_STATUS_OK){ + // Pop the event and process it if successful + sl_status_t status = sli_bgapi_device_pop_event(&sli_bt_bgapi_device, + sizeof(evt), + &evt); + + if (status != SL_STATUS_OK) { return; } sl_bt_process_event(&evt); diff --git a/board-support/efr32/efr32mg24/BRD4187C/autogen/sl_component_catalog.h b/board-support/efr32/efr32mg24/BRD4187C/autogen/sl_component_catalog.h index 85cd79cb7..fb05f93bb 100644 --- a/board-support/efr32/efr32mg24/BRD4187C/autogen/sl_component_catalog.h +++ b/board-support/efr32/efr32mg24/BRD4187C/autogen/sl_component_catalog.h @@ -3,6 +3,7 @@ // APIs present in project #define SL_CATALOG_BGAPI_PROTOCOL_PRESENT +#define SL_CATALOG_BGAPI_PROTOCOL_RTOS_ADAPTATION_PRESENT #define SL_CATALOG_BLUETOOTH_CONFIGURATION_PRESENT #define SL_CATALOG_BLUETOOTH_CTE_SUPPORT_PRESENT #define SL_CATALOG_BLUETOOTH_CS_SUPPORT_PRESENT @@ -24,7 +25,6 @@ #define SL_CATALOG_CMSIS_OS_COMMON_PRESENT #define SL_CATALOG_CPP_SUPPORT_PRESENT #define SL_CATALOG_DEVICE_INIT_PRESENT -#define SL_CATALOG_DEVICE_INIT_CORE_PRESENT #define SL_CATALOG_DEVICE_INIT_DCDC_PRESENT #define SL_CATALOG_EMLIB_CORE_PRESENT #define SL_CATALOG_EMLIB_RMU_PRESENT @@ -33,6 +33,7 @@ #define SL_CATALOG_GATT_CONFIGURATION_PRESENT #define SL_CATALOG_GPIO_PRESENT #define SL_CATALOG_GPIOINTERRUPT_PRESENT +#define SL_CATALOG_HAL_SYSTEM_PRESENT #define SL_CATALOG_HFXO_MANAGER_PRESENT #define SL_CATALOG_INTERRUPT_MANAGER_PRESENT #define SL_CATALOG_IOSTREAM_PRESENT @@ -52,11 +53,11 @@ #define SL_CATALOG_OT_GP_INTERFACE_PRESENT #define SL_CATALOG_OPENTHREAD_STACK_PRESENT #define SL_CATALOG_POWER_MANAGER_PRESENT +#define SL_CATALOG_POWER_MANAGER_DEEPSLEEP_PRESENT #define SL_CATALOG_PSA_CRYPTO_PRESENT #define SL_CATALOG_RADIO_PRIORITY_15_4_PRESENT #define SL_CATALOG_RAIL_LIB_PRESENT #define SL_CATALOG_RAIL_UTIL_PTI_PRESENT -#define SL_CATALOG_SE_MANAGER_PRESENT #define SL_CATALOG_SECURITY_MANAGER_PRESENT #define SL_CATALOG_SEGGER_RTT_PRESENT #define SL_CATALOG_BTN0_PRESENT diff --git a/board-support/efr32/efr32mg24/BRD4187C/autogen/sl_event_handler.c b/board-support/efr32/efr32mg24/BRD4187C/autogen/sl_event_handler.c index ebb0d0b71..5a90b0716 100644 --- a/board-support/efr32/efr32mg24/BRD4187C/autogen/sl_event_handler.c +++ b/board-support/efr32/efr32mg24/BRD4187C/autogen/sl_event_handler.c @@ -3,17 +3,20 @@ #include "sl_board_init.h" #include "sl_clock_manager.h" #include "sl_hfxo_manager.h" -#include "pa_conversions_efr32.h" -#if !SLI_SI91X_ENABLE_BLE +#include "sl_rail_util_compatible_pa.h" +#if !(defined(SLI_SI91X_ENABLE_BLE) && SLI_SI91X_ENABLE_BLE) #include "sl_bluetooth.h" #include "sl_rail_util_power_manager_init.h" #endif // !SLI_SI91X_ENABLE_BLE +#include "sl_rail_util_power_manager_init.h" #include "sl_rail_util_pti.h" #include "sl_rail_util_rssi.h" #include "btl_interface.h" #include "sl_board_control.h" #include "platform-efr32.h" #include "sl_bt_rtos_adaptation.h" +#include "sl_bluetooth.h" +#include "sl_debug_swo.h" #include "sl_gpio.h" #include "gpiointerrupt.h" #if defined(SL_MATTER_USE_SI70XX_SENSOR) && SL_MATTER_USE_SI70XX_SENSOR @@ -23,7 +26,12 @@ #include "sl_mbedtls.h" #include "sl_ot_rtos_adaptation.h" #include "sl_simple_button_instances.h" + +#if (defined(SL_MATTER_RGB_LED_ENABLED) && SL_MATTER_RGB_LED_ENABLED == 1) +#include "sl_simple_rgb_pwm_led_instances.h" +#else #include "sl_simple_led_instances.h" +#endif //(SL_MATTER_RGB_LED_ENABLED) && SL_MATTER_RGB_LED_ENABLED == 1) #if defined(CONFIG_ENABLE_UART) #include "sl_uartdrv_instances.h" #endif // CONFIG_ENABLE_UART @@ -37,6 +45,7 @@ #include "sl_iostream_init_instances.h" #include "cmsis_os2.h" #include "nvm3_default.h" + #include "sl_iostream_handles.h" void sli_driver_permanent_allocation(void) @@ -49,13 +58,12 @@ void sli_service_permanent_allocation(void) void sli_stack_permanent_allocation(void) { - #if !SLI_SI91X_ENABLE_BLE +#if !SLI_SI91X_ENABLE_BLE sli_bt_stack_permanent_allocation(); -#endif - +#endif // !SLI_SI91X_ENABLE_BLE #ifdef SL_OT_ENABLE sl_ot_rtos_perm_allocation(); -#endif +#endif // SL_OT_ENABLE } void sli_internal_permanent_allocation(void) @@ -87,15 +95,17 @@ void sl_kernel_start(void) void sl_driver_init(void) { sl_gpio_init(); -#ifdef SL_WIFI - sl_spidrv_init_instances(); -#endif + GPIOINT_Init(); #if defined(SL_MATTER_USE_SI70XX_SENSOR) && SL_MATTER_USE_SI70XX_SENSOR sl_i2cspm_init_instances(); #endif // defined(SL_MATTER_USE_SI70XX_SENSOR) && SL_MATTER_USE_SI70XX_SENSOR sl_simple_button_init_instances(); +#if (defined(SL_MATTER_RGB_LED_ENABLED) && SL_MATTER_RGB_LED_ENABLED == 1) + sl_simple_rgb_pwm_led_init_instances(); +#else sl_simple_led_init_instances(); -#if defined(CONFIG_ENABLE_UART) +#endif //(SL_MATTER_RGB_LED_ENABLED) && SL_MATTER_RGB_LED_ENABLED == 1) + #if defined(CONFIG_ENABLE_UART) sl_uartdrv_init_instances(); #endif // CONFIG_ENABLE_UART } @@ -123,7 +133,6 @@ void sl_stack_init(void) sl_rail_util_rssi_init(); sli_bt_stack_functional_init(); #endif // !SLI_SI91X_ENABLE_BLE - #ifdef SL_OT_ENABLE sl_ot_sys_init(); #endif // SL_OT_ENABLE diff --git a/board-support/efr32/efr32mg24/BRD4187C/autogen/sl_simple_led_instances.h b/board-support/efr32/efr32mg24/BRD4187C/autogen/sl_simple_led_instances.h index afb5875eb..928fbe942 100644 --- a/board-support/efr32/efr32mg24/BRD4187C/autogen/sl_simple_led_instances.h +++ b/board-support/efr32/efr32mg24/BRD4187C/autogen/sl_simple_led_instances.h @@ -34,6 +34,7 @@ #ifdef __cplusplus extern "C" { #endif + #include "sl_simple_led.h" extern const sl_led_t sl_led_led0; diff --git a/board-support/efr32/efr32mg24/BRD4187C/autogen/sl_spidrv_init.c b/board-support/efr32/efr32mg24/BRD4187C/autogen/sl_spidrv_init.c index c5b40d613..328954938 100644 --- a/board-support/efr32/efr32mg24/BRD4187C/autogen/sl_spidrv_init.c +++ b/board-support/efr32/efr32mg24/BRD4187C/autogen/sl_spidrv_init.c @@ -1,48 +1,46 @@ -#include "spidrv.h" -#include "sl_spidrv_instances.h" -#include "sl_assert.h" - -#include "sl_spidrv_exp_config.h" - -SPIDRV_HandleData_t sl_spidrv_exp_handle_data; -SPIDRV_Handle_t sl_spidrv_exp_handle = &sl_spidrv_exp_handle_data; - -SPIDRV_Init_t sl_spidrv_init_exp = { - .port = SL_SPIDRV_EXP_PERIPHERAL, -#if defined(_USART_ROUTELOC0_MASK) - .portLocationTx = SL_SPIDRV_EXP_TX_LOC, - .portLocationRx = SL_SPIDRV_EXP_RX_LOC, - .portLocationClk = SL_SPIDRV_EXP_CLK_LOC, -#if defined(SL_SPIDRV_EXP_CS_LOC) - .portLocationCs = SL_SPIDRV_EXP_CS_LOC, -#endif -#elif defined(_GPIO_USART_ROUTEEN_MASK) - .portTx = SL_SPIDRV_EXP_TX_PORT, - .portRx = SL_SPIDRV_EXP_RX_PORT, - .portClk = SL_SPIDRV_EXP_CLK_PORT, -#if defined(SL_SPIDRV_EXP_CS_PORT) - .portCs = SL_SPIDRV_EXP_CS_PORT, -#endif - .pinTx = SL_SPIDRV_EXP_TX_PIN, - .pinRx = SL_SPIDRV_EXP_RX_PIN, - .pinClk = SL_SPIDRV_EXP_CLK_PIN, -#if defined(SL_SPIDRV_EXP_CS_PIN) - .pinCs = SL_SPIDRV_EXP_CS_PIN, -#endif -#else - .portLocation = SL_SPIDRV_EXP_ROUTE_LOC, -#endif - .bitRate = SL_SPIDRV_EXP_BITRATE, - .frameLength = SL_SPIDRV_EXP_FRAME_LENGTH, - .dummyTxValue = 0, - .type = SL_SPIDRV_EXP_TYPE, - .bitOrder = SL_SPIDRV_EXP_BIT_ORDER, - .clockMode = SL_SPIDRV_EXP_CLOCK_MODE, - .csControl = SL_SPIDRV_EXP_CS_CONTROL, - .slaveStartMode = SL_SPIDRV_EXP_SLAVE_START_MODE, -}; - -void sl_spidrv_init_instances(void) -{ - SPIDRV_Init(sl_spidrv_exp_handle, &sl_spidrv_init_exp); -} +#include "spidrv.h" +#include "sl_spidrv_instances.h" +#include "sl_assert.h" + + +#include "sl_spidrv_exp_config.h" +SPIDRV_HandleData_t sl_spidrv_exp_handle_data; +SPIDRV_Handle_t sl_spidrv_exp_handle = &sl_spidrv_exp_handle_data; +SPIDRV_Init_t sl_spidrv_init_exp = { + .port = SL_SPIDRV_EXP_PERIPHERAL, +#if defined(_USART_ROUTELOC0_MASK) + .portLocationTx = SL_SPIDRV_EXP_TX_LOC, + .portLocationRx = SL_SPIDRV_EXP_RX_LOC, + .portLocationClk = SL_SPIDRV_EXP_CLK_LOC, +#if defined(SL_SPIDRV_EXP_CS_LOC) + .portLocationCs = SL_SPIDRV_EXP_CS_LOC, +#endif +#elif defined(_GPIO_USART_ROUTEEN_MASK) + .portTx = SL_SPIDRV_EXP_TX_PORT, + .portRx = SL_SPIDRV_EXP_RX_PORT, + .portClk = SL_SPIDRV_EXP_CLK_PORT, +#if defined(SL_SPIDRV_EXP_CS_PORT) + .portCs = SL_SPIDRV_EXP_CS_PORT, +#endif + .pinTx = SL_SPIDRV_EXP_TX_PIN, + .pinRx = SL_SPIDRV_EXP_RX_PIN, + .pinClk = SL_SPIDRV_EXP_CLK_PIN, +#if defined(SL_SPIDRV_EXP_CS_PIN) + .pinCs = SL_SPIDRV_EXP_CS_PIN, +#endif +#else + .portLocation = SL_SPIDRV_EXP_ROUTE_LOC, +#endif + .bitRate = SL_SPIDRV_EXP_BITRATE, + .frameLength = SL_SPIDRV_EXP_FRAME_LENGTH, + .dummyTxValue = 0, + .type = SL_SPIDRV_EXP_TYPE, + .bitOrder = SL_SPIDRV_EXP_BIT_ORDER, + .clockMode = SL_SPIDRV_EXP_CLOCK_MODE, + .csControl = SL_SPIDRV_EXP_CS_CONTROL, + .slaveStartMode = SL_SPIDRV_EXP_SLAVE_START_MODE, +}; + +void sl_spidrv_init_instances(void) { + SPIDRV_Init(sl_spidrv_exp_handle, &sl_spidrv_init_exp); +} diff --git a/board-support/efr32/efr32mg24/BRD4187C/autogen/sl_spidrv_instances.h b/board-support/efr32/efr32mg24/BRD4187C/autogen/sl_spidrv_instances.h index a0ea2e8c0..64e7c3b29 100644 --- a/board-support/efr32/efr32mg24/BRD4187C/autogen/sl_spidrv_instances.h +++ b/board-support/efr32/efr32mg24/BRD4187C/autogen/sl_spidrv_instances.h @@ -1,18 +1,17 @@ -#ifndef SL_SPIDRV_INSTANCES_H -#define SL_SPIDRV_INSTANCES_H - -#ifdef __cplusplus -extern "C" { -#endif - -#include "spidrv.h" - -extern SPIDRV_Handle_t sl_spidrv_exp_handle; - -void sl_spidrv_init_instances(void); - -#ifdef __cplusplus -} -#endif - -#endif // SL_SPIDRV_INSTANCES_H +#ifndef SL_SPIDRV_INSTANCES_H +#define SL_SPIDRV_INSTANCES_H + +#ifdef __cplusplus +extern "C" { +#endif + +#include "spidrv.h" +extern SPIDRV_Handle_t sl_spidrv_exp_handle; + +void sl_spidrv_init_instances(void); + +#ifdef __cplusplus +} +#endif + +#endif // SL_SPIDRV_INSTANCES_H diff --git a/board-support/efr32/efr32mg24/BRD4187C/config/brd4187c.h b/board-support/efr32/efr32mg24/BRD4187C/config/brd4187c.h deleted file mode 100644 index 0ee61e6f6..000000000 --- a/board-support/efr32/efr32mg24/BRD4187C/config/brd4187c.h +++ /dev/null @@ -1,31 +0,0 @@ -#ifndef _BRD4187C_H_ -#define _BRD4187C_H_ - -#define PIN_OUT_SET 1 -#define PIN_OUT_CLEAR 0 - -#define MY_USART USART0 -#define MY_USART_CLOCK cmuClock_USART0 -#define MY_USART_TX_SIGNAL dmadrvPeripheralSignal_USART0_TXBL -#define MY_USART_RX_SIGNAL dmadrvPeripheralSignal_USART0_RXDATAV - -#define SL_WFX_HOST_PINOUT_RESET_PORT SL_GPIO_PORT_A -#define SL_WFX_HOST_PINOUT_RESET_PIN 5 -#define SL_WFX_HOST_PINOUT_SPI_WIRQ_PORT SL_GPIO_PORT_A /* SPI IRQ port*/ -#define SL_WFX_HOST_PINOUT_SPI_WIRQ_PIN 8 /* SPI IRQ pin */ -#define SL_WFX_HOST_PINOUT_WUP_PORT SL_GPIO_PORT_B -#define SL_WFX_HOST_PINOUT_WUP_PIN 5 - -#define SL_WFX_HOST_PINOUT_SPI_TX_PORT SL_GPIO_PORT_C -#define SL_WFX_HOST_PINOUT_SPI_TX_PIN 1 - -#define SL_WFX_HOST_PINOUT_SPI_RX_PORT SL_GPIO_PORT_C -#define SL_WFX_HOST_PINOUT_SPI_RX_PIN 2 - -#define SL_WFX_HOST_PINOUT_SPI_CLK_PORT SL_GPIO_PORT_C -#define SL_WFX_HOST_PINOUT_SPI_CLK_PIN 3 - -#define SL_WFX_HOST_PINOUT_SPI_CS_PORT SL_GPIO_PORT_C -#define SL_WFX_HOST_PINOUT_SPI_CS_PIN 0 - -#endif /* _BRD4187C_H_ */ \ No newline at end of file diff --git a/board-support/efr32/efr32mg24/BRD4187C/config/pin_config.h b/board-support/efr32/efr32mg24/BRD4187C/config/pin_config.h new file mode 100644 index 000000000..5f72d8949 --- /dev/null +++ b/board-support/efr32/efr32mg24/BRD4187C/config/pin_config.h @@ -0,0 +1,252 @@ +#ifndef PIN_CONFIG_H +#define PIN_CONFIG_H + +// $[CMU] +// [CMU]$ + +// $[LFXO] +// [LFXO]$ + +// $[PRS.ASYNCH0] +// [PRS.ASYNCH0]$ + +// $[PRS.ASYNCH1] +// [PRS.ASYNCH1]$ + +// $[PRS.ASYNCH2] +// [PRS.ASYNCH2]$ + +// $[PRS.ASYNCH3] +// [PRS.ASYNCH3]$ + +// $[PRS.ASYNCH4] +// [PRS.ASYNCH4]$ + +// $[PRS.ASYNCH5] +// [PRS.ASYNCH5]$ + +// $[PRS.ASYNCH6] +// [PRS.ASYNCH6]$ + +// $[PRS.ASYNCH7] +// [PRS.ASYNCH7]$ + +// $[PRS.ASYNCH8] +// [PRS.ASYNCH8]$ + +// $[PRS.ASYNCH9] +// [PRS.ASYNCH9]$ + +// $[PRS.ASYNCH10] +// [PRS.ASYNCH10]$ + +// $[PRS.ASYNCH11] +// [PRS.ASYNCH11]$ + +// $[PRS.ASYNCH12] +// [PRS.ASYNCH12]$ + +// $[PRS.ASYNCH13] +// [PRS.ASYNCH13]$ + +// $[PRS.ASYNCH14] +// [PRS.ASYNCH14]$ + +// $[PRS.ASYNCH15] +// [PRS.ASYNCH15]$ + +// $[PRS.SYNCH0] +// [PRS.SYNCH0]$ + +// $[PRS.SYNCH1] +// [PRS.SYNCH1]$ + +// $[PRS.SYNCH2] +// [PRS.SYNCH2]$ + +// $[PRS.SYNCH3] +// [PRS.SYNCH3]$ + +// $[GPIO] +// GPIO SWV on PA03 +#ifndef GPIO_SWV_PORT +#define GPIO_SWV_PORT SL_GPIO_PORT_A +#endif +#ifndef GPIO_SWV_PIN +#define GPIO_SWV_PIN 3 +#endif + +// [GPIO]$ + +// $[TIMER0] +// [TIMER0]$ + +// $[TIMER1] +// [TIMER1]$ + +// $[TIMER2] +// [TIMER2]$ + +// $[TIMER3] +// [TIMER3]$ + +// $[TIMER4] +// [TIMER4]$ + +// $[USART0] +// USART0 CLK on PC03 +#ifndef USART0_CLK_PORT +#define USART0_CLK_PORT SL_GPIO_PORT_C +#endif +#ifndef USART0_CLK_PIN +#define USART0_CLK_PIN 3 +#endif + +// USART0 TX on PC01 +#ifndef USART0_TX_PORT +#define USART0_TX_PORT SL_GPIO_PORT_C +#endif +#ifndef USART0_TX_PIN +#define USART0_TX_PIN 1 +#endif + +// [USART0]$ + +// $[I2C1] +// I2C1 SCL on PC05 +#ifndef I2C1_SCL_PORT +#define I2C1_SCL_PORT SL_GPIO_PORT_C +#endif +#ifndef I2C1_SCL_PIN +#define I2C1_SCL_PIN 5 +#endif + +// I2C1 SDA on PC07 +#ifndef I2C1_SDA_PORT +#define I2C1_SDA_PORT SL_GPIO_PORT_C +#endif +#ifndef I2C1_SDA_PIN +#define I2C1_SDA_PIN 7 +#endif + +// [I2C1]$ + +// $[EUSART1] +// [EUSART1]$ + +// $[KEYSCAN] +// [KEYSCAN]$ + +// $[LETIMER0] +// [LETIMER0]$ + +// $[IADC0] +// [IADC0]$ + +// $[ACMP0] +// [ACMP0]$ + +// $[ACMP1] +// [ACMP1]$ + +// $[VDAC0] +// [VDAC0]$ + +// $[VDAC1] +// [VDAC1]$ + +// $[PCNT0] +// [PCNT0]$ + +// $[HFXO0] +// [HFXO0]$ + +// $[I2C0] +// [I2C0]$ + +// $[EUSART0] +// EUSART0 CTS on PB05 +#ifndef EUSART0_CTS_PORT +#define EUSART0_CTS_PORT SL_GPIO_PORT_B +#endif +#ifndef EUSART0_CTS_PIN +#define EUSART0_CTS_PIN 5 +#endif + +// EUSART0 RTS on PA00 +#ifndef EUSART0_RTS_PORT +#define EUSART0_RTS_PORT SL_GPIO_PORT_A +#endif +#ifndef EUSART0_RTS_PIN +#define EUSART0_RTS_PIN 0 +#endif + +// EUSART0 RX on PA09 +#ifndef EUSART0_RX_PORT +#define EUSART0_RX_PORT SL_GPIO_PORT_A +#endif +#ifndef EUSART0_RX_PIN +#define EUSART0_RX_PIN 9 +#endif + +// EUSART0 TX on PA08 +#ifndef EUSART0_TX_PORT +#define EUSART0_TX_PORT SL_GPIO_PORT_A +#endif +#ifndef EUSART0_TX_PIN +#define EUSART0_TX_PIN 8 +#endif + +// [EUSART0]$ + +// $[PTI] +// [PTI]$ + +// $[MODEM] +// [MODEM]$ + +// $[CUSTOM_PIN_NAME] +#ifndef _PORT +#define _PORT SL_GPIO_PORT_A +#endif +#ifndef _PIN +#define _PIN 0 +#endif + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +// [CUSTOM_PIN_NAME]$ + + +#endif // PIN_CONFIG_H + + diff --git a/board-support/efr32/efr32mg24/BRD4187C/config/psa_crypto_config.h b/board-support/efr32/efr32mg24/BRD4187C/config/psa_crypto_config.h index 20703b41d..773ce99e0 100644 --- a/board-support/efr32/efr32mg24/BRD4187C/config/psa_crypto_config.h +++ b/board-support/efr32/efr32mg24/BRD4187C/config/psa_crypto_config.h @@ -27,26 +27,32 @@ // Default: 4 #define SL_PSA_KEY_USER_SLOT_COUNT (4) -// PSA Maximum User Persistent Keys Count <0-1024> +// Maximum User Persistent PSA Key Count <0-1024> // Maximum amount of keys (or other files) that can be stored persistently -// by the application through the PSA interface, when persistent storage -// support for PSA Crypto is included in the project. -// Due to caching logic, this setting does have an impact on static RAM usage. -// Note that this number is added to the potential requirements from other -// software components in the project, such that the total amount of keys -// which can be stored through the ITS backend can be higher than what is -// configured here. +// by the user application, when PSA ITS (Internal Trusted Storage) support +// is included in the project. +// NOTE: +// In addition to SL_PSA_ITS_USER_MAX_FILES (number of user keys) the +// application may be configured to include SDK components that require an +// additional number of keys. The sum of user keys and SDK component keys +// is computed and the result, called SL_PSA_ITS_MAX_FILES, is used +// internally in the PSA ITS driver. // -// WARNING: When changing this setting on an application that is already -// deployed, and thus will get the change through an application upgrade, -// care should be taken to ensure that the setting is only ever increased, -// and never decreased. Decreasing this setting might cause previously -// stored keys/files to become inaccessible. +// WARNING: +// For applications using PSA ITS driver version 1 or 2, when changing the +// SL_PSA_ITS_USER_MAX_FILES in an application that is already depeloyed, +// and thus will get the change through an application upgrade, care should +// be taken to ensure that the total sum of keys SL_PSA_ITS_MAX_FILES is +// only ever equal or increased, and never decreased. Decreasing this +// setting might cause previously stored keys/files to become inaccessible, +// ITS should be cleared and all files need to be stored again. // -// It is not possible to change this setting when using V3 ITS Driver. -// The file-storage indexing is dependent on the maximum number of files, -// and if SL_PSA_ITS_USER_MAX_FILES is changed, ITS should be cleared and -// all files need to be stored again. +// For applications using PSA ITS driver version 3, it is not possible to +// change this setting because the file-storage indexing is dependent on the +// maximum number of files (SL_PSA_ITS_MAX_FILES) being consistent, and if +// the sum of SDK component keys and user keys (SL_PSA_ITS_USER_MAX_FILES) +// is changed, may cause previously stored keys/files to become inaccessible +// ITS should be cleared and all files need to be stored again. // Default: 128 #define SL_PSA_ITS_USER_MAX_FILES (128) diff --git a/board-support/efr32/efr32mg24/BRD4187C/config/sl_bluetooth_config.h b/board-support/efr32/efr32mg24/BRD4187C/config/sl_bluetooth_config.h index 9b6a804e0..93bfbbcc4 100644 --- a/board-support/efr32/efr32mg24/BRD4187C/config/sl_bluetooth_config.h +++ b/board-support/efr32/efr32mg24/BRD4187C/config/sl_bluetooth_config.h @@ -99,6 +99,7 @@ // if the LE Power Control feature is enabled. // When this configuration is passed into stack initialization, the stack // will select the closest value that the device supports. +// API sl_bt_system_set_tx_power() can be used to set the minimum TX power at runtime. // API sl_bt_system_get_tx_power_setting() can be used to query the selected value. #define SL_BT_CONFIG_MIN_TX_POWER (-30) @@ -108,6 +109,7 @@ // advertising, scanning and DTM testing. // When this configuration is passed into stack initialization, the stack // will select the closest value that the device supports. +// API sl_bt_system_set_tx_power() can be used to set the maximum TX power at runtime. // API sl_bt_system_get_tx_power_setting() can be used to query the selected value. #define SL_BT_CONFIG_MAX_TX_POWER (80) diff --git a/board-support/efr32/efr32mg24/BRD4187C/config/sl_board_control_config.h b/board-support/efr32/efr32mg24/BRD4187C/config/sl_board_control_config.h index f63c57de8..86468aaa6 100644 --- a/board-support/efr32/efr32mg24/BRD4187C/config/sl_board_control_config.h +++ b/board-support/efr32/efr32mg24/BRD4187C/config/sl_board_control_config.h @@ -55,14 +55,22 @@ // SL_BOARD_ENABLE_VCOM // $[GPIO_SL_BOARD_ENABLE_VCOM] -#define SL_BOARD_ENABLE_VCOM_PORT SL_GPIO_PORT_B -#define SL_BOARD_ENABLE_VCOM_PIN 0 +#ifndef SL_BOARD_ENABLE_VCOM_PORT +#define SL_BOARD_ENABLE_VCOM_PORT SL_GPIO_PORT_B +#endif +#ifndef SL_BOARD_ENABLE_VCOM_PIN +#define SL_BOARD_ENABLE_VCOM_PIN 0 +#endif // [GPIO_SL_BOARD_ENABLE_VCOM]$ // SL_BOARD_ENABLE_DISPLAY // $[GPIO_SL_BOARD_ENABLE_DISPLAY] -#define SL_BOARD_ENABLE_DISPLAY_PORT SL_GPIO_PORT_C -#define SL_BOARD_ENABLE_DISPLAY_PIN 9 +#ifndef SL_BOARD_ENABLE_DISPLAY_PORT +#define SL_BOARD_ENABLE_DISPLAY_PORT SL_GPIO_PORT_C +#endif +#ifndef SL_BOARD_ENABLE_DISPLAY_PIN +#define SL_BOARD_ENABLE_DISPLAY_PIN 9 +#endif // [GPIO_SL_BOARD_ENABLE_DISPLAY]$ // SL_BOARD_ENABLE_SENSOR_RHT diff --git a/board-support/efr32/efr32mg24/BRD4187C/config/sl_btctrl_config.h b/board-support/efr32/efr32mg24/BRD4187C/config/sl_btctrl_config.h index ed75a2d0e..403df1ffe 100644 --- a/board-support/efr32/efr32mg24/BRD4187C/config/sl_btctrl_config.h +++ b/board-support/efr32/efr32mg24/BRD4187C/config/sl_btctrl_config.h @@ -146,15 +146,27 @@ #define SL_BT_CONTROLLER_ADAPTIVITY_MODE (SL_BTCTRL_CHANNELMAP_FLAG_ACTIVE_ADAPTIVITY) #endif -// Power Amplifier (PA) Configuration -// Automode PA configuration -// Highest available PA configuration -// RAIL Utility component PA configuration -// Select the Power Amplifier configuration -// Default: RAIL Utility component PA configuration -#ifndef SL_BT_CONTROLLER_PA_CONFIG -#define SL_BT_CONTROLLER_PA_CONFIG SL_BT_BLUETOOTH_RAIL_UTIL_PA -#endif +// Advertising Configuration +// Include TX Power in the extended header of primary extended advertising packets +// This is default setting to all advertising sets unless it is specifically overridden by VS_SiliconLabs_Set_Advertising_Config_Bits. +// Default: 0 +// Enabling this option takes effect only if permitted by Le_Set_Extended_Advertising_Parameters +// According to Link Layer specification, Vol 6, Part B, Table 2.4 and Table 2.5: +// Optional in 1M PHY when the advertiser is connectable or scannable, or with auxiliary pointer. +// In other cases, the Extended Advertising TX Power is always optional by settings. +#define SL_BT_CONTROLLER_PRIMARY_EXT_PACKET_INCLUDE_TX_POWER (0) +// +// Include Advertiser Address in the header of primary extended advertising packets +// This is default setting to all advertising sets unless it is specifically overridden by VS_SiliconLabs_Set_Advertising_Config_Bits. +// Default: 0 +// Enabling this option takes effect only if permitted by Le_Set_Extended_Advertising_Parameters +// According to Link Layer specification, Vol 6, Part B, Table 2.4 and Table 2.5: +// Optional in 1M PHY when the advertiser is non-connectable and non-scannable, with auxiliary pointer. +// Mandatory when the advertiser is non-connectable and non-scannable, without auxiliary pointer. +// Forbidden when the advertiser is connectable or scannable. +#define SL_BT_CONTROLLER_PRIMARY_EXT_PACKET_INCLUDE_ADDRESS (0) +// +// Advertising Configuration // Bluetooth Controller Configuration // <<< end of configuration section >>> diff --git a/board-support/efr32/efr32mg24/BRD4187C/config/sl_clock_manager_tree_config.h b/board-support/efr32/efr32mg24/BRD4187C/config/sl_clock_manager_tree_config.h index 8c0be95e9..1f6f2a089 100644 --- a/board-support/efr32/efr32mg24/BRD4187C/config/sl_clock_manager_tree_config.h +++ b/board-support/efr32/efr32mg24/BRD4187C/config/sl_clock_manager_tree_config.h @@ -105,9 +105,9 @@ #endif // PCLK branch divider -// MIN // DIV1 // DIV2 +// MIN // PCLK branch is derived from HCLK. This clock drives the APB bus interface. // SL_CLOCK_MANAGER_PCLK_DIV_MIN #ifndef SL_CLOCK_MANAGER_PCLK_DIVIDER diff --git a/board-support/efr32/efr32mg24/BRD4187C/config/sl_i2cspm_sensor_config.h b/board-support/efr32/efr32mg24/BRD4187C/config/sl_i2cspm_sensor_config.h index 03c4886d4..9804ead6f 100644 --- a/board-support/efr32/efr32mg24/BRD4187C/config/sl_i2cspm_sensor_config.h +++ b/board-support/efr32/efr32mg24/BRD4187C/config/sl_i2cspm_sensor_config.h @@ -54,17 +54,28 @@ // <<< sl:start pin_tool >>> // SL_I2CSPM_SENSOR // $[I2C_SL_I2CSPM_SENSOR] +#ifndef SL_I2CSPM_SENSOR_PERIPHERAL #define SL_I2CSPM_SENSOR_PERIPHERAL I2C1 +#endif +#ifndef SL_I2CSPM_SENSOR_PERIPHERAL_NO #define SL_I2CSPM_SENSOR_PERIPHERAL_NO 1 +#endif // I2C1 SCL on PC05 +#ifndef SL_I2CSPM_SENSOR_SCL_PORT #define SL_I2CSPM_SENSOR_SCL_PORT SL_GPIO_PORT_C +#endif +#ifndef SL_I2CSPM_SENSOR_SCL_PIN #define SL_I2CSPM_SENSOR_SCL_PIN 5 +#endif // I2C1 SDA on PC07 +#ifndef SL_I2CSPM_SENSOR_SDA_PORT #define SL_I2CSPM_SENSOR_SDA_PORT SL_GPIO_PORT_C +#endif +#ifndef SL_I2CSPM_SENSOR_SDA_PIN #define SL_I2CSPM_SENSOR_SDA_PIN 7 - +#endif // [I2C_SL_I2CSPM_SENSOR]$ // <<< sl:end pin_tool >>> diff --git a/board-support/efr32/efr32mg24/BRD4187C/config/sl_mbedtls_config.h b/board-support/efr32/efr32mg24/BRD4187C/config/sl_mbedtls_config.h index e249b4d1b..7146ba648 100644 --- a/board-support/efr32/efr32mg24/BRD4187C/config/sl_mbedtls_config.h +++ b/board-support/efr32/efr32mg24/BRD4187C/config/sl_mbedtls_config.h @@ -71,9 +71,14 @@ // Default: 1 // This option is enabled assuming all buffers passed to any PSA function reside // in memory that is accessible only to the PSA function during its execution. +// This improves performance by avoiding extra buffer copies, reducing memory +// usage and allocation overhead. However, it is NOT the most secure option and +// should only be enabled if all buffers passed to PSA functions are exclusively +// accessible to PSA and never shared with untrusted code. // This option MUST be disabled whenever buffer arguments are in memory shared // with an untrusted party, for example where arguments to PSA calls are passed -// across a trust boundary. +// across a trust boundary, e.g. if TrustZone is enabled, and the PSA Crypto core +// is placed in the Secure domain. #define SL_MBEDTLS_PSA_ASSUME_EXCLUSIVE_BUFFERS 1 // diff --git a/board-support/efr32/efr32mg24/BRD4187C/config/sl_memory_manager_config.h b/board-support/efr32/efr32mg24/BRD4187C/config/sl_memory_manager_config.h index 26b84b107..4a16c29fe 100644 --- a/board-support/efr32/efr32mg24/BRD4187C/config/sl_memory_manager_config.h +++ b/board-support/efr32/efr32mg24/BRD4187C/config/sl_memory_manager_config.h @@ -51,4 +51,11 @@ // <<< end of configuration section >>> +// Keep this configuration outside the configuration section until the feature is ready for release. +// Enables the heap fallback mechanism. +// Setting this configuration to 0 will disable the fallback mechanism on DTCM and PSRAM. +// If this configuration is disabled, the memory manager will not attempt to use alternative memory regions for allocations even if using the fallback parameters. +// Default: 1 +#define SL_MEMORY_MANAGER_HEAP_FALLBACK_EN 1 + #endif /* SL_MEMORY_MANAGER_CONFIG_H */ diff --git a/board-support/efr32/efr32mg24/BRD4187C/config/sl_openthread_features_config.h b/board-support/efr32/efr32mg24/BRD4187C/config/sl_openthread_features_config.h index 22340498d..a3697f8af 100644 --- a/board-support/efr32/efr32mg24/BRD4187C/config/sl_openthread_features_config.h +++ b/board-support/efr32/efr32mg24/BRD4187C/config/sl_openthread_features_config.h @@ -65,6 +65,7 @@ #define OPENTHREAD_CONFIG_MAC_CSL_RECEIVER_ENABLE 1 #endif // CSL Scheduling Uncertainty (±10 us units) <12..999:1> +// Left unchanged the value will be set to 175 for RCPs, 20 for FTDs, and 12 for MTDs #ifndef SL_OPENTHREAD_CSL_TX_UNCERTAINTY #if OPENTHREAD_RADIO #define SL_OPENTHREAD_CSL_TX_UNCERTAINTY 175 @@ -142,12 +143,10 @@ #define OPENTHREAD_CONFIG_CHANNEL_MONITOR_ENABLE 0 #endif // - -// Commissioner +// Commissioner #ifndef OPENTHREAD_CONFIG_COMMISSIONER_ENABLE #define OPENTHREAD_CONFIG_COMMISSIONER_ENABLE 0 #endif - // Max Joiner Entries // The maximum number of Joiner entries maintained by the Commissioner. // 2 @@ -155,7 +154,6 @@ #define OPENTHREAD_CONFIG_COMMISSIONER_MAX_JOINER_ENTRIES 2 #endif // - // COAP API #ifndef OPENTHREAD_CONFIG_COAP_API_ENABLE #define OPENTHREAD_CONFIG_COAP_API_ENABLE 0 @@ -171,6 +169,11 @@ #define OPENTHREAD_CONFIG_COAP_SECURE_API_ENABLE 0 #endif // +// COAP Blockwise Transfer +#ifndef OPENTHREAD_CONFIG_COAP_BLOCKWISE_TRANSFER_ENABLE +#define OPENTHREAD_CONFIG_COAP_BLOCKWISE_TRANSFER_ENABLE 0 +#endif +// // DHCP6 Client #ifndef OPENTHREAD_CONFIG_DHCP6_CLIENT_ENABLE #define OPENTHREAD_CONFIG_DHCP6_CLIENT_ENABLE 0 @@ -196,16 +199,27 @@ #define OPENTHREAD_CONFIG_IP6_FRAGMENTATION_ENABLE 0 #endif // -// Maximum number of IPv6 unicast addresses allowed to be externally added +// IPv6 Limits +// Maximum IPv6 external unicast addresses +// Maximum number of IPv6 unicast addresses allowed to be externally added +// 4 #ifndef OPENTHREAD_CONFIG_IP6_MAX_EXT_UCAST_ADDRS #define OPENTHREAD_CONFIG_IP6_MAX_EXT_UCAST_ADDRS 4 #endif -// -// Maximum number of IPv6 multicast addresses allowed to be externally added +// Maximum IPv6 external multicast addresses +// Maximum number of IPv6 multicast addresses allowed to be externally added +// 4 #ifndef OPENTHREAD_CONFIG_IP6_MAX_EXT_MCAST_ADDRS #define OPENTHREAD_CONFIG_IP6_MAX_EXT_MCAST_ADDRS 4 #endif -// +// Maximum IPv6 address registrations for MTD +// The maximum number of IPv6 address registrations for MTD. +// If left unchanged will default to the value of OPENTHREAD_CONFIG_MLE_IP_ADDRS_PER_CHILD +// 4 +#ifndef OPENTHREAD_CONFIG_MLE_IP_ADDRS_TO_REGISTER +#define OPENTHREAD_CONFIG_MLE_IP_ADDRS_TO_REGISTER (OPENTHREAD_CONFIG_MLE_IP_ADDRS_PER_CHILD) +#endif +// // Jam Detection #ifndef OPENTHREAD_CONFIG_JAM_DETECTION_ENABLE #define OPENTHREAD_CONFIG_JAM_DETECTION_ENABLE 0 @@ -226,6 +240,14 @@ #define OPENTHREAD_CONFIG_MAC_FILTER_ENABLE 0 #endif // +// MLE Children +// Maximum number of Thread children supported by the device +// Default is 10. Used by the Thread stack to configure the size of child table. +// 10 +#ifndef OPENTHREAD_CONFIG_MLE_MAX_CHILDREN +#define OPENTHREAD_CONFIG_MLE_MAX_CHILDREN 10 +#endif +// // MLE Long Routes extension (experimental) #ifndef OPENTHREAD_CONFIG_MLE_LONG_ROUTES_ENABLE #define OPENTHREAD_CONFIG_MLE_LONG_ROUTES_ENABLE 0 @@ -235,27 +257,66 @@ #ifndef OPENTHREAD_CONFIG_MULTIPAN_RCP_ENABLE #define OPENTHREAD_CONFIG_MULTIPAN_RCP_ENABLE 0 #endif +// Broadcast IID for spinel frames +// Define broadcast IID for spinel frames dedicated to all hosts in multipan configuration +// 0 +#ifndef OPENTHREAD_SPINEL_CONFIG_BROADCAST_IID +#define OPENTHREAD_SPINEL_CONFIG_BROADCAST_IID 0 +#endif +#if OPENTHREAD_CONFIG_MULTIPAN_RCP_ENABLE +// Maximum number of Zigbee children for multiprotocol (DMP) builds +// Ensures correct table sizing for Zigbee when DMP/multipan is enabled. +// 6 +#ifndef SL_ZIGBEE_MAX_END_DEVICE_CHILDREN +#define SL_ZIGBEE_MAX_END_DEVICE_CHILDREN 6 +#endif +#endif // // Multiple OpenThread Instances #ifndef OPENTHREAD_CONFIG_MULTIPLE_INSTANCE_ENABLE #define OPENTHREAD_CONFIG_MULTIPLE_INSTANCE_ENABLE 0 #endif -// // Multiple Static Instance Support #ifndef OPENTHREAD_CONFIG_MULTIPLE_STATIC_INSTANCE_ENABLE #define OPENTHREAD_CONFIG_MULTIPLE_STATIC_INSTANCE_ENABLE 0 #endif -// -// Number of OpenThread Instances For Static Buffer Allocation +// Number of OpenThread Instances +// Default is 2. Number of OpenThread Instances For Static Buffer Allocation. +// 2 #ifndef OPENTHREAD_CONFIG_MULTIPLE_INSTANCE_NUM #define OPENTHREAD_CONFIG_MULTIPLE_INSTANCE_NUM 2 #endif // -// Define broadcast IID for spinel frames dedicated to all hosts in multipan configuration -#ifndef OPENTHREAD_SPINEL_CONFIG_BROADCAST_IID -#define OPENTHREAD_SPINEL_CONFIG_BROADCAST_IID 0 -#endif // +// Define maximum total source match table entries for both OT and Zigbee. +// In multi-instance builds (SoC or RCP/host), table must support all OT instances + Zigbee. +// For single instance (default), table sized to just OT children. +// This value is used to size all source match tables in both OT and Zigbee code. +// Note: this is purposedly not being setup with CMSIS annotations. +#ifndef RADIO_CONFIG_MAX_SRC_MATCH_ENTRIES +#if OPENTHREAD_CONFIG_MULTIPLE_INSTANCE_ENABLE +#if SL_ZIGBEE_MAX_END_DEVICE_CHILDREN +// Multipan / DMP case: OT + Zigbee +#define RADIO_CONFIG_MAX_SRC_MATCH_ENTRIES \ + ((OPENTHREAD_CONFIG_MLE_MAX_CHILDREN * (OPENTHREAD_CONFIG_MULTIPLE_INSTANCE_NUM - 1)) \ + + SL_ZIGBEE_MAX_END_DEVICE_CHILDREN) +#else +// Multi-instance OT-only case +#define RADIO_CONFIG_MAX_SRC_MATCH_ENTRIES \ + (OPENTHREAD_CONFIG_MLE_MAX_CHILDREN * OPENTHREAD_CONFIG_MULTIPLE_INSTANCE_NUM) +#endif +#else +// Single-instance OT (SoC / NCP / non-multipan RCP) +#define RADIO_CONFIG_MAX_SRC_MATCH_ENTRIES OPENTHREAD_CONFIG_MLE_MAX_CHILDREN +#endif +#endif +// Spinel Match Table +// Maximum number of spinel source match table entries +// Ensure that this value is the total of the number of openthread children times the number of openthread instances plus the number of Zigbee children. +#ifndef OPENTHREAD_SPINEL_CONFIG_MAX_SRC_MATCH_ENTRIES +#define OPENTHREAD_SPINEL_CONFIG_MAX_SRC_MATCH_ENTRIES RADIO_CONFIG_MAX_SRC_MATCH_ENTRIES +#endif +// // OTNS (OpenThread Network Simulator) #ifndef OPENTHREAD_CONFIG_OTNS_ENABLE #define OPENTHREAD_CONFIG_OTNS_ENABLE 0 @@ -265,13 +326,23 @@ #ifndef OPENTHREAD_CONFIG_PING_SENDER_ENABLE #define OPENTHREAD_CONFIG_PING_SENDER_ENABLE 1 #endif - // // Power Calibration Module (RCP only configuration) #ifndef OPENTHREAD_CONFIG_POWER_CALIBRATION_ENABLE #define OPENTHREAD_CONFIG_POWER_CALIBRATION_ENABLE 0 #endif - +// Maximum raw power calibration length +// Max raw power calibration length +// 4 +#ifndef SL_OPENTHREAD_RAW_POWER_CALIBRATION_LENGTH +#define SL_OPENTHREAD_RAW_POWER_CALIBRATION_LENGTH 4 +#endif +// Maximum FEM config setting length +// Max FEM config setting length +// 4 +#ifndef SL_OPENTHREAD_FEM_SETTING_LENGTH +#define SL_OPENTHREAD_FEM_SETTING_LENGTH 4 +#endif // // Platform UDP #ifndef OPENTHREAD_CONFIG_PLATFORM_UDP_ENABLE @@ -309,7 +380,14 @@ #endif // // Time Synchronization Service +#ifndef OPENTHREAD_CONFIG_TIME_SYNC_ENABLE #define OPENTHREAD_CONFIG_TIME_SYNC_ENABLE 0 +#endif +// +// Uptime of OpenThread instance +#ifndef OPENTHREAD_CONFIG_UPTIME_ENABLE +#define OPENTHREAD_CONFIG_UPTIME_ENABLE 1 +#endif // // UDP Forward #ifndef OPENTHREAD_CONFIG_UDP_FORWARD_ENABLE @@ -321,28 +399,22 @@ #define OPENTHREAD_CONFIG_MAC_BEACON_PAYLOAD_PARSING_ENABLE 1 #endif // -// Max raw power calibration length. -#ifndef SL_OPENTHREAD_RAW_POWER_CALIBRATION_LENGTH -#define SL_OPENTHREAD_RAW_POWER_CALIBRATION_LENGTH 4 -#endif -// -// Max FEM config setting length. -#ifndef SL_OPENTHREAD_FEM_SETTING_LENGTH -#define SL_OPENTHREAD_FEM_SETTING_LENGTH 4 -#endif -// -// The maximum number of RX buffers to use in the radio driver. -// 16 +// Radio Driver RX buffers +// Maximum number of RX buffers +// The maximum number of RX buffers to use in the radio driver. +// 16 #ifndef SL_OPENTHREAD_RADIO_RX_BUFFER_COUNT #define SL_OPENTHREAD_RADIO_RX_BUFFER_COUNT 16 #endif // +// // Logging // LOG_OUTPUT // NONE // APP // PLATFORM_DEFINED -// Default: OPENTHREAD_CONFIG_LOG_OUTPUT_PLATFORM_DEFINED +// Default: OPENTHREAD_CONFIG_LOG_OUTPUT_APP +// OPENTHREAD_CONFIG_LOG_OUTPUT_APP #ifndef OPENTHREAD_CONFIG_LOG_OUTPUT #define OPENTHREAD_CONFIG_LOG_OUTPUT OPENTHREAD_CONFIG_LOG_OUTPUT_APP #endif @@ -365,6 +437,7 @@ // INFO // DEBG // Default: OT_LOG_LEVEL_DEBG +// OT_LOG_LEVEL_DEBG #ifndef OPENTHREAD_CONFIG_LOG_LEVEL #define OPENTHREAD_CONFIG_LOG_LEVEL OT_LOG_LEVEL_DEBG #endif @@ -387,11 +460,10 @@ #endif // OPENTHREAD_FULL_LOGS_ENABLE -// Log crash dump after initialization +// Log crash dump after initialization #ifndef OPENTHREAD_CONFIG_PLATFORM_LOG_CRASH_DUMP_ENABLE #define OPENTHREAD_CONFIG_PLATFORM_LOG_CRASH_DUMP_ENABLE 0 #endif -// // // diff --git a/board-support/efr32/efr32mg24/BRD4187C/config/sl_power_manager_config.h b/board-support/efr32/efr32mg24/BRD4187C/config/sl_power_manager_config.h index 3c240b843..86b9fef27 100644 --- a/board-support/efr32/efr32mg24/BRD4187C/config/sl_power_manager_config.h +++ b/board-support/efr32/efr32mg24/BRD4187C/config/sl_power_manager_config.h @@ -37,24 +37,40 @@ // Enable custom IRQ handler for external HF oscillator. // Enable if CMU_IRQHandler/HFXO0_IRQHandler is needed from your application. -// The function sl_power_manager_irq_handler() will have to be called from you custom handler if this is enabled. +// The function sl_power_manager_irq_handler() will have to be called from your custom handler if this is enabled. // Default: 0 +#ifndef SL_POWER_MANAGER_CUSTOM_HF_OSCILLATOR_IRQ_HANDLER #define SL_POWER_MANAGER_CUSTOM_HF_OSCILLATOR_IRQ_HANDLER 0 +#endif // Enable fast wakeup (disable voltage scaling in EM2/3 mode) // Enable or disable voltage scaling in EM2/3 modes (when available). This decreases wakeup time by about 30 us. // Deprecated. It is replaced by the function sl_power_manager_em23_voltage_scaling_enable_fast_wakeup() // Default: 0 +#ifndef SL_POWER_MANAGER_CONFIG_VOLTAGE_SCALING_FAST_WAKEUP #define SL_POWER_MANAGER_CONFIG_VOLTAGE_SCALING_FAST_WAKEUP 0 +#endif + +// Enable voltage scaling in EM0 and EM1 mode. +// Enable or disable voltage scaling in EM0/1 modes. With this config enabled, the voltage +// scaling will be configured at the lowest possible level based on the system clock. +// Default: 0 +#ifndef SL_POWER_MANAGER_ENABLE_EM01_VOLTAGE_SCALING +#define SL_POWER_MANAGER_ENABLE_EM01_VOLTAGE_SCALING 0 +#endif // Enable debugging feature // Enable or disable debugging features (trace the different modules that have requirements). // Default: 0 +#ifndef SL_POWER_MANAGER_DEBUG #define SL_POWER_MANAGER_DEBUG 0 +#endif // Maximum numbers of requirements that can be logged // Default: 10 +#ifndef SL_POWER_MANAGER_DEBUG_POOL_SIZE #define SL_POWER_MANAGER_DEBUG_POOL_SIZE 10 +#endif // // Pin retention mode @@ -63,14 +79,18 @@ // Retention through EM4 // Retention through EM4 and wakeup // power_manager_pin_retention_disable +#ifndef SL_POWER_MANAGER_INIT_EMU_EM4_PIN_RETENTION_MODE #define SL_POWER_MANAGER_INIT_EMU_EM4_PIN_RETENTION_MODE EMU_EM4CTRL_EM4IORETMODE_DISABLE +#endif // Enable EM2 debugging feature // Enable or disable debugging features. // Force PD0B/PD0D to stay on during EM2 entry. This allows the debugger to remain connected in EM2 and EM3. // Enabling debug connectivity results in an increased power consumption in EM2/EM3. // Default: 1 +#ifndef SL_POWER_MANAGER_INIT_EMU_EM2_DEBUG_ENABLE #define SL_POWER_MANAGER_INIT_EMU_EM2_DEBUG_ENABLE 1 +#endif // // diff --git a/board-support/efr32/mgm24/BRD4318A/autogen/sl_simple_led_instances.h b/board-support/efr32/efr32mg24/BRD4187C/config/sl_rail_util_pa_tables_config.h similarity index 64% rename from board-support/efr32/mgm24/BRD4318A/autogen/sl_simple_led_instances.h rename to board-support/efr32/efr32mg24/BRD4187C/config/sl_rail_util_pa_tables_config.h index 08c8291ae..f2407fcfd 100644 --- a/board-support/efr32/mgm24/BRD4318A/autogen/sl_simple_led_instances.h +++ b/board-support/efr32/efr32mg24/BRD4187C/config/sl_rail_util_pa_tables_config.h @@ -1,9 +1,9 @@ /***************************************************************************//** * @file - * @brief LED Driver Instances + * @brief PA Tables configuration file. ******************************************************************************* * # License - * Copyright 2019 Silicon Laboratories Inc. www.silabs.com + * Copyright 2025 Silicon Laboratories Inc. www.silabs.com ******************************************************************************* * * SPDX-License-Identifier: Zlib @@ -28,19 +28,20 @@ * ******************************************************************************/ -#ifndef SL_SIMPLE_LED_INSTANCES_H -#define SL_SIMPLE_LED_INSTANCES_H +#ifndef SL_RAIL_UTIL_PA_TABLES_CONFIG_H +#define SL_RAIL_UTIL_PA_TABLES_CONFIG_H -#include "sl_simple_led.h" +// <<< Use Configuration Wizard in Context Menu >>> -extern const sl_led_t sl_led_led0; -extern const sl_led_t sl_led_led1; +// PA Table Configuration +// PA Table Selection +// <"sl_rail_util_pa_dbm_powersetting_mapping_table_20dbm.h"=> 20dBm PA powersetting mapping table +// Default: "sl_rail_util_pa_dbm_powersetting_mapping_table_20dbm.h" +#define SL_RAIL_UTIL_PA_TABLE_HEADER "sl_rail_util_pa_dbm_powersetting_mapping_table_20dbm.h" +// -extern const sl_led_t *sl_simple_led_array[]; +// <<< end of configuration section >>> -#define SL_SIMPLE_LED_COUNT 2 -#define SL_SIMPLE_LED_INSTANCE(n) (sl_simple_led_array[n]) +#include SL_RAIL_UTIL_PA_TABLE_HEADER -void sl_simple_led_init_instances(void); - -#endif // SL_SIMPLE_LED_INIT_H +#endif // SL_RAIL_UTIL_PA_TABLES_CONFIG_H diff --git a/board-support/efr32/efr32mg24/BRD4187C/config/sl_rail_util_pti_config.h b/board-support/efr32/efr32mg24/BRD4187C/config/sl_rail_util_pti_config.h index bdd36734c..736b91558 100644 --- a/board-support/efr32/efr32mg24/BRD4187C/config/sl_rail_util_pti_config.h +++ b/board-support/efr32/efr32mg24/BRD4187C/config/sl_rail_util_pti_config.h @@ -35,12 +35,12 @@ // PTI Configuration // PTI mode -// UART -// UART onewire -// SPI -// Disabled -// Default: RAIL_PTI_MODE_UART -#define SL_RAIL_UTIL_PTI_MODE RAIL_PTI_MODE_UART +// UART +// UART onewire +// SPI +// Disabled +// Default: SL_RAIL_PTI_MODE_UART +#define SL_RAIL_UTIL_PTI_MODE SL_RAIL_PTI_MODE_UART // PTI Baud Rate (Hertz) // <147800-20000000:1> diff --git a/board-support/efr32/efr32mg24/BRD4187C/config/sl_simple_button_btn0_config.h b/board-support/efr32/efr32mg24/BRD4187C/config/sl_simple_button_btn0_config.h index 23e27379c..552aa94c9 100644 --- a/board-support/efr32/efr32mg24/BRD4187C/config/sl_simple_button_btn0_config.h +++ b/board-support/efr32/efr32mg24/BRD4187C/config/sl_simple_button_btn0_config.h @@ -48,9 +48,12 @@ // SL_SIMPLE_BUTTON_BTN0 // $[GPIO_SL_SIMPLE_BUTTON_BTN0] +#ifndef SL_SIMPLE_BUTTON_BTN0_PORT #define SL_SIMPLE_BUTTON_BTN0_PORT SL_GPIO_PORT_B +#endif +#ifndef SL_SIMPLE_BUTTON_BTN0_PIN #define SL_SIMPLE_BUTTON_BTN0_PIN 1 - +#endif // [GPIO_SL_SIMPLE_BUTTON_BTN0]$ // <<< sl:end pin_tool >>> diff --git a/board-support/efr32/efr32mg24/BRD4187C/config/sl_simple_button_btn1_config.h b/board-support/efr32/efr32mg24/BRD4187C/config/sl_simple_button_btn1_config.h index 928a4d5c2..1df1ce0a1 100644 --- a/board-support/efr32/efr32mg24/BRD4187C/config/sl_simple_button_btn1_config.h +++ b/board-support/efr32/efr32mg24/BRD4187C/config/sl_simple_button_btn1_config.h @@ -48,9 +48,12 @@ // SL_SIMPLE_BUTTON_BTN1 // $[GPIO_SL_SIMPLE_BUTTON_BTN1] +#ifndef SL_SIMPLE_BUTTON_BTN1_PORT #define SL_SIMPLE_BUTTON_BTN1_PORT SL_GPIO_PORT_B +#endif +#ifndef SL_SIMPLE_BUTTON_BTN1_PIN #define SL_SIMPLE_BUTTON_BTN1_PIN 3 - +#endif // [GPIO_SL_SIMPLE_BUTTON_BTN1]$ // <<< sl:end pin_tool >>> diff --git a/board-support/efr32/efr32mg26/BRD2608A/autogen/sl_bluetooth.c b/board-support/efr32/efr32mg26/BRD2608A/autogen/sl_bluetooth.c index 4cac19436..0a5f1a969 100644 --- a/board-support/efr32/efr32mg26/BRD2608A/autogen/sl_bluetooth.c +++ b/board-support/efr32/efr32mg26/BRD2608A/autogen/sl_bluetooth.c @@ -30,6 +30,8 @@ #include #include "sl_bluetooth.h" +#include "sli_bt_api.h" +#include "sli_bgapi.h" #include "sl_assert.h" #include "sl_bt_stack_init.h" #include "sl_component_catalog.h" @@ -68,17 +70,23 @@ void sl_bt_step(void) { sl_bt_msg_t evt; + // Run the Bluetooth host stack processing step sl_bt_run(); - uint32_t event_len = sl_bt_event_pending_len(); - // For preventing from data loss, the event will be kept in the stack's queue - // if application cannot process it at the moment. + + // Check the length of the next event, if any, and verify that the application + // can process it. To prevent data loss, the event will be kept in the stack's + // queue if the application cannot process it at the moment. + size_t event_len = sli_bgapi_device_peek_event_len(&sli_bt_bgapi_device); if ((event_len == 0) || (!sl_bt_can_process_event(event_len))) { return; } - // Pop (non-blocking) a Bluetooth stack event from event queue. - sl_status_t status = sl_bt_pop_event(&evt); - if(status != SL_STATUS_OK){ + // Pop the event and process it if successful + sl_status_t status = sli_bgapi_device_pop_event(&sli_bt_bgapi_device, + sizeof(evt), + &evt); + + if (status != SL_STATUS_OK) { return; } sl_bt_process_event(&evt); diff --git a/board-support/efr32/efr32mg26/BRD2608A/autogen/sl_component_catalog.h b/board-support/efr32/efr32mg26/BRD2608A/autogen/sl_component_catalog.h index 985826cb1..f114ff7c8 100644 --- a/board-support/efr32/efr32mg26/BRD2608A/autogen/sl_component_catalog.h +++ b/board-support/efr32/efr32mg26/BRD2608A/autogen/sl_component_catalog.h @@ -3,6 +3,7 @@ // APIs present in project #define SL_CATALOG_BGAPI_PROTOCOL_PRESENT +#define SL_CATALOG_BGAPI_PROTOCOL_RTOS_ADAPTATION_PRESENT #define SL_CATALOG_BLUETOOTH_CONFIGURATION_PRESENT #define SL_CATALOG_BLUETOOTH_CTE_SUPPORT_PRESENT #define SL_CATALOG_BLUETOOTH_FEATURE_ADVERTISER_PRESENT @@ -23,7 +24,6 @@ #define SL_CATALOG_CMSIS_OS_COMMON_PRESENT #define SL_CATALOG_CPP_SUPPORT_PRESENT #define SL_CATALOG_DEVICE_INIT_PRESENT -#define SL_CATALOG_DEVICE_INIT_CORE_PRESENT #define SL_CATALOG_DEVICE_INIT_DCDC_PRESENT #define SL_CATALOG_EMLIB_CORE_PRESENT #define SL_CATALOG_EMLIB_RMU_PRESENT @@ -32,6 +32,7 @@ #define SL_CATALOG_GATT_CONFIGURATION_PRESENT #define SL_CATALOG_GPIO_PRESENT #define SL_CATALOG_GPIOINTERRUPT_PRESENT +#define SL_CATALOG_HAL_SYSTEM_PRESENT #define SL_CATALOG_HFXO_MANAGER_PRESENT #define SL_CATALOG_INTERRUPT_MANAGER_PRESENT #define SL_CATALOG_IOSTREAM_PRESENT @@ -46,13 +47,12 @@ #define SL_CATALOG_OPENTHREAD_CLI_PRESENT #define SL_CATALOG_OT_GP_INTERFACE_PRESENT #define SL_CATALOG_OPENTHREAD_STACK_PRESENT -#define SL_CATALOG_OPENTHREAD_UART_PRESENT #define SL_CATALOG_POWER_MANAGER_PRESENT +#define SL_CATALOG_POWER_MANAGER_DEEPSLEEP_PRESENT #define SL_CATALOG_PSA_CRYPTO_PRESENT #define SL_CATALOG_RADIO_PRIORITY_15_4_PRESENT #define SL_CATALOG_RAIL_LIB_PRESENT #define SL_CATALOG_RAIL_UTIL_PTI_PRESENT -#define SL_CATALOG_SE_MANAGER_PRESENT #define SL_CATALOG_SECURITY_MANAGER_PRESENT #define SL_CATALOG_SEGGER_RTT_PRESENT #define SL_CATALOG_BTN0_PRESENT diff --git a/board-support/efr32/efr32mg26/BRD2608A/autogen/sl_event_handler.c b/board-support/efr32/efr32mg26/BRD2608A/autogen/sl_event_handler.c index fd06a5f8a..357a278f8 100644 --- a/board-support/efr32/efr32mg26/BRD2608A/autogen/sl_event_handler.c +++ b/board-support/efr32/efr32mg26/BRD2608A/autogen/sl_event_handler.c @@ -3,10 +3,12 @@ #include "sl_board_init.h" #include "sl_clock_manager.h" #include "sl_hfxo_manager.h" -#include "pa_conversions_efr32.h" -#if !SLI_SI91X_ENABLE_BLE +#include "sl_rail_util_compatible_pa.h" +#if !(defined(SLI_SI91X_ENABLE_BLE) && SLI_SI91X_ENABLE_BLE) +#include "sl_bluetooth.h" +#include "sl_rail_util_power_manager_init.h" +#endif // !SLI_SI91X_ENABLE_BLE #include "sl_rail_util_power_manager_init.h" -#endif #include "sl_rail_util_pti.h" #include "sl_rail_util_rssi.h" #include "btl_interface.h" @@ -24,17 +26,15 @@ #include "sl_mbedtls.h" #include "sl_ot_rtos_adaptation.h" #include "sl_simple_button_instances.h" + #if (defined(SL_MATTER_RGB_LED_ENABLED) && SL_MATTER_RGB_LED_ENABLED == 1) #include "sl_simple_rgb_pwm_led_instances.h" #else #include "sl_simple_led_instances.h" -#endif // defined(SL_MATTER_RGB_LED_ENABLED) && SL_MATTER_RGB_LED_ENABLED == 1) +#endif //(SL_MATTER_RGB_LED_ENABLED) && SL_MATTER_RGB_LED_ENABLED == 1) #if defined(CONFIG_ENABLE_UART) #include "sl_uartdrv_instances.h" #endif // CONFIG_ENABLE_UART -#ifdef SL_WIFI -#include "sl_spidrv_instances.h" -#endif #include "psa/crypto.h" #include "sl_se_manager.h" #include "sli_protocol_crypto.h" @@ -42,7 +42,7 @@ #include "sl_iostream_init_instances.h" #include "cmsis_os2.h" #include "nvm3_default.h" -#include "sl_cos.h" + #include "sl_iostream_handles.h" void sli_driver_permanent_allocation(void) @@ -55,13 +55,8 @@ void sli_service_permanent_allocation(void) void sli_stack_permanent_allocation(void) { -#if !SLI_SI91X_ENABLE_BLE sli_bt_stack_permanent_allocation(); -#endif // !SLI_SI91X_ENABLE_BLE - -#ifdef SL_OT_ENABLE sl_ot_rtos_perm_allocation(); -#endif // SL_OT_ENABLE } void sli_internal_permanent_allocation(void) @@ -84,9 +79,7 @@ void sli_internal_init_early(void) void sl_kernel_start(void) { -#if !SLI_SI91X_ENABLE_BLE sli_bt_rtos_adaptation_kernel_start(); -#endif // !SLI_SI91X_ENABLE_BLE osKernelStart(); } @@ -94,11 +87,6 @@ void sl_driver_init(void) { sl_gpio_init(); GPIOINT_Init(); -#ifndef SLI_SI917 -#ifdef SL_WIFI - sl_spidrv_init_instances(); -#endif -#endif #if defined(SL_MATTER_USE_SI70XX_SENSOR) && SL_MATTER_USE_SI70XX_SENSOR sl_i2cspm_init_instances(); #endif // defined(SL_MATTER_USE_SI70XX_SENSOR) && SL_MATTER_USE_SI70XX_SENSOR @@ -108,7 +96,7 @@ void sl_driver_init(void) #else sl_simple_led_init_instances(); #endif //(SL_MATTER_RGB_LED_ENABLED) && SL_MATTER_RGB_LED_ENABLED == 1) -#if defined(CONFIG_ENABLE_UART) + #if defined(CONFIG_ENABLE_UART) sl_uartdrv_init_instances(); #endif // CONFIG_ENABLE_UART } @@ -135,8 +123,7 @@ void sl_stack_init(void) sl_rail_util_pti_init(); sl_rail_util_rssi_init(); sli_bt_stack_functional_init(); -#endif - +#endif // !SLI_SI91X_ENABLE_BLE #ifdef SL_OT_ENABLE sl_ot_sys_init(); #endif // SL_OT_ENABLE diff --git a/board-support/efr32/efr32mg26/BRD2608A/autogen/sl_simple_led_instances.h b/board-support/efr32/efr32mg26/BRD2608A/autogen/sl_simple_led_instances.h index afb5875eb..928fbe942 100644 --- a/board-support/efr32/efr32mg26/BRD2608A/autogen/sl_simple_led_instances.h +++ b/board-support/efr32/efr32mg26/BRD2608A/autogen/sl_simple_led_instances.h @@ -34,6 +34,7 @@ #ifdef __cplusplus extern "C" { #endif + #include "sl_simple_led.h" extern const sl_led_t sl_led_led0; diff --git a/board-support/efr32/efr32mg26/BRD2608A/autogen/sli_psa_config_autogen.h b/board-support/efr32/efr32mg26/BRD2608A/autogen/sli_psa_config_autogen.h index 055d8a95e..f90dd6e9a 100644 --- a/board-support/efr32/efr32mg26/BRD2608A/autogen/sli_psa_config_autogen.h +++ b/board-support/efr32/efr32mg26/BRD2608A/autogen/sli_psa_config_autogen.h @@ -24,7 +24,12 @@ #define PSA_WANT_ALG_TLS12_PSK_TO_MS 1 #define MBEDTLS_PSA_CRYPTO_EXTERNAL_RNG +#if defined(KSU_MAX_KEY_SLOTS) +#include "sli_ksu_keyslots_config.h" +#define MBEDTLS_PSA_KEY_SLOT_COUNT (22 + 15 + 1 + SL_PSA_KEY_USER_SLOT_COUNT + SLI_KSU_MAX_KEY_SLOTS - SLI_KSU_KEY_SLOT_USER_START + 1) +#else #define MBEDTLS_PSA_KEY_SLOT_COUNT (22 + 15 + 1 + SL_PSA_KEY_USER_SLOT_COUNT + 1) +#endif #ifndef SL_PSA_ITS_MAX_FILES #define SL_PSA_ITS_MAX_FILES (1 + SL_PSA_ITS_USER_MAX_FILES) #endif diff --git a/board-support/efr32/efr32mg26/BRD2608A/config/pin_config.h b/board-support/efr32/efr32mg26/BRD2608A/config/pin_config.h new file mode 100644 index 000000000..cbf5e6c87 --- /dev/null +++ b/board-support/efr32/efr32mg26/BRD2608A/config/pin_config.h @@ -0,0 +1,305 @@ +#ifndef PIN_CONFIG_H +#define PIN_CONFIG_H + +// $[CMU] +// [CMU]$ + +// $[LFXO] +// [LFXO]$ + +// $[KEYSCAN] +// [KEYSCAN]$ + +// $[PRS.ASYNCH0] +// [PRS.ASYNCH0]$ + +// $[PRS.ASYNCH1] +// [PRS.ASYNCH1]$ + +// $[PRS.ASYNCH2] +// [PRS.ASYNCH2]$ + +// $[PRS.ASYNCH3] +// [PRS.ASYNCH3]$ + +// $[PRS.ASYNCH4] +// [PRS.ASYNCH4]$ + +// $[PRS.ASYNCH5] +// [PRS.ASYNCH5]$ + +// $[PRS.ASYNCH6] +// [PRS.ASYNCH6]$ + +// $[PRS.ASYNCH7] +// [PRS.ASYNCH7]$ + +// $[PRS.ASYNCH8] +// [PRS.ASYNCH8]$ + +// $[PRS.ASYNCH9] +// [PRS.ASYNCH9]$ + +// $[PRS.ASYNCH10] +// [PRS.ASYNCH10]$ + +// $[PRS.ASYNCH11] +// [PRS.ASYNCH11]$ + +// $[PRS.ASYNCH12] +// [PRS.ASYNCH12]$ + +// $[PRS.ASYNCH13] +// [PRS.ASYNCH13]$ + +// $[PRS.ASYNCH14] +// [PRS.ASYNCH14]$ + +// $[PRS.ASYNCH15] +// [PRS.ASYNCH15]$ + +// $[PRS.SYNCH0] +// [PRS.SYNCH0]$ + +// $[PRS.SYNCH1] +// [PRS.SYNCH1]$ + +// $[PRS.SYNCH2] +// [PRS.SYNCH2]$ + +// $[PRS.SYNCH3] +// [PRS.SYNCH3]$ + +// $[GPIO] +// GPIO SWV on PA03 +#ifndef GPIO_SWV_PORT +#define GPIO_SWV_PORT SL_GPIO_PORT_A +#endif +#ifndef GPIO_SWV_PIN +#define GPIO_SWV_PIN 3 +#endif + +// [GPIO]$ + +// $[TIMER0] +// [TIMER0]$ + +// $[TIMER1] +// [TIMER1]$ + +// $[TIMER2] +// [TIMER2]$ + +// $[TIMER3] +// [TIMER3]$ + +// $[TIMER4] +// [TIMER4]$ + +// $[TIMER5] +// [TIMER5]$ + +// $[TIMER6] +// [TIMER6]$ + +// $[TIMER7] +// [TIMER7]$ + +// $[TIMER8] +// [TIMER8]$ + +// $[TIMER9] +// [TIMER9]$ + +// $[EUSART1] +// [EUSART1]$ + +// $[EUSART2] +// [EUSART2]$ + +// $[EUSART3] +// [EUSART3]$ + +// $[USART0] +// [USART0]$ + +// $[USART1] +// [USART1]$ + +// $[USART2] +// [USART2]$ + +// $[I2C1] +// I2C1 SCL on PC04 +#ifndef I2C1_SCL_PORT +#define I2C1_SCL_PORT SL_GPIO_PORT_C +#endif +#ifndef I2C1_SCL_PIN +#define I2C1_SCL_PIN 4 +#endif + +// I2C1 SDA on PC05 +#ifndef I2C1_SDA_PORT +#define I2C1_SDA_PORT SL_GPIO_PORT_C +#endif +#ifndef I2C1_SDA_PIN +#define I2C1_SDA_PIN 5 +#endif + +// [I2C1]$ + +// $[I2C2] +// [I2C2]$ + +// $[I2C3] +// [I2C3]$ + +// $[LCD] +// [LCD]$ + +// $[LETIMER0] +// [LETIMER0]$ + +// $[IADC0] +// [IADC0]$ + +// $[ACMP0] +// [ACMP0]$ + +// $[ACMP1] +// [ACMP1]$ + +// $[VDAC0] +// [VDAC0]$ + +// $[VDAC1] +// [VDAC1]$ + +// $[PCNT0] +// [PCNT0]$ + +// $[HFXO0] +// [HFXO0]$ + +// $[I2C0] +// [I2C0]$ + +// $[EUSART0] +// EUSART0 CTS on PA09 +#ifndef EUSART0_CTS_PORT +#define EUSART0_CTS_PORT SL_GPIO_PORT_A +#endif +#ifndef EUSART0_CTS_PIN +#define EUSART0_CTS_PIN 9 +#endif + +// EUSART0 RTS on PA08 +#ifndef EUSART0_RTS_PORT +#define EUSART0_RTS_PORT SL_GPIO_PORT_A +#endif +#ifndef EUSART0_RTS_PIN +#define EUSART0_RTS_PIN 8 +#endif + +// EUSART0 RX on PA06 +#ifndef EUSART0_RX_PORT +#define EUSART0_RX_PORT SL_GPIO_PORT_A +#endif +#ifndef EUSART0_RX_PIN +#define EUSART0_RX_PIN 6 +#endif + +// EUSART0 TX on PA05 +#ifndef EUSART0_TX_PORT +#define EUSART0_TX_PORT SL_GPIO_PORT_A +#endif +#ifndef EUSART0_TX_PIN +#define EUSART0_TX_PIN 5 +#endif + +// [EUSART0]$ + +// $[PTI] +// PTI DFRAME on PC07 +#ifndef PTI_DFRAME_PORT +#define PTI_DFRAME_PORT SL_GPIO_PORT_C +#endif +#ifndef PTI_DFRAME_PIN +#define PTI_DFRAME_PIN 7 +#endif + +// PTI DOUT on PC06 +#ifndef PTI_DOUT_PORT +#define PTI_DOUT_PORT SL_GPIO_PORT_C +#endif +#ifndef PTI_DOUT_PIN +#define PTI_DOUT_PIN 6 +#endif + +// [PTI]$ + +// $[MODEM] +// [MODEM]$ + +// $[CUSTOM_PIN_NAME] +#ifndef _PORT +#define _PORT SL_GPIO_PORT_A +#endif +#ifndef _PIN +#define _PIN 0 +#endif + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +// [CUSTOM_PIN_NAME]$ + + +#endif // PIN_CONFIG_H + + diff --git a/board-support/efr32/efr32mg26/BRD2608A/config/psa_crypto_config.h b/board-support/efr32/efr32mg26/BRD2608A/config/psa_crypto_config.h index 20703b41d..773ce99e0 100644 --- a/board-support/efr32/efr32mg26/BRD2608A/config/psa_crypto_config.h +++ b/board-support/efr32/efr32mg26/BRD2608A/config/psa_crypto_config.h @@ -27,26 +27,32 @@ // Default: 4 #define SL_PSA_KEY_USER_SLOT_COUNT (4) -// PSA Maximum User Persistent Keys Count <0-1024> +// Maximum User Persistent PSA Key Count <0-1024> // Maximum amount of keys (or other files) that can be stored persistently -// by the application through the PSA interface, when persistent storage -// support for PSA Crypto is included in the project. -// Due to caching logic, this setting does have an impact on static RAM usage. -// Note that this number is added to the potential requirements from other -// software components in the project, such that the total amount of keys -// which can be stored through the ITS backend can be higher than what is -// configured here. +// by the user application, when PSA ITS (Internal Trusted Storage) support +// is included in the project. +// NOTE: +// In addition to SL_PSA_ITS_USER_MAX_FILES (number of user keys) the +// application may be configured to include SDK components that require an +// additional number of keys. The sum of user keys and SDK component keys +// is computed and the result, called SL_PSA_ITS_MAX_FILES, is used +// internally in the PSA ITS driver. // -// WARNING: When changing this setting on an application that is already -// deployed, and thus will get the change through an application upgrade, -// care should be taken to ensure that the setting is only ever increased, -// and never decreased. Decreasing this setting might cause previously -// stored keys/files to become inaccessible. +// WARNING: +// For applications using PSA ITS driver version 1 or 2, when changing the +// SL_PSA_ITS_USER_MAX_FILES in an application that is already depeloyed, +// and thus will get the change through an application upgrade, care should +// be taken to ensure that the total sum of keys SL_PSA_ITS_MAX_FILES is +// only ever equal or increased, and never decreased. Decreasing this +// setting might cause previously stored keys/files to become inaccessible, +// ITS should be cleared and all files need to be stored again. // -// It is not possible to change this setting when using V3 ITS Driver. -// The file-storage indexing is dependent on the maximum number of files, -// and if SL_PSA_ITS_USER_MAX_FILES is changed, ITS should be cleared and -// all files need to be stored again. +// For applications using PSA ITS driver version 3, it is not possible to +// change this setting because the file-storage indexing is dependent on the +// maximum number of files (SL_PSA_ITS_MAX_FILES) being consistent, and if +// the sum of SDK component keys and user keys (SL_PSA_ITS_USER_MAX_FILES) +// is changed, may cause previously stored keys/files to become inaccessible +// ITS should be cleared and all files need to be stored again. // Default: 128 #define SL_PSA_ITS_USER_MAX_FILES (128) diff --git a/board-support/efr32/efr32mg26/BRD2608A/config/sl_bluetooth_config.h b/board-support/efr32/efr32mg26/BRD2608A/config/sl_bluetooth_config.h index 9b6a804e0..93bfbbcc4 100644 --- a/board-support/efr32/efr32mg26/BRD2608A/config/sl_bluetooth_config.h +++ b/board-support/efr32/efr32mg26/BRD2608A/config/sl_bluetooth_config.h @@ -99,6 +99,7 @@ // if the LE Power Control feature is enabled. // When this configuration is passed into stack initialization, the stack // will select the closest value that the device supports. +// API sl_bt_system_set_tx_power() can be used to set the minimum TX power at runtime. // API sl_bt_system_get_tx_power_setting() can be used to query the selected value. #define SL_BT_CONFIG_MIN_TX_POWER (-30) @@ -108,6 +109,7 @@ // advertising, scanning and DTM testing. // When this configuration is passed into stack initialization, the stack // will select the closest value that the device supports. +// API sl_bt_system_set_tx_power() can be used to set the maximum TX power at runtime. // API sl_bt_system_get_tx_power_setting() can be used to query the selected value. #define SL_BT_CONFIG_MAX_TX_POWER (80) diff --git a/board-support/efr32/efr32mg26/BRD2608A/config/sl_board_control_config.h b/board-support/efr32/efr32mg26/BRD2608A/config/sl_board_control_config.h index a48150074..72b4e4afa 100644 --- a/board-support/efr32/efr32mg26/BRD2608A/config/sl_board_control_config.h +++ b/board-support/efr32/efr32mg26/BRD2608A/config/sl_board_control_config.h @@ -67,38 +67,62 @@ // SL_BOARD_ENABLE_SENSOR_RHT // $[GPIO_SL_BOARD_ENABLE_SENSOR_RHT] -#define SL_BOARD_ENABLE_SENSOR_RHT_PORT SL_GPIO_PORT_C -#define SL_BOARD_ENABLE_SENSOR_RHT_PIN 9 +#ifndef SL_BOARD_ENABLE_SENSOR_RHT_PORT +#define SL_BOARD_ENABLE_SENSOR_RHT_PORT SL_GPIO_PORT_C +#endif +#ifndef SL_BOARD_ENABLE_SENSOR_RHT_PIN +#define SL_BOARD_ENABLE_SENSOR_RHT_PIN 9 +#endif // [GPIO_SL_BOARD_ENABLE_SENSOR_RHT]$ // SL_BOARD_ENABLE_SENSOR_HALL // $[GPIO_SL_BOARD_ENABLE_SENSOR_HALL] -#define SL_BOARD_ENABLE_SENSOR_HALL_PORT SL_GPIO_PORT_C -#define SL_BOARD_ENABLE_SENSOR_HALL_PIN 9 +#ifndef SL_BOARD_ENABLE_SENSOR_HALL_PORT +#define SL_BOARD_ENABLE_SENSOR_HALL_PORT SL_GPIO_PORT_C +#endif +#ifndef SL_BOARD_ENABLE_SENSOR_HALL_PIN +#define SL_BOARD_ENABLE_SENSOR_HALL_PIN 9 +#endif // [GPIO_SL_BOARD_ENABLE_SENSOR_HALL]$ // SL_BOARD_ENABLE_SENSOR_PRESSURE // $[GPIO_SL_BOARD_ENABLE_SENSOR_PRESSURE] -#define SL_BOARD_ENABLE_SENSOR_PRESSURE_PORT SL_GPIO_PORT_C -#define SL_BOARD_ENABLE_SENSOR_PRESSURE_PIN 9 +#ifndef SL_BOARD_ENABLE_SENSOR_PRESSURE_PORT +#define SL_BOARD_ENABLE_SENSOR_PRESSURE_PORT SL_GPIO_PORT_C +#endif +#ifndef SL_BOARD_ENABLE_SENSOR_PRESSURE_PIN +#define SL_BOARD_ENABLE_SENSOR_PRESSURE_PIN 9 +#endif // [GPIO_SL_BOARD_ENABLE_SENSOR_PRESSURE]$ // SL_BOARD_ENABLE_SENSOR_LIGHT // $[GPIO_SL_BOARD_ENABLE_SENSOR_LIGHT] -#define SL_BOARD_ENABLE_SENSOR_LIGHT_PORT SL_GPIO_PORT_C -#define SL_BOARD_ENABLE_SENSOR_LIGHT_PIN 9 +#ifndef SL_BOARD_ENABLE_SENSOR_LIGHT_PORT +#define SL_BOARD_ENABLE_SENSOR_LIGHT_PORT SL_GPIO_PORT_C +#endif +#ifndef SL_BOARD_ENABLE_SENSOR_LIGHT_PIN +#define SL_BOARD_ENABLE_SENSOR_LIGHT_PIN 9 +#endif // [GPIO_SL_BOARD_ENABLE_SENSOR_LIGHT]$ // SL_BOARD_ENABLE_SENSOR_IMU // $[GPIO_SL_BOARD_ENABLE_SENSOR_IMU] -#define SL_BOARD_ENABLE_SENSOR_IMU_PORT SL_GPIO_PORT_A -#define SL_BOARD_ENABLE_SENSOR_IMU_PIN 10 +#ifndef SL_BOARD_ENABLE_SENSOR_IMU_PORT +#define SL_BOARD_ENABLE_SENSOR_IMU_PORT SL_GPIO_PORT_A +#endif +#ifndef SL_BOARD_ENABLE_SENSOR_IMU_PIN +#define SL_BOARD_ENABLE_SENSOR_IMU_PIN 10 +#endif // [GPIO_SL_BOARD_ENABLE_SENSOR_IMU]$ // SL_BOARD_ENABLE_SENSOR_MICROPHONE // $[GPIO_SL_BOARD_ENABLE_SENSOR_MICROPHONE] -#define SL_BOARD_ENABLE_SENSOR_MICROPHONE_PORT SL_GPIO_PORT_C -#define SL_BOARD_ENABLE_SENSOR_MICROPHONE_PIN 8 +#ifndef SL_BOARD_ENABLE_SENSOR_MICROPHONE_PORT +#define SL_BOARD_ENABLE_SENSOR_MICROPHONE_PORT SL_GPIO_PORT_C +#endif +#ifndef SL_BOARD_ENABLE_SENSOR_MICROPHONE_PIN +#define SL_BOARD_ENABLE_SENSOR_MICROPHONE_PIN 8 +#endif // [GPIO_SL_BOARD_ENABLE_SENSOR_MICROPHONE]$ // <<< sl:end pin_tool >>> diff --git a/board-support/efr32/efr32mg26/BRD2608A/config/sl_btctrl_config.h b/board-support/efr32/efr32mg26/BRD2608A/config/sl_btctrl_config.h index ed75a2d0e..403df1ffe 100644 --- a/board-support/efr32/efr32mg26/BRD2608A/config/sl_btctrl_config.h +++ b/board-support/efr32/efr32mg26/BRD2608A/config/sl_btctrl_config.h @@ -146,15 +146,27 @@ #define SL_BT_CONTROLLER_ADAPTIVITY_MODE (SL_BTCTRL_CHANNELMAP_FLAG_ACTIVE_ADAPTIVITY) #endif -// Power Amplifier (PA) Configuration -// Automode PA configuration -// Highest available PA configuration -// RAIL Utility component PA configuration -// Select the Power Amplifier configuration -// Default: RAIL Utility component PA configuration -#ifndef SL_BT_CONTROLLER_PA_CONFIG -#define SL_BT_CONTROLLER_PA_CONFIG SL_BT_BLUETOOTH_RAIL_UTIL_PA -#endif +// Advertising Configuration +// Include TX Power in the extended header of primary extended advertising packets +// This is default setting to all advertising sets unless it is specifically overridden by VS_SiliconLabs_Set_Advertising_Config_Bits. +// Default: 0 +// Enabling this option takes effect only if permitted by Le_Set_Extended_Advertising_Parameters +// According to Link Layer specification, Vol 6, Part B, Table 2.4 and Table 2.5: +// Optional in 1M PHY when the advertiser is connectable or scannable, or with auxiliary pointer. +// In other cases, the Extended Advertising TX Power is always optional by settings. +#define SL_BT_CONTROLLER_PRIMARY_EXT_PACKET_INCLUDE_TX_POWER (0) +// +// Include Advertiser Address in the header of primary extended advertising packets +// This is default setting to all advertising sets unless it is specifically overridden by VS_SiliconLabs_Set_Advertising_Config_Bits. +// Default: 0 +// Enabling this option takes effect only if permitted by Le_Set_Extended_Advertising_Parameters +// According to Link Layer specification, Vol 6, Part B, Table 2.4 and Table 2.5: +// Optional in 1M PHY when the advertiser is non-connectable and non-scannable, with auxiliary pointer. +// Mandatory when the advertiser is non-connectable and non-scannable, without auxiliary pointer. +// Forbidden when the advertiser is connectable or scannable. +#define SL_BT_CONTROLLER_PRIMARY_EXT_PACKET_INCLUDE_ADDRESS (0) +// +// Advertising Configuration // Bluetooth Controller Configuration // <<< end of configuration section >>> diff --git a/board-support/efr32/efr32mg26/BRD2608A/config/sl_i2cspm_sensor_config.h b/board-support/efr32/efr32mg26/BRD2608A/config/sl_i2cspm_sensor_config.h index 474a5bbf8..5be07c21e 100644 --- a/board-support/efr32/efr32mg26/BRD2608A/config/sl_i2cspm_sensor_config.h +++ b/board-support/efr32/efr32mg26/BRD2608A/config/sl_i2cspm_sensor_config.h @@ -54,17 +54,28 @@ // <<< sl:start pin_tool >>> // SL_I2CSPM_SENSOR // $[I2C_SL_I2CSPM_SENSOR] +#ifndef SL_I2CSPM_SENSOR_PERIPHERAL #define SL_I2CSPM_SENSOR_PERIPHERAL I2C1 +#endif +#ifndef SL_I2CSPM_SENSOR_PERIPHERAL_NO #define SL_I2CSPM_SENSOR_PERIPHERAL_NO 1 +#endif // I2C1 SCL on PC04 +#ifndef SL_I2CSPM_SENSOR_SCL_PORT #define SL_I2CSPM_SENSOR_SCL_PORT SL_GPIO_PORT_C +#endif +#ifndef SL_I2CSPM_SENSOR_SCL_PIN #define SL_I2CSPM_SENSOR_SCL_PIN 4 +#endif // I2C1 SDA on PC05 +#ifndef SL_I2CSPM_SENSOR_SDA_PORT #define SL_I2CSPM_SENSOR_SDA_PORT SL_GPIO_PORT_C +#endif +#ifndef SL_I2CSPM_SENSOR_SDA_PIN #define SL_I2CSPM_SENSOR_SDA_PIN 5 - +#endif // [I2C_SL_I2CSPM_SENSOR]$ // <<< sl:end pin_tool >>> diff --git a/board-support/efr32/efr32mg26/BRD2608A/config/sl_mbedtls_config.h b/board-support/efr32/efr32mg26/BRD2608A/config/sl_mbedtls_config.h index e249b4d1b..7146ba648 100644 --- a/board-support/efr32/efr32mg26/BRD2608A/config/sl_mbedtls_config.h +++ b/board-support/efr32/efr32mg26/BRD2608A/config/sl_mbedtls_config.h @@ -71,9 +71,14 @@ // Default: 1 // This option is enabled assuming all buffers passed to any PSA function reside // in memory that is accessible only to the PSA function during its execution. +// This improves performance by avoiding extra buffer copies, reducing memory +// usage and allocation overhead. However, it is NOT the most secure option and +// should only be enabled if all buffers passed to PSA functions are exclusively +// accessible to PSA and never shared with untrusted code. // This option MUST be disabled whenever buffer arguments are in memory shared // with an untrusted party, for example where arguments to PSA calls are passed -// across a trust boundary. +// across a trust boundary, e.g. if TrustZone is enabled, and the PSA Crypto core +// is placed in the Secure domain. #define SL_MBEDTLS_PSA_ASSUME_EXCLUSIVE_BUFFERS 1 // diff --git a/board-support/efr32/efr32mg26/BRD2608A/config/sl_memory_manager_config.h b/board-support/efr32/efr32mg26/BRD2608A/config/sl_memory_manager_config.h index 26b84b107..4a16c29fe 100644 --- a/board-support/efr32/efr32mg26/BRD2608A/config/sl_memory_manager_config.h +++ b/board-support/efr32/efr32mg26/BRD2608A/config/sl_memory_manager_config.h @@ -51,4 +51,11 @@ // <<< end of configuration section >>> +// Keep this configuration outside the configuration section until the feature is ready for release. +// Enables the heap fallback mechanism. +// Setting this configuration to 0 will disable the fallback mechanism on DTCM and PSRAM. +// If this configuration is disabled, the memory manager will not attempt to use alternative memory regions for allocations even if using the fallback parameters. +// Default: 1 +#define SL_MEMORY_MANAGER_HEAP_FALLBACK_EN 1 + #endif /* SL_MEMORY_MANAGER_CONFIG_H */ diff --git a/board-support/efr32/efr32mg26/BRD2608A/config/sl_mx25_flash_shutdown_usart_config.h b/board-support/efr32/efr32mg26/BRD2608A/config/sl_mx25_flash_shutdown_usart_config.h index 57acb4024..9e73a1a8d 100644 --- a/board-support/efr32/efr32mg26/BRD2608A/config/sl_mx25_flash_shutdown_usart_config.h +++ b/board-support/efr32/efr32mg26/BRD2608A/config/sl_mx25_flash_shutdown_usart_config.h @@ -54,9 +54,12 @@ // SL_MX25_FLASH_SHUTDOWN_CS // $[GPIO_SL_MX25_FLASH_SHUTDOWN_CS] +#ifndef SL_MX25_FLASH_SHUTDOWN_CS_PORT #define SL_MX25_FLASH_SHUTDOWN_CS_PORT SL_GPIO_PORT_A +#endif +#ifndef SL_MX25_FLASH_SHUTDOWN_CS_PIN #define SL_MX25_FLASH_SHUTDOWN_CS_PIN 7 - +#endif // [GPIO_SL_MX25_FLASH_SHUTDOWN_CS]$ // <<< sl:end pin_tool >>> diff --git a/board-support/efr32/efr32mg26/BRD2608A/config/sl_openthread_features_config.h b/board-support/efr32/efr32mg26/BRD2608A/config/sl_openthread_features_config.h index 22340498d..a3697f8af 100644 --- a/board-support/efr32/efr32mg26/BRD2608A/config/sl_openthread_features_config.h +++ b/board-support/efr32/efr32mg26/BRD2608A/config/sl_openthread_features_config.h @@ -65,6 +65,7 @@ #define OPENTHREAD_CONFIG_MAC_CSL_RECEIVER_ENABLE 1 #endif // CSL Scheduling Uncertainty (±10 us units) <12..999:1> +// Left unchanged the value will be set to 175 for RCPs, 20 for FTDs, and 12 for MTDs #ifndef SL_OPENTHREAD_CSL_TX_UNCERTAINTY #if OPENTHREAD_RADIO #define SL_OPENTHREAD_CSL_TX_UNCERTAINTY 175 @@ -142,12 +143,10 @@ #define OPENTHREAD_CONFIG_CHANNEL_MONITOR_ENABLE 0 #endif // - -// Commissioner +// Commissioner #ifndef OPENTHREAD_CONFIG_COMMISSIONER_ENABLE #define OPENTHREAD_CONFIG_COMMISSIONER_ENABLE 0 #endif - // Max Joiner Entries // The maximum number of Joiner entries maintained by the Commissioner. // 2 @@ -155,7 +154,6 @@ #define OPENTHREAD_CONFIG_COMMISSIONER_MAX_JOINER_ENTRIES 2 #endif // - // COAP API #ifndef OPENTHREAD_CONFIG_COAP_API_ENABLE #define OPENTHREAD_CONFIG_COAP_API_ENABLE 0 @@ -171,6 +169,11 @@ #define OPENTHREAD_CONFIG_COAP_SECURE_API_ENABLE 0 #endif // +// COAP Blockwise Transfer +#ifndef OPENTHREAD_CONFIG_COAP_BLOCKWISE_TRANSFER_ENABLE +#define OPENTHREAD_CONFIG_COAP_BLOCKWISE_TRANSFER_ENABLE 0 +#endif +// // DHCP6 Client #ifndef OPENTHREAD_CONFIG_DHCP6_CLIENT_ENABLE #define OPENTHREAD_CONFIG_DHCP6_CLIENT_ENABLE 0 @@ -196,16 +199,27 @@ #define OPENTHREAD_CONFIG_IP6_FRAGMENTATION_ENABLE 0 #endif // -// Maximum number of IPv6 unicast addresses allowed to be externally added +// IPv6 Limits +// Maximum IPv6 external unicast addresses +// Maximum number of IPv6 unicast addresses allowed to be externally added +// 4 #ifndef OPENTHREAD_CONFIG_IP6_MAX_EXT_UCAST_ADDRS #define OPENTHREAD_CONFIG_IP6_MAX_EXT_UCAST_ADDRS 4 #endif -// -// Maximum number of IPv6 multicast addresses allowed to be externally added +// Maximum IPv6 external multicast addresses +// Maximum number of IPv6 multicast addresses allowed to be externally added +// 4 #ifndef OPENTHREAD_CONFIG_IP6_MAX_EXT_MCAST_ADDRS #define OPENTHREAD_CONFIG_IP6_MAX_EXT_MCAST_ADDRS 4 #endif -// +// Maximum IPv6 address registrations for MTD +// The maximum number of IPv6 address registrations for MTD. +// If left unchanged will default to the value of OPENTHREAD_CONFIG_MLE_IP_ADDRS_PER_CHILD +// 4 +#ifndef OPENTHREAD_CONFIG_MLE_IP_ADDRS_TO_REGISTER +#define OPENTHREAD_CONFIG_MLE_IP_ADDRS_TO_REGISTER (OPENTHREAD_CONFIG_MLE_IP_ADDRS_PER_CHILD) +#endif +// // Jam Detection #ifndef OPENTHREAD_CONFIG_JAM_DETECTION_ENABLE #define OPENTHREAD_CONFIG_JAM_DETECTION_ENABLE 0 @@ -226,6 +240,14 @@ #define OPENTHREAD_CONFIG_MAC_FILTER_ENABLE 0 #endif // +// MLE Children +// Maximum number of Thread children supported by the device +// Default is 10. Used by the Thread stack to configure the size of child table. +// 10 +#ifndef OPENTHREAD_CONFIG_MLE_MAX_CHILDREN +#define OPENTHREAD_CONFIG_MLE_MAX_CHILDREN 10 +#endif +// // MLE Long Routes extension (experimental) #ifndef OPENTHREAD_CONFIG_MLE_LONG_ROUTES_ENABLE #define OPENTHREAD_CONFIG_MLE_LONG_ROUTES_ENABLE 0 @@ -235,27 +257,66 @@ #ifndef OPENTHREAD_CONFIG_MULTIPAN_RCP_ENABLE #define OPENTHREAD_CONFIG_MULTIPAN_RCP_ENABLE 0 #endif +// Broadcast IID for spinel frames +// Define broadcast IID for spinel frames dedicated to all hosts in multipan configuration +// 0 +#ifndef OPENTHREAD_SPINEL_CONFIG_BROADCAST_IID +#define OPENTHREAD_SPINEL_CONFIG_BROADCAST_IID 0 +#endif +#if OPENTHREAD_CONFIG_MULTIPAN_RCP_ENABLE +// Maximum number of Zigbee children for multiprotocol (DMP) builds +// Ensures correct table sizing for Zigbee when DMP/multipan is enabled. +// 6 +#ifndef SL_ZIGBEE_MAX_END_DEVICE_CHILDREN +#define SL_ZIGBEE_MAX_END_DEVICE_CHILDREN 6 +#endif +#endif // // Multiple OpenThread Instances #ifndef OPENTHREAD_CONFIG_MULTIPLE_INSTANCE_ENABLE #define OPENTHREAD_CONFIG_MULTIPLE_INSTANCE_ENABLE 0 #endif -// // Multiple Static Instance Support #ifndef OPENTHREAD_CONFIG_MULTIPLE_STATIC_INSTANCE_ENABLE #define OPENTHREAD_CONFIG_MULTIPLE_STATIC_INSTANCE_ENABLE 0 #endif -// -// Number of OpenThread Instances For Static Buffer Allocation +// Number of OpenThread Instances +// Default is 2. Number of OpenThread Instances For Static Buffer Allocation. +// 2 #ifndef OPENTHREAD_CONFIG_MULTIPLE_INSTANCE_NUM #define OPENTHREAD_CONFIG_MULTIPLE_INSTANCE_NUM 2 #endif // -// Define broadcast IID for spinel frames dedicated to all hosts in multipan configuration -#ifndef OPENTHREAD_SPINEL_CONFIG_BROADCAST_IID -#define OPENTHREAD_SPINEL_CONFIG_BROADCAST_IID 0 -#endif // +// Define maximum total source match table entries for both OT and Zigbee. +// In multi-instance builds (SoC or RCP/host), table must support all OT instances + Zigbee. +// For single instance (default), table sized to just OT children. +// This value is used to size all source match tables in both OT and Zigbee code. +// Note: this is purposedly not being setup with CMSIS annotations. +#ifndef RADIO_CONFIG_MAX_SRC_MATCH_ENTRIES +#if OPENTHREAD_CONFIG_MULTIPLE_INSTANCE_ENABLE +#if SL_ZIGBEE_MAX_END_DEVICE_CHILDREN +// Multipan / DMP case: OT + Zigbee +#define RADIO_CONFIG_MAX_SRC_MATCH_ENTRIES \ + ((OPENTHREAD_CONFIG_MLE_MAX_CHILDREN * (OPENTHREAD_CONFIG_MULTIPLE_INSTANCE_NUM - 1)) \ + + SL_ZIGBEE_MAX_END_DEVICE_CHILDREN) +#else +// Multi-instance OT-only case +#define RADIO_CONFIG_MAX_SRC_MATCH_ENTRIES \ + (OPENTHREAD_CONFIG_MLE_MAX_CHILDREN * OPENTHREAD_CONFIG_MULTIPLE_INSTANCE_NUM) +#endif +#else +// Single-instance OT (SoC / NCP / non-multipan RCP) +#define RADIO_CONFIG_MAX_SRC_MATCH_ENTRIES OPENTHREAD_CONFIG_MLE_MAX_CHILDREN +#endif +#endif +// Spinel Match Table +// Maximum number of spinel source match table entries +// Ensure that this value is the total of the number of openthread children times the number of openthread instances plus the number of Zigbee children. +#ifndef OPENTHREAD_SPINEL_CONFIG_MAX_SRC_MATCH_ENTRIES +#define OPENTHREAD_SPINEL_CONFIG_MAX_SRC_MATCH_ENTRIES RADIO_CONFIG_MAX_SRC_MATCH_ENTRIES +#endif +// // OTNS (OpenThread Network Simulator) #ifndef OPENTHREAD_CONFIG_OTNS_ENABLE #define OPENTHREAD_CONFIG_OTNS_ENABLE 0 @@ -265,13 +326,23 @@ #ifndef OPENTHREAD_CONFIG_PING_SENDER_ENABLE #define OPENTHREAD_CONFIG_PING_SENDER_ENABLE 1 #endif - // // Power Calibration Module (RCP only configuration) #ifndef OPENTHREAD_CONFIG_POWER_CALIBRATION_ENABLE #define OPENTHREAD_CONFIG_POWER_CALIBRATION_ENABLE 0 #endif - +// Maximum raw power calibration length +// Max raw power calibration length +// 4 +#ifndef SL_OPENTHREAD_RAW_POWER_CALIBRATION_LENGTH +#define SL_OPENTHREAD_RAW_POWER_CALIBRATION_LENGTH 4 +#endif +// Maximum FEM config setting length +// Max FEM config setting length +// 4 +#ifndef SL_OPENTHREAD_FEM_SETTING_LENGTH +#define SL_OPENTHREAD_FEM_SETTING_LENGTH 4 +#endif // // Platform UDP #ifndef OPENTHREAD_CONFIG_PLATFORM_UDP_ENABLE @@ -309,7 +380,14 @@ #endif // // Time Synchronization Service +#ifndef OPENTHREAD_CONFIG_TIME_SYNC_ENABLE #define OPENTHREAD_CONFIG_TIME_SYNC_ENABLE 0 +#endif +// +// Uptime of OpenThread instance +#ifndef OPENTHREAD_CONFIG_UPTIME_ENABLE +#define OPENTHREAD_CONFIG_UPTIME_ENABLE 1 +#endif // // UDP Forward #ifndef OPENTHREAD_CONFIG_UDP_FORWARD_ENABLE @@ -321,28 +399,22 @@ #define OPENTHREAD_CONFIG_MAC_BEACON_PAYLOAD_PARSING_ENABLE 1 #endif // -// Max raw power calibration length. -#ifndef SL_OPENTHREAD_RAW_POWER_CALIBRATION_LENGTH -#define SL_OPENTHREAD_RAW_POWER_CALIBRATION_LENGTH 4 -#endif -// -// Max FEM config setting length. -#ifndef SL_OPENTHREAD_FEM_SETTING_LENGTH -#define SL_OPENTHREAD_FEM_SETTING_LENGTH 4 -#endif -// -// The maximum number of RX buffers to use in the radio driver. -// 16 +// Radio Driver RX buffers +// Maximum number of RX buffers +// The maximum number of RX buffers to use in the radio driver. +// 16 #ifndef SL_OPENTHREAD_RADIO_RX_BUFFER_COUNT #define SL_OPENTHREAD_RADIO_RX_BUFFER_COUNT 16 #endif // +// // Logging // LOG_OUTPUT // NONE // APP // PLATFORM_DEFINED -// Default: OPENTHREAD_CONFIG_LOG_OUTPUT_PLATFORM_DEFINED +// Default: OPENTHREAD_CONFIG_LOG_OUTPUT_APP +// OPENTHREAD_CONFIG_LOG_OUTPUT_APP #ifndef OPENTHREAD_CONFIG_LOG_OUTPUT #define OPENTHREAD_CONFIG_LOG_OUTPUT OPENTHREAD_CONFIG_LOG_OUTPUT_APP #endif @@ -365,6 +437,7 @@ // INFO // DEBG // Default: OT_LOG_LEVEL_DEBG +// OT_LOG_LEVEL_DEBG #ifndef OPENTHREAD_CONFIG_LOG_LEVEL #define OPENTHREAD_CONFIG_LOG_LEVEL OT_LOG_LEVEL_DEBG #endif @@ -387,11 +460,10 @@ #endif // OPENTHREAD_FULL_LOGS_ENABLE -// Log crash dump after initialization +// Log crash dump after initialization #ifndef OPENTHREAD_CONFIG_PLATFORM_LOG_CRASH_DUMP_ENABLE #define OPENTHREAD_CONFIG_PLATFORM_LOG_CRASH_DUMP_ENABLE 0 #endif -// // // diff --git a/board-support/efr32/efr32mg26/BRD2608A/config/sl_power_manager_config.h b/board-support/efr32/efr32mg26/BRD2608A/config/sl_power_manager_config.h index 3c240b843..86b9fef27 100644 --- a/board-support/efr32/efr32mg26/BRD2608A/config/sl_power_manager_config.h +++ b/board-support/efr32/efr32mg26/BRD2608A/config/sl_power_manager_config.h @@ -37,24 +37,40 @@ // Enable custom IRQ handler for external HF oscillator. // Enable if CMU_IRQHandler/HFXO0_IRQHandler is needed from your application. -// The function sl_power_manager_irq_handler() will have to be called from you custom handler if this is enabled. +// The function sl_power_manager_irq_handler() will have to be called from your custom handler if this is enabled. // Default: 0 +#ifndef SL_POWER_MANAGER_CUSTOM_HF_OSCILLATOR_IRQ_HANDLER #define SL_POWER_MANAGER_CUSTOM_HF_OSCILLATOR_IRQ_HANDLER 0 +#endif // Enable fast wakeup (disable voltage scaling in EM2/3 mode) // Enable or disable voltage scaling in EM2/3 modes (when available). This decreases wakeup time by about 30 us. // Deprecated. It is replaced by the function sl_power_manager_em23_voltage_scaling_enable_fast_wakeup() // Default: 0 +#ifndef SL_POWER_MANAGER_CONFIG_VOLTAGE_SCALING_FAST_WAKEUP #define SL_POWER_MANAGER_CONFIG_VOLTAGE_SCALING_FAST_WAKEUP 0 +#endif + +// Enable voltage scaling in EM0 and EM1 mode. +// Enable or disable voltage scaling in EM0/1 modes. With this config enabled, the voltage +// scaling will be configured at the lowest possible level based on the system clock. +// Default: 0 +#ifndef SL_POWER_MANAGER_ENABLE_EM01_VOLTAGE_SCALING +#define SL_POWER_MANAGER_ENABLE_EM01_VOLTAGE_SCALING 0 +#endif // Enable debugging feature // Enable or disable debugging features (trace the different modules that have requirements). // Default: 0 +#ifndef SL_POWER_MANAGER_DEBUG #define SL_POWER_MANAGER_DEBUG 0 +#endif // Maximum numbers of requirements that can be logged // Default: 10 +#ifndef SL_POWER_MANAGER_DEBUG_POOL_SIZE #define SL_POWER_MANAGER_DEBUG_POOL_SIZE 10 +#endif // // Pin retention mode @@ -63,14 +79,18 @@ // Retention through EM4 // Retention through EM4 and wakeup // power_manager_pin_retention_disable +#ifndef SL_POWER_MANAGER_INIT_EMU_EM4_PIN_RETENTION_MODE #define SL_POWER_MANAGER_INIT_EMU_EM4_PIN_RETENTION_MODE EMU_EM4CTRL_EM4IORETMODE_DISABLE +#endif // Enable EM2 debugging feature // Enable or disable debugging features. // Force PD0B/PD0D to stay on during EM2 entry. This allows the debugger to remain connected in EM2 and EM3. // Enabling debug connectivity results in an increased power consumption in EM2/EM3. // Default: 1 +#ifndef SL_POWER_MANAGER_INIT_EMU_EM2_DEBUG_ENABLE #define SL_POWER_MANAGER_INIT_EMU_EM2_DEBUG_ENABLE 1 +#endif // // diff --git a/board-support/efr32/efr32mg26/BRD2608A/config/sl_rail_util_pa_tables_config.h b/board-support/efr32/efr32mg26/BRD2608A/config/sl_rail_util_pa_tables_config.h new file mode 100644 index 000000000..bd05ea57d --- /dev/null +++ b/board-support/efr32/efr32mg26/BRD2608A/config/sl_rail_util_pa_tables_config.h @@ -0,0 +1,49 @@ +/***************************************************************************//** + * @file + * @brief PA Tables configuration file. + ******************************************************************************* + * # License + * Copyright 2025 Silicon Laboratories Inc. www.silabs.com + ******************************************************************************* + * + * SPDX-License-Identifier: Zlib + * + * The licensor of this software is Silicon Laboratories Inc. + * + * This software is provided 'as-is', without any express or implied + * warranty. In no event will the authors be held liable for any damages + * arising from the use of this software. + * + * Permission is granted to anyone to use this software for any purpose, + * including commercial applications, and to alter it and redistribute it + * freely, subject to the following restrictions: + * + * 1. The origin of this software must not be misrepresented; you must not + * claim that you wrote the original software. If you use this software + * in a product, an acknowledgment in the product documentation would be + * appreciated but is not required. + * 2. Altered source versions must be plainly marked as such, and must not be + * misrepresented as being the original software. + * 3. This notice may not be removed or altered from any source distribution. + * + ******************************************************************************/ + +#ifndef SL_RAIL_UTIL_PA_TABLES_CONFIG_H +#define SL_RAIL_UTIL_PA_TABLES_CONFIG_H + +// <<< Use Configuration Wizard in Context Menu >>> + +// PA Table Configuration +// PA Table Selection +// <"sl_rail_util_pa_dbm_powersetting_mapping_table_10dbm.h"=> 10dBm PA powersetting mapping table +// <"sl_rail_util_pa_dbm_powersetting_mapping_table_0dbm.h"=> 0dBm PA powersetting mapping table +// <"sl_rail_util_pa_dbm_powersetting_mapping_table_automode_0_10dbm.h"=> 0dBm-10dBm automode PA powersetting mapping table +// Default: "sl_rail_util_pa_dbm_powersetting_mapping_table_automode_0_10dbm.h" +#define SL_RAIL_UTIL_PA_TABLE_HEADER "sl_rail_util_pa_dbm_powersetting_mapping_table_automode_0_10dbm.h" +// + +// <<< end of configuration section >>> + +#include SL_RAIL_UTIL_PA_TABLE_HEADER + +#endif // SL_RAIL_UTIL_PA_TABLES_CONFIG_H diff --git a/board-support/efr32/efr32mg26/BRD2608A/config/sl_rail_util_pti_config.h b/board-support/efr32/efr32mg26/BRD2608A/config/sl_rail_util_pti_config.h index 2a82ab599..aaaa66c37 100644 --- a/board-support/efr32/efr32mg26/BRD2608A/config/sl_rail_util_pti_config.h +++ b/board-support/efr32/efr32mg26/BRD2608A/config/sl_rail_util_pti_config.h @@ -35,12 +35,12 @@ // PTI Configuration // PTI mode -// UART -// UART onewire -// SPI -// Disabled -// Default: RAIL_PTI_MODE_UART -#define SL_RAIL_UTIL_PTI_MODE RAIL_PTI_MODE_UART +// UART +// UART onewire +// SPI +// Disabled +// Default: SL_RAIL_PTI_MODE_UART +#define SL_RAIL_UTIL_PTI_MODE SL_RAIL_PTI_MODE_UART // PTI Baud Rate (Hertz) // <147800-20000000:1> diff --git a/board-support/efr32/efr32mg26/BRD2608A/config/sl_simple_button_btn0_config.h b/board-support/efr32/efr32mg26/BRD2608A/config/sl_simple_button_btn0_config.h index 547fc60c1..0e6b0d977 100644 --- a/board-support/efr32/efr32mg26/BRD2608A/config/sl_simple_button_btn0_config.h +++ b/board-support/efr32/efr32mg26/BRD2608A/config/sl_simple_button_btn0_config.h @@ -48,9 +48,12 @@ // SL_SIMPLE_BUTTON_BTN0 // $[GPIO_SL_SIMPLE_BUTTON_BTN0] +#ifndef SL_SIMPLE_BUTTON_BTN0_PORT #define SL_SIMPLE_BUTTON_BTN0_PORT SL_GPIO_PORT_B +#endif +#ifndef SL_SIMPLE_BUTTON_BTN0_PIN #define SL_SIMPLE_BUTTON_BTN0_PIN 2 - +#endif // [GPIO_SL_SIMPLE_BUTTON_BTN0]$ // <<< sl:end pin_tool >>> diff --git a/board-support/efr32/efr32mg26/BRD2608A/config/sl_simple_button_btn1_config.h b/board-support/efr32/efr32mg26/BRD2608A/config/sl_simple_button_btn1_config.h index 928a4d5c2..1df1ce0a1 100644 --- a/board-support/efr32/efr32mg26/BRD2608A/config/sl_simple_button_btn1_config.h +++ b/board-support/efr32/efr32mg26/BRD2608A/config/sl_simple_button_btn1_config.h @@ -48,9 +48,12 @@ // SL_SIMPLE_BUTTON_BTN1 // $[GPIO_SL_SIMPLE_BUTTON_BTN1] +#ifndef SL_SIMPLE_BUTTON_BTN1_PORT #define SL_SIMPLE_BUTTON_BTN1_PORT SL_GPIO_PORT_B +#endif +#ifndef SL_SIMPLE_BUTTON_BTN1_PIN #define SL_SIMPLE_BUTTON_BTN1_PIN 3 - +#endif // [GPIO_SL_SIMPLE_BUTTON_BTN1]$ // <<< sl:end pin_tool >>> diff --git a/board-support/efr32/efr32mg26/BRD4116A/autogen/.slc_state/.crc_config.crc b/board-support/efr32/efr32mg26/BRD4116A/autogen/.slc_state/.crc_config.crc deleted file mode 100644 index 4722542af..000000000 --- a/board-support/efr32/efr32mg26/BRD4116A/autogen/.slc_state/.crc_config.crc +++ /dev/null @@ -1,55 +0,0 @@ -#CRC Codes for initially generated config files -- do not modify! -FreeRTOSConfig.h=548155582 -SEGGER_RTT_Conf.h=1147949881 -app_properties_config.h=-77184399 -btconf/gatt_configuration.btconf=150227803 -buffer_pool_allocator_config.h=117398148 -circular_queue_config.h=130466338 -dmadrv_config.h=281221886 -nvm3_default_config.h=-1919015558 -prioconf/priority_config.prioconf=207881807 -psa_crypto_config.h=35522427 -sl_802154_radio_priority_config.h=-1002598874 -sl_bgapi_config.h=-181798593 -sl_bluetooth_advertiser_config.h=-392946502 -sl_bluetooth_config.h=-1989970244 -sl_bluetooth_connection_config.h=-520944776 -sl_board_control_config.h=1347516933 -sl_bt_host_adaptation_config.h=-1571664154 -sl_bt_rtos_config.h=945845940 -sl_bt_rtos_config_s2.h=1435794679 -sl_btctrl_config.h=-1402830116 -sl_btctrl_scheduler_priority_config.h=-183428656 -sl_clock_manager_oscillator_config.h=1791540322 -sl_clock_manager_tree_config.h=235604457 -sl_core_config.h=-2018153270 -sl_debug_swo_config.h=1207363231 -sl_device_init_dcdc_config.h=467347643 -sl_gp_interface_config.h=1069184913 -sl_hfxo_manager_config.h=511487363 -sl_i2cspm_sensor_config.h=-1958337052 -sl_main_start_task_config.h=251875913 -sl_mbedtls_config.h=-564960822 -sl_mbedtls_device_config.h=-1083250924 -sl_memlcd_usart_config.h=1819418397 -sl_memory_manager_config.h=-209387538 -sl_memory_manager_region_config.h=1182783916 -sl_mx25_flash_shutdown_usart_config.h=57665256 -sl_openthread_ble_cli_config.h=189425562 -sl_openthread_features_config.h=2023610781 -sl_openthread_radio_config.h=-2077523082 -sl_openthread_rtos_config.h=-1827357794 -sl_power_manager_config.h=464971396 -sl_rail_util_pa_config.h=-2074466612 -sl_rail_util_power_manager_init_config.h=-234538768 -sl_rail_util_pti_config.h=-592509068 -sl_rail_util_rssi_config.h=-1038730695 -sl_rail_util_sequencer_config.h=2038517575 -sl_simple_button_btn0_config.h=1788273015 -sl_simple_button_btn1_config.h=-1866558275 -sl_simple_button_config.h=-1019579350 -sl_simple_led_led0_config.h=-1965036027 -sl_simple_led_led1_config.h=-1003738507 -sl_sleeptimer_config.h=847044378 -sl_uartdrv_eusart_vcom_config.h=1871420019 -uartdrv_config.h=1704801857 \ No newline at end of file diff --git a/board-support/efr32/efr32mg26/BRD4116A/autogen/gen.properties b/board-support/efr32/efr32mg26/BRD4116A/autogen/gen.properties deleted file mode 100644 index 439ccc60f..000000000 --- a/board-support/efr32/efr32mg26/BRD4116A/autogen/gen.properties +++ /dev/null @@ -1 +0,0 @@ -sdk=simplicity_sdk:2024.12.2 diff --git a/board-support/efr32/efr32mg26/BRD4116A/autogen/sl_bluetooth.c b/board-support/efr32/efr32mg26/BRD4116A/autogen/sl_bluetooth.c index 4cac19436..0a5f1a969 100644 --- a/board-support/efr32/efr32mg26/BRD4116A/autogen/sl_bluetooth.c +++ b/board-support/efr32/efr32mg26/BRD4116A/autogen/sl_bluetooth.c @@ -30,6 +30,8 @@ #include #include "sl_bluetooth.h" +#include "sli_bt_api.h" +#include "sli_bgapi.h" #include "sl_assert.h" #include "sl_bt_stack_init.h" #include "sl_component_catalog.h" @@ -68,17 +70,23 @@ void sl_bt_step(void) { sl_bt_msg_t evt; + // Run the Bluetooth host stack processing step sl_bt_run(); - uint32_t event_len = sl_bt_event_pending_len(); - // For preventing from data loss, the event will be kept in the stack's queue - // if application cannot process it at the moment. + + // Check the length of the next event, if any, and verify that the application + // can process it. To prevent data loss, the event will be kept in the stack's + // queue if the application cannot process it at the moment. + size_t event_len = sli_bgapi_device_peek_event_len(&sli_bt_bgapi_device); if ((event_len == 0) || (!sl_bt_can_process_event(event_len))) { return; } - // Pop (non-blocking) a Bluetooth stack event from event queue. - sl_status_t status = sl_bt_pop_event(&evt); - if(status != SL_STATUS_OK){ + // Pop the event and process it if successful + sl_status_t status = sli_bgapi_device_pop_event(&sli_bt_bgapi_device, + sizeof(evt), + &evt); + + if (status != SL_STATUS_OK) { return; } sl_bt_process_event(&evt); diff --git a/board-support/efr32/efr32mg26/BRD4116A/autogen/sl_component_catalog.h b/board-support/efr32/efr32mg26/BRD4116A/autogen/sl_component_catalog.h index 71cac4790..ddc382695 100644 --- a/board-support/efr32/efr32mg26/BRD4116A/autogen/sl_component_catalog.h +++ b/board-support/efr32/efr32mg26/BRD4116A/autogen/sl_component_catalog.h @@ -3,6 +3,7 @@ // APIs present in project #define SL_CATALOG_BGAPI_PROTOCOL_PRESENT +#define SL_CATALOG_BGAPI_PROTOCOL_RTOS_ADAPTATION_PRESENT #define SL_CATALOG_BLUETOOTH_CONFIGURATION_PRESENT #define SL_CATALOG_BLUETOOTH_CTE_SUPPORT_PRESENT #define SL_CATALOG_BLUETOOTH_FEATURE_ADVERTISER_PRESENT @@ -23,7 +24,6 @@ #define SL_CATALOG_CMSIS_OS_COMMON_PRESENT #define SL_CATALOG_CPP_SUPPORT_PRESENT #define SL_CATALOG_DEVICE_INIT_PRESENT -#define SL_CATALOG_DEVICE_INIT_CORE_PRESENT #define SL_CATALOG_DEVICE_INIT_DCDC_PRESENT #define SL_CATALOG_EMLIB_CORE_PRESENT #define SL_CATALOG_EMLIB_RMU_PRESENT @@ -32,6 +32,7 @@ #define SL_CATALOG_GATT_CONFIGURATION_PRESENT #define SL_CATALOG_GPIO_PRESENT #define SL_CATALOG_GPIOINTERRUPT_PRESENT +#define SL_CATALOG_HAL_SYSTEM_PRESENT #define SL_CATALOG_HFXO_MANAGER_PRESENT #define SL_CATALOG_INTERRUPT_MANAGER_PRESENT #define SL_CATALOG_IOSTREAM_PRESENT @@ -41,6 +42,7 @@ #endif #define SL_CATALOG_MEMORY_MANAGER_PRESENT #define SL_CATALOG_MEMORY_PROFILER_API_PRESENT +#define SL_CATALOG_MPU_PRESENT #ifdef CONFIG_USE_EXTERNAL_FLASH #define SL_CATALOG_MX25_FLASH_SHUTDOWN_USART_PRESENT #endif // CONFIG_USE_EXTERNAL_FLASH @@ -49,13 +51,12 @@ #define SL_CATALOG_OPENTHREAD_CLI_PRESENT #define SL_CATALOG_OT_GP_INTERFACE_PRESENT #define SL_CATALOG_OPENTHREAD_STACK_PRESENT -#define SL_CATALOG_OPENTHREAD_UART_PRESENT #define SL_CATALOG_POWER_MANAGER_PRESENT +#define SL_CATALOG_POWER_MANAGER_DEEPSLEEP_PRESENT #define SL_CATALOG_PSA_CRYPTO_PRESENT #define SL_CATALOG_RADIO_PRIORITY_15_4_PRESENT #define SL_CATALOG_RAIL_LIB_PRESENT #define SL_CATALOG_RAIL_UTIL_PTI_PRESENT -#define SL_CATALOG_SE_MANAGER_PRESENT #define SL_CATALOG_SECURITY_MANAGER_PRESENT #define SL_CATALOG_SEGGER_RTT_PRESENT #define SL_CATALOG_BTN0_PRESENT diff --git a/board-support/efr32/efr32mg26/BRD4116A/autogen/sl_event_handler.c b/board-support/efr32/efr32mg26/BRD4116A/autogen/sl_event_handler.c index 3d12a3b5e..733f726cf 100644 --- a/board-support/efr32/efr32mg26/BRD4116A/autogen/sl_event_handler.c +++ b/board-support/efr32/efr32mg26/BRD4116A/autogen/sl_event_handler.c @@ -3,10 +3,12 @@ #include "sl_board_init.h" #include "sl_clock_manager.h" #include "sl_hfxo_manager.h" -#include "pa_conversions_efr32.h" -#if !SLI_SI91X_ENABLE_BLE +#include "sl_rail_util_compatible_pa.h" +#if !(defined(SLI_SI91X_ENABLE_BLE) && SLI_SI91X_ENABLE_BLE) +#include "sl_bluetooth.h" +#include "sl_rail_util_power_manager_init.h" +#endif // !SLI_SI91X_ENABLE_BLE #include "sl_rail_util_power_manager_init.h" -#endif #include "sl_rail_util_pti.h" #include "sl_rail_util_rssi.h" #include "btl_interface.h" @@ -24,13 +26,15 @@ #include "sl_mbedtls.h" #include "sl_ot_rtos_adaptation.h" #include "sl_simple_button_instances.h" + +#if (defined(SL_MATTER_RGB_LED_ENABLED) && SL_MATTER_RGB_LED_ENABLED == 1) +#include "sl_simple_rgb_pwm_led_instances.h" +#else #include "sl_simple_led_instances.h" +#endif //(SL_MATTER_RGB_LED_ENABLED) && SL_MATTER_RGB_LED_ENABLED == 1) #if defined(CONFIG_ENABLE_UART) #include "sl_uartdrv_instances.h" #endif // CONFIG_ENABLE_UART -#ifdef SL_WIFI -#include "sl_spidrv_instances.h" -#endif #include "psa/crypto.h" #include "sl_se_manager.h" #include "sli_protocol_crypto.h" @@ -38,7 +42,7 @@ #include "sl_iostream_init_instances.h" #include "cmsis_os2.h" #include "nvm3_default.h" -#include "sl_cos.h" + #include "sl_iostream_handles.h" void sli_driver_permanent_allocation(void) @@ -54,7 +58,6 @@ void sli_stack_permanent_allocation(void) #if !SLI_SI91X_ENABLE_BLE sli_bt_stack_permanent_allocation(); #endif // !SLI_SI91X_ENABLE_BLE - #ifdef SL_OT_ENABLE sl_ot_rtos_perm_allocation(); #endif // SL_OT_ENABLE @@ -80,7 +83,9 @@ void sli_internal_init_early(void) void sl_kernel_start(void) { +#if !SLI_SI91X_ENABLE_BLE sli_bt_rtos_adaptation_kernel_start(); +#endif // !SLI_SI91X_ENABLE_BLE osKernelStart(); } @@ -88,17 +93,16 @@ void sl_driver_init(void) { sl_gpio_init(); GPIOINT_Init(); -#ifndef SLI_SI917 -#ifdef SL_WIFI - sl_spidrv_init_instances(); -#endif -#endif #if defined(SL_MATTER_USE_SI70XX_SENSOR) && SL_MATTER_USE_SI70XX_SENSOR sl_i2cspm_init_instances(); #endif // defined(SL_MATTER_USE_SI70XX_SENSOR) && SL_MATTER_USE_SI70XX_SENSOR sl_simple_button_init_instances(); +#if (defined(SL_MATTER_RGB_LED_ENABLED) && SL_MATTER_RGB_LED_ENABLED == 1) + sl_simple_rgb_pwm_led_init_instances(); +#else sl_simple_led_init_instances(); -#if defined(CONFIG_ENABLE_UART) +#endif //(SL_MATTER_RGB_LED_ENABLED) && SL_MATTER_RGB_LED_ENABLED == 1) + #if defined(CONFIG_ENABLE_UART) sl_uartdrv_init_instances(); #endif // CONFIG_ENABLE_UART } @@ -125,8 +129,7 @@ void sl_stack_init(void) sl_rail_util_pti_init(); sl_rail_util_rssi_init(); sli_bt_stack_functional_init(); -#endif - +#endif // !SLI_SI91X_ENABLE_BLE #ifdef SL_OT_ENABLE sl_ot_sys_init(); #endif // SL_OT_ENABLE diff --git a/board-support/efr32/efr32mg26/BRD4116A/autogen/sl_simple_led_instances.h b/board-support/efr32/efr32mg26/BRD4116A/autogen/sl_simple_led_instances.h index afb5875eb..928fbe942 100644 --- a/board-support/efr32/efr32mg26/BRD4116A/autogen/sl_simple_led_instances.h +++ b/board-support/efr32/efr32mg26/BRD4116A/autogen/sl_simple_led_instances.h @@ -34,6 +34,7 @@ #ifdef __cplusplus extern "C" { #endif + #include "sl_simple_led.h" extern const sl_led_t sl_led_led0; diff --git a/board-support/efr32/efr32mg26/BRD4116A/autogen/sli_psa_config_autogen.h b/board-support/efr32/efr32mg26/BRD4116A/autogen/sli_psa_config_autogen.h index 055d8a95e..f90dd6e9a 100644 --- a/board-support/efr32/efr32mg26/BRD4116A/autogen/sli_psa_config_autogen.h +++ b/board-support/efr32/efr32mg26/BRD4116A/autogen/sli_psa_config_autogen.h @@ -24,7 +24,12 @@ #define PSA_WANT_ALG_TLS12_PSK_TO_MS 1 #define MBEDTLS_PSA_CRYPTO_EXTERNAL_RNG +#if defined(KSU_MAX_KEY_SLOTS) +#include "sli_ksu_keyslots_config.h" +#define MBEDTLS_PSA_KEY_SLOT_COUNT (22 + 15 + 1 + SL_PSA_KEY_USER_SLOT_COUNT + SLI_KSU_MAX_KEY_SLOTS - SLI_KSU_KEY_SLOT_USER_START + 1) +#else #define MBEDTLS_PSA_KEY_SLOT_COUNT (22 + 15 + 1 + SL_PSA_KEY_USER_SLOT_COUNT + 1) +#endif #ifndef SL_PSA_ITS_MAX_FILES #define SL_PSA_ITS_MAX_FILES (1 + SL_PSA_ITS_USER_MAX_FILES) #endif diff --git a/board-support/efr32/efr32mg26/BRD4116A/config/pin_config.h b/board-support/efr32/efr32mg26/BRD4116A/config/pin_config.h new file mode 100644 index 000000000..62b94508c --- /dev/null +++ b/board-support/efr32/efr32mg26/BRD4116A/config/pin_config.h @@ -0,0 +1,304 @@ +#ifndef PIN_CONFIG_H +#define PIN_CONFIG_H + +// $[CMU] +// [CMU]$ + +// $[LFXO] +// [LFXO]$ + +// $[KEYSCAN] +// [KEYSCAN]$ + +// $[PRS.ASYNCH0] +// [PRS.ASYNCH0]$ + +// $[PRS.ASYNCH1] +// [PRS.ASYNCH1]$ + +// $[PRS.ASYNCH2] +// [PRS.ASYNCH2]$ + +// $[PRS.ASYNCH3] +// [PRS.ASYNCH3]$ + +// $[PRS.ASYNCH4] +// [PRS.ASYNCH4]$ + +// $[PRS.ASYNCH5] +// [PRS.ASYNCH5]$ + +// $[PRS.ASYNCH6] +// [PRS.ASYNCH6]$ + +// $[PRS.ASYNCH7] +// [PRS.ASYNCH7]$ + +// $[PRS.ASYNCH8] +// [PRS.ASYNCH8]$ + +// $[PRS.ASYNCH9] +// [PRS.ASYNCH9]$ + +// $[PRS.ASYNCH10] +// [PRS.ASYNCH10]$ + +// $[PRS.ASYNCH11] +// [PRS.ASYNCH11]$ + +// $[PRS.ASYNCH12] +// [PRS.ASYNCH12]$ + +// $[PRS.ASYNCH13] +// [PRS.ASYNCH13]$ + +// $[PRS.ASYNCH14] +// [PRS.ASYNCH14]$ + +// $[PRS.ASYNCH15] +// [PRS.ASYNCH15]$ + +// $[PRS.SYNCH0] +// [PRS.SYNCH0]$ + +// $[PRS.SYNCH1] +// [PRS.SYNCH1]$ + +// $[PRS.SYNCH2] +// [PRS.SYNCH2]$ + +// $[PRS.SYNCH3] +// [PRS.SYNCH3]$ + +// $[GPIO] +// GPIO SWV on PA03 +#ifndef GPIO_SWV_PORT +#define GPIO_SWV_PORT SL_GPIO_PORT_A +#endif +#ifndef GPIO_SWV_PIN +#define GPIO_SWV_PIN 3 +#endif + +// [GPIO]$ + +// $[TIMER0] +// [TIMER0]$ + +// $[TIMER1] +// [TIMER1]$ + +// $[TIMER2] +// [TIMER2]$ + +// $[TIMER3] +// [TIMER3]$ + +// $[TIMER4] +// [TIMER4]$ + +// $[TIMER5] +// [TIMER5]$ + +// $[TIMER6] +// [TIMER6]$ + +// $[TIMER7] +// [TIMER7]$ + +// $[TIMER8] +// [TIMER8]$ + +// $[TIMER9] +// [TIMER9]$ + +// $[EUSART1] +// [EUSART1]$ + +// $[EUSART2] +// [EUSART2]$ + +// $[EUSART3] +// [EUSART3]$ + +// $[USART0] +// USART0 CLK on PC03 +#ifndef USART0_CLK_PORT +#define USART0_CLK_PORT SL_GPIO_PORT_C +#endif +#ifndef USART0_CLK_PIN +#define USART0_CLK_PIN 3 +#endif + +// USART0 TX on PC01 +#ifndef USART0_TX_PORT +#define USART0_TX_PORT SL_GPIO_PORT_C +#endif +#ifndef USART0_TX_PIN +#define USART0_TX_PIN 1 +#endif + +// [USART0]$ + +// $[USART1] +// [USART1]$ + +// $[USART2] +// [USART2]$ + +// $[I2C1] +// I2C1 SCL on PC05 +#ifndef I2C1_SCL_PORT +#define I2C1_SCL_PORT SL_GPIO_PORT_C +#endif +#ifndef I2C1_SCL_PIN +#define I2C1_SCL_PIN 5 +#endif + +// I2C1 SDA on PC07 +#ifndef I2C1_SDA_PORT +#define I2C1_SDA_PORT SL_GPIO_PORT_C +#endif +#ifndef I2C1_SDA_PIN +#define I2C1_SDA_PIN 7 +#endif + +// [I2C1]$ + +// $[I2C2] +// [I2C2]$ + +// $[I2C3] +// [I2C3]$ + +// $[LCD] +// [LCD]$ + +// $[LETIMER0] +// [LETIMER0]$ + +// $[IADC0] +// [IADC0]$ + +// $[ACMP0] +// [ACMP0]$ + +// $[ACMP1] +// [ACMP1]$ + +// $[VDAC0] +// [VDAC0]$ + +// $[VDAC1] +// [VDAC1]$ + +// $[PCNT0] +// [PCNT0]$ + +// $[HFXO0] +// [HFXO0]$ + +// $[I2C0] +// [I2C0]$ + +// $[EUSART0] +// EUSART0 CTS on PB05 +#ifndef EUSART0_CTS_PORT +#define EUSART0_CTS_PORT SL_GPIO_PORT_B +#endif +#ifndef EUSART0_CTS_PIN +#define EUSART0_CTS_PIN 5 +#endif + +// EUSART0 RTS on PA00 +#ifndef EUSART0_RTS_PORT +#define EUSART0_RTS_PORT SL_GPIO_PORT_A +#endif +#ifndef EUSART0_RTS_PIN +#define EUSART0_RTS_PIN 0 +#endif + +// EUSART0 RX on PA09 +#ifndef EUSART0_RX_PORT +#define EUSART0_RX_PORT SL_GPIO_PORT_A +#endif +#ifndef EUSART0_RX_PIN +#define EUSART0_RX_PIN 9 +#endif + +// EUSART0 TX on PA08 +#ifndef EUSART0_TX_PORT +#define EUSART0_TX_PORT SL_GPIO_PORT_A +#endif +#ifndef EUSART0_TX_PIN +#define EUSART0_TX_PIN 8 +#endif + +// [EUSART0]$ + +// $[PTI] +// PTI DFRAME on PD05 +#ifndef PTI_DFRAME_PORT +#define PTI_DFRAME_PORT SL_GPIO_PORT_D +#endif +#ifndef PTI_DFRAME_PIN +#define PTI_DFRAME_PIN 5 +#endif + +// PTI DOUT on PD04 +#ifndef PTI_DOUT_PORT +#define PTI_DOUT_PORT SL_GPIO_PORT_D +#endif +#ifndef PTI_DOUT_PIN +#define PTI_DOUT_PIN 4 +#endif + +// [PTI]$ + +// $[MODEM] +// [MODEM]$ + +// $[CUSTOM_PIN_NAME] +#ifndef _PORT +#define _PORT SL_GPIO_PORT_A +#endif +#ifndef _PIN +#define _PIN 0 +#endif + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +// [CUSTOM_PIN_NAME]$ + + +#endif // PIN_CONFIG_H + + diff --git a/board-support/efr32/efr32mg26/BRD4116A/config/psa_crypto_config.h b/board-support/efr32/efr32mg26/BRD4116A/config/psa_crypto_config.h index 20703b41d..773ce99e0 100644 --- a/board-support/efr32/efr32mg26/BRD4116A/config/psa_crypto_config.h +++ b/board-support/efr32/efr32mg26/BRD4116A/config/psa_crypto_config.h @@ -27,26 +27,32 @@ // Default: 4 #define SL_PSA_KEY_USER_SLOT_COUNT (4) -// PSA Maximum User Persistent Keys Count <0-1024> +// Maximum User Persistent PSA Key Count <0-1024> // Maximum amount of keys (or other files) that can be stored persistently -// by the application through the PSA interface, when persistent storage -// support for PSA Crypto is included in the project. -// Due to caching logic, this setting does have an impact on static RAM usage. -// Note that this number is added to the potential requirements from other -// software components in the project, such that the total amount of keys -// which can be stored through the ITS backend can be higher than what is -// configured here. +// by the user application, when PSA ITS (Internal Trusted Storage) support +// is included in the project. +// NOTE: +// In addition to SL_PSA_ITS_USER_MAX_FILES (number of user keys) the +// application may be configured to include SDK components that require an +// additional number of keys. The sum of user keys and SDK component keys +// is computed and the result, called SL_PSA_ITS_MAX_FILES, is used +// internally in the PSA ITS driver. // -// WARNING: When changing this setting on an application that is already -// deployed, and thus will get the change through an application upgrade, -// care should be taken to ensure that the setting is only ever increased, -// and never decreased. Decreasing this setting might cause previously -// stored keys/files to become inaccessible. +// WARNING: +// For applications using PSA ITS driver version 1 or 2, when changing the +// SL_PSA_ITS_USER_MAX_FILES in an application that is already depeloyed, +// and thus will get the change through an application upgrade, care should +// be taken to ensure that the total sum of keys SL_PSA_ITS_MAX_FILES is +// only ever equal or increased, and never decreased. Decreasing this +// setting might cause previously stored keys/files to become inaccessible, +// ITS should be cleared and all files need to be stored again. // -// It is not possible to change this setting when using V3 ITS Driver. -// The file-storage indexing is dependent on the maximum number of files, -// and if SL_PSA_ITS_USER_MAX_FILES is changed, ITS should be cleared and -// all files need to be stored again. +// For applications using PSA ITS driver version 3, it is not possible to +// change this setting because the file-storage indexing is dependent on the +// maximum number of files (SL_PSA_ITS_MAX_FILES) being consistent, and if +// the sum of SDK component keys and user keys (SL_PSA_ITS_USER_MAX_FILES) +// is changed, may cause previously stored keys/files to become inaccessible +// ITS should be cleared and all files need to be stored again. // Default: 128 #define SL_PSA_ITS_USER_MAX_FILES (128) diff --git a/board-support/efr32/efr32mg26/BRD4116A/config/sl_bluetooth_config.h b/board-support/efr32/efr32mg26/BRD4116A/config/sl_bluetooth_config.h index 9b6a804e0..93bfbbcc4 100644 --- a/board-support/efr32/efr32mg26/BRD4116A/config/sl_bluetooth_config.h +++ b/board-support/efr32/efr32mg26/BRD4116A/config/sl_bluetooth_config.h @@ -99,6 +99,7 @@ // if the LE Power Control feature is enabled. // When this configuration is passed into stack initialization, the stack // will select the closest value that the device supports. +// API sl_bt_system_set_tx_power() can be used to set the minimum TX power at runtime. // API sl_bt_system_get_tx_power_setting() can be used to query the selected value. #define SL_BT_CONFIG_MIN_TX_POWER (-30) @@ -108,6 +109,7 @@ // advertising, scanning and DTM testing. // When this configuration is passed into stack initialization, the stack // will select the closest value that the device supports. +// API sl_bt_system_set_tx_power() can be used to set the maximum TX power at runtime. // API sl_bt_system_get_tx_power_setting() can be used to query the selected value. #define SL_BT_CONFIG_MAX_TX_POWER (80) diff --git a/board-support/efr32/efr32mg26/BRD4116A/config/sl_board_control_config.h b/board-support/efr32/efr32mg26/BRD4116A/config/sl_board_control_config.h index f63c57de8..f474c7408 100644 --- a/board-support/efr32/efr32mg26/BRD4116A/config/sl_board_control_config.h +++ b/board-support/efr32/efr32mg26/BRD4116A/config/sl_board_control_config.h @@ -55,20 +55,32 @@ // SL_BOARD_ENABLE_VCOM // $[GPIO_SL_BOARD_ENABLE_VCOM] -#define SL_BOARD_ENABLE_VCOM_PORT SL_GPIO_PORT_B -#define SL_BOARD_ENABLE_VCOM_PIN 0 +#ifndef SL_BOARD_ENABLE_VCOM_PORT +#define SL_BOARD_ENABLE_VCOM_PORT SL_GPIO_PORT_B +#endif +#ifndef SL_BOARD_ENABLE_VCOM_PIN +#define SL_BOARD_ENABLE_VCOM_PIN 0 +#endif // [GPIO_SL_BOARD_ENABLE_VCOM]$ // SL_BOARD_ENABLE_DISPLAY // $[GPIO_SL_BOARD_ENABLE_DISPLAY] -#define SL_BOARD_ENABLE_DISPLAY_PORT SL_GPIO_PORT_C -#define SL_BOARD_ENABLE_DISPLAY_PIN 9 +#ifndef SL_BOARD_ENABLE_DISPLAY_PORT +#define SL_BOARD_ENABLE_DISPLAY_PORT SL_GPIO_PORT_C +#endif +#ifndef SL_BOARD_ENABLE_DISPLAY_PIN +#define SL_BOARD_ENABLE_DISPLAY_PIN 9 +#endif // [GPIO_SL_BOARD_ENABLE_DISPLAY]$ // SL_BOARD_ENABLE_SENSOR_RHT // $[GPIO_SL_BOARD_ENABLE_SENSOR_RHT] -#define SL_BOARD_ENABLE_SENSOR_RHT_PORT SL_GPIO_PORT_D -#define SL_BOARD_ENABLE_SENSOR_RHT_PIN 3 +#ifndef SL_BOARD_ENABLE_SENSOR_RHT_PORT +#define SL_BOARD_ENABLE_SENSOR_RHT_PORT SL_GPIO_PORT_D +#endif +#ifndef SL_BOARD_ENABLE_SENSOR_RHT_PIN +#define SL_BOARD_ENABLE_SENSOR_RHT_PIN 3 +#endif // [GPIO_SL_BOARD_ENABLE_SENSOR_RHT]$ // <<< sl:end pin_tool >>> diff --git a/board-support/efr32/efr32mg26/BRD4116A/config/sl_btctrl_config.h b/board-support/efr32/efr32mg26/BRD4116A/config/sl_btctrl_config.h index ed75a2d0e..403df1ffe 100644 --- a/board-support/efr32/efr32mg26/BRD4116A/config/sl_btctrl_config.h +++ b/board-support/efr32/efr32mg26/BRD4116A/config/sl_btctrl_config.h @@ -146,15 +146,27 @@ #define SL_BT_CONTROLLER_ADAPTIVITY_MODE (SL_BTCTRL_CHANNELMAP_FLAG_ACTIVE_ADAPTIVITY) #endif -// Power Amplifier (PA) Configuration -// Automode PA configuration -// Highest available PA configuration -// RAIL Utility component PA configuration -// Select the Power Amplifier configuration -// Default: RAIL Utility component PA configuration -#ifndef SL_BT_CONTROLLER_PA_CONFIG -#define SL_BT_CONTROLLER_PA_CONFIG SL_BT_BLUETOOTH_RAIL_UTIL_PA -#endif +// Advertising Configuration +// Include TX Power in the extended header of primary extended advertising packets +// This is default setting to all advertising sets unless it is specifically overridden by VS_SiliconLabs_Set_Advertising_Config_Bits. +// Default: 0 +// Enabling this option takes effect only if permitted by Le_Set_Extended_Advertising_Parameters +// According to Link Layer specification, Vol 6, Part B, Table 2.4 and Table 2.5: +// Optional in 1M PHY when the advertiser is connectable or scannable, or with auxiliary pointer. +// In other cases, the Extended Advertising TX Power is always optional by settings. +#define SL_BT_CONTROLLER_PRIMARY_EXT_PACKET_INCLUDE_TX_POWER (0) +// +// Include Advertiser Address in the header of primary extended advertising packets +// This is default setting to all advertising sets unless it is specifically overridden by VS_SiliconLabs_Set_Advertising_Config_Bits. +// Default: 0 +// Enabling this option takes effect only if permitted by Le_Set_Extended_Advertising_Parameters +// According to Link Layer specification, Vol 6, Part B, Table 2.4 and Table 2.5: +// Optional in 1M PHY when the advertiser is non-connectable and non-scannable, with auxiliary pointer. +// Mandatory when the advertiser is non-connectable and non-scannable, without auxiliary pointer. +// Forbidden when the advertiser is connectable or scannable. +#define SL_BT_CONTROLLER_PRIMARY_EXT_PACKET_INCLUDE_ADDRESS (0) +// +// Advertising Configuration // Bluetooth Controller Configuration // <<< end of configuration section >>> diff --git a/board-support/efr32/efr32mg26/BRD4116A/config/sl_i2cspm_sensor_config.h b/board-support/efr32/efr32mg26/BRD4116A/config/sl_i2cspm_sensor_config.h index 03c4886d4..9804ead6f 100644 --- a/board-support/efr32/efr32mg26/BRD4116A/config/sl_i2cspm_sensor_config.h +++ b/board-support/efr32/efr32mg26/BRD4116A/config/sl_i2cspm_sensor_config.h @@ -54,17 +54,28 @@ // <<< sl:start pin_tool >>> // SL_I2CSPM_SENSOR // $[I2C_SL_I2CSPM_SENSOR] +#ifndef SL_I2CSPM_SENSOR_PERIPHERAL #define SL_I2CSPM_SENSOR_PERIPHERAL I2C1 +#endif +#ifndef SL_I2CSPM_SENSOR_PERIPHERAL_NO #define SL_I2CSPM_SENSOR_PERIPHERAL_NO 1 +#endif // I2C1 SCL on PC05 +#ifndef SL_I2CSPM_SENSOR_SCL_PORT #define SL_I2CSPM_SENSOR_SCL_PORT SL_GPIO_PORT_C +#endif +#ifndef SL_I2CSPM_SENSOR_SCL_PIN #define SL_I2CSPM_SENSOR_SCL_PIN 5 +#endif // I2C1 SDA on PC07 +#ifndef SL_I2CSPM_SENSOR_SDA_PORT #define SL_I2CSPM_SENSOR_SDA_PORT SL_GPIO_PORT_C +#endif +#ifndef SL_I2CSPM_SENSOR_SDA_PIN #define SL_I2CSPM_SENSOR_SDA_PIN 7 - +#endif // [I2C_SL_I2CSPM_SENSOR]$ // <<< sl:end pin_tool >>> diff --git a/board-support/efr32/efr32mg26/BRD4116A/config/sl_mbedtls_config.h b/board-support/efr32/efr32mg26/BRD4116A/config/sl_mbedtls_config.h index e249b4d1b..7146ba648 100644 --- a/board-support/efr32/efr32mg26/BRD4116A/config/sl_mbedtls_config.h +++ b/board-support/efr32/efr32mg26/BRD4116A/config/sl_mbedtls_config.h @@ -71,9 +71,14 @@ // Default: 1 // This option is enabled assuming all buffers passed to any PSA function reside // in memory that is accessible only to the PSA function during its execution. +// This improves performance by avoiding extra buffer copies, reducing memory +// usage and allocation overhead. However, it is NOT the most secure option and +// should only be enabled if all buffers passed to PSA functions are exclusively +// accessible to PSA and never shared with untrusted code. // This option MUST be disabled whenever buffer arguments are in memory shared // with an untrusted party, for example where arguments to PSA calls are passed -// across a trust boundary. +// across a trust boundary, e.g. if TrustZone is enabled, and the PSA Crypto core +// is placed in the Secure domain. #define SL_MBEDTLS_PSA_ASSUME_EXCLUSIVE_BUFFERS 1 // diff --git a/board-support/efr32/efr32mg26/BRD4116A/config/sl_memory_manager_config.h b/board-support/efr32/efr32mg26/BRD4116A/config/sl_memory_manager_config.h index 26b84b107..4a16c29fe 100644 --- a/board-support/efr32/efr32mg26/BRD4116A/config/sl_memory_manager_config.h +++ b/board-support/efr32/efr32mg26/BRD4116A/config/sl_memory_manager_config.h @@ -51,4 +51,11 @@ // <<< end of configuration section >>> +// Keep this configuration outside the configuration section until the feature is ready for release. +// Enables the heap fallback mechanism. +// Setting this configuration to 0 will disable the fallback mechanism on DTCM and PSRAM. +// If this configuration is disabled, the memory manager will not attempt to use alternative memory regions for allocations even if using the fallback parameters. +// Default: 1 +#define SL_MEMORY_MANAGER_HEAP_FALLBACK_EN 1 + #endif /* SL_MEMORY_MANAGER_CONFIG_H */ diff --git a/board-support/efr32/efr32mg26/BRD4116A/config/sl_openthread_features_config.h b/board-support/efr32/efr32mg26/BRD4116A/config/sl_openthread_features_config.h index 22340498d..a3697f8af 100644 --- a/board-support/efr32/efr32mg26/BRD4116A/config/sl_openthread_features_config.h +++ b/board-support/efr32/efr32mg26/BRD4116A/config/sl_openthread_features_config.h @@ -65,6 +65,7 @@ #define OPENTHREAD_CONFIG_MAC_CSL_RECEIVER_ENABLE 1 #endif // CSL Scheduling Uncertainty (±10 us units) <12..999:1> +// Left unchanged the value will be set to 175 for RCPs, 20 for FTDs, and 12 for MTDs #ifndef SL_OPENTHREAD_CSL_TX_UNCERTAINTY #if OPENTHREAD_RADIO #define SL_OPENTHREAD_CSL_TX_UNCERTAINTY 175 @@ -142,12 +143,10 @@ #define OPENTHREAD_CONFIG_CHANNEL_MONITOR_ENABLE 0 #endif // - -// Commissioner +// Commissioner #ifndef OPENTHREAD_CONFIG_COMMISSIONER_ENABLE #define OPENTHREAD_CONFIG_COMMISSIONER_ENABLE 0 #endif - // Max Joiner Entries // The maximum number of Joiner entries maintained by the Commissioner. // 2 @@ -155,7 +154,6 @@ #define OPENTHREAD_CONFIG_COMMISSIONER_MAX_JOINER_ENTRIES 2 #endif // - // COAP API #ifndef OPENTHREAD_CONFIG_COAP_API_ENABLE #define OPENTHREAD_CONFIG_COAP_API_ENABLE 0 @@ -171,6 +169,11 @@ #define OPENTHREAD_CONFIG_COAP_SECURE_API_ENABLE 0 #endif // +// COAP Blockwise Transfer +#ifndef OPENTHREAD_CONFIG_COAP_BLOCKWISE_TRANSFER_ENABLE +#define OPENTHREAD_CONFIG_COAP_BLOCKWISE_TRANSFER_ENABLE 0 +#endif +// // DHCP6 Client #ifndef OPENTHREAD_CONFIG_DHCP6_CLIENT_ENABLE #define OPENTHREAD_CONFIG_DHCP6_CLIENT_ENABLE 0 @@ -196,16 +199,27 @@ #define OPENTHREAD_CONFIG_IP6_FRAGMENTATION_ENABLE 0 #endif // -// Maximum number of IPv6 unicast addresses allowed to be externally added +// IPv6 Limits +// Maximum IPv6 external unicast addresses +// Maximum number of IPv6 unicast addresses allowed to be externally added +// 4 #ifndef OPENTHREAD_CONFIG_IP6_MAX_EXT_UCAST_ADDRS #define OPENTHREAD_CONFIG_IP6_MAX_EXT_UCAST_ADDRS 4 #endif -// -// Maximum number of IPv6 multicast addresses allowed to be externally added +// Maximum IPv6 external multicast addresses +// Maximum number of IPv6 multicast addresses allowed to be externally added +// 4 #ifndef OPENTHREAD_CONFIG_IP6_MAX_EXT_MCAST_ADDRS #define OPENTHREAD_CONFIG_IP6_MAX_EXT_MCAST_ADDRS 4 #endif -// +// Maximum IPv6 address registrations for MTD +// The maximum number of IPv6 address registrations for MTD. +// If left unchanged will default to the value of OPENTHREAD_CONFIG_MLE_IP_ADDRS_PER_CHILD +// 4 +#ifndef OPENTHREAD_CONFIG_MLE_IP_ADDRS_TO_REGISTER +#define OPENTHREAD_CONFIG_MLE_IP_ADDRS_TO_REGISTER (OPENTHREAD_CONFIG_MLE_IP_ADDRS_PER_CHILD) +#endif +// // Jam Detection #ifndef OPENTHREAD_CONFIG_JAM_DETECTION_ENABLE #define OPENTHREAD_CONFIG_JAM_DETECTION_ENABLE 0 @@ -226,6 +240,14 @@ #define OPENTHREAD_CONFIG_MAC_FILTER_ENABLE 0 #endif // +// MLE Children +// Maximum number of Thread children supported by the device +// Default is 10. Used by the Thread stack to configure the size of child table. +// 10 +#ifndef OPENTHREAD_CONFIG_MLE_MAX_CHILDREN +#define OPENTHREAD_CONFIG_MLE_MAX_CHILDREN 10 +#endif +// // MLE Long Routes extension (experimental) #ifndef OPENTHREAD_CONFIG_MLE_LONG_ROUTES_ENABLE #define OPENTHREAD_CONFIG_MLE_LONG_ROUTES_ENABLE 0 @@ -235,27 +257,66 @@ #ifndef OPENTHREAD_CONFIG_MULTIPAN_RCP_ENABLE #define OPENTHREAD_CONFIG_MULTIPAN_RCP_ENABLE 0 #endif +// Broadcast IID for spinel frames +// Define broadcast IID for spinel frames dedicated to all hosts in multipan configuration +// 0 +#ifndef OPENTHREAD_SPINEL_CONFIG_BROADCAST_IID +#define OPENTHREAD_SPINEL_CONFIG_BROADCAST_IID 0 +#endif +#if OPENTHREAD_CONFIG_MULTIPAN_RCP_ENABLE +// Maximum number of Zigbee children for multiprotocol (DMP) builds +// Ensures correct table sizing for Zigbee when DMP/multipan is enabled. +// 6 +#ifndef SL_ZIGBEE_MAX_END_DEVICE_CHILDREN +#define SL_ZIGBEE_MAX_END_DEVICE_CHILDREN 6 +#endif +#endif // // Multiple OpenThread Instances #ifndef OPENTHREAD_CONFIG_MULTIPLE_INSTANCE_ENABLE #define OPENTHREAD_CONFIG_MULTIPLE_INSTANCE_ENABLE 0 #endif -// // Multiple Static Instance Support #ifndef OPENTHREAD_CONFIG_MULTIPLE_STATIC_INSTANCE_ENABLE #define OPENTHREAD_CONFIG_MULTIPLE_STATIC_INSTANCE_ENABLE 0 #endif -// -// Number of OpenThread Instances For Static Buffer Allocation +// Number of OpenThread Instances +// Default is 2. Number of OpenThread Instances For Static Buffer Allocation. +// 2 #ifndef OPENTHREAD_CONFIG_MULTIPLE_INSTANCE_NUM #define OPENTHREAD_CONFIG_MULTIPLE_INSTANCE_NUM 2 #endif // -// Define broadcast IID for spinel frames dedicated to all hosts in multipan configuration -#ifndef OPENTHREAD_SPINEL_CONFIG_BROADCAST_IID -#define OPENTHREAD_SPINEL_CONFIG_BROADCAST_IID 0 -#endif // +// Define maximum total source match table entries for both OT and Zigbee. +// In multi-instance builds (SoC or RCP/host), table must support all OT instances + Zigbee. +// For single instance (default), table sized to just OT children. +// This value is used to size all source match tables in both OT and Zigbee code. +// Note: this is purposedly not being setup with CMSIS annotations. +#ifndef RADIO_CONFIG_MAX_SRC_MATCH_ENTRIES +#if OPENTHREAD_CONFIG_MULTIPLE_INSTANCE_ENABLE +#if SL_ZIGBEE_MAX_END_DEVICE_CHILDREN +// Multipan / DMP case: OT + Zigbee +#define RADIO_CONFIG_MAX_SRC_MATCH_ENTRIES \ + ((OPENTHREAD_CONFIG_MLE_MAX_CHILDREN * (OPENTHREAD_CONFIG_MULTIPLE_INSTANCE_NUM - 1)) \ + + SL_ZIGBEE_MAX_END_DEVICE_CHILDREN) +#else +// Multi-instance OT-only case +#define RADIO_CONFIG_MAX_SRC_MATCH_ENTRIES \ + (OPENTHREAD_CONFIG_MLE_MAX_CHILDREN * OPENTHREAD_CONFIG_MULTIPLE_INSTANCE_NUM) +#endif +#else +// Single-instance OT (SoC / NCP / non-multipan RCP) +#define RADIO_CONFIG_MAX_SRC_MATCH_ENTRIES OPENTHREAD_CONFIG_MLE_MAX_CHILDREN +#endif +#endif +// Spinel Match Table +// Maximum number of spinel source match table entries +// Ensure that this value is the total of the number of openthread children times the number of openthread instances plus the number of Zigbee children. +#ifndef OPENTHREAD_SPINEL_CONFIG_MAX_SRC_MATCH_ENTRIES +#define OPENTHREAD_SPINEL_CONFIG_MAX_SRC_MATCH_ENTRIES RADIO_CONFIG_MAX_SRC_MATCH_ENTRIES +#endif +// // OTNS (OpenThread Network Simulator) #ifndef OPENTHREAD_CONFIG_OTNS_ENABLE #define OPENTHREAD_CONFIG_OTNS_ENABLE 0 @@ -265,13 +326,23 @@ #ifndef OPENTHREAD_CONFIG_PING_SENDER_ENABLE #define OPENTHREAD_CONFIG_PING_SENDER_ENABLE 1 #endif - // // Power Calibration Module (RCP only configuration) #ifndef OPENTHREAD_CONFIG_POWER_CALIBRATION_ENABLE #define OPENTHREAD_CONFIG_POWER_CALIBRATION_ENABLE 0 #endif - +// Maximum raw power calibration length +// Max raw power calibration length +// 4 +#ifndef SL_OPENTHREAD_RAW_POWER_CALIBRATION_LENGTH +#define SL_OPENTHREAD_RAW_POWER_CALIBRATION_LENGTH 4 +#endif +// Maximum FEM config setting length +// Max FEM config setting length +// 4 +#ifndef SL_OPENTHREAD_FEM_SETTING_LENGTH +#define SL_OPENTHREAD_FEM_SETTING_LENGTH 4 +#endif // // Platform UDP #ifndef OPENTHREAD_CONFIG_PLATFORM_UDP_ENABLE @@ -309,7 +380,14 @@ #endif // // Time Synchronization Service +#ifndef OPENTHREAD_CONFIG_TIME_SYNC_ENABLE #define OPENTHREAD_CONFIG_TIME_SYNC_ENABLE 0 +#endif +// +// Uptime of OpenThread instance +#ifndef OPENTHREAD_CONFIG_UPTIME_ENABLE +#define OPENTHREAD_CONFIG_UPTIME_ENABLE 1 +#endif // // UDP Forward #ifndef OPENTHREAD_CONFIG_UDP_FORWARD_ENABLE @@ -321,28 +399,22 @@ #define OPENTHREAD_CONFIG_MAC_BEACON_PAYLOAD_PARSING_ENABLE 1 #endif // -// Max raw power calibration length. -#ifndef SL_OPENTHREAD_RAW_POWER_CALIBRATION_LENGTH -#define SL_OPENTHREAD_RAW_POWER_CALIBRATION_LENGTH 4 -#endif -// -// Max FEM config setting length. -#ifndef SL_OPENTHREAD_FEM_SETTING_LENGTH -#define SL_OPENTHREAD_FEM_SETTING_LENGTH 4 -#endif -// -// The maximum number of RX buffers to use in the radio driver. -// 16 +// Radio Driver RX buffers +// Maximum number of RX buffers +// The maximum number of RX buffers to use in the radio driver. +// 16 #ifndef SL_OPENTHREAD_RADIO_RX_BUFFER_COUNT #define SL_OPENTHREAD_RADIO_RX_BUFFER_COUNT 16 #endif // +// // Logging // LOG_OUTPUT // NONE // APP // PLATFORM_DEFINED -// Default: OPENTHREAD_CONFIG_LOG_OUTPUT_PLATFORM_DEFINED +// Default: OPENTHREAD_CONFIG_LOG_OUTPUT_APP +// OPENTHREAD_CONFIG_LOG_OUTPUT_APP #ifndef OPENTHREAD_CONFIG_LOG_OUTPUT #define OPENTHREAD_CONFIG_LOG_OUTPUT OPENTHREAD_CONFIG_LOG_OUTPUT_APP #endif @@ -365,6 +437,7 @@ // INFO // DEBG // Default: OT_LOG_LEVEL_DEBG +// OT_LOG_LEVEL_DEBG #ifndef OPENTHREAD_CONFIG_LOG_LEVEL #define OPENTHREAD_CONFIG_LOG_LEVEL OT_LOG_LEVEL_DEBG #endif @@ -387,11 +460,10 @@ #endif // OPENTHREAD_FULL_LOGS_ENABLE -// Log crash dump after initialization +// Log crash dump after initialization #ifndef OPENTHREAD_CONFIG_PLATFORM_LOG_CRASH_DUMP_ENABLE #define OPENTHREAD_CONFIG_PLATFORM_LOG_CRASH_DUMP_ENABLE 0 #endif -// // // diff --git a/board-support/efr32/efr32mg26/BRD4116A/config/sl_power_manager_config.h b/board-support/efr32/efr32mg26/BRD4116A/config/sl_power_manager_config.h index 3c240b843..86b9fef27 100644 --- a/board-support/efr32/efr32mg26/BRD4116A/config/sl_power_manager_config.h +++ b/board-support/efr32/efr32mg26/BRD4116A/config/sl_power_manager_config.h @@ -37,24 +37,40 @@ // Enable custom IRQ handler for external HF oscillator. // Enable if CMU_IRQHandler/HFXO0_IRQHandler is needed from your application. -// The function sl_power_manager_irq_handler() will have to be called from you custom handler if this is enabled. +// The function sl_power_manager_irq_handler() will have to be called from your custom handler if this is enabled. // Default: 0 +#ifndef SL_POWER_MANAGER_CUSTOM_HF_OSCILLATOR_IRQ_HANDLER #define SL_POWER_MANAGER_CUSTOM_HF_OSCILLATOR_IRQ_HANDLER 0 +#endif // Enable fast wakeup (disable voltage scaling in EM2/3 mode) // Enable or disable voltage scaling in EM2/3 modes (when available). This decreases wakeup time by about 30 us. // Deprecated. It is replaced by the function sl_power_manager_em23_voltage_scaling_enable_fast_wakeup() // Default: 0 +#ifndef SL_POWER_MANAGER_CONFIG_VOLTAGE_SCALING_FAST_WAKEUP #define SL_POWER_MANAGER_CONFIG_VOLTAGE_SCALING_FAST_WAKEUP 0 +#endif + +// Enable voltage scaling in EM0 and EM1 mode. +// Enable or disable voltage scaling in EM0/1 modes. With this config enabled, the voltage +// scaling will be configured at the lowest possible level based on the system clock. +// Default: 0 +#ifndef SL_POWER_MANAGER_ENABLE_EM01_VOLTAGE_SCALING +#define SL_POWER_MANAGER_ENABLE_EM01_VOLTAGE_SCALING 0 +#endif // Enable debugging feature // Enable or disable debugging features (trace the different modules that have requirements). // Default: 0 +#ifndef SL_POWER_MANAGER_DEBUG #define SL_POWER_MANAGER_DEBUG 0 +#endif // Maximum numbers of requirements that can be logged // Default: 10 +#ifndef SL_POWER_MANAGER_DEBUG_POOL_SIZE #define SL_POWER_MANAGER_DEBUG_POOL_SIZE 10 +#endif // // Pin retention mode @@ -63,14 +79,18 @@ // Retention through EM4 // Retention through EM4 and wakeup // power_manager_pin_retention_disable +#ifndef SL_POWER_MANAGER_INIT_EMU_EM4_PIN_RETENTION_MODE #define SL_POWER_MANAGER_INIT_EMU_EM4_PIN_RETENTION_MODE EMU_EM4CTRL_EM4IORETMODE_DISABLE +#endif // Enable EM2 debugging feature // Enable or disable debugging features. // Force PD0B/PD0D to stay on during EM2 entry. This allows the debugger to remain connected in EM2 and EM3. // Enabling debug connectivity results in an increased power consumption in EM2/EM3. // Default: 1 +#ifndef SL_POWER_MANAGER_INIT_EMU_EM2_DEBUG_ENABLE #define SL_POWER_MANAGER_INIT_EMU_EM2_DEBUG_ENABLE 1 +#endif // // diff --git a/board-support/efr32/efr32mg26/BRD4116A/config/sl_rail_util_pa_tables_config.h b/board-support/efr32/efr32mg26/BRD4116A/config/sl_rail_util_pa_tables_config.h new file mode 100644 index 000000000..bd05ea57d --- /dev/null +++ b/board-support/efr32/efr32mg26/BRD4116A/config/sl_rail_util_pa_tables_config.h @@ -0,0 +1,49 @@ +/***************************************************************************//** + * @file + * @brief PA Tables configuration file. + ******************************************************************************* + * # License + * Copyright 2025 Silicon Laboratories Inc. www.silabs.com + ******************************************************************************* + * + * SPDX-License-Identifier: Zlib + * + * The licensor of this software is Silicon Laboratories Inc. + * + * This software is provided 'as-is', without any express or implied + * warranty. In no event will the authors be held liable for any damages + * arising from the use of this software. + * + * Permission is granted to anyone to use this software for any purpose, + * including commercial applications, and to alter it and redistribute it + * freely, subject to the following restrictions: + * + * 1. The origin of this software must not be misrepresented; you must not + * claim that you wrote the original software. If you use this software + * in a product, an acknowledgment in the product documentation would be + * appreciated but is not required. + * 2. Altered source versions must be plainly marked as such, and must not be + * misrepresented as being the original software. + * 3. This notice may not be removed or altered from any source distribution. + * + ******************************************************************************/ + +#ifndef SL_RAIL_UTIL_PA_TABLES_CONFIG_H +#define SL_RAIL_UTIL_PA_TABLES_CONFIG_H + +// <<< Use Configuration Wizard in Context Menu >>> + +// PA Table Configuration +// PA Table Selection +// <"sl_rail_util_pa_dbm_powersetting_mapping_table_10dbm.h"=> 10dBm PA powersetting mapping table +// <"sl_rail_util_pa_dbm_powersetting_mapping_table_0dbm.h"=> 0dBm PA powersetting mapping table +// <"sl_rail_util_pa_dbm_powersetting_mapping_table_automode_0_10dbm.h"=> 0dBm-10dBm automode PA powersetting mapping table +// Default: "sl_rail_util_pa_dbm_powersetting_mapping_table_automode_0_10dbm.h" +#define SL_RAIL_UTIL_PA_TABLE_HEADER "sl_rail_util_pa_dbm_powersetting_mapping_table_automode_0_10dbm.h" +// + +// <<< end of configuration section >>> + +#include SL_RAIL_UTIL_PA_TABLE_HEADER + +#endif // SL_RAIL_UTIL_PA_TABLES_CONFIG_H diff --git a/board-support/efr32/efr32mg26/BRD4116A/config/sl_rail_util_pti_config.h b/board-support/efr32/efr32mg26/BRD4116A/config/sl_rail_util_pti_config.h index bdd36734c..736b91558 100644 --- a/board-support/efr32/efr32mg26/BRD4116A/config/sl_rail_util_pti_config.h +++ b/board-support/efr32/efr32mg26/BRD4116A/config/sl_rail_util_pti_config.h @@ -35,12 +35,12 @@ // PTI Configuration // PTI mode -// UART -// UART onewire -// SPI -// Disabled -// Default: RAIL_PTI_MODE_UART -#define SL_RAIL_UTIL_PTI_MODE RAIL_PTI_MODE_UART +// UART +// UART onewire +// SPI +// Disabled +// Default: SL_RAIL_PTI_MODE_UART +#define SL_RAIL_UTIL_PTI_MODE SL_RAIL_PTI_MODE_UART // PTI Baud Rate (Hertz) // <147800-20000000:1> diff --git a/board-support/efr32/efr32mg26/BRD4116A/config/sl_simple_button_btn0_config.h b/board-support/efr32/efr32mg26/BRD4116A/config/sl_simple_button_btn0_config.h index 23e27379c..552aa94c9 100644 --- a/board-support/efr32/efr32mg26/BRD4116A/config/sl_simple_button_btn0_config.h +++ b/board-support/efr32/efr32mg26/BRD4116A/config/sl_simple_button_btn0_config.h @@ -48,9 +48,12 @@ // SL_SIMPLE_BUTTON_BTN0 // $[GPIO_SL_SIMPLE_BUTTON_BTN0] +#ifndef SL_SIMPLE_BUTTON_BTN0_PORT #define SL_SIMPLE_BUTTON_BTN0_PORT SL_GPIO_PORT_B +#endif +#ifndef SL_SIMPLE_BUTTON_BTN0_PIN #define SL_SIMPLE_BUTTON_BTN0_PIN 1 - +#endif // [GPIO_SL_SIMPLE_BUTTON_BTN0]$ // <<< sl:end pin_tool >>> diff --git a/board-support/efr32/efr32mg26/BRD4116A/config/sl_simple_button_btn1_config.h b/board-support/efr32/efr32mg26/BRD4116A/config/sl_simple_button_btn1_config.h index 928a4d5c2..1df1ce0a1 100644 --- a/board-support/efr32/efr32mg26/BRD4116A/config/sl_simple_button_btn1_config.h +++ b/board-support/efr32/efr32mg26/BRD4116A/config/sl_simple_button_btn1_config.h @@ -48,9 +48,12 @@ // SL_SIMPLE_BUTTON_BTN1 // $[GPIO_SL_SIMPLE_BUTTON_BTN1] +#ifndef SL_SIMPLE_BUTTON_BTN1_PORT #define SL_SIMPLE_BUTTON_BTN1_PORT SL_GPIO_PORT_B +#endif +#ifndef SL_SIMPLE_BUTTON_BTN1_PIN #define SL_SIMPLE_BUTTON_BTN1_PIN 3 - +#endif // [GPIO_SL_SIMPLE_BUTTON_BTN1]$ // <<< sl:end pin_tool >>> diff --git a/board-support/efr32/efr32mg26/BRD4117A/autogen/sl_bluetooth.c b/board-support/efr32/efr32mg26/BRD4117A/autogen/sl_bluetooth.c index 4cac19436..0a5f1a969 100644 --- a/board-support/efr32/efr32mg26/BRD4117A/autogen/sl_bluetooth.c +++ b/board-support/efr32/efr32mg26/BRD4117A/autogen/sl_bluetooth.c @@ -30,6 +30,8 @@ #include #include "sl_bluetooth.h" +#include "sli_bt_api.h" +#include "sli_bgapi.h" #include "sl_assert.h" #include "sl_bt_stack_init.h" #include "sl_component_catalog.h" @@ -68,17 +70,23 @@ void sl_bt_step(void) { sl_bt_msg_t evt; + // Run the Bluetooth host stack processing step sl_bt_run(); - uint32_t event_len = sl_bt_event_pending_len(); - // For preventing from data loss, the event will be kept in the stack's queue - // if application cannot process it at the moment. + + // Check the length of the next event, if any, and verify that the application + // can process it. To prevent data loss, the event will be kept in the stack's + // queue if the application cannot process it at the moment. + size_t event_len = sli_bgapi_device_peek_event_len(&sli_bt_bgapi_device); if ((event_len == 0) || (!sl_bt_can_process_event(event_len))) { return; } - // Pop (non-blocking) a Bluetooth stack event from event queue. - sl_status_t status = sl_bt_pop_event(&evt); - if(status != SL_STATUS_OK){ + // Pop the event and process it if successful + sl_status_t status = sli_bgapi_device_pop_event(&sli_bt_bgapi_device, + sizeof(evt), + &evt); + + if (status != SL_STATUS_OK) { return; } sl_bt_process_event(&evt); diff --git a/board-support/efr32/efr32mg26/BRD4117A/autogen/sl_component_catalog.h b/board-support/efr32/efr32mg26/BRD4117A/autogen/sl_component_catalog.h index 2ab53cfb9..ddc382695 100644 --- a/board-support/efr32/efr32mg26/BRD4117A/autogen/sl_component_catalog.h +++ b/board-support/efr32/efr32mg26/BRD4117A/autogen/sl_component_catalog.h @@ -3,6 +3,7 @@ // APIs present in project #define SL_CATALOG_BGAPI_PROTOCOL_PRESENT +#define SL_CATALOG_BGAPI_PROTOCOL_RTOS_ADAPTATION_PRESENT #define SL_CATALOG_BLUETOOTH_CONFIGURATION_PRESENT #define SL_CATALOG_BLUETOOTH_CTE_SUPPORT_PRESENT #define SL_CATALOG_BLUETOOTH_FEATURE_ADVERTISER_PRESENT @@ -23,9 +24,7 @@ #define SL_CATALOG_CMSIS_OS_COMMON_PRESENT #define SL_CATALOG_CPP_SUPPORT_PRESENT #define SL_CATALOG_DEVICE_INIT_PRESENT -#define SL_CATALOG_DEVICE_INIT_CORE_PRESENT #define SL_CATALOG_DEVICE_INIT_DCDC_PRESENT -#define SL_CATALOG_DMD_MEMLCD_PRESENT #define SL_CATALOG_EMLIB_CORE_PRESENT #define SL_CATALOG_EMLIB_RMU_PRESENT #define SL_CATALOG_FREERTOS_KERNEL_PRESENT @@ -33,6 +32,7 @@ #define SL_CATALOG_GATT_CONFIGURATION_PRESENT #define SL_CATALOG_GPIO_PRESENT #define SL_CATALOG_GPIOINTERRUPT_PRESENT +#define SL_CATALOG_HAL_SYSTEM_PRESENT #define SL_CATALOG_HFXO_MANAGER_PRESENT #define SL_CATALOG_INTERRUPT_MANAGER_PRESENT #define SL_CATALOG_IOSTREAM_PRESENT @@ -42,6 +42,7 @@ #endif #define SL_CATALOG_MEMORY_MANAGER_PRESENT #define SL_CATALOG_MEMORY_PROFILER_API_PRESENT +#define SL_CATALOG_MPU_PRESENT #ifdef CONFIG_USE_EXTERNAL_FLASH #define SL_CATALOG_MX25_FLASH_SHUTDOWN_USART_PRESENT #endif // CONFIG_USE_EXTERNAL_FLASH @@ -50,13 +51,12 @@ #define SL_CATALOG_OPENTHREAD_CLI_PRESENT #define SL_CATALOG_OT_GP_INTERFACE_PRESENT #define SL_CATALOG_OPENTHREAD_STACK_PRESENT -#define SL_CATALOG_OPENTHREAD_UART_PRESENT #define SL_CATALOG_POWER_MANAGER_PRESENT +#define SL_CATALOG_POWER_MANAGER_DEEPSLEEP_PRESENT #define SL_CATALOG_PSA_CRYPTO_PRESENT #define SL_CATALOG_RADIO_PRIORITY_15_4_PRESENT #define SL_CATALOG_RAIL_LIB_PRESENT #define SL_CATALOG_RAIL_UTIL_PTI_PRESENT -#define SL_CATALOG_SE_MANAGER_PRESENT #define SL_CATALOG_SECURITY_MANAGER_PRESENT #define SL_CATALOG_SEGGER_RTT_PRESENT #define SL_CATALOG_BTN0_PRESENT diff --git a/board-support/efr32/efr32mg26/BRD4117A/autogen/sl_event_handler.c b/board-support/efr32/efr32mg26/BRD4117A/autogen/sl_event_handler.c index 725639551..357a278f8 100644 --- a/board-support/efr32/efr32mg26/BRD4117A/autogen/sl_event_handler.c +++ b/board-support/efr32/efr32mg26/BRD4117A/autogen/sl_event_handler.c @@ -3,10 +3,12 @@ #include "sl_board_init.h" #include "sl_clock_manager.h" #include "sl_hfxo_manager.h" -#include "pa_conversions_efr32.h" -#if !SLI_SI91X_ENABLE_BLE +#include "sl_rail_util_compatible_pa.h" +#if !(defined(SLI_SI91X_ENABLE_BLE) && SLI_SI91X_ENABLE_BLE) +#include "sl_bluetooth.h" +#include "sl_rail_util_power_manager_init.h" +#endif // !SLI_SI91X_ENABLE_BLE #include "sl_rail_util_power_manager_init.h" -#endif #include "sl_rail_util_pti.h" #include "sl_rail_util_rssi.h" #include "btl_interface.h" @@ -14,6 +16,7 @@ #include "platform-efr32.h" #include "sl_bt_rtos_adaptation.h" #include "sl_bluetooth.h" +#include "sl_debug_swo.h" #include "sl_gpio.h" #include "gpiointerrupt.h" #if defined(SL_MATTER_USE_SI70XX_SENSOR) && SL_MATTER_USE_SI70XX_SENSOR @@ -23,13 +26,15 @@ #include "sl_mbedtls.h" #include "sl_ot_rtos_adaptation.h" #include "sl_simple_button_instances.h" + +#if (defined(SL_MATTER_RGB_LED_ENABLED) && SL_MATTER_RGB_LED_ENABLED == 1) +#include "sl_simple_rgb_pwm_led_instances.h" +#else #include "sl_simple_led_instances.h" +#endif //(SL_MATTER_RGB_LED_ENABLED) && SL_MATTER_RGB_LED_ENABLED == 1) #if defined(CONFIG_ENABLE_UART) #include "sl_uartdrv_instances.h" #endif // CONFIG_ENABLE_UART -#ifdef SL_WIFI -#include "sl_spidrv_instances.h" -#endif #include "psa/crypto.h" #include "sl_se_manager.h" #include "sli_protocol_crypto.h" @@ -37,6 +42,7 @@ #include "sl_iostream_init_instances.h" #include "cmsis_os2.h" #include "nvm3_default.h" + #include "sl_iostream_handles.h" void sli_driver_permanent_allocation(void) @@ -49,13 +55,8 @@ void sli_service_permanent_allocation(void) void sli_stack_permanent_allocation(void) { -#if !SLI_SI91X_ENABLE_BLE sli_bt_stack_permanent_allocation(); -#endif // !SLI_SI91X_ENABLE_BLE - -#ifdef SL_OT_ENABLE sl_ot_rtos_perm_allocation(); -#endif // SL_OT_ENABLE } void sli_internal_permanent_allocation(void) @@ -78,9 +79,7 @@ void sli_internal_init_early(void) void sl_kernel_start(void) { -#if !SLI_SI91X_ENABLE_BLE sli_bt_rtos_adaptation_kernel_start(); -#endif // !SLI_SI91X_ENABLE_BLE osKernelStart(); } @@ -88,17 +87,16 @@ void sl_driver_init(void) { sl_gpio_init(); GPIOINT_Init(); -#ifndef SLI_SI917 -#ifdef SL_WIFI - sl_spidrv_init_instances(); -#endif -#endif #if defined(SL_MATTER_USE_SI70XX_SENSOR) && SL_MATTER_USE_SI70XX_SENSOR sl_i2cspm_init_instances(); #endif // defined(SL_MATTER_USE_SI70XX_SENSOR) && SL_MATTER_USE_SI70XX_SENSOR sl_simple_button_init_instances(); +#if (defined(SL_MATTER_RGB_LED_ENABLED) && SL_MATTER_RGB_LED_ENABLED == 1) + sl_simple_rgb_pwm_led_init_instances(); +#else sl_simple_led_init_instances(); -#if defined(CONFIG_ENABLE_UART) +#endif //(SL_MATTER_RGB_LED_ENABLED) && SL_MATTER_RGB_LED_ENABLED == 1) + #if defined(CONFIG_ENABLE_UART) sl_uartdrv_init_instances(); #endif // CONFIG_ENABLE_UART } @@ -125,8 +123,7 @@ void sl_stack_init(void) sl_rail_util_pti_init(); sl_rail_util_rssi_init(); sli_bt_stack_functional_init(); -#endif - +#endif // !SLI_SI91X_ENABLE_BLE #ifdef SL_OT_ENABLE sl_ot_sys_init(); #endif // SL_OT_ENABLE diff --git a/board-support/efr32/efr32mg26/BRD4117A/autogen/sl_simple_led_instances.h b/board-support/efr32/efr32mg26/BRD4117A/autogen/sl_simple_led_instances.h index afb5875eb..928fbe942 100644 --- a/board-support/efr32/efr32mg26/BRD4117A/autogen/sl_simple_led_instances.h +++ b/board-support/efr32/efr32mg26/BRD4117A/autogen/sl_simple_led_instances.h @@ -34,6 +34,7 @@ #ifdef __cplusplus extern "C" { #endif + #include "sl_simple_led.h" extern const sl_led_t sl_led_led0; diff --git a/board-support/efr32/efr32mg26/BRD4117A/autogen/sli_psa_config_autogen.h b/board-support/efr32/efr32mg26/BRD4117A/autogen/sli_psa_config_autogen.h index 055d8a95e..f90dd6e9a 100644 --- a/board-support/efr32/efr32mg26/BRD4117A/autogen/sli_psa_config_autogen.h +++ b/board-support/efr32/efr32mg26/BRD4117A/autogen/sli_psa_config_autogen.h @@ -24,7 +24,12 @@ #define PSA_WANT_ALG_TLS12_PSK_TO_MS 1 #define MBEDTLS_PSA_CRYPTO_EXTERNAL_RNG +#if defined(KSU_MAX_KEY_SLOTS) +#include "sli_ksu_keyslots_config.h" +#define MBEDTLS_PSA_KEY_SLOT_COUNT (22 + 15 + 1 + SL_PSA_KEY_USER_SLOT_COUNT + SLI_KSU_MAX_KEY_SLOTS - SLI_KSU_KEY_SLOT_USER_START + 1) +#else #define MBEDTLS_PSA_KEY_SLOT_COUNT (22 + 15 + 1 + SL_PSA_KEY_USER_SLOT_COUNT + 1) +#endif #ifndef SL_PSA_ITS_MAX_FILES #define SL_PSA_ITS_MAX_FILES (1 + SL_PSA_ITS_USER_MAX_FILES) #endif diff --git a/board-support/efr32/efr32mg26/BRD4117A/config/pin_config.h b/board-support/efr32/efr32mg26/BRD4117A/config/pin_config.h new file mode 100644 index 000000000..62b94508c --- /dev/null +++ b/board-support/efr32/efr32mg26/BRD4117A/config/pin_config.h @@ -0,0 +1,304 @@ +#ifndef PIN_CONFIG_H +#define PIN_CONFIG_H + +// $[CMU] +// [CMU]$ + +// $[LFXO] +// [LFXO]$ + +// $[KEYSCAN] +// [KEYSCAN]$ + +// $[PRS.ASYNCH0] +// [PRS.ASYNCH0]$ + +// $[PRS.ASYNCH1] +// [PRS.ASYNCH1]$ + +// $[PRS.ASYNCH2] +// [PRS.ASYNCH2]$ + +// $[PRS.ASYNCH3] +// [PRS.ASYNCH3]$ + +// $[PRS.ASYNCH4] +// [PRS.ASYNCH4]$ + +// $[PRS.ASYNCH5] +// [PRS.ASYNCH5]$ + +// $[PRS.ASYNCH6] +// [PRS.ASYNCH6]$ + +// $[PRS.ASYNCH7] +// [PRS.ASYNCH7]$ + +// $[PRS.ASYNCH8] +// [PRS.ASYNCH8]$ + +// $[PRS.ASYNCH9] +// [PRS.ASYNCH9]$ + +// $[PRS.ASYNCH10] +// [PRS.ASYNCH10]$ + +// $[PRS.ASYNCH11] +// [PRS.ASYNCH11]$ + +// $[PRS.ASYNCH12] +// [PRS.ASYNCH12]$ + +// $[PRS.ASYNCH13] +// [PRS.ASYNCH13]$ + +// $[PRS.ASYNCH14] +// [PRS.ASYNCH14]$ + +// $[PRS.ASYNCH15] +// [PRS.ASYNCH15]$ + +// $[PRS.SYNCH0] +// [PRS.SYNCH0]$ + +// $[PRS.SYNCH1] +// [PRS.SYNCH1]$ + +// $[PRS.SYNCH2] +// [PRS.SYNCH2]$ + +// $[PRS.SYNCH3] +// [PRS.SYNCH3]$ + +// $[GPIO] +// GPIO SWV on PA03 +#ifndef GPIO_SWV_PORT +#define GPIO_SWV_PORT SL_GPIO_PORT_A +#endif +#ifndef GPIO_SWV_PIN +#define GPIO_SWV_PIN 3 +#endif + +// [GPIO]$ + +// $[TIMER0] +// [TIMER0]$ + +// $[TIMER1] +// [TIMER1]$ + +// $[TIMER2] +// [TIMER2]$ + +// $[TIMER3] +// [TIMER3]$ + +// $[TIMER4] +// [TIMER4]$ + +// $[TIMER5] +// [TIMER5]$ + +// $[TIMER6] +// [TIMER6]$ + +// $[TIMER7] +// [TIMER7]$ + +// $[TIMER8] +// [TIMER8]$ + +// $[TIMER9] +// [TIMER9]$ + +// $[EUSART1] +// [EUSART1]$ + +// $[EUSART2] +// [EUSART2]$ + +// $[EUSART3] +// [EUSART3]$ + +// $[USART0] +// USART0 CLK on PC03 +#ifndef USART0_CLK_PORT +#define USART0_CLK_PORT SL_GPIO_PORT_C +#endif +#ifndef USART0_CLK_PIN +#define USART0_CLK_PIN 3 +#endif + +// USART0 TX on PC01 +#ifndef USART0_TX_PORT +#define USART0_TX_PORT SL_GPIO_PORT_C +#endif +#ifndef USART0_TX_PIN +#define USART0_TX_PIN 1 +#endif + +// [USART0]$ + +// $[USART1] +// [USART1]$ + +// $[USART2] +// [USART2]$ + +// $[I2C1] +// I2C1 SCL on PC05 +#ifndef I2C1_SCL_PORT +#define I2C1_SCL_PORT SL_GPIO_PORT_C +#endif +#ifndef I2C1_SCL_PIN +#define I2C1_SCL_PIN 5 +#endif + +// I2C1 SDA on PC07 +#ifndef I2C1_SDA_PORT +#define I2C1_SDA_PORT SL_GPIO_PORT_C +#endif +#ifndef I2C1_SDA_PIN +#define I2C1_SDA_PIN 7 +#endif + +// [I2C1]$ + +// $[I2C2] +// [I2C2]$ + +// $[I2C3] +// [I2C3]$ + +// $[LCD] +// [LCD]$ + +// $[LETIMER0] +// [LETIMER0]$ + +// $[IADC0] +// [IADC0]$ + +// $[ACMP0] +// [ACMP0]$ + +// $[ACMP1] +// [ACMP1]$ + +// $[VDAC0] +// [VDAC0]$ + +// $[VDAC1] +// [VDAC1]$ + +// $[PCNT0] +// [PCNT0]$ + +// $[HFXO0] +// [HFXO0]$ + +// $[I2C0] +// [I2C0]$ + +// $[EUSART0] +// EUSART0 CTS on PB05 +#ifndef EUSART0_CTS_PORT +#define EUSART0_CTS_PORT SL_GPIO_PORT_B +#endif +#ifndef EUSART0_CTS_PIN +#define EUSART0_CTS_PIN 5 +#endif + +// EUSART0 RTS on PA00 +#ifndef EUSART0_RTS_PORT +#define EUSART0_RTS_PORT SL_GPIO_PORT_A +#endif +#ifndef EUSART0_RTS_PIN +#define EUSART0_RTS_PIN 0 +#endif + +// EUSART0 RX on PA09 +#ifndef EUSART0_RX_PORT +#define EUSART0_RX_PORT SL_GPIO_PORT_A +#endif +#ifndef EUSART0_RX_PIN +#define EUSART0_RX_PIN 9 +#endif + +// EUSART0 TX on PA08 +#ifndef EUSART0_TX_PORT +#define EUSART0_TX_PORT SL_GPIO_PORT_A +#endif +#ifndef EUSART0_TX_PIN +#define EUSART0_TX_PIN 8 +#endif + +// [EUSART0]$ + +// $[PTI] +// PTI DFRAME on PD05 +#ifndef PTI_DFRAME_PORT +#define PTI_DFRAME_PORT SL_GPIO_PORT_D +#endif +#ifndef PTI_DFRAME_PIN +#define PTI_DFRAME_PIN 5 +#endif + +// PTI DOUT on PD04 +#ifndef PTI_DOUT_PORT +#define PTI_DOUT_PORT SL_GPIO_PORT_D +#endif +#ifndef PTI_DOUT_PIN +#define PTI_DOUT_PIN 4 +#endif + +// [PTI]$ + +// $[MODEM] +// [MODEM]$ + +// $[CUSTOM_PIN_NAME] +#ifndef _PORT +#define _PORT SL_GPIO_PORT_A +#endif +#ifndef _PIN +#define _PIN 0 +#endif + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +// [CUSTOM_PIN_NAME]$ + + +#endif // PIN_CONFIG_H + + diff --git a/board-support/efr32/efr32mg26/BRD4117A/config/psa_crypto_config.h b/board-support/efr32/efr32mg26/BRD4117A/config/psa_crypto_config.h index 20703b41d..773ce99e0 100644 --- a/board-support/efr32/efr32mg26/BRD4117A/config/psa_crypto_config.h +++ b/board-support/efr32/efr32mg26/BRD4117A/config/psa_crypto_config.h @@ -27,26 +27,32 @@ // Default: 4 #define SL_PSA_KEY_USER_SLOT_COUNT (4) -// PSA Maximum User Persistent Keys Count <0-1024> +// Maximum User Persistent PSA Key Count <0-1024> // Maximum amount of keys (or other files) that can be stored persistently -// by the application through the PSA interface, when persistent storage -// support for PSA Crypto is included in the project. -// Due to caching logic, this setting does have an impact on static RAM usage. -// Note that this number is added to the potential requirements from other -// software components in the project, such that the total amount of keys -// which can be stored through the ITS backend can be higher than what is -// configured here. +// by the user application, when PSA ITS (Internal Trusted Storage) support +// is included in the project. +// NOTE: +// In addition to SL_PSA_ITS_USER_MAX_FILES (number of user keys) the +// application may be configured to include SDK components that require an +// additional number of keys. The sum of user keys and SDK component keys +// is computed and the result, called SL_PSA_ITS_MAX_FILES, is used +// internally in the PSA ITS driver. // -// WARNING: When changing this setting on an application that is already -// deployed, and thus will get the change through an application upgrade, -// care should be taken to ensure that the setting is only ever increased, -// and never decreased. Decreasing this setting might cause previously -// stored keys/files to become inaccessible. +// WARNING: +// For applications using PSA ITS driver version 1 or 2, when changing the +// SL_PSA_ITS_USER_MAX_FILES in an application that is already depeloyed, +// and thus will get the change through an application upgrade, care should +// be taken to ensure that the total sum of keys SL_PSA_ITS_MAX_FILES is +// only ever equal or increased, and never decreased. Decreasing this +// setting might cause previously stored keys/files to become inaccessible, +// ITS should be cleared and all files need to be stored again. // -// It is not possible to change this setting when using V3 ITS Driver. -// The file-storage indexing is dependent on the maximum number of files, -// and if SL_PSA_ITS_USER_MAX_FILES is changed, ITS should be cleared and -// all files need to be stored again. +// For applications using PSA ITS driver version 3, it is not possible to +// change this setting because the file-storage indexing is dependent on the +// maximum number of files (SL_PSA_ITS_MAX_FILES) being consistent, and if +// the sum of SDK component keys and user keys (SL_PSA_ITS_USER_MAX_FILES) +// is changed, may cause previously stored keys/files to become inaccessible +// ITS should be cleared and all files need to be stored again. // Default: 128 #define SL_PSA_ITS_USER_MAX_FILES (128) diff --git a/board-support/efr32/efr32mg26/BRD4117A/config/sl_bluetooth_config.h b/board-support/efr32/efr32mg26/BRD4117A/config/sl_bluetooth_config.h index 9b6a804e0..93bfbbcc4 100644 --- a/board-support/efr32/efr32mg26/BRD4117A/config/sl_bluetooth_config.h +++ b/board-support/efr32/efr32mg26/BRD4117A/config/sl_bluetooth_config.h @@ -99,6 +99,7 @@ // if the LE Power Control feature is enabled. // When this configuration is passed into stack initialization, the stack // will select the closest value that the device supports. +// API sl_bt_system_set_tx_power() can be used to set the minimum TX power at runtime. // API sl_bt_system_get_tx_power_setting() can be used to query the selected value. #define SL_BT_CONFIG_MIN_TX_POWER (-30) @@ -108,6 +109,7 @@ // advertising, scanning and DTM testing. // When this configuration is passed into stack initialization, the stack // will select the closest value that the device supports. +// API sl_bt_system_set_tx_power() can be used to set the maximum TX power at runtime. // API sl_bt_system_get_tx_power_setting() can be used to query the selected value. #define SL_BT_CONFIG_MAX_TX_POWER (80) diff --git a/board-support/efr32/efr32mg26/BRD4117A/config/sl_board_control_config.h b/board-support/efr32/efr32mg26/BRD4117A/config/sl_board_control_config.h index f63c57de8..f474c7408 100644 --- a/board-support/efr32/efr32mg26/BRD4117A/config/sl_board_control_config.h +++ b/board-support/efr32/efr32mg26/BRD4117A/config/sl_board_control_config.h @@ -55,20 +55,32 @@ // SL_BOARD_ENABLE_VCOM // $[GPIO_SL_BOARD_ENABLE_VCOM] -#define SL_BOARD_ENABLE_VCOM_PORT SL_GPIO_PORT_B -#define SL_BOARD_ENABLE_VCOM_PIN 0 +#ifndef SL_BOARD_ENABLE_VCOM_PORT +#define SL_BOARD_ENABLE_VCOM_PORT SL_GPIO_PORT_B +#endif +#ifndef SL_BOARD_ENABLE_VCOM_PIN +#define SL_BOARD_ENABLE_VCOM_PIN 0 +#endif // [GPIO_SL_BOARD_ENABLE_VCOM]$ // SL_BOARD_ENABLE_DISPLAY // $[GPIO_SL_BOARD_ENABLE_DISPLAY] -#define SL_BOARD_ENABLE_DISPLAY_PORT SL_GPIO_PORT_C -#define SL_BOARD_ENABLE_DISPLAY_PIN 9 +#ifndef SL_BOARD_ENABLE_DISPLAY_PORT +#define SL_BOARD_ENABLE_DISPLAY_PORT SL_GPIO_PORT_C +#endif +#ifndef SL_BOARD_ENABLE_DISPLAY_PIN +#define SL_BOARD_ENABLE_DISPLAY_PIN 9 +#endif // [GPIO_SL_BOARD_ENABLE_DISPLAY]$ // SL_BOARD_ENABLE_SENSOR_RHT // $[GPIO_SL_BOARD_ENABLE_SENSOR_RHT] -#define SL_BOARD_ENABLE_SENSOR_RHT_PORT SL_GPIO_PORT_D -#define SL_BOARD_ENABLE_SENSOR_RHT_PIN 3 +#ifndef SL_BOARD_ENABLE_SENSOR_RHT_PORT +#define SL_BOARD_ENABLE_SENSOR_RHT_PORT SL_GPIO_PORT_D +#endif +#ifndef SL_BOARD_ENABLE_SENSOR_RHT_PIN +#define SL_BOARD_ENABLE_SENSOR_RHT_PIN 3 +#endif // [GPIO_SL_BOARD_ENABLE_SENSOR_RHT]$ // <<< sl:end pin_tool >>> diff --git a/board-support/efr32/efr32mg26/BRD4117A/config/sl_btctrl_config.h b/board-support/efr32/efr32mg26/BRD4117A/config/sl_btctrl_config.h index ed75a2d0e..403df1ffe 100644 --- a/board-support/efr32/efr32mg26/BRD4117A/config/sl_btctrl_config.h +++ b/board-support/efr32/efr32mg26/BRD4117A/config/sl_btctrl_config.h @@ -146,15 +146,27 @@ #define SL_BT_CONTROLLER_ADAPTIVITY_MODE (SL_BTCTRL_CHANNELMAP_FLAG_ACTIVE_ADAPTIVITY) #endif -// Power Amplifier (PA) Configuration -// Automode PA configuration -// Highest available PA configuration -// RAIL Utility component PA configuration -// Select the Power Amplifier configuration -// Default: RAIL Utility component PA configuration -#ifndef SL_BT_CONTROLLER_PA_CONFIG -#define SL_BT_CONTROLLER_PA_CONFIG SL_BT_BLUETOOTH_RAIL_UTIL_PA -#endif +// Advertising Configuration +// Include TX Power in the extended header of primary extended advertising packets +// This is default setting to all advertising sets unless it is specifically overridden by VS_SiliconLabs_Set_Advertising_Config_Bits. +// Default: 0 +// Enabling this option takes effect only if permitted by Le_Set_Extended_Advertising_Parameters +// According to Link Layer specification, Vol 6, Part B, Table 2.4 and Table 2.5: +// Optional in 1M PHY when the advertiser is connectable or scannable, or with auxiliary pointer. +// In other cases, the Extended Advertising TX Power is always optional by settings. +#define SL_BT_CONTROLLER_PRIMARY_EXT_PACKET_INCLUDE_TX_POWER (0) +// +// Include Advertiser Address in the header of primary extended advertising packets +// This is default setting to all advertising sets unless it is specifically overridden by VS_SiliconLabs_Set_Advertising_Config_Bits. +// Default: 0 +// Enabling this option takes effect only if permitted by Le_Set_Extended_Advertising_Parameters +// According to Link Layer specification, Vol 6, Part B, Table 2.4 and Table 2.5: +// Optional in 1M PHY when the advertiser is non-connectable and non-scannable, with auxiliary pointer. +// Mandatory when the advertiser is non-connectable and non-scannable, without auxiliary pointer. +// Forbidden when the advertiser is connectable or scannable. +#define SL_BT_CONTROLLER_PRIMARY_EXT_PACKET_INCLUDE_ADDRESS (0) +// +// Advertising Configuration // Bluetooth Controller Configuration // <<< end of configuration section >>> diff --git a/board-support/efr32/efr32mg26/BRD4117A/config/sl_i2cspm_sensor_config.h b/board-support/efr32/efr32mg26/BRD4117A/config/sl_i2cspm_sensor_config.h index 03c4886d4..9804ead6f 100644 --- a/board-support/efr32/efr32mg26/BRD4117A/config/sl_i2cspm_sensor_config.h +++ b/board-support/efr32/efr32mg26/BRD4117A/config/sl_i2cspm_sensor_config.h @@ -54,17 +54,28 @@ // <<< sl:start pin_tool >>> // SL_I2CSPM_SENSOR // $[I2C_SL_I2CSPM_SENSOR] +#ifndef SL_I2CSPM_SENSOR_PERIPHERAL #define SL_I2CSPM_SENSOR_PERIPHERAL I2C1 +#endif +#ifndef SL_I2CSPM_SENSOR_PERIPHERAL_NO #define SL_I2CSPM_SENSOR_PERIPHERAL_NO 1 +#endif // I2C1 SCL on PC05 +#ifndef SL_I2CSPM_SENSOR_SCL_PORT #define SL_I2CSPM_SENSOR_SCL_PORT SL_GPIO_PORT_C +#endif +#ifndef SL_I2CSPM_SENSOR_SCL_PIN #define SL_I2CSPM_SENSOR_SCL_PIN 5 +#endif // I2C1 SDA on PC07 +#ifndef SL_I2CSPM_SENSOR_SDA_PORT #define SL_I2CSPM_SENSOR_SDA_PORT SL_GPIO_PORT_C +#endif +#ifndef SL_I2CSPM_SENSOR_SDA_PIN #define SL_I2CSPM_SENSOR_SDA_PIN 7 - +#endif // [I2C_SL_I2CSPM_SENSOR]$ // <<< sl:end pin_tool >>> diff --git a/board-support/efr32/efr32mg26/BRD4117A/config/sl_mbedtls_config.h b/board-support/efr32/efr32mg26/BRD4117A/config/sl_mbedtls_config.h index e249b4d1b..7146ba648 100644 --- a/board-support/efr32/efr32mg26/BRD4117A/config/sl_mbedtls_config.h +++ b/board-support/efr32/efr32mg26/BRD4117A/config/sl_mbedtls_config.h @@ -71,9 +71,14 @@ // Default: 1 // This option is enabled assuming all buffers passed to any PSA function reside // in memory that is accessible only to the PSA function during its execution. +// This improves performance by avoiding extra buffer copies, reducing memory +// usage and allocation overhead. However, it is NOT the most secure option and +// should only be enabled if all buffers passed to PSA functions are exclusively +// accessible to PSA and never shared with untrusted code. // This option MUST be disabled whenever buffer arguments are in memory shared // with an untrusted party, for example where arguments to PSA calls are passed -// across a trust boundary. +// across a trust boundary, e.g. if TrustZone is enabled, and the PSA Crypto core +// is placed in the Secure domain. #define SL_MBEDTLS_PSA_ASSUME_EXCLUSIVE_BUFFERS 1 // diff --git a/board-support/efr32/efr32mg26/BRD4117A/config/sl_memory_manager_config.h b/board-support/efr32/efr32mg26/BRD4117A/config/sl_memory_manager_config.h index 26b84b107..4a16c29fe 100644 --- a/board-support/efr32/efr32mg26/BRD4117A/config/sl_memory_manager_config.h +++ b/board-support/efr32/efr32mg26/BRD4117A/config/sl_memory_manager_config.h @@ -51,4 +51,11 @@ // <<< end of configuration section >>> +// Keep this configuration outside the configuration section until the feature is ready for release. +// Enables the heap fallback mechanism. +// Setting this configuration to 0 will disable the fallback mechanism on DTCM and PSRAM. +// If this configuration is disabled, the memory manager will not attempt to use alternative memory regions for allocations even if using the fallback parameters. +// Default: 1 +#define SL_MEMORY_MANAGER_HEAP_FALLBACK_EN 1 + #endif /* SL_MEMORY_MANAGER_CONFIG_H */ diff --git a/board-support/efr32/efr32mg26/BRD4117A/config/sl_mx25_flash_shutdown_usart_config.h b/board-support/efr32/efr32mg26/BRD4117A/config/sl_mx25_flash_shutdown_usart_config.h index 34b849d39..90f3faedd 100644 --- a/board-support/efr32/efr32mg26/BRD4117A/config/sl_mx25_flash_shutdown_usart_config.h +++ b/board-support/efr32/efr32mg26/BRD4117A/config/sl_mx25_flash_shutdown_usart_config.h @@ -54,9 +54,12 @@ // SL_MX25_FLASH_SHUTDOWN_CS // $[GPIO_SL_MX25_FLASH_SHUTDOWN_CS] +#ifndef SL_MX25_FLASH_SHUTDOWN_CS_PORT #define SL_MX25_FLASH_SHUTDOWN_CS_PORT SL_GPIO_PORT_C +#endif +#ifndef SL_MX25_FLASH_SHUTDOWN_CS_PIN #define SL_MX25_FLASH_SHUTDOWN_CS_PIN 4 - +#endif // [GPIO_SL_MX25_FLASH_SHUTDOWN_CS]$ // <<< sl:end pin_tool >>> diff --git a/board-support/efr32/efr32mg26/BRD4117A/config/sl_openthread_features_config.h b/board-support/efr32/efr32mg26/BRD4117A/config/sl_openthread_features_config.h index 22340498d..a3697f8af 100644 --- a/board-support/efr32/efr32mg26/BRD4117A/config/sl_openthread_features_config.h +++ b/board-support/efr32/efr32mg26/BRD4117A/config/sl_openthread_features_config.h @@ -65,6 +65,7 @@ #define OPENTHREAD_CONFIG_MAC_CSL_RECEIVER_ENABLE 1 #endif // CSL Scheduling Uncertainty (±10 us units) <12..999:1> +// Left unchanged the value will be set to 175 for RCPs, 20 for FTDs, and 12 for MTDs #ifndef SL_OPENTHREAD_CSL_TX_UNCERTAINTY #if OPENTHREAD_RADIO #define SL_OPENTHREAD_CSL_TX_UNCERTAINTY 175 @@ -142,12 +143,10 @@ #define OPENTHREAD_CONFIG_CHANNEL_MONITOR_ENABLE 0 #endif // - -// Commissioner +// Commissioner #ifndef OPENTHREAD_CONFIG_COMMISSIONER_ENABLE #define OPENTHREAD_CONFIG_COMMISSIONER_ENABLE 0 #endif - // Max Joiner Entries // The maximum number of Joiner entries maintained by the Commissioner. // 2 @@ -155,7 +154,6 @@ #define OPENTHREAD_CONFIG_COMMISSIONER_MAX_JOINER_ENTRIES 2 #endif // - // COAP API #ifndef OPENTHREAD_CONFIG_COAP_API_ENABLE #define OPENTHREAD_CONFIG_COAP_API_ENABLE 0 @@ -171,6 +169,11 @@ #define OPENTHREAD_CONFIG_COAP_SECURE_API_ENABLE 0 #endif // +// COAP Blockwise Transfer +#ifndef OPENTHREAD_CONFIG_COAP_BLOCKWISE_TRANSFER_ENABLE +#define OPENTHREAD_CONFIG_COAP_BLOCKWISE_TRANSFER_ENABLE 0 +#endif +// // DHCP6 Client #ifndef OPENTHREAD_CONFIG_DHCP6_CLIENT_ENABLE #define OPENTHREAD_CONFIG_DHCP6_CLIENT_ENABLE 0 @@ -196,16 +199,27 @@ #define OPENTHREAD_CONFIG_IP6_FRAGMENTATION_ENABLE 0 #endif // -// Maximum number of IPv6 unicast addresses allowed to be externally added +// IPv6 Limits +// Maximum IPv6 external unicast addresses +// Maximum number of IPv6 unicast addresses allowed to be externally added +// 4 #ifndef OPENTHREAD_CONFIG_IP6_MAX_EXT_UCAST_ADDRS #define OPENTHREAD_CONFIG_IP6_MAX_EXT_UCAST_ADDRS 4 #endif -// -// Maximum number of IPv6 multicast addresses allowed to be externally added +// Maximum IPv6 external multicast addresses +// Maximum number of IPv6 multicast addresses allowed to be externally added +// 4 #ifndef OPENTHREAD_CONFIG_IP6_MAX_EXT_MCAST_ADDRS #define OPENTHREAD_CONFIG_IP6_MAX_EXT_MCAST_ADDRS 4 #endif -// +// Maximum IPv6 address registrations for MTD +// The maximum number of IPv6 address registrations for MTD. +// If left unchanged will default to the value of OPENTHREAD_CONFIG_MLE_IP_ADDRS_PER_CHILD +// 4 +#ifndef OPENTHREAD_CONFIG_MLE_IP_ADDRS_TO_REGISTER +#define OPENTHREAD_CONFIG_MLE_IP_ADDRS_TO_REGISTER (OPENTHREAD_CONFIG_MLE_IP_ADDRS_PER_CHILD) +#endif +// // Jam Detection #ifndef OPENTHREAD_CONFIG_JAM_DETECTION_ENABLE #define OPENTHREAD_CONFIG_JAM_DETECTION_ENABLE 0 @@ -226,6 +240,14 @@ #define OPENTHREAD_CONFIG_MAC_FILTER_ENABLE 0 #endif // +// MLE Children +// Maximum number of Thread children supported by the device +// Default is 10. Used by the Thread stack to configure the size of child table. +// 10 +#ifndef OPENTHREAD_CONFIG_MLE_MAX_CHILDREN +#define OPENTHREAD_CONFIG_MLE_MAX_CHILDREN 10 +#endif +// // MLE Long Routes extension (experimental) #ifndef OPENTHREAD_CONFIG_MLE_LONG_ROUTES_ENABLE #define OPENTHREAD_CONFIG_MLE_LONG_ROUTES_ENABLE 0 @@ -235,27 +257,66 @@ #ifndef OPENTHREAD_CONFIG_MULTIPAN_RCP_ENABLE #define OPENTHREAD_CONFIG_MULTIPAN_RCP_ENABLE 0 #endif +// Broadcast IID for spinel frames +// Define broadcast IID for spinel frames dedicated to all hosts in multipan configuration +// 0 +#ifndef OPENTHREAD_SPINEL_CONFIG_BROADCAST_IID +#define OPENTHREAD_SPINEL_CONFIG_BROADCAST_IID 0 +#endif +#if OPENTHREAD_CONFIG_MULTIPAN_RCP_ENABLE +// Maximum number of Zigbee children for multiprotocol (DMP) builds +// Ensures correct table sizing for Zigbee when DMP/multipan is enabled. +// 6 +#ifndef SL_ZIGBEE_MAX_END_DEVICE_CHILDREN +#define SL_ZIGBEE_MAX_END_DEVICE_CHILDREN 6 +#endif +#endif // // Multiple OpenThread Instances #ifndef OPENTHREAD_CONFIG_MULTIPLE_INSTANCE_ENABLE #define OPENTHREAD_CONFIG_MULTIPLE_INSTANCE_ENABLE 0 #endif -// // Multiple Static Instance Support #ifndef OPENTHREAD_CONFIG_MULTIPLE_STATIC_INSTANCE_ENABLE #define OPENTHREAD_CONFIG_MULTIPLE_STATIC_INSTANCE_ENABLE 0 #endif -// -// Number of OpenThread Instances For Static Buffer Allocation +// Number of OpenThread Instances +// Default is 2. Number of OpenThread Instances For Static Buffer Allocation. +// 2 #ifndef OPENTHREAD_CONFIG_MULTIPLE_INSTANCE_NUM #define OPENTHREAD_CONFIG_MULTIPLE_INSTANCE_NUM 2 #endif // -// Define broadcast IID for spinel frames dedicated to all hosts in multipan configuration -#ifndef OPENTHREAD_SPINEL_CONFIG_BROADCAST_IID -#define OPENTHREAD_SPINEL_CONFIG_BROADCAST_IID 0 -#endif // +// Define maximum total source match table entries for both OT and Zigbee. +// In multi-instance builds (SoC or RCP/host), table must support all OT instances + Zigbee. +// For single instance (default), table sized to just OT children. +// This value is used to size all source match tables in both OT and Zigbee code. +// Note: this is purposedly not being setup with CMSIS annotations. +#ifndef RADIO_CONFIG_MAX_SRC_MATCH_ENTRIES +#if OPENTHREAD_CONFIG_MULTIPLE_INSTANCE_ENABLE +#if SL_ZIGBEE_MAX_END_DEVICE_CHILDREN +// Multipan / DMP case: OT + Zigbee +#define RADIO_CONFIG_MAX_SRC_MATCH_ENTRIES \ + ((OPENTHREAD_CONFIG_MLE_MAX_CHILDREN * (OPENTHREAD_CONFIG_MULTIPLE_INSTANCE_NUM - 1)) \ + + SL_ZIGBEE_MAX_END_DEVICE_CHILDREN) +#else +// Multi-instance OT-only case +#define RADIO_CONFIG_MAX_SRC_MATCH_ENTRIES \ + (OPENTHREAD_CONFIG_MLE_MAX_CHILDREN * OPENTHREAD_CONFIG_MULTIPLE_INSTANCE_NUM) +#endif +#else +// Single-instance OT (SoC / NCP / non-multipan RCP) +#define RADIO_CONFIG_MAX_SRC_MATCH_ENTRIES OPENTHREAD_CONFIG_MLE_MAX_CHILDREN +#endif +#endif +// Spinel Match Table +// Maximum number of spinel source match table entries +// Ensure that this value is the total of the number of openthread children times the number of openthread instances plus the number of Zigbee children. +#ifndef OPENTHREAD_SPINEL_CONFIG_MAX_SRC_MATCH_ENTRIES +#define OPENTHREAD_SPINEL_CONFIG_MAX_SRC_MATCH_ENTRIES RADIO_CONFIG_MAX_SRC_MATCH_ENTRIES +#endif +// // OTNS (OpenThread Network Simulator) #ifndef OPENTHREAD_CONFIG_OTNS_ENABLE #define OPENTHREAD_CONFIG_OTNS_ENABLE 0 @@ -265,13 +326,23 @@ #ifndef OPENTHREAD_CONFIG_PING_SENDER_ENABLE #define OPENTHREAD_CONFIG_PING_SENDER_ENABLE 1 #endif - // // Power Calibration Module (RCP only configuration) #ifndef OPENTHREAD_CONFIG_POWER_CALIBRATION_ENABLE #define OPENTHREAD_CONFIG_POWER_CALIBRATION_ENABLE 0 #endif - +// Maximum raw power calibration length +// Max raw power calibration length +// 4 +#ifndef SL_OPENTHREAD_RAW_POWER_CALIBRATION_LENGTH +#define SL_OPENTHREAD_RAW_POWER_CALIBRATION_LENGTH 4 +#endif +// Maximum FEM config setting length +// Max FEM config setting length +// 4 +#ifndef SL_OPENTHREAD_FEM_SETTING_LENGTH +#define SL_OPENTHREAD_FEM_SETTING_LENGTH 4 +#endif // // Platform UDP #ifndef OPENTHREAD_CONFIG_PLATFORM_UDP_ENABLE @@ -309,7 +380,14 @@ #endif // // Time Synchronization Service +#ifndef OPENTHREAD_CONFIG_TIME_SYNC_ENABLE #define OPENTHREAD_CONFIG_TIME_SYNC_ENABLE 0 +#endif +// +// Uptime of OpenThread instance +#ifndef OPENTHREAD_CONFIG_UPTIME_ENABLE +#define OPENTHREAD_CONFIG_UPTIME_ENABLE 1 +#endif // // UDP Forward #ifndef OPENTHREAD_CONFIG_UDP_FORWARD_ENABLE @@ -321,28 +399,22 @@ #define OPENTHREAD_CONFIG_MAC_BEACON_PAYLOAD_PARSING_ENABLE 1 #endif // -// Max raw power calibration length. -#ifndef SL_OPENTHREAD_RAW_POWER_CALIBRATION_LENGTH -#define SL_OPENTHREAD_RAW_POWER_CALIBRATION_LENGTH 4 -#endif -// -// Max FEM config setting length. -#ifndef SL_OPENTHREAD_FEM_SETTING_LENGTH -#define SL_OPENTHREAD_FEM_SETTING_LENGTH 4 -#endif -// -// The maximum number of RX buffers to use in the radio driver. -// 16 +// Radio Driver RX buffers +// Maximum number of RX buffers +// The maximum number of RX buffers to use in the radio driver. +// 16 #ifndef SL_OPENTHREAD_RADIO_RX_BUFFER_COUNT #define SL_OPENTHREAD_RADIO_RX_BUFFER_COUNT 16 #endif // +// // Logging // LOG_OUTPUT // NONE // APP // PLATFORM_DEFINED -// Default: OPENTHREAD_CONFIG_LOG_OUTPUT_PLATFORM_DEFINED +// Default: OPENTHREAD_CONFIG_LOG_OUTPUT_APP +// OPENTHREAD_CONFIG_LOG_OUTPUT_APP #ifndef OPENTHREAD_CONFIG_LOG_OUTPUT #define OPENTHREAD_CONFIG_LOG_OUTPUT OPENTHREAD_CONFIG_LOG_OUTPUT_APP #endif @@ -365,6 +437,7 @@ // INFO // DEBG // Default: OT_LOG_LEVEL_DEBG +// OT_LOG_LEVEL_DEBG #ifndef OPENTHREAD_CONFIG_LOG_LEVEL #define OPENTHREAD_CONFIG_LOG_LEVEL OT_LOG_LEVEL_DEBG #endif @@ -387,11 +460,10 @@ #endif // OPENTHREAD_FULL_LOGS_ENABLE -// Log crash dump after initialization +// Log crash dump after initialization #ifndef OPENTHREAD_CONFIG_PLATFORM_LOG_CRASH_DUMP_ENABLE #define OPENTHREAD_CONFIG_PLATFORM_LOG_CRASH_DUMP_ENABLE 0 #endif -// // // diff --git a/board-support/efr32/efr32mg26/BRD4117A/config/sl_power_manager_config.h b/board-support/efr32/efr32mg26/BRD4117A/config/sl_power_manager_config.h index 3c240b843..86b9fef27 100644 --- a/board-support/efr32/efr32mg26/BRD4117A/config/sl_power_manager_config.h +++ b/board-support/efr32/efr32mg26/BRD4117A/config/sl_power_manager_config.h @@ -37,24 +37,40 @@ // Enable custom IRQ handler for external HF oscillator. // Enable if CMU_IRQHandler/HFXO0_IRQHandler is needed from your application. -// The function sl_power_manager_irq_handler() will have to be called from you custom handler if this is enabled. +// The function sl_power_manager_irq_handler() will have to be called from your custom handler if this is enabled. // Default: 0 +#ifndef SL_POWER_MANAGER_CUSTOM_HF_OSCILLATOR_IRQ_HANDLER #define SL_POWER_MANAGER_CUSTOM_HF_OSCILLATOR_IRQ_HANDLER 0 +#endif // Enable fast wakeup (disable voltage scaling in EM2/3 mode) // Enable or disable voltage scaling in EM2/3 modes (when available). This decreases wakeup time by about 30 us. // Deprecated. It is replaced by the function sl_power_manager_em23_voltage_scaling_enable_fast_wakeup() // Default: 0 +#ifndef SL_POWER_MANAGER_CONFIG_VOLTAGE_SCALING_FAST_WAKEUP #define SL_POWER_MANAGER_CONFIG_VOLTAGE_SCALING_FAST_WAKEUP 0 +#endif + +// Enable voltage scaling in EM0 and EM1 mode. +// Enable or disable voltage scaling in EM0/1 modes. With this config enabled, the voltage +// scaling will be configured at the lowest possible level based on the system clock. +// Default: 0 +#ifndef SL_POWER_MANAGER_ENABLE_EM01_VOLTAGE_SCALING +#define SL_POWER_MANAGER_ENABLE_EM01_VOLTAGE_SCALING 0 +#endif // Enable debugging feature // Enable or disable debugging features (trace the different modules that have requirements). // Default: 0 +#ifndef SL_POWER_MANAGER_DEBUG #define SL_POWER_MANAGER_DEBUG 0 +#endif // Maximum numbers of requirements that can be logged // Default: 10 +#ifndef SL_POWER_MANAGER_DEBUG_POOL_SIZE #define SL_POWER_MANAGER_DEBUG_POOL_SIZE 10 +#endif // // Pin retention mode @@ -63,14 +79,18 @@ // Retention through EM4 // Retention through EM4 and wakeup // power_manager_pin_retention_disable +#ifndef SL_POWER_MANAGER_INIT_EMU_EM4_PIN_RETENTION_MODE #define SL_POWER_MANAGER_INIT_EMU_EM4_PIN_RETENTION_MODE EMU_EM4CTRL_EM4IORETMODE_DISABLE +#endif // Enable EM2 debugging feature // Enable or disable debugging features. // Force PD0B/PD0D to stay on during EM2 entry. This allows the debugger to remain connected in EM2 and EM3. // Enabling debug connectivity results in an increased power consumption in EM2/EM3. // Default: 1 +#ifndef SL_POWER_MANAGER_INIT_EMU_EM2_DEBUG_ENABLE #define SL_POWER_MANAGER_INIT_EMU_EM2_DEBUG_ENABLE 1 +#endif // // diff --git a/board-support/efr32/mgm24/BRD4318A/config/sl_simple_led_led0_config.h b/board-support/efr32/efr32mg26/BRD4117A/config/sl_rail_util_pa_tables_config.h similarity index 63% rename from board-support/efr32/mgm24/BRD4318A/config/sl_simple_led_led0_config.h rename to board-support/efr32/efr32mg26/BRD4117A/config/sl_rail_util_pa_tables_config.h index 5de786937..f2407fcfd 100644 --- a/board-support/efr32/mgm24/BRD4318A/config/sl_simple_led_led0_config.h +++ b/board-support/efr32/efr32mg26/BRD4117A/config/sl_rail_util_pa_tables_config.h @@ -1,9 +1,9 @@ /***************************************************************************//** * @file - * @brief Simple Led Driver Configuration + * @brief PA Tables configuration file. ******************************************************************************* * # License - * Copyright 2019 Silicon Laboratories Inc. www.silabs.com + * Copyright 2025 Silicon Laboratories Inc. www.silabs.com ******************************************************************************* * * SPDX-License-Identifier: Zlib @@ -28,30 +28,20 @@ * ******************************************************************************/ -#ifndef SL_SIMPLE_LED_LED0_CONFIG_H -#define SL_SIMPLE_LED_LED0_CONFIG_H +#ifndef SL_RAIL_UTIL_PA_TABLES_CONFIG_H +#define SL_RAIL_UTIL_PA_TABLES_CONFIG_H // <<< Use Configuration Wizard in Context Menu >>> -// Simple LED configuration -// -// Active low -// Active high -// Default: SL_SIMPLE_LED_POLARITY_ACTIVE_HIGH -#define SL_SIMPLE_LED_LED0_POLARITY SL_SIMPLE_LED_POLARITY_ACTIVE_HIGH -// end led configuration +// PA Table Configuration +// PA Table Selection +// <"sl_rail_util_pa_dbm_powersetting_mapping_table_20dbm.h"=> 20dBm PA powersetting mapping table +// Default: "sl_rail_util_pa_dbm_powersetting_mapping_table_20dbm.h" +#define SL_RAIL_UTIL_PA_TABLE_HEADER "sl_rail_util_pa_dbm_powersetting_mapping_table_20dbm.h" +// // <<< end of configuration section >>> -// <<< sl:start pin_tool >>> +#include SL_RAIL_UTIL_PA_TABLE_HEADER -// SL_SIMPLE_LED_LED0 -// $[GPIO_SL_SIMPLE_LED_LED0] -#define SL_SIMPLE_LED_LED0_PORT SL_GPIO_PORT_B -#define SL_SIMPLE_LED_LED0_PIN 2 - -// [GPIO_SL_SIMPLE_LED_LED0]$ - -// <<< sl:end pin_tool >>> - -#endif // SL_SIMPLE_LED_LED0_CONFIG_H +#endif // SL_RAIL_UTIL_PA_TABLES_CONFIG_H diff --git a/board-support/efr32/efr32mg26/BRD4117A/config/sl_rail_util_pti_config.h b/board-support/efr32/efr32mg26/BRD4117A/config/sl_rail_util_pti_config.h index bdd36734c..736b91558 100644 --- a/board-support/efr32/efr32mg26/BRD4117A/config/sl_rail_util_pti_config.h +++ b/board-support/efr32/efr32mg26/BRD4117A/config/sl_rail_util_pti_config.h @@ -35,12 +35,12 @@ // PTI Configuration // PTI mode -// UART -// UART onewire -// SPI -// Disabled -// Default: RAIL_PTI_MODE_UART -#define SL_RAIL_UTIL_PTI_MODE RAIL_PTI_MODE_UART +// UART +// UART onewire +// SPI +// Disabled +// Default: SL_RAIL_PTI_MODE_UART +#define SL_RAIL_UTIL_PTI_MODE SL_RAIL_PTI_MODE_UART // PTI Baud Rate (Hertz) // <147800-20000000:1> diff --git a/board-support/efr32/efr32mg26/BRD4117A/config/sl_simple_button_btn0_config.h b/board-support/efr32/efr32mg26/BRD4117A/config/sl_simple_button_btn0_config.h index 23e27379c..552aa94c9 100644 --- a/board-support/efr32/efr32mg26/BRD4117A/config/sl_simple_button_btn0_config.h +++ b/board-support/efr32/efr32mg26/BRD4117A/config/sl_simple_button_btn0_config.h @@ -48,9 +48,12 @@ // SL_SIMPLE_BUTTON_BTN0 // $[GPIO_SL_SIMPLE_BUTTON_BTN0] +#ifndef SL_SIMPLE_BUTTON_BTN0_PORT #define SL_SIMPLE_BUTTON_BTN0_PORT SL_GPIO_PORT_B +#endif +#ifndef SL_SIMPLE_BUTTON_BTN0_PIN #define SL_SIMPLE_BUTTON_BTN0_PIN 1 - +#endif // [GPIO_SL_SIMPLE_BUTTON_BTN0]$ // <<< sl:end pin_tool >>> diff --git a/board-support/efr32/efr32mg26/BRD4117A/config/sl_simple_button_btn1_config.h b/board-support/efr32/efr32mg26/BRD4117A/config/sl_simple_button_btn1_config.h index 928a4d5c2..1df1ce0a1 100644 --- a/board-support/efr32/efr32mg26/BRD4117A/config/sl_simple_button_btn1_config.h +++ b/board-support/efr32/efr32mg26/BRD4117A/config/sl_simple_button_btn1_config.h @@ -48,9 +48,12 @@ // SL_SIMPLE_BUTTON_BTN1 // $[GPIO_SL_SIMPLE_BUTTON_BTN1] +#ifndef SL_SIMPLE_BUTTON_BTN1_PORT #define SL_SIMPLE_BUTTON_BTN1_PORT SL_GPIO_PORT_B +#endif +#ifndef SL_SIMPLE_BUTTON_BTN1_PIN #define SL_SIMPLE_BUTTON_BTN1_PIN 3 - +#endif // [GPIO_SL_SIMPLE_BUTTON_BTN1]$ // <<< sl:end pin_tool >>> diff --git a/board-support/efr32/efr32mg26/BRD4118A/autogen/sl_bluetooth.c b/board-support/efr32/efr32mg26/BRD4118A/autogen/sl_bluetooth.c index 4cac19436..0a5f1a969 100644 --- a/board-support/efr32/efr32mg26/BRD4118A/autogen/sl_bluetooth.c +++ b/board-support/efr32/efr32mg26/BRD4118A/autogen/sl_bluetooth.c @@ -30,6 +30,8 @@ #include #include "sl_bluetooth.h" +#include "sli_bt_api.h" +#include "sli_bgapi.h" #include "sl_assert.h" #include "sl_bt_stack_init.h" #include "sl_component_catalog.h" @@ -68,17 +70,23 @@ void sl_bt_step(void) { sl_bt_msg_t evt; + // Run the Bluetooth host stack processing step sl_bt_run(); - uint32_t event_len = sl_bt_event_pending_len(); - // For preventing from data loss, the event will be kept in the stack's queue - // if application cannot process it at the moment. + + // Check the length of the next event, if any, and verify that the application + // can process it. To prevent data loss, the event will be kept in the stack's + // queue if the application cannot process it at the moment. + size_t event_len = sli_bgapi_device_peek_event_len(&sli_bt_bgapi_device); if ((event_len == 0) || (!sl_bt_can_process_event(event_len))) { return; } - // Pop (non-blocking) a Bluetooth stack event from event queue. - sl_status_t status = sl_bt_pop_event(&evt); - if(status != SL_STATUS_OK){ + // Pop the event and process it if successful + sl_status_t status = sli_bgapi_device_pop_event(&sli_bt_bgapi_device, + sizeof(evt), + &evt); + + if (status != SL_STATUS_OK) { return; } sl_bt_process_event(&evt); diff --git a/board-support/efr32/efr32mg26/BRD4118A/autogen/sl_component_catalog.h b/board-support/efr32/efr32mg26/BRD4118A/autogen/sl_component_catalog.h index 71cac4790..ddc382695 100644 --- a/board-support/efr32/efr32mg26/BRD4118A/autogen/sl_component_catalog.h +++ b/board-support/efr32/efr32mg26/BRD4118A/autogen/sl_component_catalog.h @@ -3,6 +3,7 @@ // APIs present in project #define SL_CATALOG_BGAPI_PROTOCOL_PRESENT +#define SL_CATALOG_BGAPI_PROTOCOL_RTOS_ADAPTATION_PRESENT #define SL_CATALOG_BLUETOOTH_CONFIGURATION_PRESENT #define SL_CATALOG_BLUETOOTH_CTE_SUPPORT_PRESENT #define SL_CATALOG_BLUETOOTH_FEATURE_ADVERTISER_PRESENT @@ -23,7 +24,6 @@ #define SL_CATALOG_CMSIS_OS_COMMON_PRESENT #define SL_CATALOG_CPP_SUPPORT_PRESENT #define SL_CATALOG_DEVICE_INIT_PRESENT -#define SL_CATALOG_DEVICE_INIT_CORE_PRESENT #define SL_CATALOG_DEVICE_INIT_DCDC_PRESENT #define SL_CATALOG_EMLIB_CORE_PRESENT #define SL_CATALOG_EMLIB_RMU_PRESENT @@ -32,6 +32,7 @@ #define SL_CATALOG_GATT_CONFIGURATION_PRESENT #define SL_CATALOG_GPIO_PRESENT #define SL_CATALOG_GPIOINTERRUPT_PRESENT +#define SL_CATALOG_HAL_SYSTEM_PRESENT #define SL_CATALOG_HFXO_MANAGER_PRESENT #define SL_CATALOG_INTERRUPT_MANAGER_PRESENT #define SL_CATALOG_IOSTREAM_PRESENT @@ -41,6 +42,7 @@ #endif #define SL_CATALOG_MEMORY_MANAGER_PRESENT #define SL_CATALOG_MEMORY_PROFILER_API_PRESENT +#define SL_CATALOG_MPU_PRESENT #ifdef CONFIG_USE_EXTERNAL_FLASH #define SL_CATALOG_MX25_FLASH_SHUTDOWN_USART_PRESENT #endif // CONFIG_USE_EXTERNAL_FLASH @@ -49,13 +51,12 @@ #define SL_CATALOG_OPENTHREAD_CLI_PRESENT #define SL_CATALOG_OT_GP_INTERFACE_PRESENT #define SL_CATALOG_OPENTHREAD_STACK_PRESENT -#define SL_CATALOG_OPENTHREAD_UART_PRESENT #define SL_CATALOG_POWER_MANAGER_PRESENT +#define SL_CATALOG_POWER_MANAGER_DEEPSLEEP_PRESENT #define SL_CATALOG_PSA_CRYPTO_PRESENT #define SL_CATALOG_RADIO_PRIORITY_15_4_PRESENT #define SL_CATALOG_RAIL_LIB_PRESENT #define SL_CATALOG_RAIL_UTIL_PTI_PRESENT -#define SL_CATALOG_SE_MANAGER_PRESENT #define SL_CATALOG_SECURITY_MANAGER_PRESENT #define SL_CATALOG_SEGGER_RTT_PRESENT #define SL_CATALOG_BTN0_PRESENT diff --git a/board-support/efr32/efr32mg26/BRD4118A/autogen/sl_event_handler.c b/board-support/efr32/efr32mg26/BRD4118A/autogen/sl_event_handler.c index 725639551..357a278f8 100644 --- a/board-support/efr32/efr32mg26/BRD4118A/autogen/sl_event_handler.c +++ b/board-support/efr32/efr32mg26/BRD4118A/autogen/sl_event_handler.c @@ -3,10 +3,12 @@ #include "sl_board_init.h" #include "sl_clock_manager.h" #include "sl_hfxo_manager.h" -#include "pa_conversions_efr32.h" -#if !SLI_SI91X_ENABLE_BLE +#include "sl_rail_util_compatible_pa.h" +#if !(defined(SLI_SI91X_ENABLE_BLE) && SLI_SI91X_ENABLE_BLE) +#include "sl_bluetooth.h" +#include "sl_rail_util_power_manager_init.h" +#endif // !SLI_SI91X_ENABLE_BLE #include "sl_rail_util_power_manager_init.h" -#endif #include "sl_rail_util_pti.h" #include "sl_rail_util_rssi.h" #include "btl_interface.h" @@ -14,6 +16,7 @@ #include "platform-efr32.h" #include "sl_bt_rtos_adaptation.h" #include "sl_bluetooth.h" +#include "sl_debug_swo.h" #include "sl_gpio.h" #include "gpiointerrupt.h" #if defined(SL_MATTER_USE_SI70XX_SENSOR) && SL_MATTER_USE_SI70XX_SENSOR @@ -23,13 +26,15 @@ #include "sl_mbedtls.h" #include "sl_ot_rtos_adaptation.h" #include "sl_simple_button_instances.h" + +#if (defined(SL_MATTER_RGB_LED_ENABLED) && SL_MATTER_RGB_LED_ENABLED == 1) +#include "sl_simple_rgb_pwm_led_instances.h" +#else #include "sl_simple_led_instances.h" +#endif //(SL_MATTER_RGB_LED_ENABLED) && SL_MATTER_RGB_LED_ENABLED == 1) #if defined(CONFIG_ENABLE_UART) #include "sl_uartdrv_instances.h" #endif // CONFIG_ENABLE_UART -#ifdef SL_WIFI -#include "sl_spidrv_instances.h" -#endif #include "psa/crypto.h" #include "sl_se_manager.h" #include "sli_protocol_crypto.h" @@ -37,6 +42,7 @@ #include "sl_iostream_init_instances.h" #include "cmsis_os2.h" #include "nvm3_default.h" + #include "sl_iostream_handles.h" void sli_driver_permanent_allocation(void) @@ -49,13 +55,8 @@ void sli_service_permanent_allocation(void) void sli_stack_permanent_allocation(void) { -#if !SLI_SI91X_ENABLE_BLE sli_bt_stack_permanent_allocation(); -#endif // !SLI_SI91X_ENABLE_BLE - -#ifdef SL_OT_ENABLE sl_ot_rtos_perm_allocation(); -#endif // SL_OT_ENABLE } void sli_internal_permanent_allocation(void) @@ -78,9 +79,7 @@ void sli_internal_init_early(void) void sl_kernel_start(void) { -#if !SLI_SI91X_ENABLE_BLE sli_bt_rtos_adaptation_kernel_start(); -#endif // !SLI_SI91X_ENABLE_BLE osKernelStart(); } @@ -88,17 +87,16 @@ void sl_driver_init(void) { sl_gpio_init(); GPIOINT_Init(); -#ifndef SLI_SI917 -#ifdef SL_WIFI - sl_spidrv_init_instances(); -#endif -#endif #if defined(SL_MATTER_USE_SI70XX_SENSOR) && SL_MATTER_USE_SI70XX_SENSOR sl_i2cspm_init_instances(); #endif // defined(SL_MATTER_USE_SI70XX_SENSOR) && SL_MATTER_USE_SI70XX_SENSOR sl_simple_button_init_instances(); +#if (defined(SL_MATTER_RGB_LED_ENABLED) && SL_MATTER_RGB_LED_ENABLED == 1) + sl_simple_rgb_pwm_led_init_instances(); +#else sl_simple_led_init_instances(); -#if defined(CONFIG_ENABLE_UART) +#endif //(SL_MATTER_RGB_LED_ENABLED) && SL_MATTER_RGB_LED_ENABLED == 1) + #if defined(CONFIG_ENABLE_UART) sl_uartdrv_init_instances(); #endif // CONFIG_ENABLE_UART } @@ -125,8 +123,7 @@ void sl_stack_init(void) sl_rail_util_pti_init(); sl_rail_util_rssi_init(); sli_bt_stack_functional_init(); -#endif - +#endif // !SLI_SI91X_ENABLE_BLE #ifdef SL_OT_ENABLE sl_ot_sys_init(); #endif // SL_OT_ENABLE diff --git a/board-support/efr32/efr32mg26/BRD4118A/autogen/sl_simple_led_instances.h b/board-support/efr32/efr32mg26/BRD4118A/autogen/sl_simple_led_instances.h index afb5875eb..928fbe942 100644 --- a/board-support/efr32/efr32mg26/BRD4118A/autogen/sl_simple_led_instances.h +++ b/board-support/efr32/efr32mg26/BRD4118A/autogen/sl_simple_led_instances.h @@ -34,6 +34,7 @@ #ifdef __cplusplus extern "C" { #endif + #include "sl_simple_led.h" extern const sl_led_t sl_led_led0; diff --git a/board-support/efr32/efr32mg26/BRD4118A/autogen/sli_psa_config_autogen.h b/board-support/efr32/efr32mg26/BRD4118A/autogen/sli_psa_config_autogen.h index 055d8a95e..f90dd6e9a 100644 --- a/board-support/efr32/efr32mg26/BRD4118A/autogen/sli_psa_config_autogen.h +++ b/board-support/efr32/efr32mg26/BRD4118A/autogen/sli_psa_config_autogen.h @@ -24,7 +24,12 @@ #define PSA_WANT_ALG_TLS12_PSK_TO_MS 1 #define MBEDTLS_PSA_CRYPTO_EXTERNAL_RNG +#if defined(KSU_MAX_KEY_SLOTS) +#include "sli_ksu_keyslots_config.h" +#define MBEDTLS_PSA_KEY_SLOT_COUNT (22 + 15 + 1 + SL_PSA_KEY_USER_SLOT_COUNT + SLI_KSU_MAX_KEY_SLOTS - SLI_KSU_KEY_SLOT_USER_START + 1) +#else #define MBEDTLS_PSA_KEY_SLOT_COUNT (22 + 15 + 1 + SL_PSA_KEY_USER_SLOT_COUNT + 1) +#endif #ifndef SL_PSA_ITS_MAX_FILES #define SL_PSA_ITS_MAX_FILES (1 + SL_PSA_ITS_USER_MAX_FILES) #endif diff --git a/board-support/efr32/efr32mg26/BRD4118A/config/pin_config.h b/board-support/efr32/efr32mg26/BRD4118A/config/pin_config.h new file mode 100644 index 000000000..c6dce9b43 --- /dev/null +++ b/board-support/efr32/efr32mg26/BRD4118A/config/pin_config.h @@ -0,0 +1,340 @@ +#ifndef PIN_CONFIG_H +#define PIN_CONFIG_H + +// $[CMU] +// [CMU]$ + +// $[LFXO] +// [LFXO]$ + +// $[KEYSCAN] +// [KEYSCAN]$ + +// $[PRS.ASYNCH0] +// [PRS.ASYNCH0]$ + +// $[PRS.ASYNCH1] +// [PRS.ASYNCH1]$ + +// $[PRS.ASYNCH2] +// [PRS.ASYNCH2]$ + +// $[PRS.ASYNCH3] +// [PRS.ASYNCH3]$ + +// $[PRS.ASYNCH4] +// [PRS.ASYNCH4]$ + +// $[PRS.ASYNCH5] +// [PRS.ASYNCH5]$ + +// $[PRS.ASYNCH6] +// [PRS.ASYNCH6]$ + +// $[PRS.ASYNCH7] +// [PRS.ASYNCH7]$ + +// $[PRS.ASYNCH8] +// [PRS.ASYNCH8]$ + +// $[PRS.ASYNCH9] +// [PRS.ASYNCH9]$ + +// $[PRS.ASYNCH10] +// [PRS.ASYNCH10]$ + +// $[PRS.ASYNCH11] +// [PRS.ASYNCH11]$ + +// $[PRS.ASYNCH12] +// [PRS.ASYNCH12]$ + +// $[PRS.ASYNCH13] +// [PRS.ASYNCH13]$ + +// $[PRS.ASYNCH14] +// [PRS.ASYNCH14]$ + +// $[PRS.ASYNCH15] +// [PRS.ASYNCH15]$ + +// $[PRS.SYNCH0] +// [PRS.SYNCH0]$ + +// $[PRS.SYNCH1] +// [PRS.SYNCH1]$ + +// $[PRS.SYNCH2] +// [PRS.SYNCH2]$ + +// $[PRS.SYNCH3] +// [PRS.SYNCH3]$ + +// $[GPIO] +// GPIO SWV on PA03 +#ifndef GPIO_SWV_PORT +#define GPIO_SWV_PORT SL_GPIO_PORT_A +#endif +#ifndef GPIO_SWV_PIN +#define GPIO_SWV_PIN 3 +#endif + +// [GPIO]$ + +// $[TIMER0] +// [TIMER0]$ + +// $[TIMER1] +// [TIMER1]$ + +// $[TIMER2] +// [TIMER2]$ + +// $[TIMER3] +// [TIMER3]$ + +// $[TIMER4] +// [TIMER4]$ + +// $[TIMER5] +// [TIMER5]$ + +// $[TIMER6] +// [TIMER6]$ + +// $[TIMER7] +// [TIMER7]$ + +// $[TIMER8] +// [TIMER8]$ + +// $[TIMER9] +// [TIMER9]$ + +// $[EUSART1] +// [EUSART1]$ + +// $[EUSART2] +// [EUSART2]$ + +// $[EUSART3] +// [EUSART3]$ + +// $[USART0] +// USART0 CLK on PC03 +#ifndef USART0_CLK_PORT +#define USART0_CLK_PORT SL_GPIO_PORT_C +#endif +#ifndef USART0_CLK_PIN +#define USART0_CLK_PIN 3 +#endif + +// USART0 TX on PC02 +#ifndef USART0_TX_PORT +#define USART0_TX_PORT SL_GPIO_PORT_C +#endif +#ifndef USART0_TX_PIN +#define USART0_TX_PIN 2 +#endif + +// [USART0]$ + +// $[USART1] +// [USART1]$ + +// $[USART2] +// [USART2]$ + +// $[I2C1] +// I2C1 SCL on PC05 +#ifndef I2C1_SCL_PORT +#define I2C1_SCL_PORT SL_GPIO_PORT_C +#endif +#ifndef I2C1_SCL_PIN +#define I2C1_SCL_PIN 5 +#endif + +// I2C1 SDA on PC07 +#ifndef I2C1_SDA_PORT +#define I2C1_SDA_PORT SL_GPIO_PORT_C +#endif +#ifndef I2C1_SDA_PIN +#define I2C1_SDA_PIN 7 +#endif + +// [I2C1]$ + +// $[I2C2] +// [I2C2]$ + +// $[I2C3] +// [I2C3]$ + +// $[LCD] +// [LCD]$ + +// $[LETIMER0] +// [LETIMER0]$ + +// $[IADC0] +// [IADC0]$ + +// $[ACMP0] +// [ACMP0]$ + +// $[ACMP1] +// [ACMP1]$ + +// $[VDAC0] +// [VDAC0]$ + +// $[VDAC1] +// [VDAC1]$ + +// $[PCNT0] +// [PCNT0]$ + +// $[HFXO0] +// [HFXO0]$ + +// $[I2C0] +// [I2C0]$ + +// $[EUSART0] +// EUSART0 CTS on PA10 +#ifndef EUSART0_CTS_PORT +#define EUSART0_CTS_PORT SL_GPIO_PORT_A +#endif +#ifndef EUSART0_CTS_PIN +#define EUSART0_CTS_PIN 10 +#endif + +// EUSART0 RTS on PA00 +#ifndef EUSART0_RTS_PORT +#define EUSART0_RTS_PORT SL_GPIO_PORT_A +#endif +#ifndef EUSART0_RTS_PIN +#define EUSART0_RTS_PIN 0 +#endif + +// EUSART0 RX on PA09 +#ifndef EUSART0_RX_PORT +#define EUSART0_RX_PORT SL_GPIO_PORT_A +#endif +#ifndef EUSART0_RX_PIN +#define EUSART0_RX_PIN 9 +#endif + +// EUSART0 TX on PA08 +#ifndef EUSART0_TX_PORT +#define EUSART0_TX_PORT SL_GPIO_PORT_A +#endif +#ifndef EUSART0_TX_PIN +#define EUSART0_TX_PIN 8 +#endif + +// [EUSART0]$ + +// $[PTI] +// PTI DFRAME on PD05 +#ifndef PTI_DFRAME_PORT +#define PTI_DFRAME_PORT SL_GPIO_PORT_D +#endif +#ifndef PTI_DFRAME_PIN +#define PTI_DFRAME_PIN 5 +#endif + +// PTI DOUT on PD04 +#ifndef PTI_DOUT_PORT +#define PTI_DOUT_PORT SL_GPIO_PORT_D +#endif +#ifndef PTI_DOUT_PIN +#define PTI_DOUT_PIN 4 +#endif + +// [PTI]$ + +// $[MODEM] +// [MODEM]$ + +// $[CUSTOM_PIN_NAME] +#ifndef _PORT +#define _PORT SL_GPIO_PORT_A +#endif +#ifndef _PIN +#define _PIN 0 +#endif + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +// [CUSTOM_PIN_NAME]$ + + +#endif // PIN_CONFIG_H + + diff --git a/board-support/efr32/efr32mg26/BRD4118A/config/psa_crypto_config.h b/board-support/efr32/efr32mg26/BRD4118A/config/psa_crypto_config.h index 20703b41d..773ce99e0 100644 --- a/board-support/efr32/efr32mg26/BRD4118A/config/psa_crypto_config.h +++ b/board-support/efr32/efr32mg26/BRD4118A/config/psa_crypto_config.h @@ -27,26 +27,32 @@ // Default: 4 #define SL_PSA_KEY_USER_SLOT_COUNT (4) -// PSA Maximum User Persistent Keys Count <0-1024> +// Maximum User Persistent PSA Key Count <0-1024> // Maximum amount of keys (or other files) that can be stored persistently -// by the application through the PSA interface, when persistent storage -// support for PSA Crypto is included in the project. -// Due to caching logic, this setting does have an impact on static RAM usage. -// Note that this number is added to the potential requirements from other -// software components in the project, such that the total amount of keys -// which can be stored through the ITS backend can be higher than what is -// configured here. +// by the user application, when PSA ITS (Internal Trusted Storage) support +// is included in the project. +// NOTE: +// In addition to SL_PSA_ITS_USER_MAX_FILES (number of user keys) the +// application may be configured to include SDK components that require an +// additional number of keys. The sum of user keys and SDK component keys +// is computed and the result, called SL_PSA_ITS_MAX_FILES, is used +// internally in the PSA ITS driver. // -// WARNING: When changing this setting on an application that is already -// deployed, and thus will get the change through an application upgrade, -// care should be taken to ensure that the setting is only ever increased, -// and never decreased. Decreasing this setting might cause previously -// stored keys/files to become inaccessible. +// WARNING: +// For applications using PSA ITS driver version 1 or 2, when changing the +// SL_PSA_ITS_USER_MAX_FILES in an application that is already depeloyed, +// and thus will get the change through an application upgrade, care should +// be taken to ensure that the total sum of keys SL_PSA_ITS_MAX_FILES is +// only ever equal or increased, and never decreased. Decreasing this +// setting might cause previously stored keys/files to become inaccessible, +// ITS should be cleared and all files need to be stored again. // -// It is not possible to change this setting when using V3 ITS Driver. -// The file-storage indexing is dependent on the maximum number of files, -// and if SL_PSA_ITS_USER_MAX_FILES is changed, ITS should be cleared and -// all files need to be stored again. +// For applications using PSA ITS driver version 3, it is not possible to +// change this setting because the file-storage indexing is dependent on the +// maximum number of files (SL_PSA_ITS_MAX_FILES) being consistent, and if +// the sum of SDK component keys and user keys (SL_PSA_ITS_USER_MAX_FILES) +// is changed, may cause previously stored keys/files to become inaccessible +// ITS should be cleared and all files need to be stored again. // Default: 128 #define SL_PSA_ITS_USER_MAX_FILES (128) diff --git a/board-support/efr32/efr32mg26/BRD4118A/config/sl_bluetooth_config.h b/board-support/efr32/efr32mg26/BRD4118A/config/sl_bluetooth_config.h index 9b6a804e0..93bfbbcc4 100644 --- a/board-support/efr32/efr32mg26/BRD4118A/config/sl_bluetooth_config.h +++ b/board-support/efr32/efr32mg26/BRD4118A/config/sl_bluetooth_config.h @@ -99,6 +99,7 @@ // if the LE Power Control feature is enabled. // When this configuration is passed into stack initialization, the stack // will select the closest value that the device supports. +// API sl_bt_system_set_tx_power() can be used to set the minimum TX power at runtime. // API sl_bt_system_get_tx_power_setting() can be used to query the selected value. #define SL_BT_CONFIG_MIN_TX_POWER (-30) @@ -108,6 +109,7 @@ // advertising, scanning and DTM testing. // When this configuration is passed into stack initialization, the stack // will select the closest value that the device supports. +// API sl_bt_system_set_tx_power() can be used to set the maximum TX power at runtime. // API sl_bt_system_get_tx_power_setting() can be used to query the selected value. #define SL_BT_CONFIG_MAX_TX_POWER (80) diff --git a/board-support/efr32/efr32mg26/BRD4118A/config/sl_board_control_config.h b/board-support/efr32/efr32mg26/BRD4118A/config/sl_board_control_config.h index 94607f2fa..dbf88689c 100644 --- a/board-support/efr32/efr32mg26/BRD4118A/config/sl_board_control_config.h +++ b/board-support/efr32/efr32mg26/BRD4118A/config/sl_board_control_config.h @@ -55,20 +55,32 @@ // SL_BOARD_ENABLE_VCOM // $[GPIO_SL_BOARD_ENABLE_VCOM] -#define SL_BOARD_ENABLE_VCOM_PORT SL_GPIO_PORT_B -#define SL_BOARD_ENABLE_VCOM_PIN 0 +#ifndef SL_BOARD_ENABLE_VCOM_PORT +#define SL_BOARD_ENABLE_VCOM_PORT SL_GPIO_PORT_B +#endif +#ifndef SL_BOARD_ENABLE_VCOM_PIN +#define SL_BOARD_ENABLE_VCOM_PIN 0 +#endif // [GPIO_SL_BOARD_ENABLE_VCOM]$ // SL_BOARD_ENABLE_DISPLAY // $[GPIO_SL_BOARD_ENABLE_DISPLAY] -#define SL_BOARD_ENABLE_DISPLAY_PORT SL_GPIO_PORT_C -#define SL_BOARD_ENABLE_DISPLAY_PIN 9 +#ifndef SL_BOARD_ENABLE_DISPLAY_PORT +#define SL_BOARD_ENABLE_DISPLAY_PORT SL_GPIO_PORT_C +#endif +#ifndef SL_BOARD_ENABLE_DISPLAY_PIN +#define SL_BOARD_ENABLE_DISPLAY_PIN 9 +#endif // [GPIO_SL_BOARD_ENABLE_DISPLAY]$ // SL_BOARD_ENABLE_SENSOR_RHT // $[GPIO_SL_BOARD_ENABLE_SENSOR_RHT] -#define SL_BOARD_ENABLE_SENSOR_RHT_PORT SL_GPIO_PORT_C -#define SL_BOARD_ENABLE_SENSOR_RHT_PIN 10 +#ifndef SL_BOARD_ENABLE_SENSOR_RHT_PORT +#define SL_BOARD_ENABLE_SENSOR_RHT_PORT SL_GPIO_PORT_C +#endif +#ifndef SL_BOARD_ENABLE_SENSOR_RHT_PIN +#define SL_BOARD_ENABLE_SENSOR_RHT_PIN 10 +#endif // [GPIO_SL_BOARD_ENABLE_SENSOR_RHT]$ // <<< sl:end pin_tool >>> diff --git a/board-support/efr32/efr32mg26/BRD4118A/config/sl_btctrl_config.h b/board-support/efr32/efr32mg26/BRD4118A/config/sl_btctrl_config.h index ed75a2d0e..403df1ffe 100644 --- a/board-support/efr32/efr32mg26/BRD4118A/config/sl_btctrl_config.h +++ b/board-support/efr32/efr32mg26/BRD4118A/config/sl_btctrl_config.h @@ -146,15 +146,27 @@ #define SL_BT_CONTROLLER_ADAPTIVITY_MODE (SL_BTCTRL_CHANNELMAP_FLAG_ACTIVE_ADAPTIVITY) #endif -// Power Amplifier (PA) Configuration -// Automode PA configuration -// Highest available PA configuration -// RAIL Utility component PA configuration -// Select the Power Amplifier configuration -// Default: RAIL Utility component PA configuration -#ifndef SL_BT_CONTROLLER_PA_CONFIG -#define SL_BT_CONTROLLER_PA_CONFIG SL_BT_BLUETOOTH_RAIL_UTIL_PA -#endif +// Advertising Configuration +// Include TX Power in the extended header of primary extended advertising packets +// This is default setting to all advertising sets unless it is specifically overridden by VS_SiliconLabs_Set_Advertising_Config_Bits. +// Default: 0 +// Enabling this option takes effect only if permitted by Le_Set_Extended_Advertising_Parameters +// According to Link Layer specification, Vol 6, Part B, Table 2.4 and Table 2.5: +// Optional in 1M PHY when the advertiser is connectable or scannable, or with auxiliary pointer. +// In other cases, the Extended Advertising TX Power is always optional by settings. +#define SL_BT_CONTROLLER_PRIMARY_EXT_PACKET_INCLUDE_TX_POWER (0) +// +// Include Advertiser Address in the header of primary extended advertising packets +// This is default setting to all advertising sets unless it is specifically overridden by VS_SiliconLabs_Set_Advertising_Config_Bits. +// Default: 0 +// Enabling this option takes effect only if permitted by Le_Set_Extended_Advertising_Parameters +// According to Link Layer specification, Vol 6, Part B, Table 2.4 and Table 2.5: +// Optional in 1M PHY when the advertiser is non-connectable and non-scannable, with auxiliary pointer. +// Mandatory when the advertiser is non-connectable and non-scannable, without auxiliary pointer. +// Forbidden when the advertiser is connectable or scannable. +#define SL_BT_CONTROLLER_PRIMARY_EXT_PACKET_INCLUDE_ADDRESS (0) +// +// Advertising Configuration // Bluetooth Controller Configuration // <<< end of configuration section >>> diff --git a/board-support/efr32/efr32mg26/BRD4118A/config/sl_i2cspm_sensor_config.h b/board-support/efr32/efr32mg26/BRD4118A/config/sl_i2cspm_sensor_config.h index 03c4886d4..9804ead6f 100644 --- a/board-support/efr32/efr32mg26/BRD4118A/config/sl_i2cspm_sensor_config.h +++ b/board-support/efr32/efr32mg26/BRD4118A/config/sl_i2cspm_sensor_config.h @@ -54,17 +54,28 @@ // <<< sl:start pin_tool >>> // SL_I2CSPM_SENSOR // $[I2C_SL_I2CSPM_SENSOR] +#ifndef SL_I2CSPM_SENSOR_PERIPHERAL #define SL_I2CSPM_SENSOR_PERIPHERAL I2C1 +#endif +#ifndef SL_I2CSPM_SENSOR_PERIPHERAL_NO #define SL_I2CSPM_SENSOR_PERIPHERAL_NO 1 +#endif // I2C1 SCL on PC05 +#ifndef SL_I2CSPM_SENSOR_SCL_PORT #define SL_I2CSPM_SENSOR_SCL_PORT SL_GPIO_PORT_C +#endif +#ifndef SL_I2CSPM_SENSOR_SCL_PIN #define SL_I2CSPM_SENSOR_SCL_PIN 5 +#endif // I2C1 SDA on PC07 +#ifndef SL_I2CSPM_SENSOR_SDA_PORT #define SL_I2CSPM_SENSOR_SDA_PORT SL_GPIO_PORT_C +#endif +#ifndef SL_I2CSPM_SENSOR_SDA_PIN #define SL_I2CSPM_SENSOR_SDA_PIN 7 - +#endif // [I2C_SL_I2CSPM_SENSOR]$ // <<< sl:end pin_tool >>> diff --git a/board-support/efr32/efr32mg26/BRD4118A/config/sl_mbedtls_config.h b/board-support/efr32/efr32mg26/BRD4118A/config/sl_mbedtls_config.h index e249b4d1b..7146ba648 100644 --- a/board-support/efr32/efr32mg26/BRD4118A/config/sl_mbedtls_config.h +++ b/board-support/efr32/efr32mg26/BRD4118A/config/sl_mbedtls_config.h @@ -71,9 +71,14 @@ // Default: 1 // This option is enabled assuming all buffers passed to any PSA function reside // in memory that is accessible only to the PSA function during its execution. +// This improves performance by avoiding extra buffer copies, reducing memory +// usage and allocation overhead. However, it is NOT the most secure option and +// should only be enabled if all buffers passed to PSA functions are exclusively +// accessible to PSA and never shared with untrusted code. // This option MUST be disabled whenever buffer arguments are in memory shared // with an untrusted party, for example where arguments to PSA calls are passed -// across a trust boundary. +// across a trust boundary, e.g. if TrustZone is enabled, and the PSA Crypto core +// is placed in the Secure domain. #define SL_MBEDTLS_PSA_ASSUME_EXCLUSIVE_BUFFERS 1 // diff --git a/board-support/efr32/efr32mg26/BRD4118A/config/sl_memlcd_usart_config.h b/board-support/efr32/efr32mg26/BRD4118A/config/sl_memlcd_usart_config.h index 78e5f242d..508466086 100644 --- a/board-support/efr32/efr32mg26/BRD4118A/config/sl_memlcd_usart_config.h +++ b/board-support/efr32/efr32mg26/BRD4118A/config/sl_memlcd_usart_config.h @@ -34,31 +34,41 @@ // <<< sl:start pin_tool >>> // SL_MEMLCD_SPI // $[USART_SL_MEMLCD_SPI] +#ifndef SL_MEMLCD_SPI_PERIPHERAL #define SL_MEMLCD_SPI_PERIPHERAL USART0 +#endif +#ifndef SL_MEMLCD_SPI_PERIPHERAL_NO #define SL_MEMLCD_SPI_PERIPHERAL_NO 0 +#endif // USART0 TX on PC02 +#ifndef SL_MEMLCD_SPI_TX_PORT #define SL_MEMLCD_SPI_TX_PORT SL_GPIO_PORT_C +#endif +#ifndef SL_MEMLCD_SPI_TX_PIN #define SL_MEMLCD_SPI_TX_PIN 2 - -// USART0 CLK on PC03 -#define SL_MEMLCD_SPI_CLK_PORT SL_GPIO_PORT_C -#define SL_MEMLCD_SPI_CLK_PIN 3 +#endif // [USART_SL_MEMLCD_SPI]$ // SL_MEMLCD_SPI_CS // $[GPIO_SL_MEMLCD_SPI_CS] +#ifndef SL_MEMLCD_SPI_CS_PORT #define SL_MEMLCD_SPI_CS_PORT SL_GPIO_PORT_C +#endif +#ifndef SL_MEMLCD_SPI_CS_PIN #define SL_MEMLCD_SPI_CS_PIN 8 - +#endif // [GPIO_SL_MEMLCD_SPI_CS]$ // SL_MEMLCD_EXTCOMIN // $[GPIO_SL_MEMLCD_EXTCOMIN] +#ifndef SL_MEMLCD_EXTCOMIN_PORT #define SL_MEMLCD_EXTCOMIN_PORT SL_GPIO_PORT_C +#endif +#ifndef SL_MEMLCD_EXTCOMIN_PIN #define SL_MEMLCD_EXTCOMIN_PIN 6 - +#endif // [GPIO_SL_MEMLCD_EXTCOMIN]$ // <<< sl:end pin_tool >>> diff --git a/board-support/efr32/efr32mg26/BRD4118A/config/sl_memory_manager_config.h b/board-support/efr32/efr32mg26/BRD4118A/config/sl_memory_manager_config.h index 26b84b107..4a16c29fe 100644 --- a/board-support/efr32/efr32mg26/BRD4118A/config/sl_memory_manager_config.h +++ b/board-support/efr32/efr32mg26/BRD4118A/config/sl_memory_manager_config.h @@ -51,4 +51,11 @@ // <<< end of configuration section >>> +// Keep this configuration outside the configuration section until the feature is ready for release. +// Enables the heap fallback mechanism. +// Setting this configuration to 0 will disable the fallback mechanism on DTCM and PSRAM. +// If this configuration is disabled, the memory manager will not attempt to use alternative memory regions for allocations even if using the fallback parameters. +// Default: 1 +#define SL_MEMORY_MANAGER_HEAP_FALLBACK_EN 1 + #endif /* SL_MEMORY_MANAGER_CONFIG_H */ diff --git a/board-support/efr32/efr32mg26/BRD4118A/config/sl_mx25_flash_shutdown_usart_config.h b/board-support/efr32/efr32mg26/BRD4118A/config/sl_mx25_flash_shutdown_usart_config.h index 881e505b8..d64bfa86b 100644 --- a/board-support/efr32/efr32mg26/BRD4118A/config/sl_mx25_flash_shutdown_usart_config.h +++ b/board-support/efr32/efr32mg26/BRD4118A/config/sl_mx25_flash_shutdown_usart_config.h @@ -54,9 +54,12 @@ // SL_MX25_FLASH_SHUTDOWN_CS // $[GPIO_SL_MX25_FLASH_SHUTDOWN_CS] +#ifndef SL_MX25_FLASH_SHUTDOWN_CS_PORT #define SL_MX25_FLASH_SHUTDOWN_CS_PORT SL_GPIO_PORT_C +#endif +#ifndef SL_MX25_FLASH_SHUTDOWN_CS_PIN #define SL_MX25_FLASH_SHUTDOWN_CS_PIN 4 - +#endif // [GPIO_SL_MX25_FLASH_SHUTDOWN_CS]$ // <<< sl:end pin_tool >>> diff --git a/board-support/efr32/efr32mg26/BRD4118A/config/sl_openthread_features_config.h b/board-support/efr32/efr32mg26/BRD4118A/config/sl_openthread_features_config.h index 22340498d..a3697f8af 100644 --- a/board-support/efr32/efr32mg26/BRD4118A/config/sl_openthread_features_config.h +++ b/board-support/efr32/efr32mg26/BRD4118A/config/sl_openthread_features_config.h @@ -65,6 +65,7 @@ #define OPENTHREAD_CONFIG_MAC_CSL_RECEIVER_ENABLE 1 #endif // CSL Scheduling Uncertainty (±10 us units) <12..999:1> +// Left unchanged the value will be set to 175 for RCPs, 20 for FTDs, and 12 for MTDs #ifndef SL_OPENTHREAD_CSL_TX_UNCERTAINTY #if OPENTHREAD_RADIO #define SL_OPENTHREAD_CSL_TX_UNCERTAINTY 175 @@ -142,12 +143,10 @@ #define OPENTHREAD_CONFIG_CHANNEL_MONITOR_ENABLE 0 #endif // - -// Commissioner +// Commissioner #ifndef OPENTHREAD_CONFIG_COMMISSIONER_ENABLE #define OPENTHREAD_CONFIG_COMMISSIONER_ENABLE 0 #endif - // Max Joiner Entries // The maximum number of Joiner entries maintained by the Commissioner. // 2 @@ -155,7 +154,6 @@ #define OPENTHREAD_CONFIG_COMMISSIONER_MAX_JOINER_ENTRIES 2 #endif // - // COAP API #ifndef OPENTHREAD_CONFIG_COAP_API_ENABLE #define OPENTHREAD_CONFIG_COAP_API_ENABLE 0 @@ -171,6 +169,11 @@ #define OPENTHREAD_CONFIG_COAP_SECURE_API_ENABLE 0 #endif // +// COAP Blockwise Transfer +#ifndef OPENTHREAD_CONFIG_COAP_BLOCKWISE_TRANSFER_ENABLE +#define OPENTHREAD_CONFIG_COAP_BLOCKWISE_TRANSFER_ENABLE 0 +#endif +// // DHCP6 Client #ifndef OPENTHREAD_CONFIG_DHCP6_CLIENT_ENABLE #define OPENTHREAD_CONFIG_DHCP6_CLIENT_ENABLE 0 @@ -196,16 +199,27 @@ #define OPENTHREAD_CONFIG_IP6_FRAGMENTATION_ENABLE 0 #endif // -// Maximum number of IPv6 unicast addresses allowed to be externally added +// IPv6 Limits +// Maximum IPv6 external unicast addresses +// Maximum number of IPv6 unicast addresses allowed to be externally added +// 4 #ifndef OPENTHREAD_CONFIG_IP6_MAX_EXT_UCAST_ADDRS #define OPENTHREAD_CONFIG_IP6_MAX_EXT_UCAST_ADDRS 4 #endif -// -// Maximum number of IPv6 multicast addresses allowed to be externally added +// Maximum IPv6 external multicast addresses +// Maximum number of IPv6 multicast addresses allowed to be externally added +// 4 #ifndef OPENTHREAD_CONFIG_IP6_MAX_EXT_MCAST_ADDRS #define OPENTHREAD_CONFIG_IP6_MAX_EXT_MCAST_ADDRS 4 #endif -// +// Maximum IPv6 address registrations for MTD +// The maximum number of IPv6 address registrations for MTD. +// If left unchanged will default to the value of OPENTHREAD_CONFIG_MLE_IP_ADDRS_PER_CHILD +// 4 +#ifndef OPENTHREAD_CONFIG_MLE_IP_ADDRS_TO_REGISTER +#define OPENTHREAD_CONFIG_MLE_IP_ADDRS_TO_REGISTER (OPENTHREAD_CONFIG_MLE_IP_ADDRS_PER_CHILD) +#endif +// // Jam Detection #ifndef OPENTHREAD_CONFIG_JAM_DETECTION_ENABLE #define OPENTHREAD_CONFIG_JAM_DETECTION_ENABLE 0 @@ -226,6 +240,14 @@ #define OPENTHREAD_CONFIG_MAC_FILTER_ENABLE 0 #endif // +// MLE Children +// Maximum number of Thread children supported by the device +// Default is 10. Used by the Thread stack to configure the size of child table. +// 10 +#ifndef OPENTHREAD_CONFIG_MLE_MAX_CHILDREN +#define OPENTHREAD_CONFIG_MLE_MAX_CHILDREN 10 +#endif +// // MLE Long Routes extension (experimental) #ifndef OPENTHREAD_CONFIG_MLE_LONG_ROUTES_ENABLE #define OPENTHREAD_CONFIG_MLE_LONG_ROUTES_ENABLE 0 @@ -235,27 +257,66 @@ #ifndef OPENTHREAD_CONFIG_MULTIPAN_RCP_ENABLE #define OPENTHREAD_CONFIG_MULTIPAN_RCP_ENABLE 0 #endif +// Broadcast IID for spinel frames +// Define broadcast IID for spinel frames dedicated to all hosts in multipan configuration +// 0 +#ifndef OPENTHREAD_SPINEL_CONFIG_BROADCAST_IID +#define OPENTHREAD_SPINEL_CONFIG_BROADCAST_IID 0 +#endif +#if OPENTHREAD_CONFIG_MULTIPAN_RCP_ENABLE +// Maximum number of Zigbee children for multiprotocol (DMP) builds +// Ensures correct table sizing for Zigbee when DMP/multipan is enabled. +// 6 +#ifndef SL_ZIGBEE_MAX_END_DEVICE_CHILDREN +#define SL_ZIGBEE_MAX_END_DEVICE_CHILDREN 6 +#endif +#endif // // Multiple OpenThread Instances #ifndef OPENTHREAD_CONFIG_MULTIPLE_INSTANCE_ENABLE #define OPENTHREAD_CONFIG_MULTIPLE_INSTANCE_ENABLE 0 #endif -// // Multiple Static Instance Support #ifndef OPENTHREAD_CONFIG_MULTIPLE_STATIC_INSTANCE_ENABLE #define OPENTHREAD_CONFIG_MULTIPLE_STATIC_INSTANCE_ENABLE 0 #endif -// -// Number of OpenThread Instances For Static Buffer Allocation +// Number of OpenThread Instances +// Default is 2. Number of OpenThread Instances For Static Buffer Allocation. +// 2 #ifndef OPENTHREAD_CONFIG_MULTIPLE_INSTANCE_NUM #define OPENTHREAD_CONFIG_MULTIPLE_INSTANCE_NUM 2 #endif // -// Define broadcast IID for spinel frames dedicated to all hosts in multipan configuration -#ifndef OPENTHREAD_SPINEL_CONFIG_BROADCAST_IID -#define OPENTHREAD_SPINEL_CONFIG_BROADCAST_IID 0 -#endif // +// Define maximum total source match table entries for both OT and Zigbee. +// In multi-instance builds (SoC or RCP/host), table must support all OT instances + Zigbee. +// For single instance (default), table sized to just OT children. +// This value is used to size all source match tables in both OT and Zigbee code. +// Note: this is purposedly not being setup with CMSIS annotations. +#ifndef RADIO_CONFIG_MAX_SRC_MATCH_ENTRIES +#if OPENTHREAD_CONFIG_MULTIPLE_INSTANCE_ENABLE +#if SL_ZIGBEE_MAX_END_DEVICE_CHILDREN +// Multipan / DMP case: OT + Zigbee +#define RADIO_CONFIG_MAX_SRC_MATCH_ENTRIES \ + ((OPENTHREAD_CONFIG_MLE_MAX_CHILDREN * (OPENTHREAD_CONFIG_MULTIPLE_INSTANCE_NUM - 1)) \ + + SL_ZIGBEE_MAX_END_DEVICE_CHILDREN) +#else +// Multi-instance OT-only case +#define RADIO_CONFIG_MAX_SRC_MATCH_ENTRIES \ + (OPENTHREAD_CONFIG_MLE_MAX_CHILDREN * OPENTHREAD_CONFIG_MULTIPLE_INSTANCE_NUM) +#endif +#else +// Single-instance OT (SoC / NCP / non-multipan RCP) +#define RADIO_CONFIG_MAX_SRC_MATCH_ENTRIES OPENTHREAD_CONFIG_MLE_MAX_CHILDREN +#endif +#endif +// Spinel Match Table +// Maximum number of spinel source match table entries +// Ensure that this value is the total of the number of openthread children times the number of openthread instances plus the number of Zigbee children. +#ifndef OPENTHREAD_SPINEL_CONFIG_MAX_SRC_MATCH_ENTRIES +#define OPENTHREAD_SPINEL_CONFIG_MAX_SRC_MATCH_ENTRIES RADIO_CONFIG_MAX_SRC_MATCH_ENTRIES +#endif +// // OTNS (OpenThread Network Simulator) #ifndef OPENTHREAD_CONFIG_OTNS_ENABLE #define OPENTHREAD_CONFIG_OTNS_ENABLE 0 @@ -265,13 +326,23 @@ #ifndef OPENTHREAD_CONFIG_PING_SENDER_ENABLE #define OPENTHREAD_CONFIG_PING_SENDER_ENABLE 1 #endif - // // Power Calibration Module (RCP only configuration) #ifndef OPENTHREAD_CONFIG_POWER_CALIBRATION_ENABLE #define OPENTHREAD_CONFIG_POWER_CALIBRATION_ENABLE 0 #endif - +// Maximum raw power calibration length +// Max raw power calibration length +// 4 +#ifndef SL_OPENTHREAD_RAW_POWER_CALIBRATION_LENGTH +#define SL_OPENTHREAD_RAW_POWER_CALIBRATION_LENGTH 4 +#endif +// Maximum FEM config setting length +// Max FEM config setting length +// 4 +#ifndef SL_OPENTHREAD_FEM_SETTING_LENGTH +#define SL_OPENTHREAD_FEM_SETTING_LENGTH 4 +#endif // // Platform UDP #ifndef OPENTHREAD_CONFIG_PLATFORM_UDP_ENABLE @@ -309,7 +380,14 @@ #endif // // Time Synchronization Service +#ifndef OPENTHREAD_CONFIG_TIME_SYNC_ENABLE #define OPENTHREAD_CONFIG_TIME_SYNC_ENABLE 0 +#endif +// +// Uptime of OpenThread instance +#ifndef OPENTHREAD_CONFIG_UPTIME_ENABLE +#define OPENTHREAD_CONFIG_UPTIME_ENABLE 1 +#endif // // UDP Forward #ifndef OPENTHREAD_CONFIG_UDP_FORWARD_ENABLE @@ -321,28 +399,22 @@ #define OPENTHREAD_CONFIG_MAC_BEACON_PAYLOAD_PARSING_ENABLE 1 #endif // -// Max raw power calibration length. -#ifndef SL_OPENTHREAD_RAW_POWER_CALIBRATION_LENGTH -#define SL_OPENTHREAD_RAW_POWER_CALIBRATION_LENGTH 4 -#endif -// -// Max FEM config setting length. -#ifndef SL_OPENTHREAD_FEM_SETTING_LENGTH -#define SL_OPENTHREAD_FEM_SETTING_LENGTH 4 -#endif -// -// The maximum number of RX buffers to use in the radio driver. -// 16 +// Radio Driver RX buffers +// Maximum number of RX buffers +// The maximum number of RX buffers to use in the radio driver. +// 16 #ifndef SL_OPENTHREAD_RADIO_RX_BUFFER_COUNT #define SL_OPENTHREAD_RADIO_RX_BUFFER_COUNT 16 #endif // +// // Logging // LOG_OUTPUT // NONE // APP // PLATFORM_DEFINED -// Default: OPENTHREAD_CONFIG_LOG_OUTPUT_PLATFORM_DEFINED +// Default: OPENTHREAD_CONFIG_LOG_OUTPUT_APP +// OPENTHREAD_CONFIG_LOG_OUTPUT_APP #ifndef OPENTHREAD_CONFIG_LOG_OUTPUT #define OPENTHREAD_CONFIG_LOG_OUTPUT OPENTHREAD_CONFIG_LOG_OUTPUT_APP #endif @@ -365,6 +437,7 @@ // INFO // DEBG // Default: OT_LOG_LEVEL_DEBG +// OT_LOG_LEVEL_DEBG #ifndef OPENTHREAD_CONFIG_LOG_LEVEL #define OPENTHREAD_CONFIG_LOG_LEVEL OT_LOG_LEVEL_DEBG #endif @@ -387,11 +460,10 @@ #endif // OPENTHREAD_FULL_LOGS_ENABLE -// Log crash dump after initialization +// Log crash dump after initialization #ifndef OPENTHREAD_CONFIG_PLATFORM_LOG_CRASH_DUMP_ENABLE #define OPENTHREAD_CONFIG_PLATFORM_LOG_CRASH_DUMP_ENABLE 0 #endif -// // // diff --git a/board-support/efr32/efr32mg26/BRD4118A/config/sl_power_manager_config.h b/board-support/efr32/efr32mg26/BRD4118A/config/sl_power_manager_config.h index 3c240b843..86b9fef27 100644 --- a/board-support/efr32/efr32mg26/BRD4118A/config/sl_power_manager_config.h +++ b/board-support/efr32/efr32mg26/BRD4118A/config/sl_power_manager_config.h @@ -37,24 +37,40 @@ // Enable custom IRQ handler for external HF oscillator. // Enable if CMU_IRQHandler/HFXO0_IRQHandler is needed from your application. -// The function sl_power_manager_irq_handler() will have to be called from you custom handler if this is enabled. +// The function sl_power_manager_irq_handler() will have to be called from your custom handler if this is enabled. // Default: 0 +#ifndef SL_POWER_MANAGER_CUSTOM_HF_OSCILLATOR_IRQ_HANDLER #define SL_POWER_MANAGER_CUSTOM_HF_OSCILLATOR_IRQ_HANDLER 0 +#endif // Enable fast wakeup (disable voltage scaling in EM2/3 mode) // Enable or disable voltage scaling in EM2/3 modes (when available). This decreases wakeup time by about 30 us. // Deprecated. It is replaced by the function sl_power_manager_em23_voltage_scaling_enable_fast_wakeup() // Default: 0 +#ifndef SL_POWER_MANAGER_CONFIG_VOLTAGE_SCALING_FAST_WAKEUP #define SL_POWER_MANAGER_CONFIG_VOLTAGE_SCALING_FAST_WAKEUP 0 +#endif + +// Enable voltage scaling in EM0 and EM1 mode. +// Enable or disable voltage scaling in EM0/1 modes. With this config enabled, the voltage +// scaling will be configured at the lowest possible level based on the system clock. +// Default: 0 +#ifndef SL_POWER_MANAGER_ENABLE_EM01_VOLTAGE_SCALING +#define SL_POWER_MANAGER_ENABLE_EM01_VOLTAGE_SCALING 0 +#endif // Enable debugging feature // Enable or disable debugging features (trace the different modules that have requirements). // Default: 0 +#ifndef SL_POWER_MANAGER_DEBUG #define SL_POWER_MANAGER_DEBUG 0 +#endif // Maximum numbers of requirements that can be logged // Default: 10 +#ifndef SL_POWER_MANAGER_DEBUG_POOL_SIZE #define SL_POWER_MANAGER_DEBUG_POOL_SIZE 10 +#endif // // Pin retention mode @@ -63,14 +79,18 @@ // Retention through EM4 // Retention through EM4 and wakeup // power_manager_pin_retention_disable +#ifndef SL_POWER_MANAGER_INIT_EMU_EM4_PIN_RETENTION_MODE #define SL_POWER_MANAGER_INIT_EMU_EM4_PIN_RETENTION_MODE EMU_EM4CTRL_EM4IORETMODE_DISABLE +#endif // Enable EM2 debugging feature // Enable or disable debugging features. // Force PD0B/PD0D to stay on during EM2 entry. This allows the debugger to remain connected in EM2 and EM3. // Enabling debug connectivity results in an increased power consumption in EM2/EM3. // Default: 1 +#ifndef SL_POWER_MANAGER_INIT_EMU_EM2_DEBUG_ENABLE #define SL_POWER_MANAGER_INIT_EMU_EM2_DEBUG_ENABLE 1 +#endif // // diff --git a/board-support/efr32/efr32mg26/BRD4118A/config/sl_rail_util_pa_tables_config.h b/board-support/efr32/efr32mg26/BRD4118A/config/sl_rail_util_pa_tables_config.h new file mode 100644 index 000000000..1242ebfef --- /dev/null +++ b/board-support/efr32/efr32mg26/BRD4118A/config/sl_rail_util_pa_tables_config.h @@ -0,0 +1,49 @@ +/***************************************************************************//** + * @file + * @brief PA Tables configuration file. + ******************************************************************************* + * # License + * Copyright 2025 Silicon Laboratories Inc. www.silabs.com + ******************************************************************************* + * + * SPDX-License-Identifier: Zlib + * + * The licensor of this software is Silicon Laboratories Inc. + * + * This software is provided 'as-is', without any express or implied + * warranty. In no event will the authors be held liable for any damages + * arising from the use of this software. + * + * Permission is granted to anyone to use this software for any purpose, + * including commercial applications, and to alter it and redistribute it + * freely, subject to the following restrictions: + * + * 1. The origin of this software must not be misrepresented; you must not + * claim that you wrote the original software. If you use this software + * in a product, an acknowledgment in the product documentation would be + * appreciated but is not required. + * 2. Altered source versions must be plainly marked as such, and must not be + * misrepresented as being the original software. + * 3. This notice may not be removed or altered from any source distribution. + * + ******************************************************************************/ + +#ifndef SL_RAIL_UTIL_PA_TABLES_CONFIG_H +#define SL_RAIL_UTIL_PA_TABLES_CONFIG_H + +// <<< Use Configuration Wizard in Context Menu >>> + +// PA Table Configuration +// PA Table Selection +// <"sl_rail_util_pa_dbm_powersetting_mapping_table_bga_10dbm.h"=> 10dBm PA powersetting mapping table +// <"sl_rail_util_pa_dbm_powersetting_mapping_table_bga_0dbm.h"=> 0dBm PA powersetting mapping table +// <"sl_rail_util_pa_dbm_powersetting_mapping_table_bga_automode_0_10dbm.h"=> 0dBm-10dBm automode PA powersetting mapping table +// Default: "sl_rail_util_pa_dbm_powersetting_mapping_table_bga_automode_0_10dbm.h" +#define SL_RAIL_UTIL_PA_TABLE_HEADER "sl_rail_util_pa_dbm_powersetting_mapping_table_bga_automode_0_10dbm.h" +// + +// <<< end of configuration section >>> + +#include SL_RAIL_UTIL_PA_TABLE_HEADER + +#endif // SL_RAIL_UTIL_PA_TABLES_CONFIG_H diff --git a/board-support/efr32/efr32mg26/BRD4118A/config/sl_rail_util_pti_config.h b/board-support/efr32/efr32mg26/BRD4118A/config/sl_rail_util_pti_config.h index bdd36734c..736b91558 100644 --- a/board-support/efr32/efr32mg26/BRD4118A/config/sl_rail_util_pti_config.h +++ b/board-support/efr32/efr32mg26/BRD4118A/config/sl_rail_util_pti_config.h @@ -35,12 +35,12 @@ // PTI Configuration // PTI mode -// UART -// UART onewire -// SPI -// Disabled -// Default: RAIL_PTI_MODE_UART -#define SL_RAIL_UTIL_PTI_MODE RAIL_PTI_MODE_UART +// UART +// UART onewire +// SPI +// Disabled +// Default: SL_RAIL_PTI_MODE_UART +#define SL_RAIL_UTIL_PTI_MODE SL_RAIL_PTI_MODE_UART // PTI Baud Rate (Hertz) // <147800-20000000:1> diff --git a/board-support/efr32/efr32mg26/BRD4118A/config/sl_simple_button_btn0_config.h b/board-support/efr32/efr32mg26/BRD4118A/config/sl_simple_button_btn0_config.h index 23e27379c..552aa94c9 100644 --- a/board-support/efr32/efr32mg26/BRD4118A/config/sl_simple_button_btn0_config.h +++ b/board-support/efr32/efr32mg26/BRD4118A/config/sl_simple_button_btn0_config.h @@ -48,9 +48,12 @@ // SL_SIMPLE_BUTTON_BTN0 // $[GPIO_SL_SIMPLE_BUTTON_BTN0] +#ifndef SL_SIMPLE_BUTTON_BTN0_PORT #define SL_SIMPLE_BUTTON_BTN0_PORT SL_GPIO_PORT_B +#endif +#ifndef SL_SIMPLE_BUTTON_BTN0_PIN #define SL_SIMPLE_BUTTON_BTN0_PIN 1 - +#endif // [GPIO_SL_SIMPLE_BUTTON_BTN0]$ // <<< sl:end pin_tool >>> diff --git a/board-support/efr32/efr32mg26/BRD4118A/config/sl_simple_button_btn1_config.h b/board-support/efr32/efr32mg26/BRD4118A/config/sl_simple_button_btn1_config.h index 928a4d5c2..1df1ce0a1 100644 --- a/board-support/efr32/efr32mg26/BRD4118A/config/sl_simple_button_btn1_config.h +++ b/board-support/efr32/efr32mg26/BRD4118A/config/sl_simple_button_btn1_config.h @@ -48,9 +48,12 @@ // SL_SIMPLE_BUTTON_BTN1 // $[GPIO_SL_SIMPLE_BUTTON_BTN1] +#ifndef SL_SIMPLE_BUTTON_BTN1_PORT #define SL_SIMPLE_BUTTON_BTN1_PORT SL_GPIO_PORT_B +#endif +#ifndef SL_SIMPLE_BUTTON_BTN1_PIN #define SL_SIMPLE_BUTTON_BTN1_PIN 3 - +#endif // [GPIO_SL_SIMPLE_BUTTON_BTN1]$ // <<< sl:end pin_tool >>> diff --git a/board-support/efr32/mgm24/BRD2704A/autogen/sl_bluetooth.c b/board-support/efr32/mgm24/BRD2704A/autogen/sl_bluetooth.c index 4cac19436..0a5f1a969 100644 --- a/board-support/efr32/mgm24/BRD2704A/autogen/sl_bluetooth.c +++ b/board-support/efr32/mgm24/BRD2704A/autogen/sl_bluetooth.c @@ -30,6 +30,8 @@ #include #include "sl_bluetooth.h" +#include "sli_bt_api.h" +#include "sli_bgapi.h" #include "sl_assert.h" #include "sl_bt_stack_init.h" #include "sl_component_catalog.h" @@ -68,17 +70,23 @@ void sl_bt_step(void) { sl_bt_msg_t evt; + // Run the Bluetooth host stack processing step sl_bt_run(); - uint32_t event_len = sl_bt_event_pending_len(); - // For preventing from data loss, the event will be kept in the stack's queue - // if application cannot process it at the moment. + + // Check the length of the next event, if any, and verify that the application + // can process it. To prevent data loss, the event will be kept in the stack's + // queue if the application cannot process it at the moment. + size_t event_len = sli_bgapi_device_peek_event_len(&sli_bt_bgapi_device); if ((event_len == 0) || (!sl_bt_can_process_event(event_len))) { return; } - // Pop (non-blocking) a Bluetooth stack event from event queue. - sl_status_t status = sl_bt_pop_event(&evt); - if(status != SL_STATUS_OK){ + // Pop the event and process it if successful + sl_status_t status = sli_bgapi_device_pop_event(&sli_bt_bgapi_device, + sizeof(evt), + &evt); + + if (status != SL_STATUS_OK) { return; } sl_bt_process_event(&evt); diff --git a/board-support/efr32/mgm24/BRD2704A/autogen/sl_component_catalog.h b/board-support/efr32/mgm24/BRD2704A/autogen/sl_component_catalog.h index 0d41ecbf8..6c4ae0e88 100644 --- a/board-support/efr32/mgm24/BRD2704A/autogen/sl_component_catalog.h +++ b/board-support/efr32/mgm24/BRD2704A/autogen/sl_component_catalog.h @@ -3,6 +3,7 @@ // APIs present in project #define SL_CATALOG_BGAPI_PROTOCOL_PRESENT +#define SL_CATALOG_BGAPI_PROTOCOL_RTOS_ADAPTATION_PRESENT #define SL_CATALOG_BLUETOOTH_CONFIGURATION_PRESENT #define SL_CATALOG_BLUETOOTH_CTE_SUPPORT_PRESENT #define SL_CATALOG_BLUETOOTH_CS_SUPPORT_PRESENT @@ -24,7 +25,6 @@ #define SL_CATALOG_CMSIS_OS_COMMON_PRESENT #define SL_CATALOG_CPP_SUPPORT_PRESENT #define SL_CATALOG_DEVICE_INIT_PRESENT -#define SL_CATALOG_DEVICE_INIT_CORE_PRESENT #define SL_CATALOG_DEVICE_INIT_DCDC_PRESENT #define SL_CATALOG_EMLIB_CORE_PRESENT #define SL_CATALOG_EMLIB_RMU_PRESENT @@ -33,6 +33,7 @@ #define SL_CATALOG_GATT_CONFIGURATION_PRESENT #define SL_CATALOG_GPIO_PRESENT #define SL_CATALOG_GPIOINTERRUPT_PRESENT +#define SL_CATALOG_HAL_SYSTEM_PRESENT #define SL_CATALOG_HFXO_MANAGER_PRESENT #define SL_CATALOG_INTERRUPT_MANAGER_PRESENT #define SL_CATALOG_IOSTREAM_PRESENT @@ -44,13 +45,12 @@ #define SL_CATALOG_OPENTHREAD_CLI_PRESENT #define SL_CATALOG_OT_GP_INTERFACE_PRESENT #define SL_CATALOG_OPENTHREAD_STACK_PRESENT -#define SL_CATALOG_OPENTHREAD_UART_PRESENT #define SL_CATALOG_POWER_MANAGER_PRESENT +#define SL_CATALOG_POWER_MANAGER_DEEPSLEEP_PRESENT #define SL_CATALOG_PSA_CRYPTO_PRESENT #define SL_CATALOG_RADIO_PRIORITY_15_4_PRESENT #define SL_CATALOG_RAIL_LIB_PRESENT #define SL_CATALOG_RAIL_UTIL_PTI_PRESENT -#define SL_CATALOG_SE_MANAGER_PRESENT #define SL_CATALOG_SECURITY_MANAGER_PRESENT #define SL_CATALOG_SEGGER_RTT_PRESENT #define SL_CATALOG_LED0_PRESENT diff --git a/board-support/efr32/mgm24/BRD2704A/autogen/sl_event_handler.c b/board-support/efr32/mgm24/BRD2704A/autogen/sl_event_handler.c index 7b99dddf3..aea242a58 100644 --- a/board-support/efr32/mgm24/BRD2704A/autogen/sl_event_handler.c +++ b/board-support/efr32/mgm24/BRD2704A/autogen/sl_event_handler.c @@ -3,7 +3,11 @@ #include "sl_board_init.h" #include "sl_clock_manager.h" #include "sl_hfxo_manager.h" -#include "pa_conversions_efr32.h" +#include "sl_rail_util_compatible_pa.h" +#if !(defined(SLI_SI91X_ENABLE_BLE) && SLI_SI91X_ENABLE_BLE) +#include "sl_bluetooth.h" +#include "sl_rail_util_power_manager_init.h" +#endif // !SLI_SI91X_ENABLE_BLE #include "sl_rail_util_power_manager_init.h" #include "sl_rail_util_pti.h" #include "sl_rail_util_rssi.h" @@ -13,13 +17,16 @@ #include "platform-efr32.h" #include "sl_bt_rtos_adaptation.h" #include "sl_bluetooth.h" +#include "sl_debug_swo.h" #include "sl_gpio.h" #include "gpiointerrupt.h" #include "sl_iostream_rtt.h" #include "sl_mbedtls.h" #include "sl_ot_rtos_adaptation.h" #include "sl_simple_led_instances.h" +#if defined(CONFIG_ENABLE_UART) #include "sl_uartdrv_instances.h" +#endif // CONFIG_ENABLE_UART #include "psa/crypto.h" #include "sl_se_manager.h" #include "sli_protocol_crypto.h" @@ -27,6 +34,7 @@ #include "sl_iostream_init_instances.h" #include "cmsis_os2.h" #include "nvm3_default.h" + #include "sl_iostream_handles.h" void sli_driver_permanent_allocation(void) @@ -72,7 +80,9 @@ void sl_driver_init(void) sl_gpio_init(); GPIOINT_Init(); sl_simple_led_init_instances(); + #if defined(CONFIG_ENABLE_UART) sl_uartdrv_init_instances(); +#endif // CONFIG_ENABLE_UART } void sl_service_init(void) @@ -91,19 +101,25 @@ void sl_service_init(void) void sl_stack_init(void) { +#if !SLI_SI91X_ENABLE_BLE sl_rail_util_pa_init(); sl_rail_util_power_manager_init(); sl_rail_util_pti_init(); sl_rail_util_rssi_init(); sl_fem_util_init(); - sl_ot_sys_init(); sli_bt_stack_functional_init(); +#endif // !SLI_SI91X_ENABLE_BLE +#ifdef SL_OT_ENABLE + sl_ot_sys_init(); +#endif // SL_OT_ENABLE } void sl_internal_app_init(void) { +#ifdef SL_OT_ENABLE sl_ot_rtos_stack_init(); sl_ot_rtos_app_init(); +#endif // SL_OT_ENABLE } void sl_iostream_init_instances_stage_1(void) diff --git a/board-support/efr32/mgm24/BRD2704A/autogen/sl_simple_led_instances.h b/board-support/efr32/mgm24/BRD2704A/autogen/sl_simple_led_instances.h index 65e980033..379b291fc 100644 --- a/board-support/efr32/mgm24/BRD2704A/autogen/sl_simple_led_instances.h +++ b/board-support/efr32/mgm24/BRD2704A/autogen/sl_simple_led_instances.h @@ -31,6 +31,10 @@ #ifndef SL_SIMPLE_LED_INSTANCES_H #define SL_SIMPLE_LED_INSTANCES_H +#ifdef __cplusplus +extern "C" { +#endif + #include "sl_simple_led.h" extern const sl_led_t sl_led_led0; @@ -42,4 +46,8 @@ extern const sl_led_t *sl_simple_led_array[]; void sl_simple_led_init_instances(void); +#ifdef __cplusplus +} +#endif + #endif // SL_SIMPLE_LED_INIT_H diff --git a/board-support/efr32/mgm24/BRD2704A/autogen/sli_psa_config_autogen.h b/board-support/efr32/mgm24/BRD2704A/autogen/sli_psa_config_autogen.h index 055d8a95e..f90dd6e9a 100644 --- a/board-support/efr32/mgm24/BRD2704A/autogen/sli_psa_config_autogen.h +++ b/board-support/efr32/mgm24/BRD2704A/autogen/sli_psa_config_autogen.h @@ -24,7 +24,12 @@ #define PSA_WANT_ALG_TLS12_PSK_TO_MS 1 #define MBEDTLS_PSA_CRYPTO_EXTERNAL_RNG +#if defined(KSU_MAX_KEY_SLOTS) +#include "sli_ksu_keyslots_config.h" +#define MBEDTLS_PSA_KEY_SLOT_COUNT (22 + 15 + 1 + SL_PSA_KEY_USER_SLOT_COUNT + SLI_KSU_MAX_KEY_SLOTS - SLI_KSU_KEY_SLOT_USER_START + 1) +#else #define MBEDTLS_PSA_KEY_SLOT_COUNT (22 + 15 + 1 + SL_PSA_KEY_USER_SLOT_COUNT + 1) +#endif #ifndef SL_PSA_ITS_MAX_FILES #define SL_PSA_ITS_MAX_FILES (1 + SL_PSA_ITS_USER_MAX_FILES) #endif diff --git a/board-support/efr32/mgm24/BRD2704A/config/pin_config.h b/board-support/efr32/mgm24/BRD2704A/config/pin_config.h new file mode 100644 index 000000000..5fa577c51 --- /dev/null +++ b/board-support/efr32/mgm24/BRD2704A/config/pin_config.h @@ -0,0 +1,214 @@ +#ifndef PIN_CONFIG_H +#define PIN_CONFIG_H + +// $[CMU] +// [CMU]$ + +// $[LFXO] +// [LFXO]$ + +// $[PRS.ASYNCH0] +// [PRS.ASYNCH0]$ + +// $[PRS.ASYNCH1] +// [PRS.ASYNCH1]$ + +// $[PRS.ASYNCH2] +// [PRS.ASYNCH2]$ + +// $[PRS.ASYNCH3] +// [PRS.ASYNCH3]$ + +// $[PRS.ASYNCH4] +// [PRS.ASYNCH4]$ + +// $[PRS.ASYNCH5] +// [PRS.ASYNCH5]$ + +// $[PRS.ASYNCH6] +// [PRS.ASYNCH6]$ + +// $[PRS.ASYNCH7] +// [PRS.ASYNCH7]$ + +// $[PRS.ASYNCH8] +// [PRS.ASYNCH8]$ + +// $[PRS.ASYNCH9] +// [PRS.ASYNCH9]$ + +// $[PRS.ASYNCH10] +// [PRS.ASYNCH10]$ + +// $[PRS.ASYNCH11] +// [PRS.ASYNCH11]$ + +// $[PRS.ASYNCH12] +// [PRS.ASYNCH12]$ + +// $[PRS.ASYNCH13] +// [PRS.ASYNCH13]$ + +// $[PRS.ASYNCH14] +// [PRS.ASYNCH14]$ + +// $[PRS.ASYNCH15] +// [PRS.ASYNCH15]$ + +// $[PRS.SYNCH0] +// [PRS.SYNCH0]$ + +// $[PRS.SYNCH1] +// [PRS.SYNCH1]$ + +// $[PRS.SYNCH2] +// [PRS.SYNCH2]$ + +// $[PRS.SYNCH3] +// [PRS.SYNCH3]$ + +// $[GPIO] +// GPIO SWV on PA03 +#ifndef GPIO_SWV_PORT +#define GPIO_SWV_PORT SL_GPIO_PORT_A +#endif +#ifndef GPIO_SWV_PIN +#define GPIO_SWV_PIN 3 +#endif + +// [GPIO]$ + +// $[TIMER0] +// [TIMER0]$ + +// $[TIMER1] +// [TIMER1]$ + +// $[TIMER2] +// [TIMER2]$ + +// $[TIMER3] +// [TIMER3]$ + +// $[TIMER4] +// [TIMER4]$ + +// $[USART0] +// [USART0]$ + +// $[I2C1] +// [I2C1]$ + +// $[EUSART1] +// [EUSART1]$ + +// $[KEYSCAN] +// [KEYSCAN]$ + +// $[LETIMER0] +// [LETIMER0]$ + +// $[IADC0] +// [IADC0]$ + +// $[ACMP0] +// [ACMP0]$ + +// $[ACMP1] +// [ACMP1]$ + +// $[VDAC0] +// [VDAC0]$ + +// $[VDAC1] +// [VDAC1]$ + +// $[PCNT0] +// [PCNT0]$ + +// $[HFXO0] +// [HFXO0]$ + +// $[I2C0] +// [I2C0]$ + +// $[EUSART0] +// EUSART0 RX on PA06 +#ifndef EUSART0_RX_PORT +#define EUSART0_RX_PORT SL_GPIO_PORT_A +#endif +#ifndef EUSART0_RX_PIN +#define EUSART0_RX_PIN 6 +#endif + +// EUSART0 TX on PA05 +#ifndef EUSART0_TX_PORT +#define EUSART0_TX_PORT SL_GPIO_PORT_A +#endif +#ifndef EUSART0_TX_PIN +#define EUSART0_TX_PIN 5 +#endif + +// [EUSART0]$ + +// $[PTI] +// PTI DFRAME on PC05 +#ifndef PTI_DFRAME_PORT +#define PTI_DFRAME_PORT SL_GPIO_PORT_C +#endif +#ifndef PTI_DFRAME_PIN +#define PTI_DFRAME_PIN 5 +#endif + +// PTI DOUT on PC04 +#ifndef PTI_DOUT_PORT +#define PTI_DOUT_PORT SL_GPIO_PORT_C +#endif +#ifndef PTI_DOUT_PIN +#define PTI_DOUT_PIN 4 +#endif + +// [PTI]$ + +// $[MODEM] +// [MODEM]$ + +// $[CUSTOM_PIN_NAME] +#ifndef _PORT +#define _PORT SL_GPIO_PORT_A +#endif +#ifndef _PIN +#define _PIN 0 +#endif + + + + + + + + + + + + + + + + + + + + + + + + + + +// [CUSTOM_PIN_NAME]$ + + +#endif // PIN_CONFIG_H + + diff --git a/board-support/efr32/mgm24/BRD2704A/config/psa_crypto_config.h b/board-support/efr32/mgm24/BRD2704A/config/psa_crypto_config.h index 20703b41d..773ce99e0 100644 --- a/board-support/efr32/mgm24/BRD2704A/config/psa_crypto_config.h +++ b/board-support/efr32/mgm24/BRD2704A/config/psa_crypto_config.h @@ -27,26 +27,32 @@ // Default: 4 #define SL_PSA_KEY_USER_SLOT_COUNT (4) -// PSA Maximum User Persistent Keys Count <0-1024> +// Maximum User Persistent PSA Key Count <0-1024> // Maximum amount of keys (or other files) that can be stored persistently -// by the application through the PSA interface, when persistent storage -// support for PSA Crypto is included in the project. -// Due to caching logic, this setting does have an impact on static RAM usage. -// Note that this number is added to the potential requirements from other -// software components in the project, such that the total amount of keys -// which can be stored through the ITS backend can be higher than what is -// configured here. +// by the user application, when PSA ITS (Internal Trusted Storage) support +// is included in the project. +// NOTE: +// In addition to SL_PSA_ITS_USER_MAX_FILES (number of user keys) the +// application may be configured to include SDK components that require an +// additional number of keys. The sum of user keys and SDK component keys +// is computed and the result, called SL_PSA_ITS_MAX_FILES, is used +// internally in the PSA ITS driver. // -// WARNING: When changing this setting on an application that is already -// deployed, and thus will get the change through an application upgrade, -// care should be taken to ensure that the setting is only ever increased, -// and never decreased. Decreasing this setting might cause previously -// stored keys/files to become inaccessible. +// WARNING: +// For applications using PSA ITS driver version 1 or 2, when changing the +// SL_PSA_ITS_USER_MAX_FILES in an application that is already depeloyed, +// and thus will get the change through an application upgrade, care should +// be taken to ensure that the total sum of keys SL_PSA_ITS_MAX_FILES is +// only ever equal or increased, and never decreased. Decreasing this +// setting might cause previously stored keys/files to become inaccessible, +// ITS should be cleared and all files need to be stored again. // -// It is not possible to change this setting when using V3 ITS Driver. -// The file-storage indexing is dependent on the maximum number of files, -// and if SL_PSA_ITS_USER_MAX_FILES is changed, ITS should be cleared and -// all files need to be stored again. +// For applications using PSA ITS driver version 3, it is not possible to +// change this setting because the file-storage indexing is dependent on the +// maximum number of files (SL_PSA_ITS_MAX_FILES) being consistent, and if +// the sum of SDK component keys and user keys (SL_PSA_ITS_USER_MAX_FILES) +// is changed, may cause previously stored keys/files to become inaccessible +// ITS should be cleared and all files need to be stored again. // Default: 128 #define SL_PSA_ITS_USER_MAX_FILES (128) diff --git a/board-support/efr32/mgm24/BRD2704A/config/sl_bluetooth_config.h b/board-support/efr32/mgm24/BRD2704A/config/sl_bluetooth_config.h index 9b6a804e0..93bfbbcc4 100644 --- a/board-support/efr32/mgm24/BRD2704A/config/sl_bluetooth_config.h +++ b/board-support/efr32/mgm24/BRD2704A/config/sl_bluetooth_config.h @@ -99,6 +99,7 @@ // if the LE Power Control feature is enabled. // When this configuration is passed into stack initialization, the stack // will select the closest value that the device supports. +// API sl_bt_system_set_tx_power() can be used to set the minimum TX power at runtime. // API sl_bt_system_get_tx_power_setting() can be used to query the selected value. #define SL_BT_CONFIG_MIN_TX_POWER (-30) @@ -108,6 +109,7 @@ // advertising, scanning and DTM testing. // When this configuration is passed into stack initialization, the stack // will select the closest value that the device supports. +// API sl_bt_system_set_tx_power() can be used to set the maximum TX power at runtime. // API sl_bt_system_get_tx_power_setting() can be used to query the selected value. #define SL_BT_CONFIG_MAX_TX_POWER (80) diff --git a/board-support/efr32/mgm24/BRD2704A/config/sl_btctrl_config.h b/board-support/efr32/mgm24/BRD2704A/config/sl_btctrl_config.h index ed75a2d0e..403df1ffe 100644 --- a/board-support/efr32/mgm24/BRD2704A/config/sl_btctrl_config.h +++ b/board-support/efr32/mgm24/BRD2704A/config/sl_btctrl_config.h @@ -146,15 +146,27 @@ #define SL_BT_CONTROLLER_ADAPTIVITY_MODE (SL_BTCTRL_CHANNELMAP_FLAG_ACTIVE_ADAPTIVITY) #endif -// Power Amplifier (PA) Configuration -// Automode PA configuration -// Highest available PA configuration -// RAIL Utility component PA configuration -// Select the Power Amplifier configuration -// Default: RAIL Utility component PA configuration -#ifndef SL_BT_CONTROLLER_PA_CONFIG -#define SL_BT_CONTROLLER_PA_CONFIG SL_BT_BLUETOOTH_RAIL_UTIL_PA -#endif +// Advertising Configuration +// Include TX Power in the extended header of primary extended advertising packets +// This is default setting to all advertising sets unless it is specifically overridden by VS_SiliconLabs_Set_Advertising_Config_Bits. +// Default: 0 +// Enabling this option takes effect only if permitted by Le_Set_Extended_Advertising_Parameters +// According to Link Layer specification, Vol 6, Part B, Table 2.4 and Table 2.5: +// Optional in 1M PHY when the advertiser is connectable or scannable, or with auxiliary pointer. +// In other cases, the Extended Advertising TX Power is always optional by settings. +#define SL_BT_CONTROLLER_PRIMARY_EXT_PACKET_INCLUDE_TX_POWER (0) +// +// Include Advertiser Address in the header of primary extended advertising packets +// This is default setting to all advertising sets unless it is specifically overridden by VS_SiliconLabs_Set_Advertising_Config_Bits. +// Default: 0 +// Enabling this option takes effect only if permitted by Le_Set_Extended_Advertising_Parameters +// According to Link Layer specification, Vol 6, Part B, Table 2.4 and Table 2.5: +// Optional in 1M PHY when the advertiser is non-connectable and non-scannable, with auxiliary pointer. +// Mandatory when the advertiser is non-connectable and non-scannable, without auxiliary pointer. +// Forbidden when the advertiser is connectable or scannable. +#define SL_BT_CONTROLLER_PRIMARY_EXT_PACKET_INCLUDE_ADDRESS (0) +// +// Advertising Configuration // Bluetooth Controller Configuration // <<< end of configuration section >>> diff --git a/board-support/efr32/mgm24/BRD2704A/config/sl_clock_manager_tree_config.h b/board-support/efr32/mgm24/BRD2704A/config/sl_clock_manager_tree_config.h index 80819d65b..74976e212 100644 --- a/board-support/efr32/mgm24/BRD2704A/config/sl_clock_manager_tree_config.h +++ b/board-support/efr32/mgm24/BRD2704A/config/sl_clock_manager_tree_config.h @@ -105,9 +105,9 @@ #endif // PCLK branch divider -// MIN // DIV1 // DIV2 +// MIN // PCLK branch is derived from HCLK. This clock drives the APB bus interface. // SL_CLOCK_MANAGER_PCLK_DIV_MIN #ifndef SL_CLOCK_MANAGER_PCLK_DIVIDER diff --git a/board-support/efr32/mgm24/BRD2704A/config/sl_mbedtls_config.h b/board-support/efr32/mgm24/BRD2704A/config/sl_mbedtls_config.h index e249b4d1b..7146ba648 100644 --- a/board-support/efr32/mgm24/BRD2704A/config/sl_mbedtls_config.h +++ b/board-support/efr32/mgm24/BRD2704A/config/sl_mbedtls_config.h @@ -71,9 +71,14 @@ // Default: 1 // This option is enabled assuming all buffers passed to any PSA function reside // in memory that is accessible only to the PSA function during its execution. +// This improves performance by avoiding extra buffer copies, reducing memory +// usage and allocation overhead. However, it is NOT the most secure option and +// should only be enabled if all buffers passed to PSA functions are exclusively +// accessible to PSA and never shared with untrusted code. // This option MUST be disabled whenever buffer arguments are in memory shared // with an untrusted party, for example where arguments to PSA calls are passed -// across a trust boundary. +// across a trust boundary, e.g. if TrustZone is enabled, and the PSA Crypto core +// is placed in the Secure domain. #define SL_MBEDTLS_PSA_ASSUME_EXCLUSIVE_BUFFERS 1 // diff --git a/board-support/efr32/mgm24/BRD2704A/config/sl_memory_manager_config.h b/board-support/efr32/mgm24/BRD2704A/config/sl_memory_manager_config.h index 26b84b107..4a16c29fe 100644 --- a/board-support/efr32/mgm24/BRD2704A/config/sl_memory_manager_config.h +++ b/board-support/efr32/mgm24/BRD2704A/config/sl_memory_manager_config.h @@ -51,4 +51,11 @@ // <<< end of configuration section >>> +// Keep this configuration outside the configuration section until the feature is ready for release. +// Enables the heap fallback mechanism. +// Setting this configuration to 0 will disable the fallback mechanism on DTCM and PSRAM. +// If this configuration is disabled, the memory manager will not attempt to use alternative memory regions for allocations even if using the fallback parameters. +// Default: 1 +#define SL_MEMORY_MANAGER_HEAP_FALLBACK_EN 1 + #endif /* SL_MEMORY_MANAGER_CONFIG_H */ diff --git a/board-support/efr32/mgm24/BRD2704A/config/sl_openthread_features_config.h b/board-support/efr32/mgm24/BRD2704A/config/sl_openthread_features_config.h index 22340498d..a3697f8af 100644 --- a/board-support/efr32/mgm24/BRD2704A/config/sl_openthread_features_config.h +++ b/board-support/efr32/mgm24/BRD2704A/config/sl_openthread_features_config.h @@ -65,6 +65,7 @@ #define OPENTHREAD_CONFIG_MAC_CSL_RECEIVER_ENABLE 1 #endif // CSL Scheduling Uncertainty (±10 us units) <12..999:1> +// Left unchanged the value will be set to 175 for RCPs, 20 for FTDs, and 12 for MTDs #ifndef SL_OPENTHREAD_CSL_TX_UNCERTAINTY #if OPENTHREAD_RADIO #define SL_OPENTHREAD_CSL_TX_UNCERTAINTY 175 @@ -142,12 +143,10 @@ #define OPENTHREAD_CONFIG_CHANNEL_MONITOR_ENABLE 0 #endif // - -// Commissioner +// Commissioner #ifndef OPENTHREAD_CONFIG_COMMISSIONER_ENABLE #define OPENTHREAD_CONFIG_COMMISSIONER_ENABLE 0 #endif - // Max Joiner Entries // The maximum number of Joiner entries maintained by the Commissioner. // 2 @@ -155,7 +154,6 @@ #define OPENTHREAD_CONFIG_COMMISSIONER_MAX_JOINER_ENTRIES 2 #endif // - // COAP API #ifndef OPENTHREAD_CONFIG_COAP_API_ENABLE #define OPENTHREAD_CONFIG_COAP_API_ENABLE 0 @@ -171,6 +169,11 @@ #define OPENTHREAD_CONFIG_COAP_SECURE_API_ENABLE 0 #endif // +// COAP Blockwise Transfer +#ifndef OPENTHREAD_CONFIG_COAP_BLOCKWISE_TRANSFER_ENABLE +#define OPENTHREAD_CONFIG_COAP_BLOCKWISE_TRANSFER_ENABLE 0 +#endif +// // DHCP6 Client #ifndef OPENTHREAD_CONFIG_DHCP6_CLIENT_ENABLE #define OPENTHREAD_CONFIG_DHCP6_CLIENT_ENABLE 0 @@ -196,16 +199,27 @@ #define OPENTHREAD_CONFIG_IP6_FRAGMENTATION_ENABLE 0 #endif // -// Maximum number of IPv6 unicast addresses allowed to be externally added +// IPv6 Limits +// Maximum IPv6 external unicast addresses +// Maximum number of IPv6 unicast addresses allowed to be externally added +// 4 #ifndef OPENTHREAD_CONFIG_IP6_MAX_EXT_UCAST_ADDRS #define OPENTHREAD_CONFIG_IP6_MAX_EXT_UCAST_ADDRS 4 #endif -// -// Maximum number of IPv6 multicast addresses allowed to be externally added +// Maximum IPv6 external multicast addresses +// Maximum number of IPv6 multicast addresses allowed to be externally added +// 4 #ifndef OPENTHREAD_CONFIG_IP6_MAX_EXT_MCAST_ADDRS #define OPENTHREAD_CONFIG_IP6_MAX_EXT_MCAST_ADDRS 4 #endif -// +// Maximum IPv6 address registrations for MTD +// The maximum number of IPv6 address registrations for MTD. +// If left unchanged will default to the value of OPENTHREAD_CONFIG_MLE_IP_ADDRS_PER_CHILD +// 4 +#ifndef OPENTHREAD_CONFIG_MLE_IP_ADDRS_TO_REGISTER +#define OPENTHREAD_CONFIG_MLE_IP_ADDRS_TO_REGISTER (OPENTHREAD_CONFIG_MLE_IP_ADDRS_PER_CHILD) +#endif +// // Jam Detection #ifndef OPENTHREAD_CONFIG_JAM_DETECTION_ENABLE #define OPENTHREAD_CONFIG_JAM_DETECTION_ENABLE 0 @@ -226,6 +240,14 @@ #define OPENTHREAD_CONFIG_MAC_FILTER_ENABLE 0 #endif // +// MLE Children +// Maximum number of Thread children supported by the device +// Default is 10. Used by the Thread stack to configure the size of child table. +// 10 +#ifndef OPENTHREAD_CONFIG_MLE_MAX_CHILDREN +#define OPENTHREAD_CONFIG_MLE_MAX_CHILDREN 10 +#endif +// // MLE Long Routes extension (experimental) #ifndef OPENTHREAD_CONFIG_MLE_LONG_ROUTES_ENABLE #define OPENTHREAD_CONFIG_MLE_LONG_ROUTES_ENABLE 0 @@ -235,27 +257,66 @@ #ifndef OPENTHREAD_CONFIG_MULTIPAN_RCP_ENABLE #define OPENTHREAD_CONFIG_MULTIPAN_RCP_ENABLE 0 #endif +// Broadcast IID for spinel frames +// Define broadcast IID for spinel frames dedicated to all hosts in multipan configuration +// 0 +#ifndef OPENTHREAD_SPINEL_CONFIG_BROADCAST_IID +#define OPENTHREAD_SPINEL_CONFIG_BROADCAST_IID 0 +#endif +#if OPENTHREAD_CONFIG_MULTIPAN_RCP_ENABLE +// Maximum number of Zigbee children for multiprotocol (DMP) builds +// Ensures correct table sizing for Zigbee when DMP/multipan is enabled. +// 6 +#ifndef SL_ZIGBEE_MAX_END_DEVICE_CHILDREN +#define SL_ZIGBEE_MAX_END_DEVICE_CHILDREN 6 +#endif +#endif // // Multiple OpenThread Instances #ifndef OPENTHREAD_CONFIG_MULTIPLE_INSTANCE_ENABLE #define OPENTHREAD_CONFIG_MULTIPLE_INSTANCE_ENABLE 0 #endif -// // Multiple Static Instance Support #ifndef OPENTHREAD_CONFIG_MULTIPLE_STATIC_INSTANCE_ENABLE #define OPENTHREAD_CONFIG_MULTIPLE_STATIC_INSTANCE_ENABLE 0 #endif -// -// Number of OpenThread Instances For Static Buffer Allocation +// Number of OpenThread Instances +// Default is 2. Number of OpenThread Instances For Static Buffer Allocation. +// 2 #ifndef OPENTHREAD_CONFIG_MULTIPLE_INSTANCE_NUM #define OPENTHREAD_CONFIG_MULTIPLE_INSTANCE_NUM 2 #endif // -// Define broadcast IID for spinel frames dedicated to all hosts in multipan configuration -#ifndef OPENTHREAD_SPINEL_CONFIG_BROADCAST_IID -#define OPENTHREAD_SPINEL_CONFIG_BROADCAST_IID 0 -#endif // +// Define maximum total source match table entries for both OT and Zigbee. +// In multi-instance builds (SoC or RCP/host), table must support all OT instances + Zigbee. +// For single instance (default), table sized to just OT children. +// This value is used to size all source match tables in both OT and Zigbee code. +// Note: this is purposedly not being setup with CMSIS annotations. +#ifndef RADIO_CONFIG_MAX_SRC_MATCH_ENTRIES +#if OPENTHREAD_CONFIG_MULTIPLE_INSTANCE_ENABLE +#if SL_ZIGBEE_MAX_END_DEVICE_CHILDREN +// Multipan / DMP case: OT + Zigbee +#define RADIO_CONFIG_MAX_SRC_MATCH_ENTRIES \ + ((OPENTHREAD_CONFIG_MLE_MAX_CHILDREN * (OPENTHREAD_CONFIG_MULTIPLE_INSTANCE_NUM - 1)) \ + + SL_ZIGBEE_MAX_END_DEVICE_CHILDREN) +#else +// Multi-instance OT-only case +#define RADIO_CONFIG_MAX_SRC_MATCH_ENTRIES \ + (OPENTHREAD_CONFIG_MLE_MAX_CHILDREN * OPENTHREAD_CONFIG_MULTIPLE_INSTANCE_NUM) +#endif +#else +// Single-instance OT (SoC / NCP / non-multipan RCP) +#define RADIO_CONFIG_MAX_SRC_MATCH_ENTRIES OPENTHREAD_CONFIG_MLE_MAX_CHILDREN +#endif +#endif +// Spinel Match Table +// Maximum number of spinel source match table entries +// Ensure that this value is the total of the number of openthread children times the number of openthread instances plus the number of Zigbee children. +#ifndef OPENTHREAD_SPINEL_CONFIG_MAX_SRC_MATCH_ENTRIES +#define OPENTHREAD_SPINEL_CONFIG_MAX_SRC_MATCH_ENTRIES RADIO_CONFIG_MAX_SRC_MATCH_ENTRIES +#endif +// // OTNS (OpenThread Network Simulator) #ifndef OPENTHREAD_CONFIG_OTNS_ENABLE #define OPENTHREAD_CONFIG_OTNS_ENABLE 0 @@ -265,13 +326,23 @@ #ifndef OPENTHREAD_CONFIG_PING_SENDER_ENABLE #define OPENTHREAD_CONFIG_PING_SENDER_ENABLE 1 #endif - // // Power Calibration Module (RCP only configuration) #ifndef OPENTHREAD_CONFIG_POWER_CALIBRATION_ENABLE #define OPENTHREAD_CONFIG_POWER_CALIBRATION_ENABLE 0 #endif - +// Maximum raw power calibration length +// Max raw power calibration length +// 4 +#ifndef SL_OPENTHREAD_RAW_POWER_CALIBRATION_LENGTH +#define SL_OPENTHREAD_RAW_POWER_CALIBRATION_LENGTH 4 +#endif +// Maximum FEM config setting length +// Max FEM config setting length +// 4 +#ifndef SL_OPENTHREAD_FEM_SETTING_LENGTH +#define SL_OPENTHREAD_FEM_SETTING_LENGTH 4 +#endif // // Platform UDP #ifndef OPENTHREAD_CONFIG_PLATFORM_UDP_ENABLE @@ -309,7 +380,14 @@ #endif // // Time Synchronization Service +#ifndef OPENTHREAD_CONFIG_TIME_SYNC_ENABLE #define OPENTHREAD_CONFIG_TIME_SYNC_ENABLE 0 +#endif +// +// Uptime of OpenThread instance +#ifndef OPENTHREAD_CONFIG_UPTIME_ENABLE +#define OPENTHREAD_CONFIG_UPTIME_ENABLE 1 +#endif // // UDP Forward #ifndef OPENTHREAD_CONFIG_UDP_FORWARD_ENABLE @@ -321,28 +399,22 @@ #define OPENTHREAD_CONFIG_MAC_BEACON_PAYLOAD_PARSING_ENABLE 1 #endif // -// Max raw power calibration length. -#ifndef SL_OPENTHREAD_RAW_POWER_CALIBRATION_LENGTH -#define SL_OPENTHREAD_RAW_POWER_CALIBRATION_LENGTH 4 -#endif -// -// Max FEM config setting length. -#ifndef SL_OPENTHREAD_FEM_SETTING_LENGTH -#define SL_OPENTHREAD_FEM_SETTING_LENGTH 4 -#endif -// -// The maximum number of RX buffers to use in the radio driver. -// 16 +// Radio Driver RX buffers +// Maximum number of RX buffers +// The maximum number of RX buffers to use in the radio driver. +// 16 #ifndef SL_OPENTHREAD_RADIO_RX_BUFFER_COUNT #define SL_OPENTHREAD_RADIO_RX_BUFFER_COUNT 16 #endif // +// // Logging // LOG_OUTPUT // NONE // APP // PLATFORM_DEFINED -// Default: OPENTHREAD_CONFIG_LOG_OUTPUT_PLATFORM_DEFINED +// Default: OPENTHREAD_CONFIG_LOG_OUTPUT_APP +// OPENTHREAD_CONFIG_LOG_OUTPUT_APP #ifndef OPENTHREAD_CONFIG_LOG_OUTPUT #define OPENTHREAD_CONFIG_LOG_OUTPUT OPENTHREAD_CONFIG_LOG_OUTPUT_APP #endif @@ -365,6 +437,7 @@ // INFO // DEBG // Default: OT_LOG_LEVEL_DEBG +// OT_LOG_LEVEL_DEBG #ifndef OPENTHREAD_CONFIG_LOG_LEVEL #define OPENTHREAD_CONFIG_LOG_LEVEL OT_LOG_LEVEL_DEBG #endif @@ -387,11 +460,10 @@ #endif // OPENTHREAD_FULL_LOGS_ENABLE -// Log crash dump after initialization +// Log crash dump after initialization #ifndef OPENTHREAD_CONFIG_PLATFORM_LOG_CRASH_DUMP_ENABLE #define OPENTHREAD_CONFIG_PLATFORM_LOG_CRASH_DUMP_ENABLE 0 #endif -// // // diff --git a/board-support/efr32/mgm24/BRD2704A/config/sl_power_manager_config.h b/board-support/efr32/mgm24/BRD2704A/config/sl_power_manager_config.h index 3c240b843..86b9fef27 100644 --- a/board-support/efr32/mgm24/BRD2704A/config/sl_power_manager_config.h +++ b/board-support/efr32/mgm24/BRD2704A/config/sl_power_manager_config.h @@ -37,24 +37,40 @@ // Enable custom IRQ handler for external HF oscillator. // Enable if CMU_IRQHandler/HFXO0_IRQHandler is needed from your application. -// The function sl_power_manager_irq_handler() will have to be called from you custom handler if this is enabled. +// The function sl_power_manager_irq_handler() will have to be called from your custom handler if this is enabled. // Default: 0 +#ifndef SL_POWER_MANAGER_CUSTOM_HF_OSCILLATOR_IRQ_HANDLER #define SL_POWER_MANAGER_CUSTOM_HF_OSCILLATOR_IRQ_HANDLER 0 +#endif // Enable fast wakeup (disable voltage scaling in EM2/3 mode) // Enable or disable voltage scaling in EM2/3 modes (when available). This decreases wakeup time by about 30 us. // Deprecated. It is replaced by the function sl_power_manager_em23_voltage_scaling_enable_fast_wakeup() // Default: 0 +#ifndef SL_POWER_MANAGER_CONFIG_VOLTAGE_SCALING_FAST_WAKEUP #define SL_POWER_MANAGER_CONFIG_VOLTAGE_SCALING_FAST_WAKEUP 0 +#endif + +// Enable voltage scaling in EM0 and EM1 mode. +// Enable or disable voltage scaling in EM0/1 modes. With this config enabled, the voltage +// scaling will be configured at the lowest possible level based on the system clock. +// Default: 0 +#ifndef SL_POWER_MANAGER_ENABLE_EM01_VOLTAGE_SCALING +#define SL_POWER_MANAGER_ENABLE_EM01_VOLTAGE_SCALING 0 +#endif // Enable debugging feature // Enable or disable debugging features (trace the different modules that have requirements). // Default: 0 +#ifndef SL_POWER_MANAGER_DEBUG #define SL_POWER_MANAGER_DEBUG 0 +#endif // Maximum numbers of requirements that can be logged // Default: 10 +#ifndef SL_POWER_MANAGER_DEBUG_POOL_SIZE #define SL_POWER_MANAGER_DEBUG_POOL_SIZE 10 +#endif // // Pin retention mode @@ -63,14 +79,18 @@ // Retention through EM4 // Retention through EM4 and wakeup // power_manager_pin_retention_disable +#ifndef SL_POWER_MANAGER_INIT_EMU_EM4_PIN_RETENTION_MODE #define SL_POWER_MANAGER_INIT_EMU_EM4_PIN_RETENTION_MODE EMU_EM4CTRL_EM4IORETMODE_DISABLE +#endif // Enable EM2 debugging feature // Enable or disable debugging features. // Force PD0B/PD0D to stay on during EM2 entry. This allows the debugger to remain connected in EM2 and EM3. // Enabling debug connectivity results in an increased power consumption in EM2/EM3. // Default: 1 +#ifndef SL_POWER_MANAGER_INIT_EMU_EM2_DEBUG_ENABLE #define SL_POWER_MANAGER_INIT_EMU_EM2_DEBUG_ENABLE 1 +#endif // // diff --git a/board-support/efr32/mgm24/BRD2704A/config/sl_rail_util_pti_config.h b/board-support/efr32/mgm24/BRD2704A/config/sl_rail_util_pti_config.h index d222a67fd..728401374 100644 --- a/board-support/efr32/mgm24/BRD2704A/config/sl_rail_util_pti_config.h +++ b/board-support/efr32/mgm24/BRD2704A/config/sl_rail_util_pti_config.h @@ -35,12 +35,12 @@ // PTI Configuration // PTI mode -// UART -// UART onewire -// SPI -// Disabled -// Default: RAIL_PTI_MODE_UART -#define SL_RAIL_UTIL_PTI_MODE RAIL_PTI_MODE_UART +// UART +// UART onewire +// SPI +// Disabled +// Default: SL_RAIL_PTI_MODE_UART +#define SL_RAIL_UTIL_PTI_MODE SL_RAIL_PTI_MODE_UART // PTI Baud Rate (Hertz) // <147800-20000000:1> @@ -53,16 +53,25 @@ // <<< sl:start pin_tool >>> // SL_RAIL_UTIL_PTI // $[PTI_SL_RAIL_UTIL_PTI] +#ifndef SL_RAIL_UTIL_PTI_PERIPHERAL #define SL_RAIL_UTIL_PTI_PERIPHERAL PTI +#endif // PTI DOUT on PC04 +#ifndef SL_RAIL_UTIL_PTI_DOUT_PORT #define SL_RAIL_UTIL_PTI_DOUT_PORT SL_GPIO_PORT_C +#endif +#ifndef SL_RAIL_UTIL_PTI_DOUT_PIN #define SL_RAIL_UTIL_PTI_DOUT_PIN 4 +#endif // PTI DFRAME on PC05 +#ifndef SL_RAIL_UTIL_PTI_DFRAME_PORT #define SL_RAIL_UTIL_PTI_DFRAME_PORT SL_GPIO_PORT_C +#endif +#ifndef SL_RAIL_UTIL_PTI_DFRAME_PIN #define SL_RAIL_UTIL_PTI_DFRAME_PIN 5 - +#endif // [PTI_SL_RAIL_UTIL_PTI]$ diff --git a/board-support/efr32/mgm24/BRD2704A/config/sl_simple_led_led0_config.h b/board-support/efr32/mgm24/BRD2704A/config/sl_simple_led_led0_config.h index 580802011..3e0969abf 100644 --- a/board-support/efr32/mgm24/BRD2704A/config/sl_simple_led_led0_config.h +++ b/board-support/efr32/mgm24/BRD2704A/config/sl_simple_led_led0_config.h @@ -47,9 +47,12 @@ // SL_SIMPLE_LED_LED0 // $[GPIO_SL_SIMPLE_LED_LED0] +#ifndef SL_SIMPLE_LED_LED0_PORT #define SL_SIMPLE_LED_LED0_PORT SL_GPIO_PORT_A +#endif +#ifndef SL_SIMPLE_LED_LED0_PIN #define SL_SIMPLE_LED_LED0_PIN 8 - +#endif // [GPIO_SL_SIMPLE_LED_LED0]$ // <<< sl:end pin_tool >>> diff --git a/board-support/efr32/mgm24/BRD4316A/autogen/sl_bluetooth.c b/board-support/efr32/mgm24/BRD4316A/autogen/sl_bluetooth.c index 4cac19436..0a5f1a969 100644 --- a/board-support/efr32/mgm24/BRD4316A/autogen/sl_bluetooth.c +++ b/board-support/efr32/mgm24/BRD4316A/autogen/sl_bluetooth.c @@ -30,6 +30,8 @@ #include #include "sl_bluetooth.h" +#include "sli_bt_api.h" +#include "sli_bgapi.h" #include "sl_assert.h" #include "sl_bt_stack_init.h" #include "sl_component_catalog.h" @@ -68,17 +70,23 @@ void sl_bt_step(void) { sl_bt_msg_t evt; + // Run the Bluetooth host stack processing step sl_bt_run(); - uint32_t event_len = sl_bt_event_pending_len(); - // For preventing from data loss, the event will be kept in the stack's queue - // if application cannot process it at the moment. + + // Check the length of the next event, if any, and verify that the application + // can process it. To prevent data loss, the event will be kept in the stack's + // queue if the application cannot process it at the moment. + size_t event_len = sli_bgapi_device_peek_event_len(&sli_bt_bgapi_device); if ((event_len == 0) || (!sl_bt_can_process_event(event_len))) { return; } - // Pop (non-blocking) a Bluetooth stack event from event queue. - sl_status_t status = sl_bt_pop_event(&evt); - if(status != SL_STATUS_OK){ + // Pop the event and process it if successful + sl_status_t status = sli_bgapi_device_pop_event(&sli_bt_bgapi_device, + sizeof(evt), + &evt); + + if (status != SL_STATUS_OK) { return; } sl_bt_process_event(&evt); diff --git a/board-support/efr32/mgm24/BRD4316A/autogen/sl_component_catalog.h b/board-support/efr32/mgm24/BRD4316A/autogen/sl_component_catalog.h index c3f2a0ebd..d3abc0290 100644 --- a/board-support/efr32/mgm24/BRD4316A/autogen/sl_component_catalog.h +++ b/board-support/efr32/mgm24/BRD4316A/autogen/sl_component_catalog.h @@ -3,6 +3,7 @@ // APIs present in project #define SL_CATALOG_BGAPI_PROTOCOL_PRESENT +#define SL_CATALOG_BGAPI_PROTOCOL_RTOS_ADAPTATION_PRESENT #define SL_CATALOG_BLUETOOTH_CONFIGURATION_PRESENT #define SL_CATALOG_BLUETOOTH_CTE_SUPPORT_PRESENT #define SL_CATALOG_BLUETOOTH_CS_SUPPORT_PRESENT @@ -24,7 +25,6 @@ #define SL_CATALOG_CMSIS_OS_COMMON_PRESENT #define SL_CATALOG_CPP_SUPPORT_PRESENT #define SL_CATALOG_DEVICE_INIT_PRESENT -#define SL_CATALOG_DEVICE_INIT_CORE_PRESENT #define SL_CATALOG_DEVICE_INIT_DCDC_PRESENT #define SL_CATALOG_EMLIB_CORE_PRESENT #define SL_CATALOG_EMLIB_RMU_PRESENT @@ -33,6 +33,7 @@ #define SL_CATALOG_GATT_CONFIGURATION_PRESENT #define SL_CATALOG_GPIO_PRESENT #define SL_CATALOG_GPIOINTERRUPT_PRESENT +#define SL_CATALOG_HAL_SYSTEM_PRESENT #define SL_CATALOG_HFXO_MANAGER_PRESENT #define SL_CATALOG_INTERRUPT_MANAGER_PRESENT #define SL_CATALOG_IOSTREAM_PRESENT @@ -51,13 +52,12 @@ #define SL_CATALOG_OPENTHREAD_CLI_PRESENT #define SL_CATALOG_OT_GP_INTERFACE_PRESENT #define SL_CATALOG_OPENTHREAD_STACK_PRESENT -#define SL_CATALOG_OPENTHREAD_UART_PRESENT #define SL_CATALOG_POWER_MANAGER_PRESENT +#define SL_CATALOG_POWER_MANAGER_DEEPSLEEP_PRESENT #define SL_CATALOG_PSA_CRYPTO_PRESENT #define SL_CATALOG_RADIO_PRIORITY_15_4_PRESENT #define SL_CATALOG_RAIL_LIB_PRESENT #define SL_CATALOG_RAIL_UTIL_PTI_PRESENT -#define SL_CATALOG_SE_MANAGER_PRESENT #define SL_CATALOG_SECURITY_MANAGER_PRESENT #define SL_CATALOG_SEGGER_RTT_PRESENT #define SL_CATALOG_BTN0_PRESENT diff --git a/board-support/efr32/mgm24/BRD4316A/autogen/sl_event_handler.c b/board-support/efr32/mgm24/BRD4316A/autogen/sl_event_handler.c index 552277070..08ff9ad2a 100644 --- a/board-support/efr32/mgm24/BRD4316A/autogen/sl_event_handler.c +++ b/board-support/efr32/mgm24/BRD4316A/autogen/sl_event_handler.c @@ -3,7 +3,11 @@ #include "sl_board_init.h" #include "sl_clock_manager.h" #include "sl_hfxo_manager.h" -#include "pa_conversions_efr32.h" +#include "sl_rail_util_compatible_pa.h" +#if !(defined(SLI_SI91X_ENABLE_BLE) && SLI_SI91X_ENABLE_BLE) +#include "sl_bluetooth.h" +#include "sl_rail_util_power_manager_init.h" +#endif // !SLI_SI91X_ENABLE_BLE #include "sl_rail_util_power_manager_init.h" #include "sl_rail_util_pti.h" #include "sl_rail_util_rssi.h" @@ -13,16 +17,22 @@ #include "platform-efr32.h" #include "sl_bt_rtos_adaptation.h" #include "sl_bluetooth.h" +#include "sl_debug_swo.h" #include "sl_gpio.h" #include "gpiointerrupt.h" -#if defined(SL_MATTER_USE_SI70XX_SENSOR) && SL_MATTER_USE_SI70XX_SENSOR -#include "sl_i2cspm_instances.h" -#endif // defined(SL_MATTER_USE_SI70XX_SENSOR) && SL_MATTER_USE_SI70XX_SENSOR #include "sl_iostream_rtt.h" #include "sl_mbedtls.h" #include "sl_ot_rtos_adaptation.h" #include "sl_simple_button_instances.h" + +#if (defined(SL_MATTER_RGB_LED_ENABLED) && SL_MATTER_RGB_LED_ENABLED == 1) +#include "sl_simple_rgb_pwm_led_instances.h" +#else +#include "sl_simple_led_instances.h" +#endif //(SL_MATTER_RGB_LED_ENABLED) && SL_MATTER_RGB_LED_ENABLED == 1) +#if defined(CONFIG_ENABLE_UART) #include "sl_uartdrv_instances.h" +#endif // CONFIG_ENABLE_UART #include "psa/crypto.h" #include "sl_se_manager.h" #include "sli_protocol_crypto.h" @@ -30,6 +40,7 @@ #include "sl_iostream_init_instances.h" #include "cmsis_os2.h" #include "nvm3_default.h" + #include "sl_iostream_handles.h" void sli_driver_permanent_allocation(void) @@ -74,13 +85,10 @@ void sl_driver_init(void) { sl_gpio_init(); GPIOINT_Init(); -#if defined(SL_MATTER_USE_SI70XX_SENSOR) && SL_MATTER_USE_SI70XX_SENSOR - sl_i2cspm_init_instances(); -#endif // defined(SL_MATTER_USE_SI70XX_SENSOR) && SL_MATTER_USE_SI70XX_SENSOR sl_simple_button_init_instances(); -#if defined(CONFIG_ENABLE_UART) + #if defined(CONFIG_ENABLE_UART) sl_uartdrv_init_instances(); -#endif +#endif // CONFIG_ENABLE_UART } void sl_service_init(void) @@ -99,19 +107,25 @@ void sl_service_init(void) void sl_stack_init(void) { +#if !SLI_SI91X_ENABLE_BLE sl_rail_util_pa_init(); sl_rail_util_power_manager_init(); sl_rail_util_pti_init(); sl_rail_util_rssi_init(); sl_fem_util_init(); - sl_ot_sys_init(); sli_bt_stack_functional_init(); +#endif // !SLI_SI91X_ENABLE_BLE +#ifdef SL_OT_ENABLE + sl_ot_sys_init(); +#endif // SL_OT_ENABLE } void sl_internal_app_init(void) { +#ifdef SL_OT_ENABLE sl_ot_rtos_stack_init(); sl_ot_rtos_app_init(); +#endif // SL_OT_ENABLE } void sl_iostream_init_instances_stage_1(void) @@ -123,4 +137,3 @@ void sl_iostream_init_instances_stage_2(void) { sl_iostream_set_console_instance(); } - diff --git a/board-support/efr32/mgm24/BRD4316A/autogen/sli_psa_config_autogen.h b/board-support/efr32/mgm24/BRD4316A/autogen/sli_psa_config_autogen.h index 055d8a95e..f90dd6e9a 100644 --- a/board-support/efr32/mgm24/BRD4316A/autogen/sli_psa_config_autogen.h +++ b/board-support/efr32/mgm24/BRD4316A/autogen/sli_psa_config_autogen.h @@ -24,7 +24,12 @@ #define PSA_WANT_ALG_TLS12_PSK_TO_MS 1 #define MBEDTLS_PSA_CRYPTO_EXTERNAL_RNG +#if defined(KSU_MAX_KEY_SLOTS) +#include "sli_ksu_keyslots_config.h" +#define MBEDTLS_PSA_KEY_SLOT_COUNT (22 + 15 + 1 + SL_PSA_KEY_USER_SLOT_COUNT + SLI_KSU_MAX_KEY_SLOTS - SLI_KSU_KEY_SLOT_USER_START + 1) +#else #define MBEDTLS_PSA_KEY_SLOT_COUNT (22 + 15 + 1 + SL_PSA_KEY_USER_SLOT_COUNT + 1) +#endif #ifndef SL_PSA_ITS_MAX_FILES #define SL_PSA_ITS_MAX_FILES (1 + SL_PSA_ITS_USER_MAX_FILES) #endif diff --git a/board-support/efr32/mgm24/BRD4316A/config/pin_config.h b/board-support/efr32/mgm24/BRD4316A/config/pin_config.h new file mode 100644 index 000000000..b961c7c89 --- /dev/null +++ b/board-support/efr32/mgm24/BRD4316A/config/pin_config.h @@ -0,0 +1,230 @@ +#ifndef PIN_CONFIG_H +#define PIN_CONFIG_H + +// $[CMU] +// [CMU]$ + +// $[LFXO] +// [LFXO]$ + +// $[PRS.ASYNCH0] +// [PRS.ASYNCH0]$ + +// $[PRS.ASYNCH1] +// [PRS.ASYNCH1]$ + +// $[PRS.ASYNCH2] +// [PRS.ASYNCH2]$ + +// $[PRS.ASYNCH3] +// [PRS.ASYNCH3]$ + +// $[PRS.ASYNCH4] +// [PRS.ASYNCH4]$ + +// $[PRS.ASYNCH5] +// [PRS.ASYNCH5]$ + +// $[PRS.ASYNCH6] +// [PRS.ASYNCH6]$ + +// $[PRS.ASYNCH7] +// [PRS.ASYNCH7]$ + +// $[PRS.ASYNCH8] +// [PRS.ASYNCH8]$ + +// $[PRS.ASYNCH9] +// [PRS.ASYNCH9]$ + +// $[PRS.ASYNCH10] +// [PRS.ASYNCH10]$ + +// $[PRS.ASYNCH11] +// [PRS.ASYNCH11]$ + +// $[PRS.ASYNCH12] +// [PRS.ASYNCH12]$ + +// $[PRS.ASYNCH13] +// [PRS.ASYNCH13]$ + +// $[PRS.ASYNCH14] +// [PRS.ASYNCH14]$ + +// $[PRS.ASYNCH15] +// [PRS.ASYNCH15]$ + +// $[PRS.SYNCH0] +// [PRS.SYNCH0]$ + +// $[PRS.SYNCH1] +// [PRS.SYNCH1]$ + +// $[PRS.SYNCH2] +// [PRS.SYNCH2]$ + +// $[PRS.SYNCH3] +// [PRS.SYNCH3]$ + +// $[GPIO] +// GPIO SWV on PA03 +#ifndef GPIO_SWV_PORT +#define GPIO_SWV_PORT SL_GPIO_PORT_A +#endif +#ifndef GPIO_SWV_PIN +#define GPIO_SWV_PIN 3 +#endif + +// [GPIO]$ + +// $[TIMER0] +// [TIMER0]$ + +// $[TIMER1] +// [TIMER1]$ + +// $[TIMER2] +// [TIMER2]$ + +// $[TIMER3] +// [TIMER3]$ + +// $[TIMER4] +// [TIMER4]$ + +// $[USART0] +// [USART0]$ + +// $[I2C1] +// [I2C1]$ + +// $[EUSART1] +// [EUSART1]$ + +// $[KEYSCAN] +// [KEYSCAN]$ + +// $[LETIMER0] +// [LETIMER0]$ + +// $[IADC0] +// [IADC0]$ + +// $[ACMP0] +// [ACMP0]$ + +// $[ACMP1] +// [ACMP1]$ + +// $[VDAC0] +// [VDAC0]$ + +// $[VDAC1] +// [VDAC1]$ + +// $[PCNT0] +// [PCNT0]$ + +// $[HFXO0] +// [HFXO0]$ + +// $[I2C0] +// [I2C0]$ + +// $[EUSART0] +// EUSART0 CTS on PA08 +#ifndef EUSART0_CTS_PORT +#define EUSART0_CTS_PORT SL_GPIO_PORT_A +#endif +#ifndef EUSART0_CTS_PIN +#define EUSART0_CTS_PIN 8 +#endif + +// EUSART0 RTS on PA07 +#ifndef EUSART0_RTS_PORT +#define EUSART0_RTS_PORT SL_GPIO_PORT_A +#endif +#ifndef EUSART0_RTS_PIN +#define EUSART0_RTS_PIN 7 +#endif + +// EUSART0 RX on PA06 +#ifndef EUSART0_RX_PORT +#define EUSART0_RX_PORT SL_GPIO_PORT_A +#endif +#ifndef EUSART0_RX_PIN +#define EUSART0_RX_PIN 6 +#endif + +// EUSART0 TX on PA05 +#ifndef EUSART0_TX_PORT +#define EUSART0_TX_PORT SL_GPIO_PORT_A +#endif +#ifndef EUSART0_TX_PIN +#define EUSART0_TX_PIN 5 +#endif + +// [EUSART0]$ + +// $[PTI] +// PTI DFRAME on PC05 +#ifndef PTI_DFRAME_PORT +#define PTI_DFRAME_PORT SL_GPIO_PORT_C +#endif +#ifndef PTI_DFRAME_PIN +#define PTI_DFRAME_PIN 5 +#endif + +// PTI DOUT on PC04 +#ifndef PTI_DOUT_PORT +#define PTI_DOUT_PORT SL_GPIO_PORT_C +#endif +#ifndef PTI_DOUT_PIN +#define PTI_DOUT_PIN 4 +#endif + +// [PTI]$ + +// $[MODEM] +// [MODEM]$ + +// $[CUSTOM_PIN_NAME] +#ifndef _PORT +#define _PORT SL_GPIO_PORT_A +#endif +#ifndef _PIN +#define _PIN 0 +#endif + + + + + + + + + + + + + + + + + + + + + + + + + + +// [CUSTOM_PIN_NAME]$ + + +#endif // PIN_CONFIG_H + + diff --git a/board-support/efr32/mgm24/BRD4316A/config/psa_crypto_config.h b/board-support/efr32/mgm24/BRD4316A/config/psa_crypto_config.h index 20703b41d..773ce99e0 100644 --- a/board-support/efr32/mgm24/BRD4316A/config/psa_crypto_config.h +++ b/board-support/efr32/mgm24/BRD4316A/config/psa_crypto_config.h @@ -27,26 +27,32 @@ // Default: 4 #define SL_PSA_KEY_USER_SLOT_COUNT (4) -// PSA Maximum User Persistent Keys Count <0-1024> +// Maximum User Persistent PSA Key Count <0-1024> // Maximum amount of keys (or other files) that can be stored persistently -// by the application through the PSA interface, when persistent storage -// support for PSA Crypto is included in the project. -// Due to caching logic, this setting does have an impact on static RAM usage. -// Note that this number is added to the potential requirements from other -// software components in the project, such that the total amount of keys -// which can be stored through the ITS backend can be higher than what is -// configured here. +// by the user application, when PSA ITS (Internal Trusted Storage) support +// is included in the project. +// NOTE: +// In addition to SL_PSA_ITS_USER_MAX_FILES (number of user keys) the +// application may be configured to include SDK components that require an +// additional number of keys. The sum of user keys and SDK component keys +// is computed and the result, called SL_PSA_ITS_MAX_FILES, is used +// internally in the PSA ITS driver. // -// WARNING: When changing this setting on an application that is already -// deployed, and thus will get the change through an application upgrade, -// care should be taken to ensure that the setting is only ever increased, -// and never decreased. Decreasing this setting might cause previously -// stored keys/files to become inaccessible. +// WARNING: +// For applications using PSA ITS driver version 1 or 2, when changing the +// SL_PSA_ITS_USER_MAX_FILES in an application that is already depeloyed, +// and thus will get the change through an application upgrade, care should +// be taken to ensure that the total sum of keys SL_PSA_ITS_MAX_FILES is +// only ever equal or increased, and never decreased. Decreasing this +// setting might cause previously stored keys/files to become inaccessible, +// ITS should be cleared and all files need to be stored again. // -// It is not possible to change this setting when using V3 ITS Driver. -// The file-storage indexing is dependent on the maximum number of files, -// and if SL_PSA_ITS_USER_MAX_FILES is changed, ITS should be cleared and -// all files need to be stored again. +// For applications using PSA ITS driver version 3, it is not possible to +// change this setting because the file-storage indexing is dependent on the +// maximum number of files (SL_PSA_ITS_MAX_FILES) being consistent, and if +// the sum of SDK component keys and user keys (SL_PSA_ITS_USER_MAX_FILES) +// is changed, may cause previously stored keys/files to become inaccessible +// ITS should be cleared and all files need to be stored again. // Default: 128 #define SL_PSA_ITS_USER_MAX_FILES (128) diff --git a/board-support/efr32/mgm24/BRD4316A/config/sl_bluetooth_config.h b/board-support/efr32/mgm24/BRD4316A/config/sl_bluetooth_config.h index 9b6a804e0..93bfbbcc4 100644 --- a/board-support/efr32/mgm24/BRD4316A/config/sl_bluetooth_config.h +++ b/board-support/efr32/mgm24/BRD4316A/config/sl_bluetooth_config.h @@ -99,6 +99,7 @@ // if the LE Power Control feature is enabled. // When this configuration is passed into stack initialization, the stack // will select the closest value that the device supports. +// API sl_bt_system_set_tx_power() can be used to set the minimum TX power at runtime. // API sl_bt_system_get_tx_power_setting() can be used to query the selected value. #define SL_BT_CONFIG_MIN_TX_POWER (-30) @@ -108,6 +109,7 @@ // advertising, scanning and DTM testing. // When this configuration is passed into stack initialization, the stack // will select the closest value that the device supports. +// API sl_bt_system_set_tx_power() can be used to set the maximum TX power at runtime. // API sl_bt_system_get_tx_power_setting() can be used to query the selected value. #define SL_BT_CONFIG_MAX_TX_POWER (80) diff --git a/board-support/efr32/mgm24/BRD4316A/config/sl_board_control_config.h b/board-support/efr32/mgm24/BRD4316A/config/sl_board_control_config.h index c9fe3433a..5ff059c5d 100644 --- a/board-support/efr32/mgm24/BRD4316A/config/sl_board_control_config.h +++ b/board-support/efr32/mgm24/BRD4316A/config/sl_board_control_config.h @@ -55,20 +55,32 @@ // SL_BOARD_ENABLE_VCOM // $[GPIO_SL_BOARD_ENABLE_VCOM] -#define SL_BOARD_ENABLE_VCOM_PORT SL_GPIO_PORT_B -#define SL_BOARD_ENABLE_VCOM_PIN 4 +#ifndef SL_BOARD_ENABLE_VCOM_PORT +#define SL_BOARD_ENABLE_VCOM_PORT SL_GPIO_PORT_B +#endif +#ifndef SL_BOARD_ENABLE_VCOM_PIN +#define SL_BOARD_ENABLE_VCOM_PIN 4 +#endif // [GPIO_SL_BOARD_ENABLE_VCOM]$ // SL_BOARD_ENABLE_DISPLAY // $[GPIO_SL_BOARD_ENABLE_DISPLAY] -#define SL_BOARD_ENABLE_DISPLAY_PORT SL_GPIO_PORT_D -#define SL_BOARD_ENABLE_DISPLAY_PIN 3 +#ifndef SL_BOARD_ENABLE_DISPLAY_PORT +#define SL_BOARD_ENABLE_DISPLAY_PORT SL_GPIO_PORT_D +#endif +#ifndef SL_BOARD_ENABLE_DISPLAY_PIN +#define SL_BOARD_ENABLE_DISPLAY_PIN 3 +#endif // [GPIO_SL_BOARD_ENABLE_DISPLAY]$ // SL_BOARD_ENABLE_SENSOR_RHT // $[GPIO_SL_BOARD_ENABLE_SENSOR_RHT] -#define SL_BOARD_ENABLE_SENSOR_RHT_PORT SL_GPIO_PORT_D -#define SL_BOARD_ENABLE_SENSOR_RHT_PIN 2 +#ifndef SL_BOARD_ENABLE_SENSOR_RHT_PORT +#define SL_BOARD_ENABLE_SENSOR_RHT_PORT SL_GPIO_PORT_D +#endif +#ifndef SL_BOARD_ENABLE_SENSOR_RHT_PIN +#define SL_BOARD_ENABLE_SENSOR_RHT_PIN 2 +#endif // [GPIO_SL_BOARD_ENABLE_SENSOR_RHT]$ // <<< sl:end pin_tool >>> diff --git a/board-support/efr32/mgm24/BRD4316A/config/sl_btctrl_config.h b/board-support/efr32/mgm24/BRD4316A/config/sl_btctrl_config.h index ed75a2d0e..403df1ffe 100644 --- a/board-support/efr32/mgm24/BRD4316A/config/sl_btctrl_config.h +++ b/board-support/efr32/mgm24/BRD4316A/config/sl_btctrl_config.h @@ -146,15 +146,27 @@ #define SL_BT_CONTROLLER_ADAPTIVITY_MODE (SL_BTCTRL_CHANNELMAP_FLAG_ACTIVE_ADAPTIVITY) #endif -// Power Amplifier (PA) Configuration -// Automode PA configuration -// Highest available PA configuration -// RAIL Utility component PA configuration -// Select the Power Amplifier configuration -// Default: RAIL Utility component PA configuration -#ifndef SL_BT_CONTROLLER_PA_CONFIG -#define SL_BT_CONTROLLER_PA_CONFIG SL_BT_BLUETOOTH_RAIL_UTIL_PA -#endif +// Advertising Configuration +// Include TX Power in the extended header of primary extended advertising packets +// This is default setting to all advertising sets unless it is specifically overridden by VS_SiliconLabs_Set_Advertising_Config_Bits. +// Default: 0 +// Enabling this option takes effect only if permitted by Le_Set_Extended_Advertising_Parameters +// According to Link Layer specification, Vol 6, Part B, Table 2.4 and Table 2.5: +// Optional in 1M PHY when the advertiser is connectable or scannable, or with auxiliary pointer. +// In other cases, the Extended Advertising TX Power is always optional by settings. +#define SL_BT_CONTROLLER_PRIMARY_EXT_PACKET_INCLUDE_TX_POWER (0) +// +// Include Advertiser Address in the header of primary extended advertising packets +// This is default setting to all advertising sets unless it is specifically overridden by VS_SiliconLabs_Set_Advertising_Config_Bits. +// Default: 0 +// Enabling this option takes effect only if permitted by Le_Set_Extended_Advertising_Parameters +// According to Link Layer specification, Vol 6, Part B, Table 2.4 and Table 2.5: +// Optional in 1M PHY when the advertiser is non-connectable and non-scannable, with auxiliary pointer. +// Mandatory when the advertiser is non-connectable and non-scannable, without auxiliary pointer. +// Forbidden when the advertiser is connectable or scannable. +#define SL_BT_CONTROLLER_PRIMARY_EXT_PACKET_INCLUDE_ADDRESS (0) +// +// Advertising Configuration // Bluetooth Controller Configuration // <<< end of configuration section >>> diff --git a/board-support/efr32/mgm24/BRD4316A/config/sl_clock_manager_tree_config.h b/board-support/efr32/mgm24/BRD4316A/config/sl_clock_manager_tree_config.h index 8c0be95e9..1f6f2a089 100644 --- a/board-support/efr32/mgm24/BRD4316A/config/sl_clock_manager_tree_config.h +++ b/board-support/efr32/mgm24/BRD4316A/config/sl_clock_manager_tree_config.h @@ -105,9 +105,9 @@ #endif // PCLK branch divider -// MIN // DIV1 // DIV2 +// MIN // PCLK branch is derived from HCLK. This clock drives the APB bus interface. // SL_CLOCK_MANAGER_PCLK_DIV_MIN #ifndef SL_CLOCK_MANAGER_PCLK_DIVIDER diff --git a/board-support/efr32/mgm24/BRD4316A/config/sl_mbedtls_config.h b/board-support/efr32/mgm24/BRD4316A/config/sl_mbedtls_config.h index e249b4d1b..7146ba648 100644 --- a/board-support/efr32/mgm24/BRD4316A/config/sl_mbedtls_config.h +++ b/board-support/efr32/mgm24/BRD4316A/config/sl_mbedtls_config.h @@ -71,9 +71,14 @@ // Default: 1 // This option is enabled assuming all buffers passed to any PSA function reside // in memory that is accessible only to the PSA function during its execution. +// This improves performance by avoiding extra buffer copies, reducing memory +// usage and allocation overhead. However, it is NOT the most secure option and +// should only be enabled if all buffers passed to PSA functions are exclusively +// accessible to PSA and never shared with untrusted code. // This option MUST be disabled whenever buffer arguments are in memory shared // with an untrusted party, for example where arguments to PSA calls are passed -// across a trust boundary. +// across a trust boundary, e.g. if TrustZone is enabled, and the PSA Crypto core +// is placed in the Secure domain. #define SL_MBEDTLS_PSA_ASSUME_EXCLUSIVE_BUFFERS 1 // diff --git a/board-support/efr32/mgm24/BRD4316A/config/sl_memory_manager_config.h b/board-support/efr32/mgm24/BRD4316A/config/sl_memory_manager_config.h index 26b84b107..4a16c29fe 100644 --- a/board-support/efr32/mgm24/BRD4316A/config/sl_memory_manager_config.h +++ b/board-support/efr32/mgm24/BRD4316A/config/sl_memory_manager_config.h @@ -51,4 +51,11 @@ // <<< end of configuration section >>> +// Keep this configuration outside the configuration section until the feature is ready for release. +// Enables the heap fallback mechanism. +// Setting this configuration to 0 will disable the fallback mechanism on DTCM and PSRAM. +// If this configuration is disabled, the memory manager will not attempt to use alternative memory regions for allocations even if using the fallback parameters. +// Default: 1 +#define SL_MEMORY_MANAGER_HEAP_FALLBACK_EN 1 + #endif /* SL_MEMORY_MANAGER_CONFIG_H */ diff --git a/board-support/efr32/mgm24/BRD4316A/config/sl_mx25_flash_shutdown_usart_config.h b/board-support/efr32/mgm24/BRD4316A/config/sl_mx25_flash_shutdown_usart_config.h index 5c2787e30..516faa68b 100644 --- a/board-support/efr32/mgm24/BRD4316A/config/sl_mx25_flash_shutdown_usart_config.h +++ b/board-support/efr32/mgm24/BRD4316A/config/sl_mx25_flash_shutdown_usart_config.h @@ -54,9 +54,12 @@ // SL_MX25_FLASH_SHUTDOWN_CS // $[GPIO_SL_MX25_FLASH_SHUTDOWN_CS] +#ifndef SL_MX25_FLASH_SHUTDOWN_CS_PORT #define SL_MX25_FLASH_SHUTDOWN_CS_PORT SL_GPIO_PORT_A +#endif +#ifndef SL_MX25_FLASH_SHUTDOWN_CS_PIN #define SL_MX25_FLASH_SHUTDOWN_CS_PIN 4 - +#endif // [GPIO_SL_MX25_FLASH_SHUTDOWN_CS]$ // <<< sl:end pin_tool >>> diff --git a/board-support/efr32/mgm24/BRD4316A/config/sl_openthread_features_config.h b/board-support/efr32/mgm24/BRD4316A/config/sl_openthread_features_config.h index 22340498d..a3697f8af 100644 --- a/board-support/efr32/mgm24/BRD4316A/config/sl_openthread_features_config.h +++ b/board-support/efr32/mgm24/BRD4316A/config/sl_openthread_features_config.h @@ -65,6 +65,7 @@ #define OPENTHREAD_CONFIG_MAC_CSL_RECEIVER_ENABLE 1 #endif // CSL Scheduling Uncertainty (±10 us units) <12..999:1> +// Left unchanged the value will be set to 175 for RCPs, 20 for FTDs, and 12 for MTDs #ifndef SL_OPENTHREAD_CSL_TX_UNCERTAINTY #if OPENTHREAD_RADIO #define SL_OPENTHREAD_CSL_TX_UNCERTAINTY 175 @@ -142,12 +143,10 @@ #define OPENTHREAD_CONFIG_CHANNEL_MONITOR_ENABLE 0 #endif // - -// Commissioner +// Commissioner #ifndef OPENTHREAD_CONFIG_COMMISSIONER_ENABLE #define OPENTHREAD_CONFIG_COMMISSIONER_ENABLE 0 #endif - // Max Joiner Entries // The maximum number of Joiner entries maintained by the Commissioner. // 2 @@ -155,7 +154,6 @@ #define OPENTHREAD_CONFIG_COMMISSIONER_MAX_JOINER_ENTRIES 2 #endif // - // COAP API #ifndef OPENTHREAD_CONFIG_COAP_API_ENABLE #define OPENTHREAD_CONFIG_COAP_API_ENABLE 0 @@ -171,6 +169,11 @@ #define OPENTHREAD_CONFIG_COAP_SECURE_API_ENABLE 0 #endif // +// COAP Blockwise Transfer +#ifndef OPENTHREAD_CONFIG_COAP_BLOCKWISE_TRANSFER_ENABLE +#define OPENTHREAD_CONFIG_COAP_BLOCKWISE_TRANSFER_ENABLE 0 +#endif +// // DHCP6 Client #ifndef OPENTHREAD_CONFIG_DHCP6_CLIENT_ENABLE #define OPENTHREAD_CONFIG_DHCP6_CLIENT_ENABLE 0 @@ -196,16 +199,27 @@ #define OPENTHREAD_CONFIG_IP6_FRAGMENTATION_ENABLE 0 #endif // -// Maximum number of IPv6 unicast addresses allowed to be externally added +// IPv6 Limits +// Maximum IPv6 external unicast addresses +// Maximum number of IPv6 unicast addresses allowed to be externally added +// 4 #ifndef OPENTHREAD_CONFIG_IP6_MAX_EXT_UCAST_ADDRS #define OPENTHREAD_CONFIG_IP6_MAX_EXT_UCAST_ADDRS 4 #endif -// -// Maximum number of IPv6 multicast addresses allowed to be externally added +// Maximum IPv6 external multicast addresses +// Maximum number of IPv6 multicast addresses allowed to be externally added +// 4 #ifndef OPENTHREAD_CONFIG_IP6_MAX_EXT_MCAST_ADDRS #define OPENTHREAD_CONFIG_IP6_MAX_EXT_MCAST_ADDRS 4 #endif -// +// Maximum IPv6 address registrations for MTD +// The maximum number of IPv6 address registrations for MTD. +// If left unchanged will default to the value of OPENTHREAD_CONFIG_MLE_IP_ADDRS_PER_CHILD +// 4 +#ifndef OPENTHREAD_CONFIG_MLE_IP_ADDRS_TO_REGISTER +#define OPENTHREAD_CONFIG_MLE_IP_ADDRS_TO_REGISTER (OPENTHREAD_CONFIG_MLE_IP_ADDRS_PER_CHILD) +#endif +// // Jam Detection #ifndef OPENTHREAD_CONFIG_JAM_DETECTION_ENABLE #define OPENTHREAD_CONFIG_JAM_DETECTION_ENABLE 0 @@ -226,6 +240,14 @@ #define OPENTHREAD_CONFIG_MAC_FILTER_ENABLE 0 #endif // +// MLE Children +// Maximum number of Thread children supported by the device +// Default is 10. Used by the Thread stack to configure the size of child table. +// 10 +#ifndef OPENTHREAD_CONFIG_MLE_MAX_CHILDREN +#define OPENTHREAD_CONFIG_MLE_MAX_CHILDREN 10 +#endif +// // MLE Long Routes extension (experimental) #ifndef OPENTHREAD_CONFIG_MLE_LONG_ROUTES_ENABLE #define OPENTHREAD_CONFIG_MLE_LONG_ROUTES_ENABLE 0 @@ -235,27 +257,66 @@ #ifndef OPENTHREAD_CONFIG_MULTIPAN_RCP_ENABLE #define OPENTHREAD_CONFIG_MULTIPAN_RCP_ENABLE 0 #endif +// Broadcast IID for spinel frames +// Define broadcast IID for spinel frames dedicated to all hosts in multipan configuration +// 0 +#ifndef OPENTHREAD_SPINEL_CONFIG_BROADCAST_IID +#define OPENTHREAD_SPINEL_CONFIG_BROADCAST_IID 0 +#endif +#if OPENTHREAD_CONFIG_MULTIPAN_RCP_ENABLE +// Maximum number of Zigbee children for multiprotocol (DMP) builds +// Ensures correct table sizing for Zigbee when DMP/multipan is enabled. +// 6 +#ifndef SL_ZIGBEE_MAX_END_DEVICE_CHILDREN +#define SL_ZIGBEE_MAX_END_DEVICE_CHILDREN 6 +#endif +#endif // // Multiple OpenThread Instances #ifndef OPENTHREAD_CONFIG_MULTIPLE_INSTANCE_ENABLE #define OPENTHREAD_CONFIG_MULTIPLE_INSTANCE_ENABLE 0 #endif -// // Multiple Static Instance Support #ifndef OPENTHREAD_CONFIG_MULTIPLE_STATIC_INSTANCE_ENABLE #define OPENTHREAD_CONFIG_MULTIPLE_STATIC_INSTANCE_ENABLE 0 #endif -// -// Number of OpenThread Instances For Static Buffer Allocation +// Number of OpenThread Instances +// Default is 2. Number of OpenThread Instances For Static Buffer Allocation. +// 2 #ifndef OPENTHREAD_CONFIG_MULTIPLE_INSTANCE_NUM #define OPENTHREAD_CONFIG_MULTIPLE_INSTANCE_NUM 2 #endif // -// Define broadcast IID for spinel frames dedicated to all hosts in multipan configuration -#ifndef OPENTHREAD_SPINEL_CONFIG_BROADCAST_IID -#define OPENTHREAD_SPINEL_CONFIG_BROADCAST_IID 0 -#endif // +// Define maximum total source match table entries for both OT and Zigbee. +// In multi-instance builds (SoC or RCP/host), table must support all OT instances + Zigbee. +// For single instance (default), table sized to just OT children. +// This value is used to size all source match tables in both OT and Zigbee code. +// Note: this is purposedly not being setup with CMSIS annotations. +#ifndef RADIO_CONFIG_MAX_SRC_MATCH_ENTRIES +#if OPENTHREAD_CONFIG_MULTIPLE_INSTANCE_ENABLE +#if SL_ZIGBEE_MAX_END_DEVICE_CHILDREN +// Multipan / DMP case: OT + Zigbee +#define RADIO_CONFIG_MAX_SRC_MATCH_ENTRIES \ + ((OPENTHREAD_CONFIG_MLE_MAX_CHILDREN * (OPENTHREAD_CONFIG_MULTIPLE_INSTANCE_NUM - 1)) \ + + SL_ZIGBEE_MAX_END_DEVICE_CHILDREN) +#else +// Multi-instance OT-only case +#define RADIO_CONFIG_MAX_SRC_MATCH_ENTRIES \ + (OPENTHREAD_CONFIG_MLE_MAX_CHILDREN * OPENTHREAD_CONFIG_MULTIPLE_INSTANCE_NUM) +#endif +#else +// Single-instance OT (SoC / NCP / non-multipan RCP) +#define RADIO_CONFIG_MAX_SRC_MATCH_ENTRIES OPENTHREAD_CONFIG_MLE_MAX_CHILDREN +#endif +#endif +// Spinel Match Table +// Maximum number of spinel source match table entries +// Ensure that this value is the total of the number of openthread children times the number of openthread instances plus the number of Zigbee children. +#ifndef OPENTHREAD_SPINEL_CONFIG_MAX_SRC_MATCH_ENTRIES +#define OPENTHREAD_SPINEL_CONFIG_MAX_SRC_MATCH_ENTRIES RADIO_CONFIG_MAX_SRC_MATCH_ENTRIES +#endif +// // OTNS (OpenThread Network Simulator) #ifndef OPENTHREAD_CONFIG_OTNS_ENABLE #define OPENTHREAD_CONFIG_OTNS_ENABLE 0 @@ -265,13 +326,23 @@ #ifndef OPENTHREAD_CONFIG_PING_SENDER_ENABLE #define OPENTHREAD_CONFIG_PING_SENDER_ENABLE 1 #endif - // // Power Calibration Module (RCP only configuration) #ifndef OPENTHREAD_CONFIG_POWER_CALIBRATION_ENABLE #define OPENTHREAD_CONFIG_POWER_CALIBRATION_ENABLE 0 #endif - +// Maximum raw power calibration length +// Max raw power calibration length +// 4 +#ifndef SL_OPENTHREAD_RAW_POWER_CALIBRATION_LENGTH +#define SL_OPENTHREAD_RAW_POWER_CALIBRATION_LENGTH 4 +#endif +// Maximum FEM config setting length +// Max FEM config setting length +// 4 +#ifndef SL_OPENTHREAD_FEM_SETTING_LENGTH +#define SL_OPENTHREAD_FEM_SETTING_LENGTH 4 +#endif // // Platform UDP #ifndef OPENTHREAD_CONFIG_PLATFORM_UDP_ENABLE @@ -309,7 +380,14 @@ #endif // // Time Synchronization Service +#ifndef OPENTHREAD_CONFIG_TIME_SYNC_ENABLE #define OPENTHREAD_CONFIG_TIME_SYNC_ENABLE 0 +#endif +// +// Uptime of OpenThread instance +#ifndef OPENTHREAD_CONFIG_UPTIME_ENABLE +#define OPENTHREAD_CONFIG_UPTIME_ENABLE 1 +#endif // // UDP Forward #ifndef OPENTHREAD_CONFIG_UDP_FORWARD_ENABLE @@ -321,28 +399,22 @@ #define OPENTHREAD_CONFIG_MAC_BEACON_PAYLOAD_PARSING_ENABLE 1 #endif // -// Max raw power calibration length. -#ifndef SL_OPENTHREAD_RAW_POWER_CALIBRATION_LENGTH -#define SL_OPENTHREAD_RAW_POWER_CALIBRATION_LENGTH 4 -#endif -// -// Max FEM config setting length. -#ifndef SL_OPENTHREAD_FEM_SETTING_LENGTH -#define SL_OPENTHREAD_FEM_SETTING_LENGTH 4 -#endif -// -// The maximum number of RX buffers to use in the radio driver. -// 16 +// Radio Driver RX buffers +// Maximum number of RX buffers +// The maximum number of RX buffers to use in the radio driver. +// 16 #ifndef SL_OPENTHREAD_RADIO_RX_BUFFER_COUNT #define SL_OPENTHREAD_RADIO_RX_BUFFER_COUNT 16 #endif // +// // Logging // LOG_OUTPUT // NONE // APP // PLATFORM_DEFINED -// Default: OPENTHREAD_CONFIG_LOG_OUTPUT_PLATFORM_DEFINED +// Default: OPENTHREAD_CONFIG_LOG_OUTPUT_APP +// OPENTHREAD_CONFIG_LOG_OUTPUT_APP #ifndef OPENTHREAD_CONFIG_LOG_OUTPUT #define OPENTHREAD_CONFIG_LOG_OUTPUT OPENTHREAD_CONFIG_LOG_OUTPUT_APP #endif @@ -365,6 +437,7 @@ // INFO // DEBG // Default: OT_LOG_LEVEL_DEBG +// OT_LOG_LEVEL_DEBG #ifndef OPENTHREAD_CONFIG_LOG_LEVEL #define OPENTHREAD_CONFIG_LOG_LEVEL OT_LOG_LEVEL_DEBG #endif @@ -387,11 +460,10 @@ #endif // OPENTHREAD_FULL_LOGS_ENABLE -// Log crash dump after initialization +// Log crash dump after initialization #ifndef OPENTHREAD_CONFIG_PLATFORM_LOG_CRASH_DUMP_ENABLE #define OPENTHREAD_CONFIG_PLATFORM_LOG_CRASH_DUMP_ENABLE 0 #endif -// // // diff --git a/board-support/efr32/mgm24/BRD4316A/config/sl_power_manager_config.h b/board-support/efr32/mgm24/BRD4316A/config/sl_power_manager_config.h index 3c240b843..86b9fef27 100644 --- a/board-support/efr32/mgm24/BRD4316A/config/sl_power_manager_config.h +++ b/board-support/efr32/mgm24/BRD4316A/config/sl_power_manager_config.h @@ -37,24 +37,40 @@ // Enable custom IRQ handler for external HF oscillator. // Enable if CMU_IRQHandler/HFXO0_IRQHandler is needed from your application. -// The function sl_power_manager_irq_handler() will have to be called from you custom handler if this is enabled. +// The function sl_power_manager_irq_handler() will have to be called from your custom handler if this is enabled. // Default: 0 +#ifndef SL_POWER_MANAGER_CUSTOM_HF_OSCILLATOR_IRQ_HANDLER #define SL_POWER_MANAGER_CUSTOM_HF_OSCILLATOR_IRQ_HANDLER 0 +#endif // Enable fast wakeup (disable voltage scaling in EM2/3 mode) // Enable or disable voltage scaling in EM2/3 modes (when available). This decreases wakeup time by about 30 us. // Deprecated. It is replaced by the function sl_power_manager_em23_voltage_scaling_enable_fast_wakeup() // Default: 0 +#ifndef SL_POWER_MANAGER_CONFIG_VOLTAGE_SCALING_FAST_WAKEUP #define SL_POWER_MANAGER_CONFIG_VOLTAGE_SCALING_FAST_WAKEUP 0 +#endif + +// Enable voltage scaling in EM0 and EM1 mode. +// Enable or disable voltage scaling in EM0/1 modes. With this config enabled, the voltage +// scaling will be configured at the lowest possible level based on the system clock. +// Default: 0 +#ifndef SL_POWER_MANAGER_ENABLE_EM01_VOLTAGE_SCALING +#define SL_POWER_MANAGER_ENABLE_EM01_VOLTAGE_SCALING 0 +#endif // Enable debugging feature // Enable or disable debugging features (trace the different modules that have requirements). // Default: 0 +#ifndef SL_POWER_MANAGER_DEBUG #define SL_POWER_MANAGER_DEBUG 0 +#endif // Maximum numbers of requirements that can be logged // Default: 10 +#ifndef SL_POWER_MANAGER_DEBUG_POOL_SIZE #define SL_POWER_MANAGER_DEBUG_POOL_SIZE 10 +#endif // // Pin retention mode @@ -63,14 +79,18 @@ // Retention through EM4 // Retention through EM4 and wakeup // power_manager_pin_retention_disable +#ifndef SL_POWER_MANAGER_INIT_EMU_EM4_PIN_RETENTION_MODE #define SL_POWER_MANAGER_INIT_EMU_EM4_PIN_RETENTION_MODE EMU_EM4CTRL_EM4IORETMODE_DISABLE +#endif // Enable EM2 debugging feature // Enable or disable debugging features. // Force PD0B/PD0D to stay on during EM2 entry. This allows the debugger to remain connected in EM2 and EM3. // Enabling debug connectivity results in an increased power consumption in EM2/EM3. // Default: 1 +#ifndef SL_POWER_MANAGER_INIT_EMU_EM2_DEBUG_ENABLE #define SL_POWER_MANAGER_INIT_EMU_EM2_DEBUG_ENABLE 1 +#endif // // diff --git a/board-support/efr32/mgm24/BRD4316A/config/sl_rail_util_pti_config.h b/board-support/efr32/mgm24/BRD4316A/config/sl_rail_util_pti_config.h index d222a67fd..3a97fc327 100644 --- a/board-support/efr32/mgm24/BRD4316A/config/sl_rail_util_pti_config.h +++ b/board-support/efr32/mgm24/BRD4316A/config/sl_rail_util_pti_config.h @@ -35,12 +35,12 @@ // PTI Configuration // PTI mode -// UART -// UART onewire -// SPI -// Disabled -// Default: RAIL_PTI_MODE_UART -#define SL_RAIL_UTIL_PTI_MODE RAIL_PTI_MODE_UART +// UART +// UART onewire +// SPI +// Disabled +// Default: SL_RAIL_PTI_MODE_UART +#define SL_RAIL_UTIL_PTI_MODE SL_RAIL_PTI_MODE_UART // PTI Baud Rate (Hertz) // <147800-20000000:1> diff --git a/board-support/efr32/mgm24/BRD4316A/config/sl_simple_button_btn0_config.h b/board-support/efr32/mgm24/BRD4316A/config/sl_simple_button_btn0_config.h index 55e41f343..1d0774215 100644 --- a/board-support/efr32/mgm24/BRD4316A/config/sl_simple_button_btn0_config.h +++ b/board-support/efr32/mgm24/BRD4316A/config/sl_simple_button_btn0_config.h @@ -48,9 +48,12 @@ // SL_SIMPLE_BUTTON_BTN0 // $[GPIO_SL_SIMPLE_BUTTON_BTN0] +#ifndef SL_SIMPLE_BUTTON_BTN0_PORT #define SL_SIMPLE_BUTTON_BTN0_PORT SL_GPIO_PORT_B +#endif +#ifndef SL_SIMPLE_BUTTON_BTN0_PIN #define SL_SIMPLE_BUTTON_BTN0_PIN 0 - +#endif // [GPIO_SL_SIMPLE_BUTTON_BTN0]$ // <<< sl:end pin_tool >>> diff --git a/board-support/efr32/mgm24/BRD4316A/config/sl_simple_button_btn1_config.h b/board-support/efr32/mgm24/BRD4316A/config/sl_simple_button_btn1_config.h index a34574c2e..1cfbd898e 100644 --- a/board-support/efr32/mgm24/BRD4316A/config/sl_simple_button_btn1_config.h +++ b/board-support/efr32/mgm24/BRD4316A/config/sl_simple_button_btn1_config.h @@ -48,9 +48,12 @@ // SL_SIMPLE_BUTTON_BTN1 // $[GPIO_SL_SIMPLE_BUTTON_BTN1] +#ifndef SL_SIMPLE_BUTTON_BTN1_PORT #define SL_SIMPLE_BUTTON_BTN1_PORT SL_GPIO_PORT_B +#endif +#ifndef SL_SIMPLE_BUTTON_BTN1_PIN #define SL_SIMPLE_BUTTON_BTN1_PIN 1 - +#endif // [GPIO_SL_SIMPLE_BUTTON_BTN1]$ // <<< sl:end pin_tool >>> diff --git a/board-support/efr32/mgm24/BRD4317A/autogen/sl_bluetooth.c b/board-support/efr32/mgm24/BRD4317A/autogen/sl_bluetooth.c index 4cac19436..0a5f1a969 100644 --- a/board-support/efr32/mgm24/BRD4317A/autogen/sl_bluetooth.c +++ b/board-support/efr32/mgm24/BRD4317A/autogen/sl_bluetooth.c @@ -30,6 +30,8 @@ #include #include "sl_bluetooth.h" +#include "sli_bt_api.h" +#include "sli_bgapi.h" #include "sl_assert.h" #include "sl_bt_stack_init.h" #include "sl_component_catalog.h" @@ -68,17 +70,23 @@ void sl_bt_step(void) { sl_bt_msg_t evt; + // Run the Bluetooth host stack processing step sl_bt_run(); - uint32_t event_len = sl_bt_event_pending_len(); - // For preventing from data loss, the event will be kept in the stack's queue - // if application cannot process it at the moment. + + // Check the length of the next event, if any, and verify that the application + // can process it. To prevent data loss, the event will be kept in the stack's + // queue if the application cannot process it at the moment. + size_t event_len = sli_bgapi_device_peek_event_len(&sli_bt_bgapi_device); if ((event_len == 0) || (!sl_bt_can_process_event(event_len))) { return; } - // Pop (non-blocking) a Bluetooth stack event from event queue. - sl_status_t status = sl_bt_pop_event(&evt); - if(status != SL_STATUS_OK){ + // Pop the event and process it if successful + sl_status_t status = sli_bgapi_device_pop_event(&sli_bt_bgapi_device, + sizeof(evt), + &evt); + + if (status != SL_STATUS_OK) { return; } sl_bt_process_event(&evt); diff --git a/board-support/efr32/mgm24/BRD4317A/autogen/sl_component_catalog.h b/board-support/efr32/mgm24/BRD4317A/autogen/sl_component_catalog.h index c3f2a0ebd..7fec96be4 100644 --- a/board-support/efr32/mgm24/BRD4317A/autogen/sl_component_catalog.h +++ b/board-support/efr32/mgm24/BRD4317A/autogen/sl_component_catalog.h @@ -3,6 +3,7 @@ // APIs present in project #define SL_CATALOG_BGAPI_PROTOCOL_PRESENT +#define SL_CATALOG_BGAPI_PROTOCOL_RTOS_ADAPTATION_PRESENT #define SL_CATALOG_BLUETOOTH_CONFIGURATION_PRESENT #define SL_CATALOG_BLUETOOTH_CTE_SUPPORT_PRESENT #define SL_CATALOG_BLUETOOTH_CS_SUPPORT_PRESENT @@ -24,7 +25,6 @@ #define SL_CATALOG_CMSIS_OS_COMMON_PRESENT #define SL_CATALOG_CPP_SUPPORT_PRESENT #define SL_CATALOG_DEVICE_INIT_PRESENT -#define SL_CATALOG_DEVICE_INIT_CORE_PRESENT #define SL_CATALOG_DEVICE_INIT_DCDC_PRESENT #define SL_CATALOG_EMLIB_CORE_PRESENT #define SL_CATALOG_EMLIB_RMU_PRESENT @@ -33,16 +33,17 @@ #define SL_CATALOG_GATT_CONFIGURATION_PRESENT #define SL_CATALOG_GPIO_PRESENT #define SL_CATALOG_GPIOINTERRUPT_PRESENT +#define SL_CATALOG_HAL_SYSTEM_PRESENT #define SL_CATALOG_HFXO_MANAGER_PRESENT #define SL_CATALOG_INTERRUPT_MANAGER_PRESENT #define SL_CATALOG_IOSTREAM_PRESENT -#define SL_CATALOG_MEMORY_MANAGER_PRESENT -#define SL_CATALOG_MEMORY_PROFILER_API_PRESENT -#define SL_CATALOG_MPU_PRESENT #ifdef DISPLAY_ENABLED -#define SL_CATALOG_DMD_MEMLCD_PRESENT #define SL_CATALOG_MEMLCD_USART_PRESENT +#define SL_CATALOG_DMD_MEMLCD_PRESENT #endif +#define SL_CATALOG_MEMORY_MANAGER_PRESENT +#define SL_CATALOG_MEMORY_PROFILER_API_PRESENT +#define SL_CATALOG_MPU_PRESENT #ifdef CONFIG_USE_EXTERNAL_FLASH #define SL_CATALOG_MX25_FLASH_SHUTDOWN_USART_PRESENT #endif // CONFIG_USE_EXTERNAL_FLASH @@ -51,13 +52,12 @@ #define SL_CATALOG_OPENTHREAD_CLI_PRESENT #define SL_CATALOG_OT_GP_INTERFACE_PRESENT #define SL_CATALOG_OPENTHREAD_STACK_PRESENT -#define SL_CATALOG_OPENTHREAD_UART_PRESENT #define SL_CATALOG_POWER_MANAGER_PRESENT +#define SL_CATALOG_POWER_MANAGER_DEEPSLEEP_PRESENT #define SL_CATALOG_PSA_CRYPTO_PRESENT #define SL_CATALOG_RADIO_PRIORITY_15_4_PRESENT #define SL_CATALOG_RAIL_LIB_PRESENT #define SL_CATALOG_RAIL_UTIL_PTI_PRESENT -#define SL_CATALOG_SE_MANAGER_PRESENT #define SL_CATALOG_SECURITY_MANAGER_PRESENT #define SL_CATALOG_SEGGER_RTT_PRESENT #define SL_CATALOG_BTN0_PRESENT diff --git a/board-support/efr32/mgm24/BRD4317A/autogen/sl_event_handler.c b/board-support/efr32/mgm24/BRD4317A/autogen/sl_event_handler.c index 3a7d5006f..4fe288a4e 100644 --- a/board-support/efr32/mgm24/BRD4317A/autogen/sl_event_handler.c +++ b/board-support/efr32/mgm24/BRD4317A/autogen/sl_event_handler.c @@ -3,7 +3,11 @@ #include "sl_board_init.h" #include "sl_clock_manager.h" #include "sl_hfxo_manager.h" -#include "pa_conversions_efr32.h" +#include "sl_rail_util_compatible_pa.h" +#if !(defined(SLI_SI91X_ENABLE_BLE) && SLI_SI91X_ENABLE_BLE) +#include "sl_bluetooth.h" +#include "sl_rail_util_power_manager_init.h" +#endif // !SLI_SI91X_ENABLE_BLE #include "sl_rail_util_power_manager_init.h" #include "sl_rail_util_pti.h" #include "sl_rail_util_rssi.h" @@ -13,6 +17,7 @@ #include "platform-efr32.h" #include "sl_bt_rtos_adaptation.h" #include "sl_bluetooth.h" +#include "sl_debug_swo.h" #include "sl_gpio.h" #include "gpiointerrupt.h" #if defined(SL_MATTER_USE_SI70XX_SENSOR) && SL_MATTER_USE_SI70XX_SENSOR @@ -22,7 +27,15 @@ #include "sl_mbedtls.h" #include "sl_ot_rtos_adaptation.h" #include "sl_simple_button_instances.h" + +#if (defined(SL_MATTER_RGB_LED_ENABLED) && SL_MATTER_RGB_LED_ENABLED == 1) +#include "sl_simple_rgb_pwm_led_instances.h" +#else +#include "sl_simple_led_instances.h" +#endif //(SL_MATTER_RGB_LED_ENABLED) && SL_MATTER_RGB_LED_ENABLED == 1) +#if defined(CONFIG_ENABLE_UART) #include "sl_uartdrv_instances.h" +#endif // CONFIG_ENABLE_UART #include "psa/crypto.h" #include "sl_se_manager.h" #include "sli_protocol_crypto.h" @@ -30,6 +43,7 @@ #include "sl_iostream_init_instances.h" #include "cmsis_os2.h" #include "nvm3_default.h" + #include "sl_iostream_handles.h" void sli_driver_permanent_allocation(void) @@ -78,7 +92,12 @@ void sl_driver_init(void) sl_i2cspm_init_instances(); #endif // defined(SL_MATTER_USE_SI70XX_SENSOR) && SL_MATTER_USE_SI70XX_SENSOR sl_simple_button_init_instances(); -#if defined(CONFIG_ENABLE_UART) +#if (defined(SL_MATTER_RGB_LED_ENABLED) && SL_MATTER_RGB_LED_ENABLED == 1) + sl_simple_rgb_pwm_led_init_instances(); +#else + sl_simple_led_init_instances(); +#endif //(SL_MATTER_RGB_LED_ENABLED) && SL_MATTER_RGB_LED_ENABLED == 1) + #if defined(CONFIG_ENABLE_UART) sl_uartdrv_init_instances(); #endif // CONFIG_ENABLE_UART } @@ -99,19 +118,25 @@ void sl_service_init(void) void sl_stack_init(void) { +#if !SLI_SI91X_ENABLE_BLE sl_rail_util_pa_init(); sl_rail_util_power_manager_init(); sl_rail_util_pti_init(); sl_rail_util_rssi_init(); sl_fem_util_init(); - sl_ot_sys_init(); sli_bt_stack_functional_init(); +#endif // !SLI_SI91X_ENABLE_BLE +#ifdef SL_OT_ENABLE + sl_ot_sys_init(); +#endif // SL_OT_ENABLE } void sl_internal_app_init(void) { +#ifdef SL_OT_ENABLE sl_ot_rtos_stack_init(); sl_ot_rtos_app_init(); +#endif // SL_OT_ENABLE } void sl_iostream_init_instances_stage_1(void) @@ -123,4 +148,3 @@ void sl_iostream_init_instances_stage_2(void) { sl_iostream_set_console_instance(); } - diff --git a/board-support/efr32/mgm24/BRD4317A/autogen/sli_psa_config_autogen.h b/board-support/efr32/mgm24/BRD4317A/autogen/sli_psa_config_autogen.h index 055d8a95e..f90dd6e9a 100644 --- a/board-support/efr32/mgm24/BRD4317A/autogen/sli_psa_config_autogen.h +++ b/board-support/efr32/mgm24/BRD4317A/autogen/sli_psa_config_autogen.h @@ -24,7 +24,12 @@ #define PSA_WANT_ALG_TLS12_PSK_TO_MS 1 #define MBEDTLS_PSA_CRYPTO_EXTERNAL_RNG +#if defined(KSU_MAX_KEY_SLOTS) +#include "sli_ksu_keyslots_config.h" +#define MBEDTLS_PSA_KEY_SLOT_COUNT (22 + 15 + 1 + SL_PSA_KEY_USER_SLOT_COUNT + SLI_KSU_MAX_KEY_SLOTS - SLI_KSU_KEY_SLOT_USER_START + 1) +#else #define MBEDTLS_PSA_KEY_SLOT_COUNT (22 + 15 + 1 + SL_PSA_KEY_USER_SLOT_COUNT + 1) +#endif #ifndef SL_PSA_ITS_MAX_FILES #define SL_PSA_ITS_MAX_FILES (1 + SL_PSA_ITS_USER_MAX_FILES) #endif diff --git a/board-support/efr32/mgm24/BRD4317A/config/pin_config.h b/board-support/efr32/mgm24/BRD4317A/config/pin_config.h new file mode 100644 index 000000000..e77227f13 --- /dev/null +++ b/board-support/efr32/mgm24/BRD4317A/config/pin_config.h @@ -0,0 +1,238 @@ +#ifndef PIN_CONFIG_H +#define PIN_CONFIG_H + +// $[CMU] +// [CMU]$ + +// $[LFXO] +// [LFXO]$ + +// $[PRS.ASYNCH0] +// [PRS.ASYNCH0]$ + +// $[PRS.ASYNCH1] +// [PRS.ASYNCH1]$ + +// $[PRS.ASYNCH2] +// [PRS.ASYNCH2]$ + +// $[PRS.ASYNCH3] +// [PRS.ASYNCH3]$ + +// $[PRS.ASYNCH4] +// [PRS.ASYNCH4]$ + +// $[PRS.ASYNCH5] +// [PRS.ASYNCH5]$ + +// $[PRS.ASYNCH6] +// [PRS.ASYNCH6]$ + +// $[PRS.ASYNCH7] +// [PRS.ASYNCH7]$ + +// $[PRS.ASYNCH8] +// [PRS.ASYNCH8]$ + +// $[PRS.ASYNCH9] +// [PRS.ASYNCH9]$ + +// $[PRS.ASYNCH10] +// [PRS.ASYNCH10]$ + +// $[PRS.ASYNCH11] +// [PRS.ASYNCH11]$ + +// $[PRS.ASYNCH12] +// [PRS.ASYNCH12]$ + +// $[PRS.ASYNCH13] +// [PRS.ASYNCH13]$ + +// $[PRS.ASYNCH14] +// [PRS.ASYNCH14]$ + +// $[PRS.ASYNCH15] +// [PRS.ASYNCH15]$ + +// $[PRS.SYNCH0] +// [PRS.SYNCH0]$ + +// $[PRS.SYNCH1] +// [PRS.SYNCH1]$ + +// $[PRS.SYNCH2] +// [PRS.SYNCH2]$ + +// $[PRS.SYNCH3] +// [PRS.SYNCH3]$ + +// $[GPIO] +// GPIO SWV on PA03 +#ifndef GPIO_SWV_PORT +#define GPIO_SWV_PORT SL_GPIO_PORT_A +#endif +#ifndef GPIO_SWV_PIN +#define GPIO_SWV_PIN 3 +#endif + +// [GPIO]$ + +// $[TIMER0] +// [TIMER0]$ + +// $[TIMER1] +// [TIMER1]$ + +// $[TIMER2] +// [TIMER2]$ + +// $[TIMER3] +// [TIMER3]$ + +// $[TIMER4] +// [TIMER4]$ + +// $[USART0] +// USART0 CLK on PC02 +#ifndef USART0_CLK_PORT +#define USART0_CLK_PORT SL_GPIO_PORT_C +#endif +#ifndef USART0_CLK_PIN +#define USART0_CLK_PIN 2 +#endif + +// USART0 TX on PC00 +#ifndef USART0_TX_PORT +#define USART0_TX_PORT SL_GPIO_PORT_C +#endif +#ifndef USART0_TX_PIN +#define USART0_TX_PIN 0 +#endif + +// [USART0]$ + +// $[I2C1] +// [I2C1]$ + +// $[EUSART1] +// [EUSART1]$ + +// $[KEYSCAN] +// [KEYSCAN]$ + +// $[LETIMER0] +// [LETIMER0]$ + +// $[IADC0] +// [IADC0]$ + +// $[ACMP0] +// [ACMP0]$ + +// $[ACMP1] +// [ACMP1]$ + +// $[VDAC0] +// [VDAC0]$ + +// $[VDAC1] +// [VDAC1]$ + +// $[PCNT0] +// [PCNT0]$ + +// $[HFXO0] +// [HFXO0]$ + +// $[I2C0] +// I2C0 SCL on PB02 +#ifndef I2C0_SCL_PORT +#define I2C0_SCL_PORT SL_GPIO_PORT_B +#endif +#ifndef I2C0_SCL_PIN +#define I2C0_SCL_PIN 2 +#endif + +// I2C0 SDA on PB03 +#ifndef I2C0_SDA_PORT +#define I2C0_SDA_PORT SL_GPIO_PORT_B +#endif +#ifndef I2C0_SDA_PIN +#define I2C0_SDA_PIN 3 +#endif + +// [I2C0]$ + +// $[EUSART0] +// EUSART0 CTS on PA08 +#ifndef EUSART0_CTS_PORT +#define EUSART0_CTS_PORT SL_GPIO_PORT_A +#endif +#ifndef EUSART0_CTS_PIN +#define EUSART0_CTS_PIN 8 +#endif + +// EUSART0 RX on PA06 +#ifndef EUSART0_RX_PORT +#define EUSART0_RX_PORT SL_GPIO_PORT_A +#endif +#ifndef EUSART0_RX_PIN +#define EUSART0_RX_PIN 6 +#endif + +// EUSART0 TX on PA05 +#ifndef EUSART0_TX_PORT +#define EUSART0_TX_PORT SL_GPIO_PORT_A +#endif +#ifndef EUSART0_TX_PIN +#define EUSART0_TX_PIN 5 +#endif + +// [EUSART0]$ + +// $[PTI] +// [PTI]$ + +// $[MODEM] +// [MODEM]$ + +// $[CUSTOM_PIN_NAME] +#ifndef _PORT +#define _PORT SL_GPIO_PORT_A +#endif +#ifndef _PIN +#define _PIN 0 +#endif + + + + + + + + + + + + + + + + + + + + + + + + + + +// [CUSTOM_PIN_NAME]$ + + +#endif // PIN_CONFIG_H + + diff --git a/board-support/efr32/mgm24/BRD4317A/config/psa_crypto_config.h b/board-support/efr32/mgm24/BRD4317A/config/psa_crypto_config.h index 20703b41d..773ce99e0 100644 --- a/board-support/efr32/mgm24/BRD4317A/config/psa_crypto_config.h +++ b/board-support/efr32/mgm24/BRD4317A/config/psa_crypto_config.h @@ -27,26 +27,32 @@ // Default: 4 #define SL_PSA_KEY_USER_SLOT_COUNT (4) -// PSA Maximum User Persistent Keys Count <0-1024> +// Maximum User Persistent PSA Key Count <0-1024> // Maximum amount of keys (or other files) that can be stored persistently -// by the application through the PSA interface, when persistent storage -// support for PSA Crypto is included in the project. -// Due to caching logic, this setting does have an impact on static RAM usage. -// Note that this number is added to the potential requirements from other -// software components in the project, such that the total amount of keys -// which can be stored through the ITS backend can be higher than what is -// configured here. +// by the user application, when PSA ITS (Internal Trusted Storage) support +// is included in the project. +// NOTE: +// In addition to SL_PSA_ITS_USER_MAX_FILES (number of user keys) the +// application may be configured to include SDK components that require an +// additional number of keys. The sum of user keys and SDK component keys +// is computed and the result, called SL_PSA_ITS_MAX_FILES, is used +// internally in the PSA ITS driver. // -// WARNING: When changing this setting on an application that is already -// deployed, and thus will get the change through an application upgrade, -// care should be taken to ensure that the setting is only ever increased, -// and never decreased. Decreasing this setting might cause previously -// stored keys/files to become inaccessible. +// WARNING: +// For applications using PSA ITS driver version 1 or 2, when changing the +// SL_PSA_ITS_USER_MAX_FILES in an application that is already depeloyed, +// and thus will get the change through an application upgrade, care should +// be taken to ensure that the total sum of keys SL_PSA_ITS_MAX_FILES is +// only ever equal or increased, and never decreased. Decreasing this +// setting might cause previously stored keys/files to become inaccessible, +// ITS should be cleared and all files need to be stored again. // -// It is not possible to change this setting when using V3 ITS Driver. -// The file-storage indexing is dependent on the maximum number of files, -// and if SL_PSA_ITS_USER_MAX_FILES is changed, ITS should be cleared and -// all files need to be stored again. +// For applications using PSA ITS driver version 3, it is not possible to +// change this setting because the file-storage indexing is dependent on the +// maximum number of files (SL_PSA_ITS_MAX_FILES) being consistent, and if +// the sum of SDK component keys and user keys (SL_PSA_ITS_USER_MAX_FILES) +// is changed, may cause previously stored keys/files to become inaccessible +// ITS should be cleared and all files need to be stored again. // Default: 128 #define SL_PSA_ITS_USER_MAX_FILES (128) diff --git a/board-support/efr32/mgm24/BRD4317A/config/sl_bluetooth_config.h b/board-support/efr32/mgm24/BRD4317A/config/sl_bluetooth_config.h index 9b6a804e0..93bfbbcc4 100644 --- a/board-support/efr32/mgm24/BRD4317A/config/sl_bluetooth_config.h +++ b/board-support/efr32/mgm24/BRD4317A/config/sl_bluetooth_config.h @@ -99,6 +99,7 @@ // if the LE Power Control feature is enabled. // When this configuration is passed into stack initialization, the stack // will select the closest value that the device supports. +// API sl_bt_system_set_tx_power() can be used to set the minimum TX power at runtime. // API sl_bt_system_get_tx_power_setting() can be used to query the selected value. #define SL_BT_CONFIG_MIN_TX_POWER (-30) @@ -108,6 +109,7 @@ // advertising, scanning and DTM testing. // When this configuration is passed into stack initialization, the stack // will select the closest value that the device supports. +// API sl_bt_system_set_tx_power() can be used to set the maximum TX power at runtime. // API sl_bt_system_get_tx_power_setting() can be used to query the selected value. #define SL_BT_CONFIG_MAX_TX_POWER (80) diff --git a/board-support/efr32/mgm24/BRD4317A/config/sl_board_control_config.h b/board-support/efr32/mgm24/BRD4317A/config/sl_board_control_config.h index c9fe3433a..74becb2ad 100644 --- a/board-support/efr32/mgm24/BRD4317A/config/sl_board_control_config.h +++ b/board-support/efr32/mgm24/BRD4317A/config/sl_board_control_config.h @@ -61,14 +61,22 @@ // SL_BOARD_ENABLE_DISPLAY // $[GPIO_SL_BOARD_ENABLE_DISPLAY] -#define SL_BOARD_ENABLE_DISPLAY_PORT SL_GPIO_PORT_D -#define SL_BOARD_ENABLE_DISPLAY_PIN 3 +#ifndef SL_BOARD_ENABLE_DISPLAY_PORT +#define SL_BOARD_ENABLE_DISPLAY_PORT SL_GPIO_PORT_D +#endif +#ifndef SL_BOARD_ENABLE_DISPLAY_PIN +#define SL_BOARD_ENABLE_DISPLAY_PIN 3 +#endif // [GPIO_SL_BOARD_ENABLE_DISPLAY]$ // SL_BOARD_ENABLE_SENSOR_RHT // $[GPIO_SL_BOARD_ENABLE_SENSOR_RHT] -#define SL_BOARD_ENABLE_SENSOR_RHT_PORT SL_GPIO_PORT_D -#define SL_BOARD_ENABLE_SENSOR_RHT_PIN 2 +#ifndef SL_BOARD_ENABLE_SENSOR_RHT_PORT +#define SL_BOARD_ENABLE_SENSOR_RHT_PORT SL_GPIO_PORT_D +#endif +#ifndef SL_BOARD_ENABLE_SENSOR_RHT_PIN +#define SL_BOARD_ENABLE_SENSOR_RHT_PIN 2 +#endif // [GPIO_SL_BOARD_ENABLE_SENSOR_RHT]$ // <<< sl:end pin_tool >>> diff --git a/board-support/efr32/mgm24/BRD4317A/config/sl_btctrl_config.h b/board-support/efr32/mgm24/BRD4317A/config/sl_btctrl_config.h index ed75a2d0e..403df1ffe 100644 --- a/board-support/efr32/mgm24/BRD4317A/config/sl_btctrl_config.h +++ b/board-support/efr32/mgm24/BRD4317A/config/sl_btctrl_config.h @@ -146,15 +146,27 @@ #define SL_BT_CONTROLLER_ADAPTIVITY_MODE (SL_BTCTRL_CHANNELMAP_FLAG_ACTIVE_ADAPTIVITY) #endif -// Power Amplifier (PA) Configuration -// Automode PA configuration -// Highest available PA configuration -// RAIL Utility component PA configuration -// Select the Power Amplifier configuration -// Default: RAIL Utility component PA configuration -#ifndef SL_BT_CONTROLLER_PA_CONFIG -#define SL_BT_CONTROLLER_PA_CONFIG SL_BT_BLUETOOTH_RAIL_UTIL_PA -#endif +// Advertising Configuration +// Include TX Power in the extended header of primary extended advertising packets +// This is default setting to all advertising sets unless it is specifically overridden by VS_SiliconLabs_Set_Advertising_Config_Bits. +// Default: 0 +// Enabling this option takes effect only if permitted by Le_Set_Extended_Advertising_Parameters +// According to Link Layer specification, Vol 6, Part B, Table 2.4 and Table 2.5: +// Optional in 1M PHY when the advertiser is connectable or scannable, or with auxiliary pointer. +// In other cases, the Extended Advertising TX Power is always optional by settings. +#define SL_BT_CONTROLLER_PRIMARY_EXT_PACKET_INCLUDE_TX_POWER (0) +// +// Include Advertiser Address in the header of primary extended advertising packets +// This is default setting to all advertising sets unless it is specifically overridden by VS_SiliconLabs_Set_Advertising_Config_Bits. +// Default: 0 +// Enabling this option takes effect only if permitted by Le_Set_Extended_Advertising_Parameters +// According to Link Layer specification, Vol 6, Part B, Table 2.4 and Table 2.5: +// Optional in 1M PHY when the advertiser is non-connectable and non-scannable, with auxiliary pointer. +// Mandatory when the advertiser is non-connectable and non-scannable, without auxiliary pointer. +// Forbidden when the advertiser is connectable or scannable. +#define SL_BT_CONTROLLER_PRIMARY_EXT_PACKET_INCLUDE_ADDRESS (0) +// +// Advertising Configuration // Bluetooth Controller Configuration // <<< end of configuration section >>> diff --git a/board-support/efr32/mgm24/BRD4317A/config/sl_clock_manager_tree_config.h b/board-support/efr32/mgm24/BRD4317A/config/sl_clock_manager_tree_config.h index 8c0be95e9..1f6f2a089 100644 --- a/board-support/efr32/mgm24/BRD4317A/config/sl_clock_manager_tree_config.h +++ b/board-support/efr32/mgm24/BRD4317A/config/sl_clock_manager_tree_config.h @@ -105,9 +105,9 @@ #endif // PCLK branch divider -// MIN // DIV1 // DIV2 +// MIN // PCLK branch is derived from HCLK. This clock drives the APB bus interface. // SL_CLOCK_MANAGER_PCLK_DIV_MIN #ifndef SL_CLOCK_MANAGER_PCLK_DIVIDER diff --git a/board-support/efr32/mgm24/BRD4317A/config/sl_i2cspm_sensor_config.h b/board-support/efr32/mgm24/BRD4317A/config/sl_i2cspm_sensor_config.h index ed664d106..bf5ebe750 100644 --- a/board-support/efr32/mgm24/BRD4317A/config/sl_i2cspm_sensor_config.h +++ b/board-support/efr32/mgm24/BRD4317A/config/sl_i2cspm_sensor_config.h @@ -54,17 +54,28 @@ // <<< sl:start pin_tool >>> // SL_I2CSPM_SENSOR // $[I2C_SL_I2CSPM_SENSOR] +#ifndef SL_I2CSPM_SENSOR_PERIPHERAL #define SL_I2CSPM_SENSOR_PERIPHERAL I2C0 +#endif +#ifndef SL_I2CSPM_SENSOR_PERIPHERAL_NO #define SL_I2CSPM_SENSOR_PERIPHERAL_NO 0 +#endif // I2C0 SCL on PB02 +#ifndef SL_I2CSPM_SENSOR_SCL_PORT #define SL_I2CSPM_SENSOR_SCL_PORT SL_GPIO_PORT_B +#endif +#ifndef SL_I2CSPM_SENSOR_SCL_PIN #define SL_I2CSPM_SENSOR_SCL_PIN 2 +#endif // I2C0 SDA on PB03 +#ifndef SL_I2CSPM_SENSOR_SDA_PORT #define SL_I2CSPM_SENSOR_SDA_PORT SL_GPIO_PORT_B +#endif +#ifndef SL_I2CSPM_SENSOR_SDA_PIN #define SL_I2CSPM_SENSOR_SDA_PIN 3 - +#endif // [I2C_SL_I2CSPM_SENSOR]$ // <<< sl:end pin_tool >>> diff --git a/board-support/efr32/mgm24/BRD4317A/config/sl_mbedtls_config.h b/board-support/efr32/mgm24/BRD4317A/config/sl_mbedtls_config.h index e249b4d1b..7146ba648 100644 --- a/board-support/efr32/mgm24/BRD4317A/config/sl_mbedtls_config.h +++ b/board-support/efr32/mgm24/BRD4317A/config/sl_mbedtls_config.h @@ -71,9 +71,14 @@ // Default: 1 // This option is enabled assuming all buffers passed to any PSA function reside // in memory that is accessible only to the PSA function during its execution. +// This improves performance by avoiding extra buffer copies, reducing memory +// usage and allocation overhead. However, it is NOT the most secure option and +// should only be enabled if all buffers passed to PSA functions are exclusively +// accessible to PSA and never shared with untrusted code. // This option MUST be disabled whenever buffer arguments are in memory shared // with an untrusted party, for example where arguments to PSA calls are passed -// across a trust boundary. +// across a trust boundary, e.g. if TrustZone is enabled, and the PSA Crypto core +// is placed in the Secure domain. #define SL_MBEDTLS_PSA_ASSUME_EXCLUSIVE_BUFFERS 1 // diff --git a/board-support/efr32/mgm24/BRD4317A/config/sl_memory_manager_config.h b/board-support/efr32/mgm24/BRD4317A/config/sl_memory_manager_config.h index 26b84b107..4a16c29fe 100644 --- a/board-support/efr32/mgm24/BRD4317A/config/sl_memory_manager_config.h +++ b/board-support/efr32/mgm24/BRD4317A/config/sl_memory_manager_config.h @@ -51,4 +51,11 @@ // <<< end of configuration section >>> +// Keep this configuration outside the configuration section until the feature is ready for release. +// Enables the heap fallback mechanism. +// Setting this configuration to 0 will disable the fallback mechanism on DTCM and PSRAM. +// If this configuration is disabled, the memory manager will not attempt to use alternative memory regions for allocations even if using the fallback parameters. +// Default: 1 +#define SL_MEMORY_MANAGER_HEAP_FALLBACK_EN 1 + #endif /* SL_MEMORY_MANAGER_CONFIG_H */ diff --git a/board-support/efr32/mgm24/BRD4317A/config/sl_openthread_features_config.h b/board-support/efr32/mgm24/BRD4317A/config/sl_openthread_features_config.h index 22340498d..a3697f8af 100644 --- a/board-support/efr32/mgm24/BRD4317A/config/sl_openthread_features_config.h +++ b/board-support/efr32/mgm24/BRD4317A/config/sl_openthread_features_config.h @@ -65,6 +65,7 @@ #define OPENTHREAD_CONFIG_MAC_CSL_RECEIVER_ENABLE 1 #endif // CSL Scheduling Uncertainty (±10 us units) <12..999:1> +// Left unchanged the value will be set to 175 for RCPs, 20 for FTDs, and 12 for MTDs #ifndef SL_OPENTHREAD_CSL_TX_UNCERTAINTY #if OPENTHREAD_RADIO #define SL_OPENTHREAD_CSL_TX_UNCERTAINTY 175 @@ -142,12 +143,10 @@ #define OPENTHREAD_CONFIG_CHANNEL_MONITOR_ENABLE 0 #endif // - -// Commissioner +// Commissioner #ifndef OPENTHREAD_CONFIG_COMMISSIONER_ENABLE #define OPENTHREAD_CONFIG_COMMISSIONER_ENABLE 0 #endif - // Max Joiner Entries // The maximum number of Joiner entries maintained by the Commissioner. // 2 @@ -155,7 +154,6 @@ #define OPENTHREAD_CONFIG_COMMISSIONER_MAX_JOINER_ENTRIES 2 #endif // - // COAP API #ifndef OPENTHREAD_CONFIG_COAP_API_ENABLE #define OPENTHREAD_CONFIG_COAP_API_ENABLE 0 @@ -171,6 +169,11 @@ #define OPENTHREAD_CONFIG_COAP_SECURE_API_ENABLE 0 #endif // +// COAP Blockwise Transfer +#ifndef OPENTHREAD_CONFIG_COAP_BLOCKWISE_TRANSFER_ENABLE +#define OPENTHREAD_CONFIG_COAP_BLOCKWISE_TRANSFER_ENABLE 0 +#endif +// // DHCP6 Client #ifndef OPENTHREAD_CONFIG_DHCP6_CLIENT_ENABLE #define OPENTHREAD_CONFIG_DHCP6_CLIENT_ENABLE 0 @@ -196,16 +199,27 @@ #define OPENTHREAD_CONFIG_IP6_FRAGMENTATION_ENABLE 0 #endif // -// Maximum number of IPv6 unicast addresses allowed to be externally added +// IPv6 Limits +// Maximum IPv6 external unicast addresses +// Maximum number of IPv6 unicast addresses allowed to be externally added +// 4 #ifndef OPENTHREAD_CONFIG_IP6_MAX_EXT_UCAST_ADDRS #define OPENTHREAD_CONFIG_IP6_MAX_EXT_UCAST_ADDRS 4 #endif -// -// Maximum number of IPv6 multicast addresses allowed to be externally added +// Maximum IPv6 external multicast addresses +// Maximum number of IPv6 multicast addresses allowed to be externally added +// 4 #ifndef OPENTHREAD_CONFIG_IP6_MAX_EXT_MCAST_ADDRS #define OPENTHREAD_CONFIG_IP6_MAX_EXT_MCAST_ADDRS 4 #endif -// +// Maximum IPv6 address registrations for MTD +// The maximum number of IPv6 address registrations for MTD. +// If left unchanged will default to the value of OPENTHREAD_CONFIG_MLE_IP_ADDRS_PER_CHILD +// 4 +#ifndef OPENTHREAD_CONFIG_MLE_IP_ADDRS_TO_REGISTER +#define OPENTHREAD_CONFIG_MLE_IP_ADDRS_TO_REGISTER (OPENTHREAD_CONFIG_MLE_IP_ADDRS_PER_CHILD) +#endif +// // Jam Detection #ifndef OPENTHREAD_CONFIG_JAM_DETECTION_ENABLE #define OPENTHREAD_CONFIG_JAM_DETECTION_ENABLE 0 @@ -226,6 +240,14 @@ #define OPENTHREAD_CONFIG_MAC_FILTER_ENABLE 0 #endif // +// MLE Children +// Maximum number of Thread children supported by the device +// Default is 10. Used by the Thread stack to configure the size of child table. +// 10 +#ifndef OPENTHREAD_CONFIG_MLE_MAX_CHILDREN +#define OPENTHREAD_CONFIG_MLE_MAX_CHILDREN 10 +#endif +// // MLE Long Routes extension (experimental) #ifndef OPENTHREAD_CONFIG_MLE_LONG_ROUTES_ENABLE #define OPENTHREAD_CONFIG_MLE_LONG_ROUTES_ENABLE 0 @@ -235,27 +257,66 @@ #ifndef OPENTHREAD_CONFIG_MULTIPAN_RCP_ENABLE #define OPENTHREAD_CONFIG_MULTIPAN_RCP_ENABLE 0 #endif +// Broadcast IID for spinel frames +// Define broadcast IID for spinel frames dedicated to all hosts in multipan configuration +// 0 +#ifndef OPENTHREAD_SPINEL_CONFIG_BROADCAST_IID +#define OPENTHREAD_SPINEL_CONFIG_BROADCAST_IID 0 +#endif +#if OPENTHREAD_CONFIG_MULTIPAN_RCP_ENABLE +// Maximum number of Zigbee children for multiprotocol (DMP) builds +// Ensures correct table sizing for Zigbee when DMP/multipan is enabled. +// 6 +#ifndef SL_ZIGBEE_MAX_END_DEVICE_CHILDREN +#define SL_ZIGBEE_MAX_END_DEVICE_CHILDREN 6 +#endif +#endif // // Multiple OpenThread Instances #ifndef OPENTHREAD_CONFIG_MULTIPLE_INSTANCE_ENABLE #define OPENTHREAD_CONFIG_MULTIPLE_INSTANCE_ENABLE 0 #endif -// // Multiple Static Instance Support #ifndef OPENTHREAD_CONFIG_MULTIPLE_STATIC_INSTANCE_ENABLE #define OPENTHREAD_CONFIG_MULTIPLE_STATIC_INSTANCE_ENABLE 0 #endif -// -// Number of OpenThread Instances For Static Buffer Allocation +// Number of OpenThread Instances +// Default is 2. Number of OpenThread Instances For Static Buffer Allocation. +// 2 #ifndef OPENTHREAD_CONFIG_MULTIPLE_INSTANCE_NUM #define OPENTHREAD_CONFIG_MULTIPLE_INSTANCE_NUM 2 #endif // -// Define broadcast IID for spinel frames dedicated to all hosts in multipan configuration -#ifndef OPENTHREAD_SPINEL_CONFIG_BROADCAST_IID -#define OPENTHREAD_SPINEL_CONFIG_BROADCAST_IID 0 -#endif // +// Define maximum total source match table entries for both OT and Zigbee. +// In multi-instance builds (SoC or RCP/host), table must support all OT instances + Zigbee. +// For single instance (default), table sized to just OT children. +// This value is used to size all source match tables in both OT and Zigbee code. +// Note: this is purposedly not being setup with CMSIS annotations. +#ifndef RADIO_CONFIG_MAX_SRC_MATCH_ENTRIES +#if OPENTHREAD_CONFIG_MULTIPLE_INSTANCE_ENABLE +#if SL_ZIGBEE_MAX_END_DEVICE_CHILDREN +// Multipan / DMP case: OT + Zigbee +#define RADIO_CONFIG_MAX_SRC_MATCH_ENTRIES \ + ((OPENTHREAD_CONFIG_MLE_MAX_CHILDREN * (OPENTHREAD_CONFIG_MULTIPLE_INSTANCE_NUM - 1)) \ + + SL_ZIGBEE_MAX_END_DEVICE_CHILDREN) +#else +// Multi-instance OT-only case +#define RADIO_CONFIG_MAX_SRC_MATCH_ENTRIES \ + (OPENTHREAD_CONFIG_MLE_MAX_CHILDREN * OPENTHREAD_CONFIG_MULTIPLE_INSTANCE_NUM) +#endif +#else +// Single-instance OT (SoC / NCP / non-multipan RCP) +#define RADIO_CONFIG_MAX_SRC_MATCH_ENTRIES OPENTHREAD_CONFIG_MLE_MAX_CHILDREN +#endif +#endif +// Spinel Match Table +// Maximum number of spinel source match table entries +// Ensure that this value is the total of the number of openthread children times the number of openthread instances plus the number of Zigbee children. +#ifndef OPENTHREAD_SPINEL_CONFIG_MAX_SRC_MATCH_ENTRIES +#define OPENTHREAD_SPINEL_CONFIG_MAX_SRC_MATCH_ENTRIES RADIO_CONFIG_MAX_SRC_MATCH_ENTRIES +#endif +// // OTNS (OpenThread Network Simulator) #ifndef OPENTHREAD_CONFIG_OTNS_ENABLE #define OPENTHREAD_CONFIG_OTNS_ENABLE 0 @@ -265,13 +326,23 @@ #ifndef OPENTHREAD_CONFIG_PING_SENDER_ENABLE #define OPENTHREAD_CONFIG_PING_SENDER_ENABLE 1 #endif - // // Power Calibration Module (RCP only configuration) #ifndef OPENTHREAD_CONFIG_POWER_CALIBRATION_ENABLE #define OPENTHREAD_CONFIG_POWER_CALIBRATION_ENABLE 0 #endif - +// Maximum raw power calibration length +// Max raw power calibration length +// 4 +#ifndef SL_OPENTHREAD_RAW_POWER_CALIBRATION_LENGTH +#define SL_OPENTHREAD_RAW_POWER_CALIBRATION_LENGTH 4 +#endif +// Maximum FEM config setting length +// Max FEM config setting length +// 4 +#ifndef SL_OPENTHREAD_FEM_SETTING_LENGTH +#define SL_OPENTHREAD_FEM_SETTING_LENGTH 4 +#endif // // Platform UDP #ifndef OPENTHREAD_CONFIG_PLATFORM_UDP_ENABLE @@ -309,7 +380,14 @@ #endif // // Time Synchronization Service +#ifndef OPENTHREAD_CONFIG_TIME_SYNC_ENABLE #define OPENTHREAD_CONFIG_TIME_SYNC_ENABLE 0 +#endif +// +// Uptime of OpenThread instance +#ifndef OPENTHREAD_CONFIG_UPTIME_ENABLE +#define OPENTHREAD_CONFIG_UPTIME_ENABLE 1 +#endif // // UDP Forward #ifndef OPENTHREAD_CONFIG_UDP_FORWARD_ENABLE @@ -321,28 +399,22 @@ #define OPENTHREAD_CONFIG_MAC_BEACON_PAYLOAD_PARSING_ENABLE 1 #endif // -// Max raw power calibration length. -#ifndef SL_OPENTHREAD_RAW_POWER_CALIBRATION_LENGTH -#define SL_OPENTHREAD_RAW_POWER_CALIBRATION_LENGTH 4 -#endif -// -// Max FEM config setting length. -#ifndef SL_OPENTHREAD_FEM_SETTING_LENGTH -#define SL_OPENTHREAD_FEM_SETTING_LENGTH 4 -#endif -// -// The maximum number of RX buffers to use in the radio driver. -// 16 +// Radio Driver RX buffers +// Maximum number of RX buffers +// The maximum number of RX buffers to use in the radio driver. +// 16 #ifndef SL_OPENTHREAD_RADIO_RX_BUFFER_COUNT #define SL_OPENTHREAD_RADIO_RX_BUFFER_COUNT 16 #endif // +// // Logging // LOG_OUTPUT // NONE // APP // PLATFORM_DEFINED -// Default: OPENTHREAD_CONFIG_LOG_OUTPUT_PLATFORM_DEFINED +// Default: OPENTHREAD_CONFIG_LOG_OUTPUT_APP +// OPENTHREAD_CONFIG_LOG_OUTPUT_APP #ifndef OPENTHREAD_CONFIG_LOG_OUTPUT #define OPENTHREAD_CONFIG_LOG_OUTPUT OPENTHREAD_CONFIG_LOG_OUTPUT_APP #endif @@ -365,6 +437,7 @@ // INFO // DEBG // Default: OT_LOG_LEVEL_DEBG +// OT_LOG_LEVEL_DEBG #ifndef OPENTHREAD_CONFIG_LOG_LEVEL #define OPENTHREAD_CONFIG_LOG_LEVEL OT_LOG_LEVEL_DEBG #endif @@ -387,11 +460,10 @@ #endif // OPENTHREAD_FULL_LOGS_ENABLE -// Log crash dump after initialization +// Log crash dump after initialization #ifndef OPENTHREAD_CONFIG_PLATFORM_LOG_CRASH_DUMP_ENABLE #define OPENTHREAD_CONFIG_PLATFORM_LOG_CRASH_DUMP_ENABLE 0 #endif -// // // diff --git a/board-support/efr32/mgm24/BRD4317A/config/sl_power_manager_config.h b/board-support/efr32/mgm24/BRD4317A/config/sl_power_manager_config.h index 3c240b843..86b9fef27 100644 --- a/board-support/efr32/mgm24/BRD4317A/config/sl_power_manager_config.h +++ b/board-support/efr32/mgm24/BRD4317A/config/sl_power_manager_config.h @@ -37,24 +37,40 @@ // Enable custom IRQ handler for external HF oscillator. // Enable if CMU_IRQHandler/HFXO0_IRQHandler is needed from your application. -// The function sl_power_manager_irq_handler() will have to be called from you custom handler if this is enabled. +// The function sl_power_manager_irq_handler() will have to be called from your custom handler if this is enabled. // Default: 0 +#ifndef SL_POWER_MANAGER_CUSTOM_HF_OSCILLATOR_IRQ_HANDLER #define SL_POWER_MANAGER_CUSTOM_HF_OSCILLATOR_IRQ_HANDLER 0 +#endif // Enable fast wakeup (disable voltage scaling in EM2/3 mode) // Enable or disable voltage scaling in EM2/3 modes (when available). This decreases wakeup time by about 30 us. // Deprecated. It is replaced by the function sl_power_manager_em23_voltage_scaling_enable_fast_wakeup() // Default: 0 +#ifndef SL_POWER_MANAGER_CONFIG_VOLTAGE_SCALING_FAST_WAKEUP #define SL_POWER_MANAGER_CONFIG_VOLTAGE_SCALING_FAST_WAKEUP 0 +#endif + +// Enable voltage scaling in EM0 and EM1 mode. +// Enable or disable voltage scaling in EM0/1 modes. With this config enabled, the voltage +// scaling will be configured at the lowest possible level based on the system clock. +// Default: 0 +#ifndef SL_POWER_MANAGER_ENABLE_EM01_VOLTAGE_SCALING +#define SL_POWER_MANAGER_ENABLE_EM01_VOLTAGE_SCALING 0 +#endif // Enable debugging feature // Enable or disable debugging features (trace the different modules that have requirements). // Default: 0 +#ifndef SL_POWER_MANAGER_DEBUG #define SL_POWER_MANAGER_DEBUG 0 +#endif // Maximum numbers of requirements that can be logged // Default: 10 +#ifndef SL_POWER_MANAGER_DEBUG_POOL_SIZE #define SL_POWER_MANAGER_DEBUG_POOL_SIZE 10 +#endif // // Pin retention mode @@ -63,14 +79,18 @@ // Retention through EM4 // Retention through EM4 and wakeup // power_manager_pin_retention_disable +#ifndef SL_POWER_MANAGER_INIT_EMU_EM4_PIN_RETENTION_MODE #define SL_POWER_MANAGER_INIT_EMU_EM4_PIN_RETENTION_MODE EMU_EM4CTRL_EM4IORETMODE_DISABLE +#endif // Enable EM2 debugging feature // Enable or disable debugging features. // Force PD0B/PD0D to stay on during EM2 entry. This allows the debugger to remain connected in EM2 and EM3. // Enabling debug connectivity results in an increased power consumption in EM2/EM3. // Default: 1 +#ifndef SL_POWER_MANAGER_INIT_EMU_EM2_DEBUG_ENABLE #define SL_POWER_MANAGER_INIT_EMU_EM2_DEBUG_ENABLE 1 +#endif // // diff --git a/board-support/efr32/mgm24/BRD4317A/config/sl_rail_util_pti_config.h b/board-support/efr32/mgm24/BRD4317A/config/sl_rail_util_pti_config.h index d222a67fd..3a97fc327 100644 --- a/board-support/efr32/mgm24/BRD4317A/config/sl_rail_util_pti_config.h +++ b/board-support/efr32/mgm24/BRD4317A/config/sl_rail_util_pti_config.h @@ -35,12 +35,12 @@ // PTI Configuration // PTI mode -// UART -// UART onewire -// SPI -// Disabled -// Default: RAIL_PTI_MODE_UART -#define SL_RAIL_UTIL_PTI_MODE RAIL_PTI_MODE_UART +// UART +// UART onewire +// SPI +// Disabled +// Default: SL_RAIL_PTI_MODE_UART +#define SL_RAIL_UTIL_PTI_MODE SL_RAIL_PTI_MODE_UART // PTI Baud Rate (Hertz) // <147800-20000000:1> diff --git a/board-support/efr32/mgm24/BRD4317A/config/sl_simple_button_btn0_config.h b/board-support/efr32/mgm24/BRD4317A/config/sl_simple_button_btn0_config.h index 55e41f343..1d0774215 100644 --- a/board-support/efr32/mgm24/BRD4317A/config/sl_simple_button_btn0_config.h +++ b/board-support/efr32/mgm24/BRD4317A/config/sl_simple_button_btn0_config.h @@ -48,9 +48,12 @@ // SL_SIMPLE_BUTTON_BTN0 // $[GPIO_SL_SIMPLE_BUTTON_BTN0] +#ifndef SL_SIMPLE_BUTTON_BTN0_PORT #define SL_SIMPLE_BUTTON_BTN0_PORT SL_GPIO_PORT_B +#endif +#ifndef SL_SIMPLE_BUTTON_BTN0_PIN #define SL_SIMPLE_BUTTON_BTN0_PIN 0 - +#endif // [GPIO_SL_SIMPLE_BUTTON_BTN0]$ // <<< sl:end pin_tool >>> diff --git a/board-support/efr32/mgm24/BRD4317A/config/sl_simple_button_btn1_config.h b/board-support/efr32/mgm24/BRD4317A/config/sl_simple_button_btn1_config.h index a34574c2e..1cfbd898e 100644 --- a/board-support/efr32/mgm24/BRD4317A/config/sl_simple_button_btn1_config.h +++ b/board-support/efr32/mgm24/BRD4317A/config/sl_simple_button_btn1_config.h @@ -48,9 +48,12 @@ // SL_SIMPLE_BUTTON_BTN1 // $[GPIO_SL_SIMPLE_BUTTON_BTN1] +#ifndef SL_SIMPLE_BUTTON_BTN1_PORT #define SL_SIMPLE_BUTTON_BTN1_PORT SL_GPIO_PORT_B +#endif +#ifndef SL_SIMPLE_BUTTON_BTN1_PIN #define SL_SIMPLE_BUTTON_BTN1_PIN 1 - +#endif // [GPIO_SL_SIMPLE_BUTTON_BTN1]$ // <<< sl:end pin_tool >>> diff --git a/board-support/efr32/mgm24/BRD4318A/autogen/sl_bluetooth.c b/board-support/efr32/mgm24/BRD4318A/autogen/sl_bluetooth.c index 4cac19436..0a5f1a969 100644 --- a/board-support/efr32/mgm24/BRD4318A/autogen/sl_bluetooth.c +++ b/board-support/efr32/mgm24/BRD4318A/autogen/sl_bluetooth.c @@ -30,6 +30,8 @@ #include #include "sl_bluetooth.h" +#include "sli_bt_api.h" +#include "sli_bgapi.h" #include "sl_assert.h" #include "sl_bt_stack_init.h" #include "sl_component_catalog.h" @@ -68,17 +70,23 @@ void sl_bt_step(void) { sl_bt_msg_t evt; + // Run the Bluetooth host stack processing step sl_bt_run(); - uint32_t event_len = sl_bt_event_pending_len(); - // For preventing from data loss, the event will be kept in the stack's queue - // if application cannot process it at the moment. + + // Check the length of the next event, if any, and verify that the application + // can process it. To prevent data loss, the event will be kept in the stack's + // queue if the application cannot process it at the moment. + size_t event_len = sli_bgapi_device_peek_event_len(&sli_bt_bgapi_device); if ((event_len == 0) || (!sl_bt_can_process_event(event_len))) { return; } - // Pop (non-blocking) a Bluetooth stack event from event queue. - sl_status_t status = sl_bt_pop_event(&evt); - if(status != SL_STATUS_OK){ + // Pop the event and process it if successful + sl_status_t status = sli_bgapi_device_pop_event(&sli_bt_bgapi_device, + sizeof(evt), + &evt); + + if (status != SL_STATUS_OK) { return; } sl_bt_process_event(&evt); diff --git a/board-support/efr32/mgm24/BRD4318A/autogen/sl_component_catalog.h b/board-support/efr32/mgm24/BRD4318A/autogen/sl_component_catalog.h index f1c0c577b..7fec96be4 100644 --- a/board-support/efr32/mgm24/BRD4318A/autogen/sl_component_catalog.h +++ b/board-support/efr32/mgm24/BRD4318A/autogen/sl_component_catalog.h @@ -3,6 +3,7 @@ // APIs present in project #define SL_CATALOG_BGAPI_PROTOCOL_PRESENT +#define SL_CATALOG_BGAPI_PROTOCOL_RTOS_ADAPTATION_PRESENT #define SL_CATALOG_BLUETOOTH_CONFIGURATION_PRESENT #define SL_CATALOG_BLUETOOTH_CTE_SUPPORT_PRESENT #define SL_CATALOG_BLUETOOTH_CS_SUPPORT_PRESENT @@ -24,7 +25,6 @@ #define SL_CATALOG_CMSIS_OS_COMMON_PRESENT #define SL_CATALOG_CPP_SUPPORT_PRESENT #define SL_CATALOG_DEVICE_INIT_PRESENT -#define SL_CATALOG_DEVICE_INIT_CORE_PRESENT #define SL_CATALOG_DEVICE_INIT_DCDC_PRESENT #define SL_CATALOG_EMLIB_CORE_PRESENT #define SL_CATALOG_EMLIB_RMU_PRESENT @@ -33,12 +33,13 @@ #define SL_CATALOG_GATT_CONFIGURATION_PRESENT #define SL_CATALOG_GPIO_PRESENT #define SL_CATALOG_GPIOINTERRUPT_PRESENT +#define SL_CATALOG_HAL_SYSTEM_PRESENT #define SL_CATALOG_HFXO_MANAGER_PRESENT #define SL_CATALOG_INTERRUPT_MANAGER_PRESENT #define SL_CATALOG_IOSTREAM_PRESENT #ifdef DISPLAY_ENABLED -#define SL_CATALOG_DMD_MEMLCD_PRESENT #define SL_CATALOG_MEMLCD_USART_PRESENT +#define SL_CATALOG_DMD_MEMLCD_PRESENT #endif #define SL_CATALOG_MEMORY_MANAGER_PRESENT #define SL_CATALOG_MEMORY_PROFILER_API_PRESENT @@ -51,13 +52,12 @@ #define SL_CATALOG_OPENTHREAD_CLI_PRESENT #define SL_CATALOG_OT_GP_INTERFACE_PRESENT #define SL_CATALOG_OPENTHREAD_STACK_PRESENT -#define SL_CATALOG_OPENTHREAD_UART_PRESENT #define SL_CATALOG_POWER_MANAGER_PRESENT +#define SL_CATALOG_POWER_MANAGER_DEEPSLEEP_PRESENT #define SL_CATALOG_PSA_CRYPTO_PRESENT #define SL_CATALOG_RADIO_PRIORITY_15_4_PRESENT #define SL_CATALOG_RAIL_LIB_PRESENT #define SL_CATALOG_RAIL_UTIL_PTI_PRESENT -#define SL_CATALOG_SE_MANAGER_PRESENT #define SL_CATALOG_SECURITY_MANAGER_PRESENT #define SL_CATALOG_SEGGER_RTT_PRESENT #define SL_CATALOG_BTN0_PRESENT @@ -66,11 +66,6 @@ #define SL_CATALOG_BTN1_PRESENT #define SL_CATALOG_SIMPLE_BUTTON_BTN1_PRESENT #define SL_CATALOG_SL_CORE_PRESENT -#define SL_CATALOG_LED0_PRESENT -#define SL_CATALOG_SIMPLE_LED_PRESENT -#define SL_CATALOG_SIMPLE_LED_LED0_PRESENT -#define SL_CATALOG_LED1_PRESENT -#define SL_CATALOG_SIMPLE_LED_LED1_PRESENT #define SL_CATALOG_SL_MAIN_PRESENT #define SL_CATALOG_SLEEPTIMER_PRESENT #define SL_CATALOG_SLI_PROTOCOL_CRYPTO_PRESENT diff --git a/board-support/efr32/mgm24/BRD4318A/autogen/sl_event_handler.c b/board-support/efr32/mgm24/BRD4318A/autogen/sl_event_handler.c index ae90cc473..4fe288a4e 100644 --- a/board-support/efr32/mgm24/BRD4318A/autogen/sl_event_handler.c +++ b/board-support/efr32/mgm24/BRD4318A/autogen/sl_event_handler.c @@ -3,7 +3,11 @@ #include "sl_board_init.h" #include "sl_clock_manager.h" #include "sl_hfxo_manager.h" -#include "pa_conversions_efr32.h" +#include "sl_rail_util_compatible_pa.h" +#if !(defined(SLI_SI91X_ENABLE_BLE) && SLI_SI91X_ENABLE_BLE) +#include "sl_bluetooth.h" +#include "sl_rail_util_power_manager_init.h" +#endif // !SLI_SI91X_ENABLE_BLE #include "sl_rail_util_power_manager_init.h" #include "sl_rail_util_pti.h" #include "sl_rail_util_rssi.h" @@ -13,6 +17,7 @@ #include "platform-efr32.h" #include "sl_bt_rtos_adaptation.h" #include "sl_bluetooth.h" +#include "sl_debug_swo.h" #include "sl_gpio.h" #include "gpiointerrupt.h" #if defined(SL_MATTER_USE_SI70XX_SENSOR) && SL_MATTER_USE_SI70XX_SENSOR @@ -22,8 +27,15 @@ #include "sl_mbedtls.h" #include "sl_ot_rtos_adaptation.h" #include "sl_simple_button_instances.h" + +#if (defined(SL_MATTER_RGB_LED_ENABLED) && SL_MATTER_RGB_LED_ENABLED == 1) +#include "sl_simple_rgb_pwm_led_instances.h" +#else #include "sl_simple_led_instances.h" +#endif //(SL_MATTER_RGB_LED_ENABLED) && SL_MATTER_RGB_LED_ENABLED == 1) +#if defined(CONFIG_ENABLE_UART) #include "sl_uartdrv_instances.h" +#endif // CONFIG_ENABLE_UART #include "psa/crypto.h" #include "sl_se_manager.h" #include "sli_protocol_crypto.h" @@ -31,6 +43,7 @@ #include "sl_iostream_init_instances.h" #include "cmsis_os2.h" #include "nvm3_default.h" + #include "sl_iostream_handles.h" void sli_driver_permanent_allocation(void) @@ -79,10 +92,14 @@ void sl_driver_init(void) sl_i2cspm_init_instances(); #endif // defined(SL_MATTER_USE_SI70XX_SENSOR) && SL_MATTER_USE_SI70XX_SENSOR sl_simple_button_init_instances(); +#if (defined(SL_MATTER_RGB_LED_ENABLED) && SL_MATTER_RGB_LED_ENABLED == 1) + sl_simple_rgb_pwm_led_init_instances(); +#else sl_simple_led_init_instances(); -#if defined(CONFIG_ENABLE_UART) +#endif //(SL_MATTER_RGB_LED_ENABLED) && SL_MATTER_RGB_LED_ENABLED == 1) + #if defined(CONFIG_ENABLE_UART) sl_uartdrv_init_instances(); -#endif +#endif // CONFIG_ENABLE_UART } void sl_service_init(void) @@ -101,19 +118,25 @@ void sl_service_init(void) void sl_stack_init(void) { +#if !SLI_SI91X_ENABLE_BLE sl_rail_util_pa_init(); sl_rail_util_power_manager_init(); sl_rail_util_pti_init(); sl_rail_util_rssi_init(); sl_fem_util_init(); - sl_ot_sys_init(); sli_bt_stack_functional_init(); +#endif // !SLI_SI91X_ENABLE_BLE +#ifdef SL_OT_ENABLE + sl_ot_sys_init(); +#endif // SL_OT_ENABLE } void sl_internal_app_init(void) { +#ifdef SL_OT_ENABLE sl_ot_rtos_stack_init(); sl_ot_rtos_app_init(); +#endif // SL_OT_ENABLE } void sl_iostream_init_instances_stage_1(void) @@ -125,4 +148,3 @@ void sl_iostream_init_instances_stage_2(void) { sl_iostream_set_console_instance(); } - diff --git a/board-support/efr32/mgm24/BRD4318A/autogen/sli_psa_config_autogen.h b/board-support/efr32/mgm24/BRD4318A/autogen/sli_psa_config_autogen.h index 055d8a95e..f90dd6e9a 100644 --- a/board-support/efr32/mgm24/BRD4318A/autogen/sli_psa_config_autogen.h +++ b/board-support/efr32/mgm24/BRD4318A/autogen/sli_psa_config_autogen.h @@ -24,7 +24,12 @@ #define PSA_WANT_ALG_TLS12_PSK_TO_MS 1 #define MBEDTLS_PSA_CRYPTO_EXTERNAL_RNG +#if defined(KSU_MAX_KEY_SLOTS) +#include "sli_ksu_keyslots_config.h" +#define MBEDTLS_PSA_KEY_SLOT_COUNT (22 + 15 + 1 + SL_PSA_KEY_USER_SLOT_COUNT + SLI_KSU_MAX_KEY_SLOTS - SLI_KSU_KEY_SLOT_USER_START + 1) +#else #define MBEDTLS_PSA_KEY_SLOT_COUNT (22 + 15 + 1 + SL_PSA_KEY_USER_SLOT_COUNT + 1) +#endif #ifndef SL_PSA_ITS_MAX_FILES #define SL_PSA_ITS_MAX_FILES (1 + SL_PSA_ITS_USER_MAX_FILES) #endif diff --git a/board-support/efr32/mgm24/BRD4318A/config/pin_config.h b/board-support/efr32/mgm24/BRD4318A/config/pin_config.h new file mode 100644 index 000000000..96a767254 --- /dev/null +++ b/board-support/efr32/mgm24/BRD4318A/config/pin_config.h @@ -0,0 +1,260 @@ +#ifndef PIN_CONFIG_H +#define PIN_CONFIG_H + +// $[CMU] +// [CMU]$ + +// $[LFXO] +// [LFXO]$ + +// $[PRS.ASYNCH0] +// [PRS.ASYNCH0]$ + +// $[PRS.ASYNCH1] +// [PRS.ASYNCH1]$ + +// $[PRS.ASYNCH2] +// [PRS.ASYNCH2]$ + +// $[PRS.ASYNCH3] +// [PRS.ASYNCH3]$ + +// $[PRS.ASYNCH4] +// [PRS.ASYNCH4]$ + +// $[PRS.ASYNCH5] +// [PRS.ASYNCH5]$ + +// $[PRS.ASYNCH6] +// [PRS.ASYNCH6]$ + +// $[PRS.ASYNCH7] +// [PRS.ASYNCH7]$ + +// $[PRS.ASYNCH8] +// [PRS.ASYNCH8]$ + +// $[PRS.ASYNCH9] +// [PRS.ASYNCH9]$ + +// $[PRS.ASYNCH10] +// [PRS.ASYNCH10]$ + +// $[PRS.ASYNCH11] +// [PRS.ASYNCH11]$ + +// $[PRS.ASYNCH12] +// [PRS.ASYNCH12]$ + +// $[PRS.ASYNCH13] +// [PRS.ASYNCH13]$ + +// $[PRS.ASYNCH14] +// [PRS.ASYNCH14]$ + +// $[PRS.ASYNCH15] +// [PRS.ASYNCH15]$ + +// $[PRS.SYNCH0] +// [PRS.SYNCH0]$ + +// $[PRS.SYNCH1] +// [PRS.SYNCH1]$ + +// $[PRS.SYNCH2] +// [PRS.SYNCH2]$ + +// $[PRS.SYNCH3] +// [PRS.SYNCH3]$ + +// $[GPIO] +// GPIO SWV on PA03 +#ifndef GPIO_SWV_PORT +#define GPIO_SWV_PORT SL_GPIO_PORT_A +#endif +#ifndef GPIO_SWV_PIN +#define GPIO_SWV_PIN 3 +#endif + +// [GPIO]$ + +// $[TIMER0] +// [TIMER0]$ + +// $[TIMER1] +// [TIMER1]$ + +// $[TIMER2] +// [TIMER2]$ + +// $[TIMER3] +// [TIMER3]$ + +// $[TIMER4] +// [TIMER4]$ + +// $[USART0] +// USART0 CLK on PC03 +#ifndef USART0_CLK_PORT +#define USART0_CLK_PORT SL_GPIO_PORT_C +#endif +#ifndef USART0_CLK_PIN +#define USART0_CLK_PIN 3 +#endif + +// USART0 TX on PC01 +#ifndef USART0_TX_PORT +#define USART0_TX_PORT SL_GPIO_PORT_C +#endif +#ifndef USART0_TX_PIN +#define USART0_TX_PIN 1 +#endif + +// [USART0]$ + +// $[I2C1] +// I2C1 SCL on PC05 +#ifndef I2C1_SCL_PORT +#define I2C1_SCL_PORT SL_GPIO_PORT_C +#endif +#ifndef I2C1_SCL_PIN +#define I2C1_SCL_PIN 5 +#endif + +// I2C1 SDA on PC07 +#ifndef I2C1_SDA_PORT +#define I2C1_SDA_PORT SL_GPIO_PORT_C +#endif +#ifndef I2C1_SDA_PIN +#define I2C1_SDA_PIN 7 +#endif + +// [I2C1]$ + +// $[EUSART1] +// [EUSART1]$ + +// $[KEYSCAN] +// [KEYSCAN]$ + +// $[LETIMER0] +// [LETIMER0]$ + +// $[IADC0] +// [IADC0]$ + +// $[ACMP0] +// [ACMP0]$ + +// $[ACMP1] +// [ACMP1]$ + +// $[VDAC0] +// [VDAC0]$ + +// $[VDAC1] +// [VDAC1]$ + +// $[PCNT0] +// [PCNT0]$ + +// $[HFXO0] +// [HFXO0]$ + +// $[I2C0] +// [I2C0]$ + +// $[EUSART0] +// EUSART0 CTS on PB05 +#ifndef EUSART0_CTS_PORT +#define EUSART0_CTS_PORT SL_GPIO_PORT_B +#endif +#ifndef EUSART0_CTS_PIN +#define EUSART0_CTS_PIN 5 +#endif + +// EUSART0 RTS on PA00 +#ifndef EUSART0_RTS_PORT +#define EUSART0_RTS_PORT SL_GPIO_PORT_A +#endif +#ifndef EUSART0_RTS_PIN +#define EUSART0_RTS_PIN 0 +#endif + +// EUSART0 RX on PA09 +#ifndef EUSART0_RX_PORT +#define EUSART0_RX_PORT SL_GPIO_PORT_A +#endif +#ifndef EUSART0_RX_PIN +#define EUSART0_RX_PIN 9 +#endif + +// EUSART0 TX on PA08 +#ifndef EUSART0_TX_PORT +#define EUSART0_TX_PORT SL_GPIO_PORT_A +#endif +#ifndef EUSART0_TX_PIN +#define EUSART0_TX_PIN 8 +#endif + +// [EUSART0]$ + +// $[PTI] +// PTI DOUT on PD04 +#ifndef PTI_DOUT_PORT +#define PTI_DOUT_PORT SL_GPIO_PORT_D +#endif +#ifndef PTI_DOUT_PIN +#define PTI_DOUT_PIN 4 +#endif + +// [PTI]$ + +// $[MODEM] +// [MODEM]$ + +// $[CUSTOM_PIN_NAME] +#ifndef _PORT +#define _PORT SL_GPIO_PORT_A +#endif +#ifndef _PIN +#define _PIN 0 +#endif + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +// [CUSTOM_PIN_NAME]$ + + +#endif // PIN_CONFIG_H + + diff --git a/board-support/efr32/mgm24/BRD4318A/config/psa_crypto_config.h b/board-support/efr32/mgm24/BRD4318A/config/psa_crypto_config.h index 20703b41d..773ce99e0 100644 --- a/board-support/efr32/mgm24/BRD4318A/config/psa_crypto_config.h +++ b/board-support/efr32/mgm24/BRD4318A/config/psa_crypto_config.h @@ -27,26 +27,32 @@ // Default: 4 #define SL_PSA_KEY_USER_SLOT_COUNT (4) -// PSA Maximum User Persistent Keys Count <0-1024> +// Maximum User Persistent PSA Key Count <0-1024> // Maximum amount of keys (or other files) that can be stored persistently -// by the application through the PSA interface, when persistent storage -// support for PSA Crypto is included in the project. -// Due to caching logic, this setting does have an impact on static RAM usage. -// Note that this number is added to the potential requirements from other -// software components in the project, such that the total amount of keys -// which can be stored through the ITS backend can be higher than what is -// configured here. +// by the user application, when PSA ITS (Internal Trusted Storage) support +// is included in the project. +// NOTE: +// In addition to SL_PSA_ITS_USER_MAX_FILES (number of user keys) the +// application may be configured to include SDK components that require an +// additional number of keys. The sum of user keys and SDK component keys +// is computed and the result, called SL_PSA_ITS_MAX_FILES, is used +// internally in the PSA ITS driver. // -// WARNING: When changing this setting on an application that is already -// deployed, and thus will get the change through an application upgrade, -// care should be taken to ensure that the setting is only ever increased, -// and never decreased. Decreasing this setting might cause previously -// stored keys/files to become inaccessible. +// WARNING: +// For applications using PSA ITS driver version 1 or 2, when changing the +// SL_PSA_ITS_USER_MAX_FILES in an application that is already depeloyed, +// and thus will get the change through an application upgrade, care should +// be taken to ensure that the total sum of keys SL_PSA_ITS_MAX_FILES is +// only ever equal or increased, and never decreased. Decreasing this +// setting might cause previously stored keys/files to become inaccessible, +// ITS should be cleared and all files need to be stored again. // -// It is not possible to change this setting when using V3 ITS Driver. -// The file-storage indexing is dependent on the maximum number of files, -// and if SL_PSA_ITS_USER_MAX_FILES is changed, ITS should be cleared and -// all files need to be stored again. +// For applications using PSA ITS driver version 3, it is not possible to +// change this setting because the file-storage indexing is dependent on the +// maximum number of files (SL_PSA_ITS_MAX_FILES) being consistent, and if +// the sum of SDK component keys and user keys (SL_PSA_ITS_USER_MAX_FILES) +// is changed, may cause previously stored keys/files to become inaccessible +// ITS should be cleared and all files need to be stored again. // Default: 128 #define SL_PSA_ITS_USER_MAX_FILES (128) diff --git a/board-support/efr32/mgm24/BRD4318A/config/sl_bluetooth_config.h b/board-support/efr32/mgm24/BRD4318A/config/sl_bluetooth_config.h index 9b6a804e0..93bfbbcc4 100644 --- a/board-support/efr32/mgm24/BRD4318A/config/sl_bluetooth_config.h +++ b/board-support/efr32/mgm24/BRD4318A/config/sl_bluetooth_config.h @@ -99,6 +99,7 @@ // if the LE Power Control feature is enabled. // When this configuration is passed into stack initialization, the stack // will select the closest value that the device supports. +// API sl_bt_system_set_tx_power() can be used to set the minimum TX power at runtime. // API sl_bt_system_get_tx_power_setting() can be used to query the selected value. #define SL_BT_CONFIG_MIN_TX_POWER (-30) @@ -108,6 +109,7 @@ // advertising, scanning and DTM testing. // When this configuration is passed into stack initialization, the stack // will select the closest value that the device supports. +// API sl_bt_system_set_tx_power() can be used to set the maximum TX power at runtime. // API sl_bt_system_get_tx_power_setting() can be used to query the selected value. #define SL_BT_CONFIG_MAX_TX_POWER (80) diff --git a/board-support/efr32/mgm24/BRD4318A/config/sl_btctrl_config.h b/board-support/efr32/mgm24/BRD4318A/config/sl_btctrl_config.h index ed75a2d0e..403df1ffe 100644 --- a/board-support/efr32/mgm24/BRD4318A/config/sl_btctrl_config.h +++ b/board-support/efr32/mgm24/BRD4318A/config/sl_btctrl_config.h @@ -146,15 +146,27 @@ #define SL_BT_CONTROLLER_ADAPTIVITY_MODE (SL_BTCTRL_CHANNELMAP_FLAG_ACTIVE_ADAPTIVITY) #endif -// Power Amplifier (PA) Configuration -// Automode PA configuration -// Highest available PA configuration -// RAIL Utility component PA configuration -// Select the Power Amplifier configuration -// Default: RAIL Utility component PA configuration -#ifndef SL_BT_CONTROLLER_PA_CONFIG -#define SL_BT_CONTROLLER_PA_CONFIG SL_BT_BLUETOOTH_RAIL_UTIL_PA -#endif +// Advertising Configuration +// Include TX Power in the extended header of primary extended advertising packets +// This is default setting to all advertising sets unless it is specifically overridden by VS_SiliconLabs_Set_Advertising_Config_Bits. +// Default: 0 +// Enabling this option takes effect only if permitted by Le_Set_Extended_Advertising_Parameters +// According to Link Layer specification, Vol 6, Part B, Table 2.4 and Table 2.5: +// Optional in 1M PHY when the advertiser is connectable or scannable, or with auxiliary pointer. +// In other cases, the Extended Advertising TX Power is always optional by settings. +#define SL_BT_CONTROLLER_PRIMARY_EXT_PACKET_INCLUDE_TX_POWER (0) +// +// Include Advertiser Address in the header of primary extended advertising packets +// This is default setting to all advertising sets unless it is specifically overridden by VS_SiliconLabs_Set_Advertising_Config_Bits. +// Default: 0 +// Enabling this option takes effect only if permitted by Le_Set_Extended_Advertising_Parameters +// According to Link Layer specification, Vol 6, Part B, Table 2.4 and Table 2.5: +// Optional in 1M PHY when the advertiser is non-connectable and non-scannable, with auxiliary pointer. +// Mandatory when the advertiser is non-connectable and non-scannable, without auxiliary pointer. +// Forbidden when the advertiser is connectable or scannable. +#define SL_BT_CONTROLLER_PRIMARY_EXT_PACKET_INCLUDE_ADDRESS (0) +// +// Advertising Configuration // Bluetooth Controller Configuration // <<< end of configuration section >>> diff --git a/board-support/efr32/mgm24/BRD4318A/config/sl_clock_manager_tree_config.h b/board-support/efr32/mgm24/BRD4318A/config/sl_clock_manager_tree_config.h index 8c0be95e9..1f6f2a089 100644 --- a/board-support/efr32/mgm24/BRD4318A/config/sl_clock_manager_tree_config.h +++ b/board-support/efr32/mgm24/BRD4318A/config/sl_clock_manager_tree_config.h @@ -105,9 +105,9 @@ #endif // PCLK branch divider -// MIN // DIV1 // DIV2 +// MIN // PCLK branch is derived from HCLK. This clock drives the APB bus interface. // SL_CLOCK_MANAGER_PCLK_DIV_MIN #ifndef SL_CLOCK_MANAGER_PCLK_DIVIDER diff --git a/board-support/efr32/mgm24/BRD4318A/config/sl_i2cspm_sensor_config.h b/board-support/efr32/mgm24/BRD4318A/config/sl_i2cspm_sensor_config.h index 03c4886d4..9804ead6f 100644 --- a/board-support/efr32/mgm24/BRD4318A/config/sl_i2cspm_sensor_config.h +++ b/board-support/efr32/mgm24/BRD4318A/config/sl_i2cspm_sensor_config.h @@ -54,17 +54,28 @@ // <<< sl:start pin_tool >>> // SL_I2CSPM_SENSOR // $[I2C_SL_I2CSPM_SENSOR] +#ifndef SL_I2CSPM_SENSOR_PERIPHERAL #define SL_I2CSPM_SENSOR_PERIPHERAL I2C1 +#endif +#ifndef SL_I2CSPM_SENSOR_PERIPHERAL_NO #define SL_I2CSPM_SENSOR_PERIPHERAL_NO 1 +#endif // I2C1 SCL on PC05 +#ifndef SL_I2CSPM_SENSOR_SCL_PORT #define SL_I2CSPM_SENSOR_SCL_PORT SL_GPIO_PORT_C +#endif +#ifndef SL_I2CSPM_SENSOR_SCL_PIN #define SL_I2CSPM_SENSOR_SCL_PIN 5 +#endif // I2C1 SDA on PC07 +#ifndef SL_I2CSPM_SENSOR_SDA_PORT #define SL_I2CSPM_SENSOR_SDA_PORT SL_GPIO_PORT_C +#endif +#ifndef SL_I2CSPM_SENSOR_SDA_PIN #define SL_I2CSPM_SENSOR_SDA_PIN 7 - +#endif // [I2C_SL_I2CSPM_SENSOR]$ // <<< sl:end pin_tool >>> diff --git a/board-support/efr32/mgm24/BRD4318A/config/sl_mbedtls_config.h b/board-support/efr32/mgm24/BRD4318A/config/sl_mbedtls_config.h index e249b4d1b..7146ba648 100644 --- a/board-support/efr32/mgm24/BRD4318A/config/sl_mbedtls_config.h +++ b/board-support/efr32/mgm24/BRD4318A/config/sl_mbedtls_config.h @@ -71,9 +71,14 @@ // Default: 1 // This option is enabled assuming all buffers passed to any PSA function reside // in memory that is accessible only to the PSA function during its execution. +// This improves performance by avoiding extra buffer copies, reducing memory +// usage and allocation overhead. However, it is NOT the most secure option and +// should only be enabled if all buffers passed to PSA functions are exclusively +// accessible to PSA and never shared with untrusted code. // This option MUST be disabled whenever buffer arguments are in memory shared // with an untrusted party, for example where arguments to PSA calls are passed -// across a trust boundary. +// across a trust boundary, e.g. if TrustZone is enabled, and the PSA Crypto core +// is placed in the Secure domain. #define SL_MBEDTLS_PSA_ASSUME_EXCLUSIVE_BUFFERS 1 // diff --git a/board-support/efr32/mgm24/BRD4318A/config/sl_memory_manager_config.h b/board-support/efr32/mgm24/BRD4318A/config/sl_memory_manager_config.h index 26b84b107..4a16c29fe 100644 --- a/board-support/efr32/mgm24/BRD4318A/config/sl_memory_manager_config.h +++ b/board-support/efr32/mgm24/BRD4318A/config/sl_memory_manager_config.h @@ -51,4 +51,11 @@ // <<< end of configuration section >>> +// Keep this configuration outside the configuration section until the feature is ready for release. +// Enables the heap fallback mechanism. +// Setting this configuration to 0 will disable the fallback mechanism on DTCM and PSRAM. +// If this configuration is disabled, the memory manager will not attempt to use alternative memory regions for allocations even if using the fallback parameters. +// Default: 1 +#define SL_MEMORY_MANAGER_HEAP_FALLBACK_EN 1 + #endif /* SL_MEMORY_MANAGER_CONFIG_H */ diff --git a/board-support/efr32/mgm24/BRD4318A/config/sl_openthread_features_config.h b/board-support/efr32/mgm24/BRD4318A/config/sl_openthread_features_config.h index 22340498d..a3697f8af 100644 --- a/board-support/efr32/mgm24/BRD4318A/config/sl_openthread_features_config.h +++ b/board-support/efr32/mgm24/BRD4318A/config/sl_openthread_features_config.h @@ -65,6 +65,7 @@ #define OPENTHREAD_CONFIG_MAC_CSL_RECEIVER_ENABLE 1 #endif // CSL Scheduling Uncertainty (±10 us units) <12..999:1> +// Left unchanged the value will be set to 175 for RCPs, 20 for FTDs, and 12 for MTDs #ifndef SL_OPENTHREAD_CSL_TX_UNCERTAINTY #if OPENTHREAD_RADIO #define SL_OPENTHREAD_CSL_TX_UNCERTAINTY 175 @@ -142,12 +143,10 @@ #define OPENTHREAD_CONFIG_CHANNEL_MONITOR_ENABLE 0 #endif // - -// Commissioner +// Commissioner #ifndef OPENTHREAD_CONFIG_COMMISSIONER_ENABLE #define OPENTHREAD_CONFIG_COMMISSIONER_ENABLE 0 #endif - // Max Joiner Entries // The maximum number of Joiner entries maintained by the Commissioner. // 2 @@ -155,7 +154,6 @@ #define OPENTHREAD_CONFIG_COMMISSIONER_MAX_JOINER_ENTRIES 2 #endif // - // COAP API #ifndef OPENTHREAD_CONFIG_COAP_API_ENABLE #define OPENTHREAD_CONFIG_COAP_API_ENABLE 0 @@ -171,6 +169,11 @@ #define OPENTHREAD_CONFIG_COAP_SECURE_API_ENABLE 0 #endif // +// COAP Blockwise Transfer +#ifndef OPENTHREAD_CONFIG_COAP_BLOCKWISE_TRANSFER_ENABLE +#define OPENTHREAD_CONFIG_COAP_BLOCKWISE_TRANSFER_ENABLE 0 +#endif +// // DHCP6 Client #ifndef OPENTHREAD_CONFIG_DHCP6_CLIENT_ENABLE #define OPENTHREAD_CONFIG_DHCP6_CLIENT_ENABLE 0 @@ -196,16 +199,27 @@ #define OPENTHREAD_CONFIG_IP6_FRAGMENTATION_ENABLE 0 #endif // -// Maximum number of IPv6 unicast addresses allowed to be externally added +// IPv6 Limits +// Maximum IPv6 external unicast addresses +// Maximum number of IPv6 unicast addresses allowed to be externally added +// 4 #ifndef OPENTHREAD_CONFIG_IP6_MAX_EXT_UCAST_ADDRS #define OPENTHREAD_CONFIG_IP6_MAX_EXT_UCAST_ADDRS 4 #endif -// -// Maximum number of IPv6 multicast addresses allowed to be externally added +// Maximum IPv6 external multicast addresses +// Maximum number of IPv6 multicast addresses allowed to be externally added +// 4 #ifndef OPENTHREAD_CONFIG_IP6_MAX_EXT_MCAST_ADDRS #define OPENTHREAD_CONFIG_IP6_MAX_EXT_MCAST_ADDRS 4 #endif -// +// Maximum IPv6 address registrations for MTD +// The maximum number of IPv6 address registrations for MTD. +// If left unchanged will default to the value of OPENTHREAD_CONFIG_MLE_IP_ADDRS_PER_CHILD +// 4 +#ifndef OPENTHREAD_CONFIG_MLE_IP_ADDRS_TO_REGISTER +#define OPENTHREAD_CONFIG_MLE_IP_ADDRS_TO_REGISTER (OPENTHREAD_CONFIG_MLE_IP_ADDRS_PER_CHILD) +#endif +// // Jam Detection #ifndef OPENTHREAD_CONFIG_JAM_DETECTION_ENABLE #define OPENTHREAD_CONFIG_JAM_DETECTION_ENABLE 0 @@ -226,6 +240,14 @@ #define OPENTHREAD_CONFIG_MAC_FILTER_ENABLE 0 #endif // +// MLE Children +// Maximum number of Thread children supported by the device +// Default is 10. Used by the Thread stack to configure the size of child table. +// 10 +#ifndef OPENTHREAD_CONFIG_MLE_MAX_CHILDREN +#define OPENTHREAD_CONFIG_MLE_MAX_CHILDREN 10 +#endif +// // MLE Long Routes extension (experimental) #ifndef OPENTHREAD_CONFIG_MLE_LONG_ROUTES_ENABLE #define OPENTHREAD_CONFIG_MLE_LONG_ROUTES_ENABLE 0 @@ -235,27 +257,66 @@ #ifndef OPENTHREAD_CONFIG_MULTIPAN_RCP_ENABLE #define OPENTHREAD_CONFIG_MULTIPAN_RCP_ENABLE 0 #endif +// Broadcast IID for spinel frames +// Define broadcast IID for spinel frames dedicated to all hosts in multipan configuration +// 0 +#ifndef OPENTHREAD_SPINEL_CONFIG_BROADCAST_IID +#define OPENTHREAD_SPINEL_CONFIG_BROADCAST_IID 0 +#endif +#if OPENTHREAD_CONFIG_MULTIPAN_RCP_ENABLE +// Maximum number of Zigbee children for multiprotocol (DMP) builds +// Ensures correct table sizing for Zigbee when DMP/multipan is enabled. +// 6 +#ifndef SL_ZIGBEE_MAX_END_DEVICE_CHILDREN +#define SL_ZIGBEE_MAX_END_DEVICE_CHILDREN 6 +#endif +#endif // // Multiple OpenThread Instances #ifndef OPENTHREAD_CONFIG_MULTIPLE_INSTANCE_ENABLE #define OPENTHREAD_CONFIG_MULTIPLE_INSTANCE_ENABLE 0 #endif -// // Multiple Static Instance Support #ifndef OPENTHREAD_CONFIG_MULTIPLE_STATIC_INSTANCE_ENABLE #define OPENTHREAD_CONFIG_MULTIPLE_STATIC_INSTANCE_ENABLE 0 #endif -// -// Number of OpenThread Instances For Static Buffer Allocation +// Number of OpenThread Instances +// Default is 2. Number of OpenThread Instances For Static Buffer Allocation. +// 2 #ifndef OPENTHREAD_CONFIG_MULTIPLE_INSTANCE_NUM #define OPENTHREAD_CONFIG_MULTIPLE_INSTANCE_NUM 2 #endif // -// Define broadcast IID for spinel frames dedicated to all hosts in multipan configuration -#ifndef OPENTHREAD_SPINEL_CONFIG_BROADCAST_IID -#define OPENTHREAD_SPINEL_CONFIG_BROADCAST_IID 0 -#endif // +// Define maximum total source match table entries for both OT and Zigbee. +// In multi-instance builds (SoC or RCP/host), table must support all OT instances + Zigbee. +// For single instance (default), table sized to just OT children. +// This value is used to size all source match tables in both OT and Zigbee code. +// Note: this is purposedly not being setup with CMSIS annotations. +#ifndef RADIO_CONFIG_MAX_SRC_MATCH_ENTRIES +#if OPENTHREAD_CONFIG_MULTIPLE_INSTANCE_ENABLE +#if SL_ZIGBEE_MAX_END_DEVICE_CHILDREN +// Multipan / DMP case: OT + Zigbee +#define RADIO_CONFIG_MAX_SRC_MATCH_ENTRIES \ + ((OPENTHREAD_CONFIG_MLE_MAX_CHILDREN * (OPENTHREAD_CONFIG_MULTIPLE_INSTANCE_NUM - 1)) \ + + SL_ZIGBEE_MAX_END_DEVICE_CHILDREN) +#else +// Multi-instance OT-only case +#define RADIO_CONFIG_MAX_SRC_MATCH_ENTRIES \ + (OPENTHREAD_CONFIG_MLE_MAX_CHILDREN * OPENTHREAD_CONFIG_MULTIPLE_INSTANCE_NUM) +#endif +#else +// Single-instance OT (SoC / NCP / non-multipan RCP) +#define RADIO_CONFIG_MAX_SRC_MATCH_ENTRIES OPENTHREAD_CONFIG_MLE_MAX_CHILDREN +#endif +#endif +// Spinel Match Table +// Maximum number of spinel source match table entries +// Ensure that this value is the total of the number of openthread children times the number of openthread instances plus the number of Zigbee children. +#ifndef OPENTHREAD_SPINEL_CONFIG_MAX_SRC_MATCH_ENTRIES +#define OPENTHREAD_SPINEL_CONFIG_MAX_SRC_MATCH_ENTRIES RADIO_CONFIG_MAX_SRC_MATCH_ENTRIES +#endif +// // OTNS (OpenThread Network Simulator) #ifndef OPENTHREAD_CONFIG_OTNS_ENABLE #define OPENTHREAD_CONFIG_OTNS_ENABLE 0 @@ -265,13 +326,23 @@ #ifndef OPENTHREAD_CONFIG_PING_SENDER_ENABLE #define OPENTHREAD_CONFIG_PING_SENDER_ENABLE 1 #endif - // // Power Calibration Module (RCP only configuration) #ifndef OPENTHREAD_CONFIG_POWER_CALIBRATION_ENABLE #define OPENTHREAD_CONFIG_POWER_CALIBRATION_ENABLE 0 #endif - +// Maximum raw power calibration length +// Max raw power calibration length +// 4 +#ifndef SL_OPENTHREAD_RAW_POWER_CALIBRATION_LENGTH +#define SL_OPENTHREAD_RAW_POWER_CALIBRATION_LENGTH 4 +#endif +// Maximum FEM config setting length +// Max FEM config setting length +// 4 +#ifndef SL_OPENTHREAD_FEM_SETTING_LENGTH +#define SL_OPENTHREAD_FEM_SETTING_LENGTH 4 +#endif // // Platform UDP #ifndef OPENTHREAD_CONFIG_PLATFORM_UDP_ENABLE @@ -309,7 +380,14 @@ #endif // // Time Synchronization Service +#ifndef OPENTHREAD_CONFIG_TIME_SYNC_ENABLE #define OPENTHREAD_CONFIG_TIME_SYNC_ENABLE 0 +#endif +// +// Uptime of OpenThread instance +#ifndef OPENTHREAD_CONFIG_UPTIME_ENABLE +#define OPENTHREAD_CONFIG_UPTIME_ENABLE 1 +#endif // // UDP Forward #ifndef OPENTHREAD_CONFIG_UDP_FORWARD_ENABLE @@ -321,28 +399,22 @@ #define OPENTHREAD_CONFIG_MAC_BEACON_PAYLOAD_PARSING_ENABLE 1 #endif // -// Max raw power calibration length. -#ifndef SL_OPENTHREAD_RAW_POWER_CALIBRATION_LENGTH -#define SL_OPENTHREAD_RAW_POWER_CALIBRATION_LENGTH 4 -#endif -// -// Max FEM config setting length. -#ifndef SL_OPENTHREAD_FEM_SETTING_LENGTH -#define SL_OPENTHREAD_FEM_SETTING_LENGTH 4 -#endif -// -// The maximum number of RX buffers to use in the radio driver. -// 16 +// Radio Driver RX buffers +// Maximum number of RX buffers +// The maximum number of RX buffers to use in the radio driver. +// 16 #ifndef SL_OPENTHREAD_RADIO_RX_BUFFER_COUNT #define SL_OPENTHREAD_RADIO_RX_BUFFER_COUNT 16 #endif // +// // Logging // LOG_OUTPUT // NONE // APP // PLATFORM_DEFINED -// Default: OPENTHREAD_CONFIG_LOG_OUTPUT_PLATFORM_DEFINED +// Default: OPENTHREAD_CONFIG_LOG_OUTPUT_APP +// OPENTHREAD_CONFIG_LOG_OUTPUT_APP #ifndef OPENTHREAD_CONFIG_LOG_OUTPUT #define OPENTHREAD_CONFIG_LOG_OUTPUT OPENTHREAD_CONFIG_LOG_OUTPUT_APP #endif @@ -365,6 +437,7 @@ // INFO // DEBG // Default: OT_LOG_LEVEL_DEBG +// OT_LOG_LEVEL_DEBG #ifndef OPENTHREAD_CONFIG_LOG_LEVEL #define OPENTHREAD_CONFIG_LOG_LEVEL OT_LOG_LEVEL_DEBG #endif @@ -387,11 +460,10 @@ #endif // OPENTHREAD_FULL_LOGS_ENABLE -// Log crash dump after initialization +// Log crash dump after initialization #ifndef OPENTHREAD_CONFIG_PLATFORM_LOG_CRASH_DUMP_ENABLE #define OPENTHREAD_CONFIG_PLATFORM_LOG_CRASH_DUMP_ENABLE 0 #endif -// // // diff --git a/board-support/efr32/mgm24/BRD4318A/config/sl_power_manager_config.h b/board-support/efr32/mgm24/BRD4318A/config/sl_power_manager_config.h index 3c240b843..86b9fef27 100644 --- a/board-support/efr32/mgm24/BRD4318A/config/sl_power_manager_config.h +++ b/board-support/efr32/mgm24/BRD4318A/config/sl_power_manager_config.h @@ -37,24 +37,40 @@ // Enable custom IRQ handler for external HF oscillator. // Enable if CMU_IRQHandler/HFXO0_IRQHandler is needed from your application. -// The function sl_power_manager_irq_handler() will have to be called from you custom handler if this is enabled. +// The function sl_power_manager_irq_handler() will have to be called from your custom handler if this is enabled. // Default: 0 +#ifndef SL_POWER_MANAGER_CUSTOM_HF_OSCILLATOR_IRQ_HANDLER #define SL_POWER_MANAGER_CUSTOM_HF_OSCILLATOR_IRQ_HANDLER 0 +#endif // Enable fast wakeup (disable voltage scaling in EM2/3 mode) // Enable or disable voltage scaling in EM2/3 modes (when available). This decreases wakeup time by about 30 us. // Deprecated. It is replaced by the function sl_power_manager_em23_voltage_scaling_enable_fast_wakeup() // Default: 0 +#ifndef SL_POWER_MANAGER_CONFIG_VOLTAGE_SCALING_FAST_WAKEUP #define SL_POWER_MANAGER_CONFIG_VOLTAGE_SCALING_FAST_WAKEUP 0 +#endif + +// Enable voltage scaling in EM0 and EM1 mode. +// Enable or disable voltage scaling in EM0/1 modes. With this config enabled, the voltage +// scaling will be configured at the lowest possible level based on the system clock. +// Default: 0 +#ifndef SL_POWER_MANAGER_ENABLE_EM01_VOLTAGE_SCALING +#define SL_POWER_MANAGER_ENABLE_EM01_VOLTAGE_SCALING 0 +#endif // Enable debugging feature // Enable or disable debugging features (trace the different modules that have requirements). // Default: 0 +#ifndef SL_POWER_MANAGER_DEBUG #define SL_POWER_MANAGER_DEBUG 0 +#endif // Maximum numbers of requirements that can be logged // Default: 10 +#ifndef SL_POWER_MANAGER_DEBUG_POOL_SIZE #define SL_POWER_MANAGER_DEBUG_POOL_SIZE 10 +#endif // // Pin retention mode @@ -63,14 +79,18 @@ // Retention through EM4 // Retention through EM4 and wakeup // power_manager_pin_retention_disable +#ifndef SL_POWER_MANAGER_INIT_EMU_EM4_PIN_RETENTION_MODE #define SL_POWER_MANAGER_INIT_EMU_EM4_PIN_RETENTION_MODE EMU_EM4CTRL_EM4IORETMODE_DISABLE +#endif // Enable EM2 debugging feature // Enable or disable debugging features. // Force PD0B/PD0D to stay on during EM2 entry. This allows the debugger to remain connected in EM2 and EM3. // Enabling debug connectivity results in an increased power consumption in EM2/EM3. // Default: 1 +#ifndef SL_POWER_MANAGER_INIT_EMU_EM2_DEBUG_ENABLE #define SL_POWER_MANAGER_INIT_EMU_EM2_DEBUG_ENABLE 1 +#endif // // diff --git a/board-support/efr32/mgm24/BRD4318A/config/sl_rail_util_pti_config.h b/board-support/efr32/mgm24/BRD4318A/config/sl_rail_util_pti_config.h index bdd36734c..736b91558 100644 --- a/board-support/efr32/mgm24/BRD4318A/config/sl_rail_util_pti_config.h +++ b/board-support/efr32/mgm24/BRD4318A/config/sl_rail_util_pti_config.h @@ -35,12 +35,12 @@ // PTI Configuration // PTI mode -// UART -// UART onewire -// SPI -// Disabled -// Default: RAIL_PTI_MODE_UART -#define SL_RAIL_UTIL_PTI_MODE RAIL_PTI_MODE_UART +// UART +// UART onewire +// SPI +// Disabled +// Default: SL_RAIL_PTI_MODE_UART +#define SL_RAIL_UTIL_PTI_MODE SL_RAIL_PTI_MODE_UART // PTI Baud Rate (Hertz) // <147800-20000000:1> diff --git a/board-support/efr32/mgm24/BRD4318A/config/sl_simple_button_btn0_config.h b/board-support/efr32/mgm24/BRD4318A/config/sl_simple_button_btn0_config.h index 23e27379c..552aa94c9 100644 --- a/board-support/efr32/mgm24/BRD4318A/config/sl_simple_button_btn0_config.h +++ b/board-support/efr32/mgm24/BRD4318A/config/sl_simple_button_btn0_config.h @@ -48,9 +48,12 @@ // SL_SIMPLE_BUTTON_BTN0 // $[GPIO_SL_SIMPLE_BUTTON_BTN0] +#ifndef SL_SIMPLE_BUTTON_BTN0_PORT #define SL_SIMPLE_BUTTON_BTN0_PORT SL_GPIO_PORT_B +#endif +#ifndef SL_SIMPLE_BUTTON_BTN0_PIN #define SL_SIMPLE_BUTTON_BTN0_PIN 1 - +#endif // [GPIO_SL_SIMPLE_BUTTON_BTN0]$ // <<< sl:end pin_tool >>> diff --git a/board-support/efr32/mgm24/BRD4318A/config/sl_simple_button_btn1_config.h b/board-support/efr32/mgm24/BRD4318A/config/sl_simple_button_btn1_config.h index 928a4d5c2..1df1ce0a1 100644 --- a/board-support/efr32/mgm24/BRD4318A/config/sl_simple_button_btn1_config.h +++ b/board-support/efr32/mgm24/BRD4318A/config/sl_simple_button_btn1_config.h @@ -48,9 +48,12 @@ // SL_SIMPLE_BUTTON_BTN1 // $[GPIO_SL_SIMPLE_BUTTON_BTN1] +#ifndef SL_SIMPLE_BUTTON_BTN1_PORT #define SL_SIMPLE_BUTTON_BTN1_PORT SL_GPIO_PORT_B +#endif +#ifndef SL_SIMPLE_BUTTON_BTN1_PIN #define SL_SIMPLE_BUTTON_BTN1_PIN 3 - +#endif // [GPIO_SL_SIMPLE_BUTTON_BTN1]$ // <<< sl:end pin_tool >>> diff --git a/board-support/efr32/mgm24/BRD4319A/autogen/sl_bluetooth.c b/board-support/efr32/mgm24/BRD4319A/autogen/sl_bluetooth.c index 4cac19436..0a5f1a969 100644 --- a/board-support/efr32/mgm24/BRD4319A/autogen/sl_bluetooth.c +++ b/board-support/efr32/mgm24/BRD4319A/autogen/sl_bluetooth.c @@ -30,6 +30,8 @@ #include #include "sl_bluetooth.h" +#include "sli_bt_api.h" +#include "sli_bgapi.h" #include "sl_assert.h" #include "sl_bt_stack_init.h" #include "sl_component_catalog.h" @@ -68,17 +70,23 @@ void sl_bt_step(void) { sl_bt_msg_t evt; + // Run the Bluetooth host stack processing step sl_bt_run(); - uint32_t event_len = sl_bt_event_pending_len(); - // For preventing from data loss, the event will be kept in the stack's queue - // if application cannot process it at the moment. + + // Check the length of the next event, if any, and verify that the application + // can process it. To prevent data loss, the event will be kept in the stack's + // queue if the application cannot process it at the moment. + size_t event_len = sli_bgapi_device_peek_event_len(&sli_bt_bgapi_device); if ((event_len == 0) || (!sl_bt_can_process_event(event_len))) { return; } - // Pop (non-blocking) a Bluetooth stack event from event queue. - sl_status_t status = sl_bt_pop_event(&evt); - if(status != SL_STATUS_OK){ + // Pop the event and process it if successful + sl_status_t status = sli_bgapi_device_pop_event(&sli_bt_bgapi_device, + sizeof(evt), + &evt); + + if (status != SL_STATUS_OK) { return; } sl_bt_process_event(&evt); diff --git a/board-support/efr32/mgm24/BRD4319A/autogen/sl_component_catalog.h b/board-support/efr32/mgm24/BRD4319A/autogen/sl_component_catalog.h index 16e44d190..a1f3f4bab 100644 --- a/board-support/efr32/mgm24/BRD4319A/autogen/sl_component_catalog.h +++ b/board-support/efr32/mgm24/BRD4319A/autogen/sl_component_catalog.h @@ -3,6 +3,7 @@ // APIs present in project #define SL_CATALOG_BGAPI_PROTOCOL_PRESENT +#define SL_CATALOG_BGAPI_PROTOCOL_RTOS_ADAPTATION_PRESENT #define SL_CATALOG_BLUETOOTH_CONFIGURATION_PRESENT #define SL_CATALOG_BLUETOOTH_CTE_SUPPORT_PRESENT #define SL_CATALOG_BLUETOOTH_CS_SUPPORT_PRESENT @@ -24,7 +25,6 @@ #define SL_CATALOG_CMSIS_OS_COMMON_PRESENT #define SL_CATALOG_CPP_SUPPORT_PRESENT #define SL_CATALOG_DEVICE_INIT_PRESENT -#define SL_CATALOG_DEVICE_INIT_CORE_PRESENT #define SL_CATALOG_DEVICE_INIT_DCDC_PRESENT #define SL_CATALOG_EMLIB_CORE_PRESENT #define SL_CATALOG_EMLIB_RMU_PRESENT @@ -33,6 +33,7 @@ #define SL_CATALOG_GATT_CONFIGURATION_PRESENT #define SL_CATALOG_GPIO_PRESENT #define SL_CATALOG_GPIOINTERRUPT_PRESENT +#define SL_CATALOG_HAL_SYSTEM_PRESENT #define SL_CATALOG_HFXO_MANAGER_PRESENT #define SL_CATALOG_INTERRUPT_MANAGER_PRESENT #define SL_CATALOG_IOSTREAM_PRESENT @@ -44,13 +45,12 @@ #define SL_CATALOG_OPENTHREAD_CLI_PRESENT #define SL_CATALOG_OT_GP_INTERFACE_PRESENT #define SL_CATALOG_OPENTHREAD_STACK_PRESENT -#define SL_CATALOG_OPENTHREAD_UART_PRESENT #define SL_CATALOG_POWER_MANAGER_PRESENT +#define SL_CATALOG_POWER_MANAGER_DEEPSLEEP_PRESENT #define SL_CATALOG_PSA_CRYPTO_PRESENT #define SL_CATALOG_RADIO_PRIORITY_15_4_PRESENT #define SL_CATALOG_RAIL_LIB_PRESENT #define SL_CATALOG_RAIL_UTIL_PTI_PRESENT -#define SL_CATALOG_SE_MANAGER_PRESENT #define SL_CATALOG_SECURITY_MANAGER_PRESENT #define SL_CATALOG_SEGGER_RTT_PRESENT #define SL_CATALOG_BTN0_PRESENT diff --git a/board-support/efr32/mgm24/BRD4319A/autogen/sl_event_handler.c b/board-support/efr32/mgm24/BRD4319A/autogen/sl_event_handler.c index 98b97dc21..08ff9ad2a 100644 --- a/board-support/efr32/mgm24/BRD4319A/autogen/sl_event_handler.c +++ b/board-support/efr32/mgm24/BRD4319A/autogen/sl_event_handler.c @@ -3,7 +3,11 @@ #include "sl_board_init.h" #include "sl_clock_manager.h" #include "sl_hfxo_manager.h" -#include "pa_conversions_efr32.h" +#include "sl_rail_util_compatible_pa.h" +#if !(defined(SLI_SI91X_ENABLE_BLE) && SLI_SI91X_ENABLE_BLE) +#include "sl_bluetooth.h" +#include "sl_rail_util_power_manager_init.h" +#endif // !SLI_SI91X_ENABLE_BLE #include "sl_rail_util_power_manager_init.h" #include "sl_rail_util_pti.h" #include "sl_rail_util_rssi.h" @@ -13,13 +17,22 @@ #include "platform-efr32.h" #include "sl_bt_rtos_adaptation.h" #include "sl_bluetooth.h" +#include "sl_debug_swo.h" #include "sl_gpio.h" #include "gpiointerrupt.h" #include "sl_iostream_rtt.h" #include "sl_mbedtls.h" #include "sl_ot_rtos_adaptation.h" #include "sl_simple_button_instances.h" + +#if (defined(SL_MATTER_RGB_LED_ENABLED) && SL_MATTER_RGB_LED_ENABLED == 1) +#include "sl_simple_rgb_pwm_led_instances.h" +#else +#include "sl_simple_led_instances.h" +#endif //(SL_MATTER_RGB_LED_ENABLED) && SL_MATTER_RGB_LED_ENABLED == 1) +#if defined(CONFIG_ENABLE_UART) #include "sl_uartdrv_instances.h" +#endif // CONFIG_ENABLE_UART #include "psa/crypto.h" #include "sl_se_manager.h" #include "sli_protocol_crypto.h" @@ -27,6 +40,7 @@ #include "sl_iostream_init_instances.h" #include "cmsis_os2.h" #include "nvm3_default.h" + #include "sl_iostream_handles.h" void sli_driver_permanent_allocation(void) @@ -72,9 +86,9 @@ void sl_driver_init(void) sl_gpio_init(); GPIOINT_Init(); sl_simple_button_init_instances(); -#if defined(CONFIG_ENABLE_UART) + #if defined(CONFIG_ENABLE_UART) sl_uartdrv_init_instances(); -#endif +#endif // CONFIG_ENABLE_UART } void sl_service_init(void) @@ -93,19 +107,25 @@ void sl_service_init(void) void sl_stack_init(void) { +#if !SLI_SI91X_ENABLE_BLE sl_rail_util_pa_init(); sl_rail_util_power_manager_init(); sl_rail_util_pti_init(); sl_rail_util_rssi_init(); sl_fem_util_init(); - sl_ot_sys_init(); sli_bt_stack_functional_init(); +#endif // !SLI_SI91X_ENABLE_BLE +#ifdef SL_OT_ENABLE + sl_ot_sys_init(); +#endif // SL_OT_ENABLE } void sl_internal_app_init(void) { +#ifdef SL_OT_ENABLE sl_ot_rtos_stack_init(); sl_ot_rtos_app_init(); +#endif // SL_OT_ENABLE } void sl_iostream_init_instances_stage_1(void) @@ -117,4 +137,3 @@ void sl_iostream_init_instances_stage_2(void) { sl_iostream_set_console_instance(); } - diff --git a/board-support/efr32/mgm24/BRD4319A/autogen/sli_psa_config_autogen.h b/board-support/efr32/mgm24/BRD4319A/autogen/sli_psa_config_autogen.h index 055d8a95e..f90dd6e9a 100644 --- a/board-support/efr32/mgm24/BRD4319A/autogen/sli_psa_config_autogen.h +++ b/board-support/efr32/mgm24/BRD4319A/autogen/sli_psa_config_autogen.h @@ -24,7 +24,12 @@ #define PSA_WANT_ALG_TLS12_PSK_TO_MS 1 #define MBEDTLS_PSA_CRYPTO_EXTERNAL_RNG +#if defined(KSU_MAX_KEY_SLOTS) +#include "sli_ksu_keyslots_config.h" +#define MBEDTLS_PSA_KEY_SLOT_COUNT (22 + 15 + 1 + SL_PSA_KEY_USER_SLOT_COUNT + SLI_KSU_MAX_KEY_SLOTS - SLI_KSU_KEY_SLOT_USER_START + 1) +#else #define MBEDTLS_PSA_KEY_SLOT_COUNT (22 + 15 + 1 + SL_PSA_KEY_USER_SLOT_COUNT + 1) +#endif #ifndef SL_PSA_ITS_MAX_FILES #define SL_PSA_ITS_MAX_FILES (1 + SL_PSA_ITS_USER_MAX_FILES) #endif diff --git a/board-support/efr32/mgm24/BRD4319A/config/pin_config.h b/board-support/efr32/mgm24/BRD4319A/config/pin_config.h new file mode 100644 index 000000000..51b8a7fa2 --- /dev/null +++ b/board-support/efr32/mgm24/BRD4319A/config/pin_config.h @@ -0,0 +1,216 @@ +#ifndef PIN_CONFIG_H +#define PIN_CONFIG_H + +// $[CMU] +// [CMU]$ + +// $[LFXO] +// [LFXO]$ + +// $[PRS.ASYNCH0] +// [PRS.ASYNCH0]$ + +// $[PRS.ASYNCH1] +// [PRS.ASYNCH1]$ + +// $[PRS.ASYNCH2] +// [PRS.ASYNCH2]$ + +// $[PRS.ASYNCH3] +// [PRS.ASYNCH3]$ + +// $[PRS.ASYNCH4] +// [PRS.ASYNCH4]$ + +// $[PRS.ASYNCH5] +// [PRS.ASYNCH5]$ + +// $[PRS.ASYNCH6] +// [PRS.ASYNCH6]$ + +// $[PRS.ASYNCH7] +// [PRS.ASYNCH7]$ + +// $[PRS.ASYNCH8] +// [PRS.ASYNCH8]$ + +// $[PRS.ASYNCH9] +// [PRS.ASYNCH9]$ + +// $[PRS.ASYNCH10] +// [PRS.ASYNCH10]$ + +// $[PRS.ASYNCH11] +// [PRS.ASYNCH11]$ + +// $[PRS.ASYNCH12] +// [PRS.ASYNCH12]$ + +// $[PRS.ASYNCH13] +// [PRS.ASYNCH13]$ + +// $[PRS.ASYNCH14] +// [PRS.ASYNCH14]$ + +// $[PRS.ASYNCH15] +// [PRS.ASYNCH15]$ + +// $[PRS.SYNCH0] +// [PRS.SYNCH0]$ + +// $[PRS.SYNCH1] +// [PRS.SYNCH1]$ + +// $[PRS.SYNCH2] +// [PRS.SYNCH2]$ + +// $[PRS.SYNCH3] +// [PRS.SYNCH3]$ + +// $[GPIO] +// GPIO SWV on PA03 +#ifndef GPIO_SWV_PORT +#define GPIO_SWV_PORT SL_GPIO_PORT_A +#endif +#ifndef GPIO_SWV_PIN +#define GPIO_SWV_PIN 3 +#endif + +// [GPIO]$ + +// $[TIMER0] +// [TIMER0]$ + +// $[TIMER1] +// [TIMER1]$ + +// $[TIMER2] +// [TIMER2]$ + +// $[TIMER3] +// [TIMER3]$ + +// $[TIMER4] +// [TIMER4]$ + +// $[USART0] +// [USART0]$ + +// $[I2C1] +// [I2C1]$ + +// $[EUSART1] +// EUSART1 CTS on PC03 +#ifndef EUSART1_CTS_PORT +#define EUSART1_CTS_PORT SL_GPIO_PORT_C +#endif +#ifndef EUSART1_CTS_PIN +#define EUSART1_CTS_PIN 3 +#endif + +// EUSART1 RTS on PC02 +#ifndef EUSART1_RTS_PORT +#define EUSART1_RTS_PORT SL_GPIO_PORT_C +#endif +#ifndef EUSART1_RTS_PIN +#define EUSART1_RTS_PIN 2 +#endif + +// EUSART1 RX on PD00 +#ifndef EUSART1_RX_PORT +#define EUSART1_RX_PORT SL_GPIO_PORT_D +#endif +#ifndef EUSART1_RX_PIN +#define EUSART1_RX_PIN 0 +#endif + +// EUSART1 TX on PD01 +#ifndef EUSART1_TX_PORT +#define EUSART1_TX_PORT SL_GPIO_PORT_D +#endif +#ifndef EUSART1_TX_PIN +#define EUSART1_TX_PIN 1 +#endif + +// [EUSART1]$ + +// $[KEYSCAN] +// [KEYSCAN]$ + +// $[LETIMER0] +// [LETIMER0]$ + +// $[IADC0] +// [IADC0]$ + +// $[ACMP0] +// [ACMP0]$ + +// $[ACMP1] +// [ACMP1]$ + +// $[VDAC0] +// [VDAC0]$ + +// $[VDAC1] +// [VDAC1]$ + +// $[PCNT0] +// [PCNT0]$ + +// $[HFXO0] +// [HFXO0]$ + +// $[I2C0] +// [I2C0]$ + +// $[EUSART0] +// [EUSART0]$ + +// $[PTI] +// PTI DFRAME on PC05 +#ifndef PTI_DFRAME_PORT +#define PTI_DFRAME_PORT SL_GPIO_PORT_C +#endif +#ifndef PTI_DFRAME_PIN +#define PTI_DFRAME_PIN 5 +#endif + +// PTI DOUT on PC04 +#ifndef PTI_DOUT_PORT +#define PTI_DOUT_PORT SL_GPIO_PORT_C +#endif +#ifndef PTI_DOUT_PIN +#define PTI_DOUT_PIN 4 +#endif + +// [PTI]$ + +// $[MODEM] +// [MODEM]$ + +// $[CUSTOM_PIN_NAME] +#ifndef _PORT +#define _PORT SL_GPIO_PORT_A +#endif +#ifndef _PIN +#define _PIN 1 +#endif + + + + + + + + + + + + +// [CUSTOM_PIN_NAME]$ + + +#endif // PIN_CONFIG_H + + diff --git a/board-support/efr32/mgm24/BRD4319A/config/psa_crypto_config.h b/board-support/efr32/mgm24/BRD4319A/config/psa_crypto_config.h index 20703b41d..773ce99e0 100644 --- a/board-support/efr32/mgm24/BRD4319A/config/psa_crypto_config.h +++ b/board-support/efr32/mgm24/BRD4319A/config/psa_crypto_config.h @@ -27,26 +27,32 @@ // Default: 4 #define SL_PSA_KEY_USER_SLOT_COUNT (4) -// PSA Maximum User Persistent Keys Count <0-1024> +// Maximum User Persistent PSA Key Count <0-1024> // Maximum amount of keys (or other files) that can be stored persistently -// by the application through the PSA interface, when persistent storage -// support for PSA Crypto is included in the project. -// Due to caching logic, this setting does have an impact on static RAM usage. -// Note that this number is added to the potential requirements from other -// software components in the project, such that the total amount of keys -// which can be stored through the ITS backend can be higher than what is -// configured here. +// by the user application, when PSA ITS (Internal Trusted Storage) support +// is included in the project. +// NOTE: +// In addition to SL_PSA_ITS_USER_MAX_FILES (number of user keys) the +// application may be configured to include SDK components that require an +// additional number of keys. The sum of user keys and SDK component keys +// is computed and the result, called SL_PSA_ITS_MAX_FILES, is used +// internally in the PSA ITS driver. // -// WARNING: When changing this setting on an application that is already -// deployed, and thus will get the change through an application upgrade, -// care should be taken to ensure that the setting is only ever increased, -// and never decreased. Decreasing this setting might cause previously -// stored keys/files to become inaccessible. +// WARNING: +// For applications using PSA ITS driver version 1 or 2, when changing the +// SL_PSA_ITS_USER_MAX_FILES in an application that is already depeloyed, +// and thus will get the change through an application upgrade, care should +// be taken to ensure that the total sum of keys SL_PSA_ITS_MAX_FILES is +// only ever equal or increased, and never decreased. Decreasing this +// setting might cause previously stored keys/files to become inaccessible, +// ITS should be cleared and all files need to be stored again. // -// It is not possible to change this setting when using V3 ITS Driver. -// The file-storage indexing is dependent on the maximum number of files, -// and if SL_PSA_ITS_USER_MAX_FILES is changed, ITS should be cleared and -// all files need to be stored again. +// For applications using PSA ITS driver version 3, it is not possible to +// change this setting because the file-storage indexing is dependent on the +// maximum number of files (SL_PSA_ITS_MAX_FILES) being consistent, and if +// the sum of SDK component keys and user keys (SL_PSA_ITS_USER_MAX_FILES) +// is changed, may cause previously stored keys/files to become inaccessible +// ITS should be cleared and all files need to be stored again. // Default: 128 #define SL_PSA_ITS_USER_MAX_FILES (128) diff --git a/board-support/efr32/mgm24/BRD4319A/config/sl_bluetooth_config.h b/board-support/efr32/mgm24/BRD4319A/config/sl_bluetooth_config.h index 9b6a804e0..93bfbbcc4 100644 --- a/board-support/efr32/mgm24/BRD4319A/config/sl_bluetooth_config.h +++ b/board-support/efr32/mgm24/BRD4319A/config/sl_bluetooth_config.h @@ -99,6 +99,7 @@ // if the LE Power Control feature is enabled. // When this configuration is passed into stack initialization, the stack // will select the closest value that the device supports. +// API sl_bt_system_set_tx_power() can be used to set the minimum TX power at runtime. // API sl_bt_system_get_tx_power_setting() can be used to query the selected value. #define SL_BT_CONFIG_MIN_TX_POWER (-30) @@ -108,6 +109,7 @@ // advertising, scanning and DTM testing. // When this configuration is passed into stack initialization, the stack // will select the closest value that the device supports. +// API sl_bt_system_set_tx_power() can be used to set the maximum TX power at runtime. // API sl_bt_system_get_tx_power_setting() can be used to query the selected value. #define SL_BT_CONFIG_MAX_TX_POWER (80) diff --git a/board-support/efr32/mgm24/BRD4319A/config/sl_board_control_config.h b/board-support/efr32/mgm24/BRD4319A/config/sl_board_control_config.h index eaa37d8a5..fb5f7f552 100644 --- a/board-support/efr32/mgm24/BRD4319A/config/sl_board_control_config.h +++ b/board-support/efr32/mgm24/BRD4319A/config/sl_board_control_config.h @@ -43,8 +43,12 @@ // SL_BOARD_ENABLE_VCOM // $[GPIO_SL_BOARD_ENABLE_VCOM] -#define SL_BOARD_ENABLE_VCOM_PORT SL_GPIO_PORT_C -#define SL_BOARD_ENABLE_VCOM_PIN 1 +#ifndef SL_BOARD_ENABLE_VCOM_PORT +#define SL_BOARD_ENABLE_VCOM_PORT SL_GPIO_PORT_C +#endif +#ifndef SL_BOARD_ENABLE_VCOM_PIN +#define SL_BOARD_ENABLE_VCOM_PIN 1 +#endif // [GPIO_SL_BOARD_ENABLE_VCOM]$ // <<< sl:end pin_tool >>> diff --git a/board-support/efr32/mgm24/BRD4319A/config/sl_btctrl_config.h b/board-support/efr32/mgm24/BRD4319A/config/sl_btctrl_config.h index ed75a2d0e..403df1ffe 100644 --- a/board-support/efr32/mgm24/BRD4319A/config/sl_btctrl_config.h +++ b/board-support/efr32/mgm24/BRD4319A/config/sl_btctrl_config.h @@ -146,15 +146,27 @@ #define SL_BT_CONTROLLER_ADAPTIVITY_MODE (SL_BTCTRL_CHANNELMAP_FLAG_ACTIVE_ADAPTIVITY) #endif -// Power Amplifier (PA) Configuration -// Automode PA configuration -// Highest available PA configuration -// RAIL Utility component PA configuration -// Select the Power Amplifier configuration -// Default: RAIL Utility component PA configuration -#ifndef SL_BT_CONTROLLER_PA_CONFIG -#define SL_BT_CONTROLLER_PA_CONFIG SL_BT_BLUETOOTH_RAIL_UTIL_PA -#endif +// Advertising Configuration +// Include TX Power in the extended header of primary extended advertising packets +// This is default setting to all advertising sets unless it is specifically overridden by VS_SiliconLabs_Set_Advertising_Config_Bits. +// Default: 0 +// Enabling this option takes effect only if permitted by Le_Set_Extended_Advertising_Parameters +// According to Link Layer specification, Vol 6, Part B, Table 2.4 and Table 2.5: +// Optional in 1M PHY when the advertiser is connectable or scannable, or with auxiliary pointer. +// In other cases, the Extended Advertising TX Power is always optional by settings. +#define SL_BT_CONTROLLER_PRIMARY_EXT_PACKET_INCLUDE_TX_POWER (0) +// +// Include Advertiser Address in the header of primary extended advertising packets +// This is default setting to all advertising sets unless it is specifically overridden by VS_SiliconLabs_Set_Advertising_Config_Bits. +// Default: 0 +// Enabling this option takes effect only if permitted by Le_Set_Extended_Advertising_Parameters +// According to Link Layer specification, Vol 6, Part B, Table 2.4 and Table 2.5: +// Optional in 1M PHY when the advertiser is non-connectable and non-scannable, with auxiliary pointer. +// Mandatory when the advertiser is non-connectable and non-scannable, without auxiliary pointer. +// Forbidden when the advertiser is connectable or scannable. +#define SL_BT_CONTROLLER_PRIMARY_EXT_PACKET_INCLUDE_ADDRESS (0) +// +// Advertising Configuration // Bluetooth Controller Configuration // <<< end of configuration section >>> diff --git a/board-support/efr32/mgm24/BRD4319A/config/sl_clock_manager_tree_config.h b/board-support/efr32/mgm24/BRD4319A/config/sl_clock_manager_tree_config.h index 80819d65b..74976e212 100644 --- a/board-support/efr32/mgm24/BRD4319A/config/sl_clock_manager_tree_config.h +++ b/board-support/efr32/mgm24/BRD4319A/config/sl_clock_manager_tree_config.h @@ -105,9 +105,9 @@ #endif // PCLK branch divider -// MIN // DIV1 // DIV2 +// MIN // PCLK branch is derived from HCLK. This clock drives the APB bus interface. // SL_CLOCK_MANAGER_PCLK_DIV_MIN #ifndef SL_CLOCK_MANAGER_PCLK_DIVIDER diff --git a/board-support/efr32/mgm24/BRD4319A/config/sl_mbedtls_config.h b/board-support/efr32/mgm24/BRD4319A/config/sl_mbedtls_config.h index e249b4d1b..7146ba648 100644 --- a/board-support/efr32/mgm24/BRD4319A/config/sl_mbedtls_config.h +++ b/board-support/efr32/mgm24/BRD4319A/config/sl_mbedtls_config.h @@ -71,9 +71,14 @@ // Default: 1 // This option is enabled assuming all buffers passed to any PSA function reside // in memory that is accessible only to the PSA function during its execution. +// This improves performance by avoiding extra buffer copies, reducing memory +// usage and allocation overhead. However, it is NOT the most secure option and +// should only be enabled if all buffers passed to PSA functions are exclusively +// accessible to PSA and never shared with untrusted code. // This option MUST be disabled whenever buffer arguments are in memory shared // with an untrusted party, for example where arguments to PSA calls are passed -// across a trust boundary. +// across a trust boundary, e.g. if TrustZone is enabled, and the PSA Crypto core +// is placed in the Secure domain. #define SL_MBEDTLS_PSA_ASSUME_EXCLUSIVE_BUFFERS 1 // diff --git a/board-support/efr32/mgm24/BRD4319A/config/sl_memory_manager_config.h b/board-support/efr32/mgm24/BRD4319A/config/sl_memory_manager_config.h index 26b84b107..4a16c29fe 100644 --- a/board-support/efr32/mgm24/BRD4319A/config/sl_memory_manager_config.h +++ b/board-support/efr32/mgm24/BRD4319A/config/sl_memory_manager_config.h @@ -51,4 +51,11 @@ // <<< end of configuration section >>> +// Keep this configuration outside the configuration section until the feature is ready for release. +// Enables the heap fallback mechanism. +// Setting this configuration to 0 will disable the fallback mechanism on DTCM and PSRAM. +// If this configuration is disabled, the memory manager will not attempt to use alternative memory regions for allocations even if using the fallback parameters. +// Default: 1 +#define SL_MEMORY_MANAGER_HEAP_FALLBACK_EN 1 + #endif /* SL_MEMORY_MANAGER_CONFIG_H */ diff --git a/board-support/efr32/mgm24/BRD4319A/config/sl_openthread_features_config.h b/board-support/efr32/mgm24/BRD4319A/config/sl_openthread_features_config.h index 22340498d..a3697f8af 100644 --- a/board-support/efr32/mgm24/BRD4319A/config/sl_openthread_features_config.h +++ b/board-support/efr32/mgm24/BRD4319A/config/sl_openthread_features_config.h @@ -65,6 +65,7 @@ #define OPENTHREAD_CONFIG_MAC_CSL_RECEIVER_ENABLE 1 #endif // CSL Scheduling Uncertainty (±10 us units) <12..999:1> +// Left unchanged the value will be set to 175 for RCPs, 20 for FTDs, and 12 for MTDs #ifndef SL_OPENTHREAD_CSL_TX_UNCERTAINTY #if OPENTHREAD_RADIO #define SL_OPENTHREAD_CSL_TX_UNCERTAINTY 175 @@ -142,12 +143,10 @@ #define OPENTHREAD_CONFIG_CHANNEL_MONITOR_ENABLE 0 #endif // - -// Commissioner +// Commissioner #ifndef OPENTHREAD_CONFIG_COMMISSIONER_ENABLE #define OPENTHREAD_CONFIG_COMMISSIONER_ENABLE 0 #endif - // Max Joiner Entries // The maximum number of Joiner entries maintained by the Commissioner. // 2 @@ -155,7 +154,6 @@ #define OPENTHREAD_CONFIG_COMMISSIONER_MAX_JOINER_ENTRIES 2 #endif // - // COAP API #ifndef OPENTHREAD_CONFIG_COAP_API_ENABLE #define OPENTHREAD_CONFIG_COAP_API_ENABLE 0 @@ -171,6 +169,11 @@ #define OPENTHREAD_CONFIG_COAP_SECURE_API_ENABLE 0 #endif // +// COAP Blockwise Transfer +#ifndef OPENTHREAD_CONFIG_COAP_BLOCKWISE_TRANSFER_ENABLE +#define OPENTHREAD_CONFIG_COAP_BLOCKWISE_TRANSFER_ENABLE 0 +#endif +// // DHCP6 Client #ifndef OPENTHREAD_CONFIG_DHCP6_CLIENT_ENABLE #define OPENTHREAD_CONFIG_DHCP6_CLIENT_ENABLE 0 @@ -196,16 +199,27 @@ #define OPENTHREAD_CONFIG_IP6_FRAGMENTATION_ENABLE 0 #endif // -// Maximum number of IPv6 unicast addresses allowed to be externally added +// IPv6 Limits +// Maximum IPv6 external unicast addresses +// Maximum number of IPv6 unicast addresses allowed to be externally added +// 4 #ifndef OPENTHREAD_CONFIG_IP6_MAX_EXT_UCAST_ADDRS #define OPENTHREAD_CONFIG_IP6_MAX_EXT_UCAST_ADDRS 4 #endif -// -// Maximum number of IPv6 multicast addresses allowed to be externally added +// Maximum IPv6 external multicast addresses +// Maximum number of IPv6 multicast addresses allowed to be externally added +// 4 #ifndef OPENTHREAD_CONFIG_IP6_MAX_EXT_MCAST_ADDRS #define OPENTHREAD_CONFIG_IP6_MAX_EXT_MCAST_ADDRS 4 #endif -// +// Maximum IPv6 address registrations for MTD +// The maximum number of IPv6 address registrations for MTD. +// If left unchanged will default to the value of OPENTHREAD_CONFIG_MLE_IP_ADDRS_PER_CHILD +// 4 +#ifndef OPENTHREAD_CONFIG_MLE_IP_ADDRS_TO_REGISTER +#define OPENTHREAD_CONFIG_MLE_IP_ADDRS_TO_REGISTER (OPENTHREAD_CONFIG_MLE_IP_ADDRS_PER_CHILD) +#endif +// // Jam Detection #ifndef OPENTHREAD_CONFIG_JAM_DETECTION_ENABLE #define OPENTHREAD_CONFIG_JAM_DETECTION_ENABLE 0 @@ -226,6 +240,14 @@ #define OPENTHREAD_CONFIG_MAC_FILTER_ENABLE 0 #endif // +// MLE Children +// Maximum number of Thread children supported by the device +// Default is 10. Used by the Thread stack to configure the size of child table. +// 10 +#ifndef OPENTHREAD_CONFIG_MLE_MAX_CHILDREN +#define OPENTHREAD_CONFIG_MLE_MAX_CHILDREN 10 +#endif +// // MLE Long Routes extension (experimental) #ifndef OPENTHREAD_CONFIG_MLE_LONG_ROUTES_ENABLE #define OPENTHREAD_CONFIG_MLE_LONG_ROUTES_ENABLE 0 @@ -235,27 +257,66 @@ #ifndef OPENTHREAD_CONFIG_MULTIPAN_RCP_ENABLE #define OPENTHREAD_CONFIG_MULTIPAN_RCP_ENABLE 0 #endif +// Broadcast IID for spinel frames +// Define broadcast IID for spinel frames dedicated to all hosts in multipan configuration +// 0 +#ifndef OPENTHREAD_SPINEL_CONFIG_BROADCAST_IID +#define OPENTHREAD_SPINEL_CONFIG_BROADCAST_IID 0 +#endif +#if OPENTHREAD_CONFIG_MULTIPAN_RCP_ENABLE +// Maximum number of Zigbee children for multiprotocol (DMP) builds +// Ensures correct table sizing for Zigbee when DMP/multipan is enabled. +// 6 +#ifndef SL_ZIGBEE_MAX_END_DEVICE_CHILDREN +#define SL_ZIGBEE_MAX_END_DEVICE_CHILDREN 6 +#endif +#endif // // Multiple OpenThread Instances #ifndef OPENTHREAD_CONFIG_MULTIPLE_INSTANCE_ENABLE #define OPENTHREAD_CONFIG_MULTIPLE_INSTANCE_ENABLE 0 #endif -// // Multiple Static Instance Support #ifndef OPENTHREAD_CONFIG_MULTIPLE_STATIC_INSTANCE_ENABLE #define OPENTHREAD_CONFIG_MULTIPLE_STATIC_INSTANCE_ENABLE 0 #endif -// -// Number of OpenThread Instances For Static Buffer Allocation +// Number of OpenThread Instances +// Default is 2. Number of OpenThread Instances For Static Buffer Allocation. +// 2 #ifndef OPENTHREAD_CONFIG_MULTIPLE_INSTANCE_NUM #define OPENTHREAD_CONFIG_MULTIPLE_INSTANCE_NUM 2 #endif // -// Define broadcast IID for spinel frames dedicated to all hosts in multipan configuration -#ifndef OPENTHREAD_SPINEL_CONFIG_BROADCAST_IID -#define OPENTHREAD_SPINEL_CONFIG_BROADCAST_IID 0 -#endif // +// Define maximum total source match table entries for both OT and Zigbee. +// In multi-instance builds (SoC or RCP/host), table must support all OT instances + Zigbee. +// For single instance (default), table sized to just OT children. +// This value is used to size all source match tables in both OT and Zigbee code. +// Note: this is purposedly not being setup with CMSIS annotations. +#ifndef RADIO_CONFIG_MAX_SRC_MATCH_ENTRIES +#if OPENTHREAD_CONFIG_MULTIPLE_INSTANCE_ENABLE +#if SL_ZIGBEE_MAX_END_DEVICE_CHILDREN +// Multipan / DMP case: OT + Zigbee +#define RADIO_CONFIG_MAX_SRC_MATCH_ENTRIES \ + ((OPENTHREAD_CONFIG_MLE_MAX_CHILDREN * (OPENTHREAD_CONFIG_MULTIPLE_INSTANCE_NUM - 1)) \ + + SL_ZIGBEE_MAX_END_DEVICE_CHILDREN) +#else +// Multi-instance OT-only case +#define RADIO_CONFIG_MAX_SRC_MATCH_ENTRIES \ + (OPENTHREAD_CONFIG_MLE_MAX_CHILDREN * OPENTHREAD_CONFIG_MULTIPLE_INSTANCE_NUM) +#endif +#else +// Single-instance OT (SoC / NCP / non-multipan RCP) +#define RADIO_CONFIG_MAX_SRC_MATCH_ENTRIES OPENTHREAD_CONFIG_MLE_MAX_CHILDREN +#endif +#endif +// Spinel Match Table +// Maximum number of spinel source match table entries +// Ensure that this value is the total of the number of openthread children times the number of openthread instances plus the number of Zigbee children. +#ifndef OPENTHREAD_SPINEL_CONFIG_MAX_SRC_MATCH_ENTRIES +#define OPENTHREAD_SPINEL_CONFIG_MAX_SRC_MATCH_ENTRIES RADIO_CONFIG_MAX_SRC_MATCH_ENTRIES +#endif +// // OTNS (OpenThread Network Simulator) #ifndef OPENTHREAD_CONFIG_OTNS_ENABLE #define OPENTHREAD_CONFIG_OTNS_ENABLE 0 @@ -265,13 +326,23 @@ #ifndef OPENTHREAD_CONFIG_PING_SENDER_ENABLE #define OPENTHREAD_CONFIG_PING_SENDER_ENABLE 1 #endif - // // Power Calibration Module (RCP only configuration) #ifndef OPENTHREAD_CONFIG_POWER_CALIBRATION_ENABLE #define OPENTHREAD_CONFIG_POWER_CALIBRATION_ENABLE 0 #endif - +// Maximum raw power calibration length +// Max raw power calibration length +// 4 +#ifndef SL_OPENTHREAD_RAW_POWER_CALIBRATION_LENGTH +#define SL_OPENTHREAD_RAW_POWER_CALIBRATION_LENGTH 4 +#endif +// Maximum FEM config setting length +// Max FEM config setting length +// 4 +#ifndef SL_OPENTHREAD_FEM_SETTING_LENGTH +#define SL_OPENTHREAD_FEM_SETTING_LENGTH 4 +#endif // // Platform UDP #ifndef OPENTHREAD_CONFIG_PLATFORM_UDP_ENABLE @@ -309,7 +380,14 @@ #endif // // Time Synchronization Service +#ifndef OPENTHREAD_CONFIG_TIME_SYNC_ENABLE #define OPENTHREAD_CONFIG_TIME_SYNC_ENABLE 0 +#endif +// +// Uptime of OpenThread instance +#ifndef OPENTHREAD_CONFIG_UPTIME_ENABLE +#define OPENTHREAD_CONFIG_UPTIME_ENABLE 1 +#endif // // UDP Forward #ifndef OPENTHREAD_CONFIG_UDP_FORWARD_ENABLE @@ -321,28 +399,22 @@ #define OPENTHREAD_CONFIG_MAC_BEACON_PAYLOAD_PARSING_ENABLE 1 #endif // -// Max raw power calibration length. -#ifndef SL_OPENTHREAD_RAW_POWER_CALIBRATION_LENGTH -#define SL_OPENTHREAD_RAW_POWER_CALIBRATION_LENGTH 4 -#endif -// -// Max FEM config setting length. -#ifndef SL_OPENTHREAD_FEM_SETTING_LENGTH -#define SL_OPENTHREAD_FEM_SETTING_LENGTH 4 -#endif -// -// The maximum number of RX buffers to use in the radio driver. -// 16 +// Radio Driver RX buffers +// Maximum number of RX buffers +// The maximum number of RX buffers to use in the radio driver. +// 16 #ifndef SL_OPENTHREAD_RADIO_RX_BUFFER_COUNT #define SL_OPENTHREAD_RADIO_RX_BUFFER_COUNT 16 #endif // +// // Logging // LOG_OUTPUT // NONE // APP // PLATFORM_DEFINED -// Default: OPENTHREAD_CONFIG_LOG_OUTPUT_PLATFORM_DEFINED +// Default: OPENTHREAD_CONFIG_LOG_OUTPUT_APP +// OPENTHREAD_CONFIG_LOG_OUTPUT_APP #ifndef OPENTHREAD_CONFIG_LOG_OUTPUT #define OPENTHREAD_CONFIG_LOG_OUTPUT OPENTHREAD_CONFIG_LOG_OUTPUT_APP #endif @@ -365,6 +437,7 @@ // INFO // DEBG // Default: OT_LOG_LEVEL_DEBG +// OT_LOG_LEVEL_DEBG #ifndef OPENTHREAD_CONFIG_LOG_LEVEL #define OPENTHREAD_CONFIG_LOG_LEVEL OT_LOG_LEVEL_DEBG #endif @@ -387,11 +460,10 @@ #endif // OPENTHREAD_FULL_LOGS_ENABLE -// Log crash dump after initialization +// Log crash dump after initialization #ifndef OPENTHREAD_CONFIG_PLATFORM_LOG_CRASH_DUMP_ENABLE #define OPENTHREAD_CONFIG_PLATFORM_LOG_CRASH_DUMP_ENABLE 0 #endif -// // // diff --git a/board-support/efr32/mgm24/BRD4319A/config/sl_power_manager_config.h b/board-support/efr32/mgm24/BRD4319A/config/sl_power_manager_config.h index 3c240b843..86b9fef27 100644 --- a/board-support/efr32/mgm24/BRD4319A/config/sl_power_manager_config.h +++ b/board-support/efr32/mgm24/BRD4319A/config/sl_power_manager_config.h @@ -37,24 +37,40 @@ // Enable custom IRQ handler for external HF oscillator. // Enable if CMU_IRQHandler/HFXO0_IRQHandler is needed from your application. -// The function sl_power_manager_irq_handler() will have to be called from you custom handler if this is enabled. +// The function sl_power_manager_irq_handler() will have to be called from your custom handler if this is enabled. // Default: 0 +#ifndef SL_POWER_MANAGER_CUSTOM_HF_OSCILLATOR_IRQ_HANDLER #define SL_POWER_MANAGER_CUSTOM_HF_OSCILLATOR_IRQ_HANDLER 0 +#endif // Enable fast wakeup (disable voltage scaling in EM2/3 mode) // Enable or disable voltage scaling in EM2/3 modes (when available). This decreases wakeup time by about 30 us. // Deprecated. It is replaced by the function sl_power_manager_em23_voltage_scaling_enable_fast_wakeup() // Default: 0 +#ifndef SL_POWER_MANAGER_CONFIG_VOLTAGE_SCALING_FAST_WAKEUP #define SL_POWER_MANAGER_CONFIG_VOLTAGE_SCALING_FAST_WAKEUP 0 +#endif + +// Enable voltage scaling in EM0 and EM1 mode. +// Enable or disable voltage scaling in EM0/1 modes. With this config enabled, the voltage +// scaling will be configured at the lowest possible level based on the system clock. +// Default: 0 +#ifndef SL_POWER_MANAGER_ENABLE_EM01_VOLTAGE_SCALING +#define SL_POWER_MANAGER_ENABLE_EM01_VOLTAGE_SCALING 0 +#endif // Enable debugging feature // Enable or disable debugging features (trace the different modules that have requirements). // Default: 0 +#ifndef SL_POWER_MANAGER_DEBUG #define SL_POWER_MANAGER_DEBUG 0 +#endif // Maximum numbers of requirements that can be logged // Default: 10 +#ifndef SL_POWER_MANAGER_DEBUG_POOL_SIZE #define SL_POWER_MANAGER_DEBUG_POOL_SIZE 10 +#endif // // Pin retention mode @@ -63,14 +79,18 @@ // Retention through EM4 // Retention through EM4 and wakeup // power_manager_pin_retention_disable +#ifndef SL_POWER_MANAGER_INIT_EMU_EM4_PIN_RETENTION_MODE #define SL_POWER_MANAGER_INIT_EMU_EM4_PIN_RETENTION_MODE EMU_EM4CTRL_EM4IORETMODE_DISABLE +#endif // Enable EM2 debugging feature // Enable or disable debugging features. // Force PD0B/PD0D to stay on during EM2 entry. This allows the debugger to remain connected in EM2 and EM3. // Enabling debug connectivity results in an increased power consumption in EM2/EM3. // Default: 1 +#ifndef SL_POWER_MANAGER_INIT_EMU_EM2_DEBUG_ENABLE #define SL_POWER_MANAGER_INIT_EMU_EM2_DEBUG_ENABLE 1 +#endif // // diff --git a/board-support/efr32/mgm24/BRD4319A/config/sl_rail_util_pti_config.h b/board-support/efr32/mgm24/BRD4319A/config/sl_rail_util_pti_config.h index d222a67fd..3a97fc327 100644 --- a/board-support/efr32/mgm24/BRD4319A/config/sl_rail_util_pti_config.h +++ b/board-support/efr32/mgm24/BRD4319A/config/sl_rail_util_pti_config.h @@ -35,12 +35,12 @@ // PTI Configuration // PTI mode -// UART -// UART onewire -// SPI -// Disabled -// Default: RAIL_PTI_MODE_UART -#define SL_RAIL_UTIL_PTI_MODE RAIL_PTI_MODE_UART +// UART +// UART onewire +// SPI +// Disabled +// Default: SL_RAIL_PTI_MODE_UART +#define SL_RAIL_UTIL_PTI_MODE SL_RAIL_PTI_MODE_UART // PTI Baud Rate (Hertz) // <147800-20000000:1> diff --git a/board-support/efr32/mgm24/BRD4319A/config/sl_simple_button_btn0_config.h b/board-support/efr32/mgm24/BRD4319A/config/sl_simple_button_btn0_config.h index 6532dfb86..004aa53df 100644 --- a/board-support/efr32/mgm24/BRD4319A/config/sl_simple_button_btn0_config.h +++ b/board-support/efr32/mgm24/BRD4319A/config/sl_simple_button_btn0_config.h @@ -48,9 +48,12 @@ // SL_SIMPLE_BUTTON_BTN0 // $[GPIO_SL_SIMPLE_BUTTON_BTN0] +#ifndef SL_SIMPLE_BUTTON_BTN0_PORT #define SL_SIMPLE_BUTTON_BTN0_PORT SL_GPIO_PORT_A +#endif +#ifndef SL_SIMPLE_BUTTON_BTN0_PIN #define SL_SIMPLE_BUTTON_BTN0_PIN 4 - +#endif // [GPIO_SL_SIMPLE_BUTTON_BTN0]$ // <<< sl:end pin_tool >>> diff --git a/board-support/efr32/mgm24/BRD4319A/config/sl_simple_button_btn1_config.h b/board-support/efr32/mgm24/BRD4319A/config/sl_simple_button_btn1_config.h index d6b055463..70d47889e 100644 --- a/board-support/efr32/mgm24/BRD4319A/config/sl_simple_button_btn1_config.h +++ b/board-support/efr32/mgm24/BRD4319A/config/sl_simple_button_btn1_config.h @@ -48,9 +48,12 @@ // SL_SIMPLE_BUTTON_BTN1 // $[GPIO_SL_SIMPLE_BUTTON_BTN1] +#ifndef SL_SIMPLE_BUTTON_BTN1_PORT #define SL_SIMPLE_BUTTON_BTN1_PORT SL_GPIO_PORT_C +#endif +#ifndef SL_SIMPLE_BUTTON_BTN1_PIN #define SL_SIMPLE_BUTTON_BTN1_PIN 0 - +#endif // [GPIO_SL_SIMPLE_BUTTON_BTN1]$ // <<< sl:end pin_tool >>> diff --git a/board-support/si91x/siwx917/BRD2605A/autogen/sl_event_handler.h b/board-support/si91x/siwx917/BRD2605A/autogen/sl_event_handler.h index a092b8899..1d0468d03 100644 --- a/board-support/si91x/siwx917/BRD2605A/autogen/sl_event_handler.h +++ b/board-support/si91x/siwx917/BRD2605A/autogen/sl_event_handler.h @@ -12,7 +12,5 @@ void sl_driver_init(void); void sl_service_init(void); void sl_stack_init(void); void sl_internal_app_init(void); -void sl_iostream_init_instances_stage_1(void); -void sl_iostream_init_instances_stage_2(void); #endif // SL_EVENT_HANDLER_H diff --git a/board-support/si91x/siwx917/BRD2605A/autogen/sli_mbedtls_config_autogen.h b/board-support/si91x/siwx917/BRD2605A/autogen/sli_mbedtls_config_autogen.h index bd9bbd2a5..37cfbfbd5 100644 --- a/board-support/si91x/siwx917/BRD2605A/autogen/sli_mbedtls_config_autogen.h +++ b/board-support/si91x/siwx917/BRD2605A/autogen/sli_mbedtls_config_autogen.h @@ -5,7 +5,10 @@ // NOTE: This is added because the value is changed in the user config file. #ifndef MBEDTLS_MPI_MAX_SIZE +// Added definition check because of DIC specific configs +#ifndef MBEDTLS_MPI_MAX_SIZE #define MBEDTLS_MPI_MAX_SIZE 32 +#endif #endif // MBEDTLS_MPI_MAX_SIZE #define MBEDTLS_NO_PLATFORM_ENTROPY diff --git a/board-support/si91x/siwx917/BRD2605A/config/sl_wifi_region_db_config.h b/board-support/si91x/siwx917/BRD2605A/config/sl_wifi_region_db_config.h index 0295699b3..65adf54a7 100644 --- a/board-support/si91x/siwx917/BRD2605A/config/sl_wifi_region_db_config.h +++ b/board-support/si91x/siwx917/BRD2605A/config/sl_wifi_region_db_config.h @@ -27,110 +27,110 @@ * ******************************************************************************/ -#pragma once + #pragma once -// Define default region-specific configurations for 2.4 GHz and 5 GHz bands -const sli_si91x_set_region_ap_request_t default_US_region_2_4GHZ_configurations = { - .set_region_code_from_user_cmd = SET_REGION_CODE_FROM_USER, - .country_code = "US ", - .no_of_rules = 1, - .channel_info[0] = { .first_channel = 1, .no_of_channels = 11, .max_tx_power = 30 } -}; - -const sli_si91x_set_region_ap_request_t default_US_region_5GHZ_configurations = { - .set_region_code_from_user_cmd = SET_REGION_CODE_FROM_USER, - .country_code = "US ", - .no_of_rules = 5, - .channel_info[0] = { .first_channel = 36, .no_of_channels = 4, .max_tx_power = 16 }, - .channel_info[1] = { .first_channel = 52, .no_of_channels = 4, .max_tx_power = 23 }, - .channel_info[2] = { .first_channel = 100, .no_of_channels = 5, .max_tx_power = 23 }, - .channel_info[3] = { .first_channel = 132, .no_of_channels = 3, .max_tx_power = 23 }, - .channel_info[4] = { .first_channel = 149, .no_of_channels = 5, .max_tx_power = 29 } -}; - -// Define default configurations for the European region for 2.4 GHz and 5 GHz bands -const sli_si91x_set_region_ap_request_t default_EU_region_2_4GHZ_configurations = { - .set_region_code_from_user_cmd = SET_REGION_CODE_FROM_USER, - .country_code = "EU ", - .no_of_rules = 1, - .channel_info[0] = { .first_channel = 1, .no_of_channels = 13, .max_tx_power = 20 } -}; - -const sli_si91x_set_region_ap_request_t default_EU_region_5GHZ_configurations = { - .set_region_code_from_user_cmd = SET_REGION_CODE_FROM_USER, - .country_code = "EU ", - .no_of_rules = 3, - .channel_info[0] = { .first_channel = 36, .no_of_channels = 4, .max_tx_power = 23 }, - .channel_info[1] = { .first_channel = 52, .no_of_channels = 4, .max_tx_power = 23 }, - .channel_info[2] = { .first_channel = 100, .no_of_channels = 11, .max_tx_power = 30 } -}; - -// Define default configurations for the Japanese region for 2.4 GHz and 5 GHz bands -const sli_si91x_set_region_ap_request_t default_JP_region_2_4GHZ_configurations = { - .set_region_code_from_user_cmd = SET_REGION_CODE_FROM_USER, - .country_code = "JP ", - .no_of_rules = 1, - .channel_info[0] = { .first_channel = 1, .no_of_channels = 14, .max_tx_power = 20 } -}; - -const sli_si91x_set_region_ap_request_t default_JP_region_5GHZ_configurations = { - .set_region_code_from_user_cmd = SET_REGION_CODE_FROM_USER, - .country_code = "JP ", - .no_of_rules = 3, - .channel_info[0] = { .first_channel = 36, .no_of_channels = 4, .max_tx_power = 20 }, - .channel_info[1] = { .first_channel = 52, .no_of_channels = 4, .max_tx_power = 20 }, - .channel_info[2] = { .first_channel = 100, .no_of_channels = 11, .max_tx_power = 30 } -}; - -// Define default configurations for the Korean region for 2.4 GHz and 5 GHz bands -const sli_si91x_set_region_ap_request_t default_KR_region_2_4GHZ_configurations = { - .set_region_code_from_user_cmd = SET_REGION_CODE_FROM_USER, - .country_code = "KR ", - .no_of_rules = 1, - .channel_info[0] = { .first_channel = 1, .no_of_channels = 13, .max_tx_power = 23 } -}; - -const sli_si91x_set_region_ap_request_t default_KR_region_5GHZ_configurations = { - .set_region_code_from_user_cmd = SET_REGION_CODE_FROM_USER, - .country_code = "KR ", - .no_of_rules = 4, - .channel_info[0] = { .first_channel = 36, .no_of_channels = 4, .max_tx_power = 23 }, - .channel_info[1] = { .first_channel = 52, .no_of_channels = 4, .max_tx_power = 20 }, - .channel_info[2] = { .first_channel = 100, .no_of_channels = 11, .max_tx_power = 20 }, - .channel_info[3] = { .first_channel = 149, .no_of_channels = 5, .max_tx_power = 23 } -}; - -// Define default configurations for the Singapore region for 2.4 GHz and 5 GHz bands -const sli_si91x_set_region_ap_request_t default_SG_region_2_4GHZ_configurations = { - .set_region_code_from_user_cmd = SET_REGION_CODE_FROM_USER, - .country_code = "SG ", - .no_of_rules = 1, - .channel_info[0] = { .first_channel = 1, .no_of_channels = 13, .max_tx_power = 27 } -}; - -const sli_si91x_set_region_ap_request_t default_SG_region_5GHZ_configurations = { - .set_region_code_from_user_cmd = SET_REGION_CODE_FROM_USER, - .country_code = "SG ", - .no_of_rules = 5, - .channel_info[0] = { .first_channel = 36, .no_of_channels = 4, .max_tx_power = 16 }, - .channel_info[1] = { .first_channel = 52, .no_of_channels = 4, .max_tx_power = 23 }, - .channel_info[2] = { .first_channel = 100, .no_of_channels = 5, .max_tx_power = 23 }, - .channel_info[3] = { .first_channel = 132, .no_of_channels = 3, .max_tx_power = 23 }, - .channel_info[4] = { .first_channel = 149, .no_of_channels = 4, .max_tx_power = 29 } -}; - -// Define default configurations for the China region for 2.4 GHz and 5 GHz bands -const sli_si91x_set_region_ap_request_t default_CN_region_2_4GHZ_configurations = { - .set_region_code_from_user_cmd = SET_REGION_CODE_FROM_USER, - .country_code = "CN ", - .no_of_rules = 1, - .channel_info[0] = { .first_channel = 1, .no_of_channels = 13, .max_tx_power = 20 } -}; - -const sli_si91x_set_region_ap_request_t default_CN_region_5GHZ_configurations = { - .set_region_code_from_user_cmd = SET_REGION_CODE_FROM_USER, - .country_code = "CN ", - .no_of_rules = 2, - .channel_info[0] = { .first_channel = 36, .no_of_channels = 9, .max_tx_power = 20 }, - .channel_info[4] = { .first_channel = 149, .no_of_channels = 5, .max_tx_power = 33 } -}; + // Define default region-specific configurations for 2.4 GHz and 5 GHz bands + const sli_wifi_set_region_ap_request_t default_US_region_2_4GHZ_configurations = { + .set_region_code_from_user_cmd = SET_REGION_CODE_FROM_USER, + .country_code = "US ", + .no_of_rules = 1, + .channel_info[0] = { .first_channel = 1, .no_of_channels = 11, .max_tx_power = 30 } + }; + + const sli_wifi_set_region_ap_request_t default_US_region_5GHZ_configurations = { + .set_region_code_from_user_cmd = SET_REGION_CODE_FROM_USER, + .country_code = "US ", + .no_of_rules = 5, + .channel_info[0] = { .first_channel = 36, .no_of_channels = 4, .max_tx_power = 16 }, + .channel_info[1] = { .first_channel = 52, .no_of_channels = 4, .max_tx_power = 23 }, + .channel_info[2] = { .first_channel = 100, .no_of_channels = 5, .max_tx_power = 23 }, + .channel_info[3] = { .first_channel = 132, .no_of_channels = 3, .max_tx_power = 23 }, + .channel_info[4] = { .first_channel = 149, .no_of_channels = 5, .max_tx_power = 29 } + }; + + // Define default configurations for the European region for 2.4 GHz and 5 GHz bands + const sli_wifi_set_region_ap_request_t default_EU_region_2_4GHZ_configurations = { + .set_region_code_from_user_cmd = SET_REGION_CODE_FROM_USER, + .country_code = "EU ", + .no_of_rules = 1, + .channel_info[0] = { .first_channel = 1, .no_of_channels = 13, .max_tx_power = 20 } + }; + + const sli_wifi_set_region_ap_request_t default_EU_region_5GHZ_configurations = { + .set_region_code_from_user_cmd = SET_REGION_CODE_FROM_USER, + .country_code = "EU ", + .no_of_rules = 3, + .channel_info[0] = { .first_channel = 36, .no_of_channels = 4, .max_tx_power = 23 }, + .channel_info[1] = { .first_channel = 52, .no_of_channels = 4, .max_tx_power = 23 }, + .channel_info[2] = { .first_channel = 100, .no_of_channels = 11, .max_tx_power = 30 } + }; + + // Define default configurations for the Japanese region for 2.4 GHz and 5 GHz bands + const sli_wifi_set_region_ap_request_t default_JP_region_2_4GHZ_configurations = { + .set_region_code_from_user_cmd = SET_REGION_CODE_FROM_USER, + .country_code = "JP ", + .no_of_rules = 1, + .channel_info[0] = { .first_channel = 1, .no_of_channels = 14, .max_tx_power = 20 } + }; + + const sli_wifi_set_region_ap_request_t default_JP_region_5GHZ_configurations = { + .set_region_code_from_user_cmd = SET_REGION_CODE_FROM_USER, + .country_code = "JP ", + .no_of_rules = 3, + .channel_info[0] = { .first_channel = 36, .no_of_channels = 4, .max_tx_power = 20 }, + .channel_info[1] = { .first_channel = 52, .no_of_channels = 4, .max_tx_power = 20 }, + .channel_info[2] = { .first_channel = 100, .no_of_channels = 11, .max_tx_power = 30 } + }; + + // Define default configurations for the Korean region for 2.4 GHz and 5 GHz bands + const sli_wifi_set_region_ap_request_t default_KR_region_2_4GHZ_configurations = { + .set_region_code_from_user_cmd = SET_REGION_CODE_FROM_USER, + .country_code = "KR ", + .no_of_rules = 1, + .channel_info[0] = { .first_channel = 1, .no_of_channels = 13, .max_tx_power = 23 } + }; + + const sli_wifi_set_region_ap_request_t default_KR_region_5GHZ_configurations = { + .set_region_code_from_user_cmd = SET_REGION_CODE_FROM_USER, + .country_code = "KR ", + .no_of_rules = 4, + .channel_info[0] = { .first_channel = 36, .no_of_channels = 4, .max_tx_power = 23 }, + .channel_info[1] = { .first_channel = 52, .no_of_channels = 4, .max_tx_power = 20 }, + .channel_info[2] = { .first_channel = 100, .no_of_channels = 11, .max_tx_power = 20 }, + .channel_info[3] = { .first_channel = 149, .no_of_channels = 5, .max_tx_power = 23 } + }; + + // Define default configurations for the Singapore region for 2.4 GHz and 5 GHz bands + const sli_wifi_set_region_ap_request_t default_SG_region_2_4GHZ_configurations = { + .set_region_code_from_user_cmd = SET_REGION_CODE_FROM_USER, + .country_code = "SG ", + .no_of_rules = 1, + .channel_info[0] = { .first_channel = 1, .no_of_channels = 13, .max_tx_power = 27 } + }; + + const sli_wifi_set_region_ap_request_t default_SG_region_5GHZ_configurations = { + .set_region_code_from_user_cmd = SET_REGION_CODE_FROM_USER, + .country_code = "SG ", + .no_of_rules = 5, + .channel_info[0] = { .first_channel = 36, .no_of_channels = 4, .max_tx_power = 16 }, + .channel_info[1] = { .first_channel = 52, .no_of_channels = 4, .max_tx_power = 23 }, + .channel_info[2] = { .first_channel = 100, .no_of_channels = 5, .max_tx_power = 23 }, + .channel_info[3] = { .first_channel = 132, .no_of_channels = 3, .max_tx_power = 23 }, + .channel_info[4] = { .first_channel = 149, .no_of_channels = 4, .max_tx_power = 29 } + }; + + // Define default configurations for the China region for 2.4 GHz and 5 GHz bands + const sli_wifi_set_region_ap_request_t default_CN_region_2_4GHZ_configurations = { + .set_region_code_from_user_cmd = SET_REGION_CODE_FROM_USER, + .country_code = "CN ", + .no_of_rules = 1, + .channel_info[0] = { .first_channel = 1, .no_of_channels = 13, .max_tx_power = 20 } + }; + + const sli_wifi_set_region_ap_request_t default_CN_region_5GHZ_configurations = { + .set_region_code_from_user_cmd = SET_REGION_CODE_FROM_USER, + .country_code = "CN ", + .no_of_rules = 2, + .channel_info[0] = { .first_channel = 36, .no_of_channels = 9, .max_tx_power = 20 }, + .channel_info[4] = { .first_channel = 149, .no_of_channels = 5, .max_tx_power = 33 } + }; \ No newline at end of file diff --git a/board-support/si91x/siwx917/BRD2708A/autogen/sl_event_handler.h b/board-support/si91x/siwx917/BRD2708A/autogen/sl_event_handler.h index a092b8899..1d0468d03 100644 --- a/board-support/si91x/siwx917/BRD2708A/autogen/sl_event_handler.h +++ b/board-support/si91x/siwx917/BRD2708A/autogen/sl_event_handler.h @@ -12,7 +12,5 @@ void sl_driver_init(void); void sl_service_init(void); void sl_stack_init(void); void sl_internal_app_init(void); -void sl_iostream_init_instances_stage_1(void); -void sl_iostream_init_instances_stage_2(void); #endif // SL_EVENT_HANDLER_H diff --git a/board-support/si91x/siwx917/BRD2708A/autogen/sli_mbedtls_config_autogen.h b/board-support/si91x/siwx917/BRD2708A/autogen/sli_mbedtls_config_autogen.h index bd9bbd2a5..37cfbfbd5 100644 --- a/board-support/si91x/siwx917/BRD2708A/autogen/sli_mbedtls_config_autogen.h +++ b/board-support/si91x/siwx917/BRD2708A/autogen/sli_mbedtls_config_autogen.h @@ -5,7 +5,10 @@ // NOTE: This is added because the value is changed in the user config file. #ifndef MBEDTLS_MPI_MAX_SIZE +// Added definition check because of DIC specific configs +#ifndef MBEDTLS_MPI_MAX_SIZE #define MBEDTLS_MPI_MAX_SIZE 32 +#endif #endif // MBEDTLS_MPI_MAX_SIZE #define MBEDTLS_NO_PLATFORM_ENTROPY diff --git a/board-support/si91x/siwx917/BRD2911A/autogen/sl_event_handler.h b/board-support/si91x/siwx917/BRD2911A/autogen/sl_event_handler.h index a092b8899..1d0468d03 100644 --- a/board-support/si91x/siwx917/BRD2911A/autogen/sl_event_handler.h +++ b/board-support/si91x/siwx917/BRD2911A/autogen/sl_event_handler.h @@ -12,7 +12,5 @@ void sl_driver_init(void); void sl_service_init(void); void sl_stack_init(void); void sl_internal_app_init(void); -void sl_iostream_init_instances_stage_1(void); -void sl_iostream_init_instances_stage_2(void); #endif // SL_EVENT_HANDLER_H diff --git a/board-support/si91x/siwx917/BRD2911A/autogen/sli_mbedtls_config_autogen.h b/board-support/si91x/siwx917/BRD2911A/autogen/sli_mbedtls_config_autogen.h index bd9bbd2a5..37cfbfbd5 100644 --- a/board-support/si91x/siwx917/BRD2911A/autogen/sli_mbedtls_config_autogen.h +++ b/board-support/si91x/siwx917/BRD2911A/autogen/sli_mbedtls_config_autogen.h @@ -5,7 +5,10 @@ // NOTE: This is added because the value is changed in the user config file. #ifndef MBEDTLS_MPI_MAX_SIZE +// Added definition check because of DIC specific configs +#ifndef MBEDTLS_MPI_MAX_SIZE #define MBEDTLS_MPI_MAX_SIZE 32 +#endif #endif // MBEDTLS_MPI_MAX_SIZE #define MBEDTLS_NO_PLATFORM_ENTROPY diff --git a/board-support/si91x/siwx917/BRD4338A/autogen/sl_event_handler.h b/board-support/si91x/siwx917/BRD4338A/autogen/sl_event_handler.h index a092b8899..1d0468d03 100644 --- a/board-support/si91x/siwx917/BRD4338A/autogen/sl_event_handler.h +++ b/board-support/si91x/siwx917/BRD4338A/autogen/sl_event_handler.h @@ -12,7 +12,5 @@ void sl_driver_init(void); void sl_service_init(void); void sl_stack_init(void); void sl_internal_app_init(void); -void sl_iostream_init_instances_stage_1(void); -void sl_iostream_init_instances_stage_2(void); #endif // SL_EVENT_HANDLER_H diff --git a/board-support/si91x/siwx917/BRD4338A/autogen/sli_mbedtls_config_autogen.h b/board-support/si91x/siwx917/BRD4338A/autogen/sli_mbedtls_config_autogen.h index bd9bbd2a5..37cfbfbd5 100644 --- a/board-support/si91x/siwx917/BRD4338A/autogen/sli_mbedtls_config_autogen.h +++ b/board-support/si91x/siwx917/BRD4338A/autogen/sli_mbedtls_config_autogen.h @@ -5,7 +5,10 @@ // NOTE: This is added because the value is changed in the user config file. #ifndef MBEDTLS_MPI_MAX_SIZE +// Added definition check because of DIC specific configs +#ifndef MBEDTLS_MPI_MAX_SIZE #define MBEDTLS_MPI_MAX_SIZE 32 +#endif #endif // MBEDTLS_MPI_MAX_SIZE #define MBEDTLS_NO_PLATFORM_ENTROPY diff --git a/board-support/si91x/siwx917/BRD4338A/config/sl_wifi_region_db_config.h b/board-support/si91x/siwx917/BRD4338A/config/sl_wifi_region_db_config.h index 0295699b3..65adf54a7 100644 --- a/board-support/si91x/siwx917/BRD4338A/config/sl_wifi_region_db_config.h +++ b/board-support/si91x/siwx917/BRD4338A/config/sl_wifi_region_db_config.h @@ -27,110 +27,110 @@ * ******************************************************************************/ -#pragma once + #pragma once -// Define default region-specific configurations for 2.4 GHz and 5 GHz bands -const sli_si91x_set_region_ap_request_t default_US_region_2_4GHZ_configurations = { - .set_region_code_from_user_cmd = SET_REGION_CODE_FROM_USER, - .country_code = "US ", - .no_of_rules = 1, - .channel_info[0] = { .first_channel = 1, .no_of_channels = 11, .max_tx_power = 30 } -}; - -const sli_si91x_set_region_ap_request_t default_US_region_5GHZ_configurations = { - .set_region_code_from_user_cmd = SET_REGION_CODE_FROM_USER, - .country_code = "US ", - .no_of_rules = 5, - .channel_info[0] = { .first_channel = 36, .no_of_channels = 4, .max_tx_power = 16 }, - .channel_info[1] = { .first_channel = 52, .no_of_channels = 4, .max_tx_power = 23 }, - .channel_info[2] = { .first_channel = 100, .no_of_channels = 5, .max_tx_power = 23 }, - .channel_info[3] = { .first_channel = 132, .no_of_channels = 3, .max_tx_power = 23 }, - .channel_info[4] = { .first_channel = 149, .no_of_channels = 5, .max_tx_power = 29 } -}; - -// Define default configurations for the European region for 2.4 GHz and 5 GHz bands -const sli_si91x_set_region_ap_request_t default_EU_region_2_4GHZ_configurations = { - .set_region_code_from_user_cmd = SET_REGION_CODE_FROM_USER, - .country_code = "EU ", - .no_of_rules = 1, - .channel_info[0] = { .first_channel = 1, .no_of_channels = 13, .max_tx_power = 20 } -}; - -const sli_si91x_set_region_ap_request_t default_EU_region_5GHZ_configurations = { - .set_region_code_from_user_cmd = SET_REGION_CODE_FROM_USER, - .country_code = "EU ", - .no_of_rules = 3, - .channel_info[0] = { .first_channel = 36, .no_of_channels = 4, .max_tx_power = 23 }, - .channel_info[1] = { .first_channel = 52, .no_of_channels = 4, .max_tx_power = 23 }, - .channel_info[2] = { .first_channel = 100, .no_of_channels = 11, .max_tx_power = 30 } -}; - -// Define default configurations for the Japanese region for 2.4 GHz and 5 GHz bands -const sli_si91x_set_region_ap_request_t default_JP_region_2_4GHZ_configurations = { - .set_region_code_from_user_cmd = SET_REGION_CODE_FROM_USER, - .country_code = "JP ", - .no_of_rules = 1, - .channel_info[0] = { .first_channel = 1, .no_of_channels = 14, .max_tx_power = 20 } -}; - -const sli_si91x_set_region_ap_request_t default_JP_region_5GHZ_configurations = { - .set_region_code_from_user_cmd = SET_REGION_CODE_FROM_USER, - .country_code = "JP ", - .no_of_rules = 3, - .channel_info[0] = { .first_channel = 36, .no_of_channels = 4, .max_tx_power = 20 }, - .channel_info[1] = { .first_channel = 52, .no_of_channels = 4, .max_tx_power = 20 }, - .channel_info[2] = { .first_channel = 100, .no_of_channels = 11, .max_tx_power = 30 } -}; - -// Define default configurations for the Korean region for 2.4 GHz and 5 GHz bands -const sli_si91x_set_region_ap_request_t default_KR_region_2_4GHZ_configurations = { - .set_region_code_from_user_cmd = SET_REGION_CODE_FROM_USER, - .country_code = "KR ", - .no_of_rules = 1, - .channel_info[0] = { .first_channel = 1, .no_of_channels = 13, .max_tx_power = 23 } -}; - -const sli_si91x_set_region_ap_request_t default_KR_region_5GHZ_configurations = { - .set_region_code_from_user_cmd = SET_REGION_CODE_FROM_USER, - .country_code = "KR ", - .no_of_rules = 4, - .channel_info[0] = { .first_channel = 36, .no_of_channels = 4, .max_tx_power = 23 }, - .channel_info[1] = { .first_channel = 52, .no_of_channels = 4, .max_tx_power = 20 }, - .channel_info[2] = { .first_channel = 100, .no_of_channels = 11, .max_tx_power = 20 }, - .channel_info[3] = { .first_channel = 149, .no_of_channels = 5, .max_tx_power = 23 } -}; - -// Define default configurations for the Singapore region for 2.4 GHz and 5 GHz bands -const sli_si91x_set_region_ap_request_t default_SG_region_2_4GHZ_configurations = { - .set_region_code_from_user_cmd = SET_REGION_CODE_FROM_USER, - .country_code = "SG ", - .no_of_rules = 1, - .channel_info[0] = { .first_channel = 1, .no_of_channels = 13, .max_tx_power = 27 } -}; - -const sli_si91x_set_region_ap_request_t default_SG_region_5GHZ_configurations = { - .set_region_code_from_user_cmd = SET_REGION_CODE_FROM_USER, - .country_code = "SG ", - .no_of_rules = 5, - .channel_info[0] = { .first_channel = 36, .no_of_channels = 4, .max_tx_power = 16 }, - .channel_info[1] = { .first_channel = 52, .no_of_channels = 4, .max_tx_power = 23 }, - .channel_info[2] = { .first_channel = 100, .no_of_channels = 5, .max_tx_power = 23 }, - .channel_info[3] = { .first_channel = 132, .no_of_channels = 3, .max_tx_power = 23 }, - .channel_info[4] = { .first_channel = 149, .no_of_channels = 4, .max_tx_power = 29 } -}; - -// Define default configurations for the China region for 2.4 GHz and 5 GHz bands -const sli_si91x_set_region_ap_request_t default_CN_region_2_4GHZ_configurations = { - .set_region_code_from_user_cmd = SET_REGION_CODE_FROM_USER, - .country_code = "CN ", - .no_of_rules = 1, - .channel_info[0] = { .first_channel = 1, .no_of_channels = 13, .max_tx_power = 20 } -}; - -const sli_si91x_set_region_ap_request_t default_CN_region_5GHZ_configurations = { - .set_region_code_from_user_cmd = SET_REGION_CODE_FROM_USER, - .country_code = "CN ", - .no_of_rules = 2, - .channel_info[0] = { .first_channel = 36, .no_of_channels = 9, .max_tx_power = 20 }, - .channel_info[4] = { .first_channel = 149, .no_of_channels = 5, .max_tx_power = 33 } -}; + // Define default region-specific configurations for 2.4 GHz and 5 GHz bands + const sli_wifi_set_region_ap_request_t default_US_region_2_4GHZ_configurations = { + .set_region_code_from_user_cmd = SET_REGION_CODE_FROM_USER, + .country_code = "US ", + .no_of_rules = 1, + .channel_info[0] = { .first_channel = 1, .no_of_channels = 11, .max_tx_power = 30 } + }; + + const sli_wifi_set_region_ap_request_t default_US_region_5GHZ_configurations = { + .set_region_code_from_user_cmd = SET_REGION_CODE_FROM_USER, + .country_code = "US ", + .no_of_rules = 5, + .channel_info[0] = { .first_channel = 36, .no_of_channels = 4, .max_tx_power = 16 }, + .channel_info[1] = { .first_channel = 52, .no_of_channels = 4, .max_tx_power = 23 }, + .channel_info[2] = { .first_channel = 100, .no_of_channels = 5, .max_tx_power = 23 }, + .channel_info[3] = { .first_channel = 132, .no_of_channels = 3, .max_tx_power = 23 }, + .channel_info[4] = { .first_channel = 149, .no_of_channels = 5, .max_tx_power = 29 } + }; + + // Define default configurations for the European region for 2.4 GHz and 5 GHz bands + const sli_wifi_set_region_ap_request_t default_EU_region_2_4GHZ_configurations = { + .set_region_code_from_user_cmd = SET_REGION_CODE_FROM_USER, + .country_code = "EU ", + .no_of_rules = 1, + .channel_info[0] = { .first_channel = 1, .no_of_channels = 13, .max_tx_power = 20 } + }; + + const sli_wifi_set_region_ap_request_t default_EU_region_5GHZ_configurations = { + .set_region_code_from_user_cmd = SET_REGION_CODE_FROM_USER, + .country_code = "EU ", + .no_of_rules = 3, + .channel_info[0] = { .first_channel = 36, .no_of_channels = 4, .max_tx_power = 23 }, + .channel_info[1] = { .first_channel = 52, .no_of_channels = 4, .max_tx_power = 23 }, + .channel_info[2] = { .first_channel = 100, .no_of_channels = 11, .max_tx_power = 30 } + }; + + // Define default configurations for the Japanese region for 2.4 GHz and 5 GHz bands + const sli_wifi_set_region_ap_request_t default_JP_region_2_4GHZ_configurations = { + .set_region_code_from_user_cmd = SET_REGION_CODE_FROM_USER, + .country_code = "JP ", + .no_of_rules = 1, + .channel_info[0] = { .first_channel = 1, .no_of_channels = 14, .max_tx_power = 20 } + }; + + const sli_wifi_set_region_ap_request_t default_JP_region_5GHZ_configurations = { + .set_region_code_from_user_cmd = SET_REGION_CODE_FROM_USER, + .country_code = "JP ", + .no_of_rules = 3, + .channel_info[0] = { .first_channel = 36, .no_of_channels = 4, .max_tx_power = 20 }, + .channel_info[1] = { .first_channel = 52, .no_of_channels = 4, .max_tx_power = 20 }, + .channel_info[2] = { .first_channel = 100, .no_of_channels = 11, .max_tx_power = 30 } + }; + + // Define default configurations for the Korean region for 2.4 GHz and 5 GHz bands + const sli_wifi_set_region_ap_request_t default_KR_region_2_4GHZ_configurations = { + .set_region_code_from_user_cmd = SET_REGION_CODE_FROM_USER, + .country_code = "KR ", + .no_of_rules = 1, + .channel_info[0] = { .first_channel = 1, .no_of_channels = 13, .max_tx_power = 23 } + }; + + const sli_wifi_set_region_ap_request_t default_KR_region_5GHZ_configurations = { + .set_region_code_from_user_cmd = SET_REGION_CODE_FROM_USER, + .country_code = "KR ", + .no_of_rules = 4, + .channel_info[0] = { .first_channel = 36, .no_of_channels = 4, .max_tx_power = 23 }, + .channel_info[1] = { .first_channel = 52, .no_of_channels = 4, .max_tx_power = 20 }, + .channel_info[2] = { .first_channel = 100, .no_of_channels = 11, .max_tx_power = 20 }, + .channel_info[3] = { .first_channel = 149, .no_of_channels = 5, .max_tx_power = 23 } + }; + + // Define default configurations for the Singapore region for 2.4 GHz and 5 GHz bands + const sli_wifi_set_region_ap_request_t default_SG_region_2_4GHZ_configurations = { + .set_region_code_from_user_cmd = SET_REGION_CODE_FROM_USER, + .country_code = "SG ", + .no_of_rules = 1, + .channel_info[0] = { .first_channel = 1, .no_of_channels = 13, .max_tx_power = 27 } + }; + + const sli_wifi_set_region_ap_request_t default_SG_region_5GHZ_configurations = { + .set_region_code_from_user_cmd = SET_REGION_CODE_FROM_USER, + .country_code = "SG ", + .no_of_rules = 5, + .channel_info[0] = { .first_channel = 36, .no_of_channels = 4, .max_tx_power = 16 }, + .channel_info[1] = { .first_channel = 52, .no_of_channels = 4, .max_tx_power = 23 }, + .channel_info[2] = { .first_channel = 100, .no_of_channels = 5, .max_tx_power = 23 }, + .channel_info[3] = { .first_channel = 132, .no_of_channels = 3, .max_tx_power = 23 }, + .channel_info[4] = { .first_channel = 149, .no_of_channels = 4, .max_tx_power = 29 } + }; + + // Define default configurations for the China region for 2.4 GHz and 5 GHz bands + const sli_wifi_set_region_ap_request_t default_CN_region_2_4GHZ_configurations = { + .set_region_code_from_user_cmd = SET_REGION_CODE_FROM_USER, + .country_code = "CN ", + .no_of_rules = 1, + .channel_info[0] = { .first_channel = 1, .no_of_channels = 13, .max_tx_power = 20 } + }; + + const sli_wifi_set_region_ap_request_t default_CN_region_5GHZ_configurations = { + .set_region_code_from_user_cmd = SET_REGION_CODE_FROM_USER, + .country_code = "CN ", + .no_of_rules = 2, + .channel_info[0] = { .first_channel = 36, .no_of_channels = 9, .max_tx_power = 20 }, + .channel_info[4] = { .first_channel = 149, .no_of_channels = 5, .max_tx_power = 33 } + }; \ No newline at end of file diff --git a/board-support/si91x/siwx917/BRD4342A/autogen/sl_event_handler.h b/board-support/si91x/siwx917/BRD4342A/autogen/sl_event_handler.h index a092b8899..1d0468d03 100644 --- a/board-support/si91x/siwx917/BRD4342A/autogen/sl_event_handler.h +++ b/board-support/si91x/siwx917/BRD4342A/autogen/sl_event_handler.h @@ -12,7 +12,5 @@ void sl_driver_init(void); void sl_service_init(void); void sl_stack_init(void); void sl_internal_app_init(void); -void sl_iostream_init_instances_stage_1(void); -void sl_iostream_init_instances_stage_2(void); #endif // SL_EVENT_HANDLER_H diff --git a/board-support/si91x/siwx917/BRD4342A/autogen/sli_mbedtls_config_autogen.h b/board-support/si91x/siwx917/BRD4342A/autogen/sli_mbedtls_config_autogen.h index bd9bbd2a5..37cfbfbd5 100644 --- a/board-support/si91x/siwx917/BRD4342A/autogen/sli_mbedtls_config_autogen.h +++ b/board-support/si91x/siwx917/BRD4342A/autogen/sli_mbedtls_config_autogen.h @@ -5,7 +5,10 @@ // NOTE: This is added because the value is changed in the user config file. #ifndef MBEDTLS_MPI_MAX_SIZE +// Added definition check because of DIC specific configs +#ifndef MBEDTLS_MPI_MAX_SIZE #define MBEDTLS_MPI_MAX_SIZE 32 +#endif #endif // MBEDTLS_MPI_MAX_SIZE #define MBEDTLS_NO_PLATFORM_ENTROPY diff --git a/board-support/si91x/siwx917/BRD4343A/autogen/sl_event_handler.h b/board-support/si91x/siwx917/BRD4343A/autogen/sl_event_handler.h index a092b8899..1d0468d03 100644 --- a/board-support/si91x/siwx917/BRD4343A/autogen/sl_event_handler.h +++ b/board-support/si91x/siwx917/BRD4343A/autogen/sl_event_handler.h @@ -12,7 +12,5 @@ void sl_driver_init(void); void sl_service_init(void); void sl_stack_init(void); void sl_internal_app_init(void); -void sl_iostream_init_instances_stage_1(void); -void sl_iostream_init_instances_stage_2(void); #endif // SL_EVENT_HANDLER_H diff --git a/board-support/si91x/siwx917/BRD4343A/autogen/sli_mbedtls_config_autogen.h b/board-support/si91x/siwx917/BRD4343A/autogen/sli_mbedtls_config_autogen.h index bd9bbd2a5..37cfbfbd5 100644 --- a/board-support/si91x/siwx917/BRD4343A/autogen/sli_mbedtls_config_autogen.h +++ b/board-support/si91x/siwx917/BRD4343A/autogen/sli_mbedtls_config_autogen.h @@ -5,7 +5,10 @@ // NOTE: This is added because the value is changed in the user config file. #ifndef MBEDTLS_MPI_MAX_SIZE +// Added definition check because of DIC specific configs +#ifndef MBEDTLS_MPI_MAX_SIZE #define MBEDTLS_MPI_MAX_SIZE 32 +#endif #endif // MBEDTLS_MPI_MAX_SIZE #define MBEDTLS_NO_PLATFORM_ENTROPY diff --git a/scripts/generate_boards.py b/scripts/generate_boards.py index 1cd42647a..4cf3f707b 100755 --- a/scripts/generate_boards.py +++ b/scripts/generate_boards.py @@ -152,15 +152,6 @@ def _convertStrToBool(value): raise argparse.ArgumentTypeError('Boolean value expected.') -def _configure_sdk(si_sdk_path): - """ - Configures slc sdk permissions to enable generation - """ - subprocess.run(["slc", "configuration", "--sdk", si_sdk_path], check=True) - subprocess.run(["slc", "signature", "trust", - "--sdk", si_sdk_path], check=True) - - def _generate_slc(args): """ Main application function @@ -222,7 +213,6 @@ def _generate_board(board: Board, si_sdk_path: str, slcp_path: str, output_path: """ # Configure path variables - si_sdk_path = Path(si_sdk_path) slcp_path = Path(slcp_path) output_path = Path(output_path) output_path = os.path.join( @@ -233,7 +223,7 @@ def _generate_board(board: Board, si_sdk_path: str, slcp_path: str, output_path: # run slc generate command subprocess.run(["slc", "generate", slcp_path, "-d", - output_path, "--with", board.slc_arguments], check=True) + output_path, "--sdk-package-path", si_sdk_path, "--with", board.slc_arguments], check=True) # delete files generated files if delete_files: @@ -305,7 +295,9 @@ def _delete_directories(output_path: Path): # Directories to delete after each generation directories_to_delete = ["linker_options", "matter-platform_cmake", - "autogen/.slc_state"] + "autogen/.slc_state", + "cmake_gcc", + "config/btconf"] # Loop and delete directories if they exist for dir_path in directories_to_delete: @@ -347,10 +339,7 @@ def _revert_changes(output_path: Path): def main(args) -> int: args.board = args.board.upper() - # Step 1: Configure slc sdk permissions for generation - _configure_sdk(args.sdk) - - # Step 2: Generate slc files + # Step 1: Generate slc files _generate_slc(args) diff --git a/sdk-copies/openthread/platform-abstraction/efr32/radio.cpp b/sdk-copies/openthread/platform-abstraction/efr32/radio.cpp new file mode 100644 index 000000000..54edeb13b --- /dev/null +++ b/sdk-copies/openthread/platform-abstraction/efr32/radio.cpp @@ -0,0 +1,3009 @@ + +/* + * Copyright (c) 2025, The OpenThread Authors. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. Neither the name of the copyright holder nor the + * names of its contributors may be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + +/** + * @file + * This file implements the main OpenThread platform abstraction for radio communication on EFR32. + * It provides the core radio API implementation, packet handling, and integration with RAIL. + */ + + #include "radio_channel_switching.h" + #include "radio_csl.h" + #include "radio_energy_scan.hpp" + #include "radio_events.h" + #include "radio_instance.h" + #include "radio_interface.h" + #include "radio_security.h" + #include "radio_state.h" + #include + #include + #include + #include + #include + #include + #include + #include + #include "common/code_utils.hpp" + #include "common/debug.hpp" + #include "common/logging.hpp" + #include "utils/code_utils.h" + #include "utils/link_metrics.h" + #include "utils/mac_frame.h" + + extern "C" { + #include "em_device.h" + #include "sl_core.h" + #if defined _SILICON_LABS_32B_SERIES_2 + #include "em_system.h" + #else + #include "sl_hal_system.h" + #endif + #include "ieee802154mac.h" + #include "platform-band.h" + #include "platform-efr32.h" + #include "radio_coex.h" + #include "radio_multi_channel.h" + #include "rail_config.h" + #include "sl_memory_manager.h" + #include "sl_packet_utils.h" + #include "sl_rail.h" + #include "sl_rail_ieee802154.h" + + #include "sl_openthread_radio_config.h" + #include "sl_rail_util_compatible_pa.h" +#if !(defined(SLI_SI91X_ENABLE_BLE) && SLI_SI91X_ENABLE_BLE) +#include "sl_bluetooth.h" +#include "sl_rail_util_power_manager_init.h" +#endif // !SLI_SI91X_ENABLE_BLE + #include "openthread/platform-abstraction/efr32/soft_source_match_table.h" + + #ifdef SL_COMPONENT_CATALOG_PRESENT + #include "sl_component_catalog.h" + #endif // SL_COMPONENT_CATALOG_PRESENT + + #ifdef SL_CATALOG_RAIL_MULTIPLEXER_PRESENT + #include "sl_rail_mux_rename.h" + #endif + + #ifdef SL_CATALOG_RAIL_UTIL_ANT_DIV_PRESENT + #include "sl_rail_util_ant_div.h" + #include "sl_rail_util_ant_div_config.h" + #endif // SL_CATALOG_RAIL_UTIL_ANT_DIV_PRESENT + + #ifdef SL_CATALOG_RAIL_UTIL_COEX_PRESENT + #include "coexistence-802154.h" + #include "coexistence-ot.h" + #endif // SL_CATALOG_RAIL_UTIL_COEX_PRESENT + + #ifdef SL_CATALOG_RAIL_UTIL_IEEE802154_STACK_EVENT_PRESENT + #include "sl_rail_util_ieee802154_stack_event.h" + #endif // SL_CATALOG_RAIL_UTIL_IEEE802154_STACK_EVENT_PRESENT + + #ifdef SL_CATALOG_RAIL_UTIL_IEEE802154_PHY_SELECT_PRESENT + #include "sl_rail_util_ieee802154_phy_select.h" + #endif // #ifdef SL_CATALOG_RAIL_UTIL_IEEE802154_PHY_SELECT_PRESENT + + #ifdef SL_CATALOG_RAIL_UTIL_IEEE802154_FAST_CHANNEL_SWITCHING_PRESENT + #include "sl_rail_util_ieee802154_fast_channel_switching_config.h" + #endif // SL_CATALOG_RAIL_UTIL_IEEE802154_FAST_CHANNEL_SWITCHING_PRESENT + + #include "circular_queue.h" + #include "radio_power_manager.h" + #include "sl_gp_interface.h" + } + + //------------------------------------------------------------------------------ + // Enums, macros and static variables + + #if SL_OPENTHREAD_RADIO_RX_BUFFER_COUNT > CIRCULAR_QUEUE_LEN_MAX + #error "Rx buffer count cannot be greater than max circular queue length." + #endif + + #define US_IN_MS 1000 + + extern "C" { + void packetSentCallback(bool isAck); + void packetReceivedCallback(void); + void txFailedCallback(bool isAck, uint32_t status); + void ackTimeoutCallback(void); + void dataRequestCommandCallback(sl_rail_handle_t aRailHandle); + void schedulerEventCallback(sl_rail_handle_t aRailHandle); + void sl_ot_update_active_radio_config(void); + } + + // Static inline helper - forward declaration + static inline bool txWaitingForAck(void); + #ifdef SL_CATALOG_RAIL_UTIL_IEEE802154_STACK_EVENT_PRESENT + static bool phyStackEventIsEnabled(void); + #endif // SL_CATALOG_RAIL_UTIL_IEEE802154_STACK_EVENT_PRESENT + + using rxPacketDetails = struct + { + uint8_t length; + uint8_t channel; + uint8_t lqi; + int8_t rssi; + otInstance *instance; + sl_rail_time_t timestamp; + }; + + typedef struct + { + rxPacketDetails packetInfo; + uint8_t psdu[IEEE802154_MAX_LENGTH]; + } rxBuffer; + + typedef uint8_t rxBufferIndex_t; + + using radioFrame = struct + { + otRadioFrame frame; + otInstance *instance; + uint8_t currentRadioTxPriority; + }; + + static Queue_t sRxPacketQueue; + static sl_memory_pool_t sRxPacketMemPoolHandle = {}; + static uint8_t sReceiveAckPsdu[IEEE802154_MAX_LENGTH]; + static radioFrame sReceive; + static radioFrame sReceiveAck; + static otError sReceiveError; + + static radioFrame sTransmitBuffer[RADIO_REQUEST_BUFFER_COUNT]; + static uint8_t sTransmitPsdu[RADIO_REQUEST_BUFFER_COUNT][IEEE802154_MAX_LENGTH]; + static radioFrame *sCurrentTxPacket = nullptr; + static uint8_t sLastLqi = 0; + static int8_t sLastRssi = 0; + otExtAddress sExtAddress[RADIO_EXT_ADDR_COUNT]; + + #if (OPENTHREAD_CONFIG_THREAD_VERSION >= OT_THREAD_VERSION_1_2) + #define IEEE802154_2015_ENH_ACK_TIMING_RX_TO_TX_US 256 + #endif + #define CSL_CSMA_BACKOFF_TIME_IN_US 150 + sl_rail_csma_config_t csmaConfig = SL_RAIL_CSMA_CONFIG_802_15_4_2003_2P4_GHZ_OQPSK_CSMA; + sl_rail_csma_config_t cslCsmaConfig = SL_RAIL_CSMA_CONFIG_SINGLE_CCA; + + #define SCHEDULE_TX_DELAY_US 3000 + + #if OPENTHREAD_CONFIG_MAC_HEADER_IE_SUPPORT + static otRadioIeInfo sTransmitIeInfo[RADIO_REQUEST_BUFFER_COUNT]; + #endif + + #define CCA_THRESHOLD_UNINIT 127 + + #if RADIO_CONFIG_DEBUG_COUNTERS_SUPPORT + extern struct efr32RadioCounters railDebugCounters; + #define rxDebugStep (railDebugCounters.mRadioDebugData.m8[RX_DEBUG_COUNTER0]) + #endif + + #define SHR_DURATION_US 160 + + #ifdef SL_CATALOG_RAIL_UTIL_COEX_PRESENT + enum + { + RHO_INACTIVE = 0, + RHO_EXT_ACTIVE, + RHO_INT_ACTIVE, // Not used + RHO_BOTH_ACTIVE, + }; + + static uint8_t sRhoActive = RHO_INACTIVE; + static bool sPtaGntEventReported; + + #endif // SL_CATALOG_RAIL_UTIL_COEX_PRESENT + + SL_CODE_CLASSIFY(SL_CODE_COMPONENT_OT_PLATFORM_ABSTRACTION, SL_CODE_CLASS_TIME_CRITICAL) + static bool rxPacketQueueOverflowCallback(const Queue_t *queue, void *data) + { + OT_UNUSED_VARIABLE(queue); + OT_UNUSED_VARIABLE(data); + + return false; + } + + #if OPENTHREAD_CONFIG_MULTIPLE_INSTANCE_ENABLE + + // Case 1: Packet was directed towards broadcast address or broadcast PAN ID + SL_CODE_CLASSIFY(SL_CODE_COMPONENT_OT_PLATFORM_ABSTRACTION, SL_CODE_CLASS_TIME_CRITICAL) + static bool isFilterMaskBroadcast(uint8_t mask) + { + return ((mask & RADIO_BCAST_PANID_FILTER_MASK) != 0) || ((mask & RADIO_BCAST_ADDR_FILTER_MASK) != 0); + } + + // Case 2: Packet was directed to one of our valid address/PANID combos + // (Compare all non-bcast PANID filters against their corresponding address filters for same IID) + SL_CODE_CLASSIFY(SL_CODE_COMPONENT_OT_PLATFORM_ABSTRACTION, SL_CODE_CLASS_TIME_CRITICAL) + static bool isFilterMaskInstanceSpecific(uint8_t mask) + { + // Find any non-broadcast PAN ID match and compare it to address matches for same IID + return (((RADIO_GET_PANID_FILTER_MASK(mask) >> RADIO_PANID_FILTER_SHIFT) + & (RADIO_GET_ADDR_FILTER_MASK(mask) >> RADIO_ADDR_FILTER_SHIFT)) + != 0); + } + + // Case 3: Packet is missing either destination addressing field or destination PAN ID + SL_CODE_CLASSIFY(SL_CODE_COMPONENT_OT_PLATFORM_ABSTRACTION, SL_CODE_CLASS_TIME_CRITICAL) + static bool isFilterMaskMissingAddressing(uint8_t mask) + { + return ((RADIO_GET_PANID_FILTER_MASK(mask)) == 0) || ((RADIO_GET_ADDR_FILTER_MASK(mask)) == 0); + } + + #endif // OPENTHREAD_CONFIG_MULTIPLE_INSTANCE_ENABLE + + SL_CODE_CLASSIFY(SL_CODE_COMPONENT_OT_PLATFORM_ABSTRACTION, SL_CODE_CLASS_TIME_CRITICAL) + static bool isFilterMaskValid(uint8_t mask) + { + #if OPENTHREAD_CONFIG_MULTIPLE_INSTANCE_ENABLE + return isFilterMaskBroadcast(mask) || isFilterMaskInstanceSpecific(mask) || isFilterMaskMissingAddressing(mask); + #else + (void)mask; + return true; + #endif + } + + #if (OPENTHREAD_CONFIG_THREAD_VERSION >= OT_THREAD_VERSION_1_2) + + // Enhanced ACK IE data + static uint8_t sAckIeData[OT_ACK_IE_MAX_SIZE]; + static uint8_t sAckIeDataLength = 0; + + SL_CODE_CLASSIFY(SL_CODE_COMPONENT_OT_PLATFORM_ABSTRACTION, SL_CODE_CLASS_TIME_CRITICAL) + static uint8_t generateAckIeData(otInstance *aInstance, + uint8_t *aLinkMetricsIeData, + uint8_t aLinkMetricsIeDataLen, + otRadioFrame *aReceivedFrame) + { + OT_UNUSED_VARIABLE(aLinkMetricsIeData); + OT_UNUSED_VARIABLE(aLinkMetricsIeDataLen); + OT_UNUSED_VARIABLE(aReceivedFrame); + + uint8_t offset = 0; + + // If instance is nullptr (broadcast packet), skip IE data generation + otEXPECT(aInstance != nullptr); + + #if OPENTHREAD_CONFIG_MAC_CSL_RECEIVER_ENABLE + offset += sli_ot_radio_csl_generate_ack_ie_data(aInstance, aReceivedFrame, sAckIeData); + #endif + + #if OPENTHREAD_CONFIG_MLE_LINK_METRICS_SUBJECT_ENABLE + if (aLinkMetricsIeData != nullptr && aLinkMetricsIeDataLen > 0) + { + offset += otMacFrameGenerateEnhAckProbingIe(sAckIeData, aLinkMetricsIeData, aLinkMetricsIeDataLen); + } + #endif + + exit: + return offset; + } + + #endif // (OPENTHREAD_CONFIG_THREAD_VERSION >= OT_THREAD_VERSION_1_2) + + SL_CODE_CLASSIFY(SL_CODE_COMPONENT_OT_PLATFORM_ABSTRACTION, SL_CODE_CLASS_TIME_CRITICAL) + static uint8_t readInitialPacketData(sl_rail_rx_packet_info_t *packetInfo, + uint8_t expected_data_bytes_max, + uint8_t expected_data_bytes_min, + uint8_t *buffer, + uint8_t buffer_len) + { + uint8_t packetBytesRead = 0; + sl_rail_rx_packet_info_t adjustedPacketInfo; + + // Check if we have enough buffer + OT_ASSERT((buffer_len >= expected_data_bytes_max) || (packetInfo != nullptr)); + + // Read the packet info + sli_ot_radio_interface_rail_get_rx_incoming_packet_info(packetInfo); + + // We are trying to get the packet info of a packet before it is completely received. + // We do this to evaluate the FP bit in response and add IEs to ACK if needed. + // Check to see if we have received atleast minimum number of bytes requested. + otEXPECT_ACTION(packetInfo->packet_bytes >= expected_data_bytes_min, packetBytesRead = 0); + + adjustedPacketInfo = *packetInfo; + + // Only extract what we care about + if (packetInfo->packet_bytes > expected_data_bytes_max) + { + adjustedPacketInfo.packet_bytes = expected_data_bytes_max; + // Check if the initial portion of the packet received so far exceeds the max value requested. + if (packetInfo->first_portion_bytes >= expected_data_bytes_max) + { + // If we have received more, make sure to copy only the required bytes into the buffer. + adjustedPacketInfo.first_portion_bytes = expected_data_bytes_max; + adjustedPacketInfo.p_last_portion_data = nullptr; + } + } + + // Copy number of bytes as indicated in `packetInfo->first_portion_bytes` into the buffer. + sli_ot_radio_interface_rail_copy_rx_packet(buffer, &adjustedPacketInfo); + // Put it back to packetBytes. + packetBytesRead = (uint8_t)adjustedPacketInfo.packet_bytes; + + exit: + return packetBytesRead; + } + + //------------------------------------------------------------------------------ + // Forward Declarations + + static void efr32PhyStackInit(void); + + #if OPENTHREAD_CONFIG_THREAD_VERSION >= OT_THREAD_VERSION_1_2 + static void updateIeInfoTxFrame(uint32_t shrTxTime); + #endif + + #ifdef SL_CATALOG_RAIL_UTIL_COEX_PRESENT + static void efr32CoexInit(void); + // Try to transmit the current outgoing frame subject to MAC-level PTA + static void tryTxCurrentPacket(void); + #else + // Transmit the current outgoing frame. + void txCurrentPacket(void); + #define tryTxCurrentPacket txCurrentPacket + #endif // SL_CATALOG_RAIL_UTIL_COEX_PRESENT + + static bool validatePacketDetails(sl_rail_rx_packet_handle_t packetHandle, + sl_rail_rx_packet_details_t *pPacketDetails, + const sl_rail_rx_packet_info_t *pPacketInfo, + uint16_t *packetLength); + static bool validatePacketTimestamp(sl_rail_rx_packet_details_t *pPacketDetails, uint16_t packetLength); + + static void updateRxFrameTimestamp(bool aIsAckFrame, sl_rail_time_t aTimestamp); + + static otError skipRxPacketLengthBytes(sl_rail_rx_packet_info_t *pPacketInfo); + + //============================================================================== + // Radio State Management (from radio_state.cpp) + // This section can be extracted to a separate file for future modularization. + // These are timing-critical functions that need to be inline-optimized. + //============================================================================== + + // Internal state flags + #define FLAG_RADIO_INIT_DONE 0x00000001 + #define FLAG_ONGOING_TX_DATA 0x00000002 + #define FLAG_ONGOING_TX_ACK 0x00000004 + #define FLAG_WAITING_FOR_ACK 0x00000008 + #define FLAG_CURRENT_TX_USE_CSMA 0x00000010 + #define FLAG_SCHEDULED_RX_PENDING 0x00000020 + #define FLAG_SCHEDULED_TX_PENDING 0x00000040 + + // Internal state variables + static volatile uint32_t sMiscRadioState = 0; + static bool sEmPendingData = false; + + // Core flag operations - static inline for internal use only + SL_CODE_CLASSIFY(SL_CODE_COMPONENT_OT_PLATFORM_ABSTRACTION, SL_CODE_CLASS_TIME_CRITICAL) + static inline void setInternalFlag(uint32_t aFlag, bool aVal) + { + CORE_DECLARE_IRQ_STATE; + CORE_ENTER_ATOMIC(); + sMiscRadioState = (aVal ? (sMiscRadioState | aFlag) : (sMiscRadioState & ~aFlag)); + CORE_EXIT_ATOMIC(); + } + + SL_CODE_CLASSIFY(SL_CODE_COMPONENT_OT_PLATFORM_ABSTRACTION, SL_CODE_CLASS_TIME_CRITICAL) + static inline bool getInternalFlag(uint32_t aFlag) + { + bool isFlagSet; + CORE_DECLARE_IRQ_STATE; + CORE_ENTER_ATOMIC(); + isFlagSet = (sMiscRadioState & aFlag) ? true : false; + CORE_EXIT_ATOMIC(); + + return isFlagSet; + } + + // Public API - these have external linkage for other radio modules + SL_CODE_CLASSIFY(SL_CODE_COMPONENT_OT_PLATFORM_ABSTRACTION, SL_CODE_CLASS_TIME_CRITICAL) + void sli_ot_radio_state_set_internal_flag(uint32_t aFlag, bool aVal) + { + setInternalFlag(aFlag, aVal); + } + + SL_CODE_CLASSIFY(SL_CODE_COMPONENT_OT_PLATFORM_ABSTRACTION, SL_CODE_CLASS_TIME_CRITICAL) + bool sli_ot_radio_state_get_internal_flag(uint32_t aFlag) + { + return getInternalFlag(aFlag); + } + + SL_CODE_CLASSIFY(SL_CODE_COMPONENT_OT_PLATFORM_ABSTRACTION, SL_CODE_CLASS_TIME_CRITICAL) + void sli_ot_radio_state_set_idle(void) + { + if (sli_ot_radio_interface_rail_get_radio_state() != SL_RAIL_RF_STATE_IDLE) + { + sli_ot_radio_interface_rail_idle(); + #ifdef SL_CATALOG_RAIL_UTIL_IEEE802154_STACK_EVENT_PRESENT + sli_ot_radio_events_handle_phy_stack_event(SL_RAIL_UTIL_IEEE802154_STACK_EVENT_TX_IDLED, 0U); + sli_ot_radio_events_handle_phy_stack_event(SL_RAIL_UTIL_IEEE802154_STACK_EVENT_RX_IDLED, 0U); + #endif + } + sli_ot_radio_interface_rail_yield_radio(); + } + + // Internal-only wrappers - static inline for ISR performance + static inline bool isTransmitting(void) + { + return (getInternalFlag(FLAG_ONGOING_TX_DATA) || getInternalFlag(FLAG_ONGOING_TX_ACK)); + } + + static inline bool isTxDataOngoing(void) + { + return getInternalFlag(FLAG_ONGOING_TX_DATA); + } + + static inline bool hasTxEvents(void) + { + return getInternalFlag(RADIO_TX_EVENTS); + } + + // External API functions - regular linkage for other modules + bool sli_ot_radio_state_is_transmitting(void) + { + return isTransmitting(); + } + + bool sli_ot_radio_state_is_transmitting_or_scanning(void) + { + return (sli_ot_energy_scan_is_in_progress() || isTxDataOngoing() || hasTxEvents()); + } + + SL_CODE_CLASSIFY(SL_CODE_COMPONENT_OT_PLATFORM_ABSTRACTION, SL_CODE_CLASS_TIME_CRITICAL) + bool sli_ot_radio_state_is_waiting_for_ack(void) + { + return isTxDataOngoing() && getInternalFlag(FLAG_WAITING_FOR_ACK); + } + + bool sli_ot_radio_state_is_tx_scheduled(void) + { + return getInternalFlag(FLAG_SCHEDULED_TX_PENDING | EVENT_SCHEDULED_TX_STARTED); + } + + void sli_ot_radio_state_set_scheduled_rx_pending(bool aPending) + { + setInternalFlag(FLAG_SCHEDULED_RX_PENDING, aPending); + } + + bool sli_ot_radio_state_is_rx_scheduled(void) + { + return getInternalFlag(FLAG_SCHEDULED_RX_PENDING); + } + + void sli_ot_radio_state_set_scheduled_rx_started(bool aStarted) + { + setInternalFlag(EVENT_SCHEDULED_RX_STARTED, aStarted); + } + + bool sli_ot_radio_state_is_initialized(void) + { + return getInternalFlag(FLAG_RADIO_INIT_DONE); + } + + void sli_ot_radio_state_mark_initialized(void) + { + setInternalFlag(FLAG_RADIO_INIT_DONE, true); + } + + bool sli_ot_radio_state_is_tx_data_ongoing(void) + { + return isTxDataOngoing(); + } + + void sli_ot_radio_state_set_tx_data_ongoing(bool aOngoing) + { + setInternalFlag(FLAG_ONGOING_TX_DATA, aOngoing); + } + + bool sli_ot_radio_state_is_tx_ack_ongoing(void) + { + return getInternalFlag(FLAG_ONGOING_TX_ACK); + } + + void sli_ot_radio_state_set_tx_ack_ongoing(bool aOngoing) + { + setInternalFlag(FLAG_ONGOING_TX_ACK, aOngoing); + } + + bool sli_ot_radio_state_is_using_csma(void) + { + return getInternalFlag(FLAG_CURRENT_TX_USE_CSMA); + } + + void sli_ot_radio_state_set_using_csma(bool aUseCsma) + { + setInternalFlag(FLAG_CURRENT_TX_USE_CSMA, aUseCsma); + } + + void sli_ot_radio_state_set_waiting_for_ack(bool aWaiting) + { + setInternalFlag(FLAG_WAITING_FOR_ACK, aWaiting); + } + + void sli_ot_radio_state_set_scheduled_tx_pending(bool aPending) + { + setInternalFlag(FLAG_SCHEDULED_TX_PENDING, aPending); + } + + void sli_ot_radio_state_set_scheduled_tx_started(bool aStarted) + { + setInternalFlag(EVENT_SCHEDULED_TX_STARTED, aStarted); + } + + bool sli_ot_radio_state_has_tx_events(void) + { + return hasTxEvents(); + } + + void sli_ot_radio_state_clear_all_tx_events(void) + { + setInternalFlag(RADIO_TX_EVENTS, false); + } + + bool sli_ot_radio_state_has_tx_success(void) + { + return getInternalFlag(EVENT_TX_SUCCESS); + } + + void sli_ot_radio_state_set_tx_success(bool aSuccess) + { + setInternalFlag(EVENT_TX_SUCCESS, aSuccess); + } + + bool sli_ot_radio_state_has_tx_cca_failed(void) + { + return getInternalFlag(EVENT_TX_CCA_FAILED); + } + + void sli_ot_radio_state_set_tx_cca_failed(bool aFailed) + { + setInternalFlag(EVENT_TX_CCA_FAILED, aFailed); + } + + bool sli_ot_radio_state_has_tx_no_ack(void) + { + return getInternalFlag(EVENT_TX_NO_ACK); + } + + void sli_ot_radio_state_set_tx_no_ack(bool aNoAck) + { + setInternalFlag(EVENT_TX_NO_ACK, aNoAck); + } + + bool sli_ot_radio_state_has_tx_failed(void) + { + return getInternalFlag(EVENT_TX_FAILED); + } + + void sli_ot_radio_state_set_tx_failed(bool aFailed) + { + setInternalFlag(EVENT_TX_FAILED, aFailed); + } + + void sli_ot_radio_state_clear_tx_data_and_wait_for_ack(void) + { + setInternalFlag(FLAG_ONGOING_TX_DATA | FLAG_WAITING_FOR_ACK | EVENT_SCHEDULED_TX_STARTED, false); + } + + void sli_ot_radio_state_clear_all_scheduled_events(void) + { + setInternalFlag(FLAG_SCHEDULED_RX_PENDING | FLAG_SCHEDULED_TX_PENDING | EVENT_SCHEDULED_TX_STARTED, false); + } + + SL_CODE_CLASSIFY(SL_CODE_COMPONENT_OT_PLATFORM_ABSTRACTION, SL_CODE_CLASS_TIME_CRITICAL) + bool sli_ot_radio_state_is_receiving_frame(void) + { + #ifdef SL_CATALOG_RAIL_UTIL_IEEE802154_STACK_EVENT_PRESENT + sl_rail_handle_t railHandle = sli_ot_radio_interface_get_rail_handle(); + + return (sl_rail_get_radio_state(railHandle) & SL_RAIL_RF_STATE_RX_ACTIVE) == SL_RAIL_RF_STATE_RX_ACTIVE; + #else + return false; + #endif + } + + void sli_ot_radio_state_set_em_pending_data(bool aPending) + { + sEmPendingData = aPending; + } + + bool sli_ot_radio_state_get_em_pending_data(void) + { + return sEmPendingData; + } + + void sli_ot_radio_state_init(void) + { + sMiscRadioState = 0; + sEmPendingData = false; + } + + void sli_ot_radio_state_deinit(void) + { + sMiscRadioState = 0; + sEmPendingData = false; + } + + //============================================================================== + // Radio Event Processing + //============================================================================== + + // Internal event state + static sl_rail_events_t sCurrentEventConfig = SL_RAIL_EVENTS_NONE; + + // Forward declarations for internal event processing functions + static void processTxPacketSentEvent(void); + static void processTxChannelBusyEvent(void); + static void processTxBlockedEvent(void); + static void processTxUnderflowAbortedEvent(void); + static void processTxCcaEvents(sl_rail_events_t aEvents); + static void processRxPacketReceivedEvent(void); + #ifdef SL_CATALOG_RAIL_UTIL_IEEE802154_STACK_EVENT_PRESENT + static void processRxSyncDetectedEvent(void); + static void processRxFilterPassedEvent(void); + static void processRxFrameErrorEvent(void); + static void processRxFilteredEvent(void); + #endif // SL_CATALOG_RAIL_UTIL_IEEE802154_STACK_EVENT_PRESENT + static void processAckSentEvent(void); + static void processAckAbortedEvent(void); + static void processAckBlockedEvent(void); + static void processScheduledTxEvent(void); + static void processScheduledTxMissedEvent(void); + static void processScheduledRxEvent(void); + static void processScheduledRxEndMissedEvent(void); + + #ifdef SL_CATALOG_RAIL_UTIL_COEX_PRESENT + static void processCoexSignalDetectedEvent(void); + #endif // SL_CATALOG_RAIL_UTIL_COEX_PRESENT + + static void processDataRequestCommandEvent(sl_rail_handle_t aRailHandle); + + void sli_ot_radio_events_init(void) + { + sCurrentEventConfig = SL_RAIL_EVENTS_NONE; + } + + void sli_ot_radio_events_deinit(void) + { + sCurrentEventConfig = SL_RAIL_EVENTS_NONE; + } + + void sli_ot_radio_events_update_config(sl_rail_events_t mask, sl_rail_events_t values) + { + sl_rail_status_t status; + sl_rail_events_t newEventConfig = (sCurrentEventConfig & ~mask) | (values & mask); + + if (newEventConfig != sCurrentEventConfig) + { + sl_rail_handle_t railHandle = sli_ot_radio_interface_get_rail_handle(); + if (railHandle != nullptr) + { + status = sl_rail_config_events(railHandle, mask, values); + + if (status != SL_RAIL_STATUS_NO_ERROR) + { + otLogWarnPlat("Failed to configure radio events: %lu", status); + } + sCurrentEventConfig = newEventConfig; + } + } + } + + #ifdef SL_CATALOG_RAIL_UTIL_IEEE802154_STACK_EVENT_PRESENT + SL_CODE_CLASSIFY(SL_CODE_COMPONENT_OT_PLATFORM_ABSTRACTION, SL_CODE_CLASS_TIME_CRITICAL) + sl_rail_util_ieee802154_stack_event_t sli_ot_radio_events_handle_phy_stack_event_with_status( + sl_rail_util_ieee802154_stack_event_t stackEvent, + uint32_t supplement) + { + sl_rail_util_ieee802154_stack_event_t status = SL_RAIL_UTIL_IEEE802154_STACK_STATUS_SUCCESS; + + if (phyStackEventIsEnabled()) + { + #ifdef SL_CATALOG_RAIL_MULTIPLEXER_PRESENT + sl_rail_handle_t railHandle = sli_ot_radio_interface_get_rail_handle(); + otEXPECT_ACTION(railHandle != nullptr, status = SL_RAIL_UTIL_IEEE802154_STACK_STATUS_HOLDOFF); + status = sl_rail_mux_ieee802154_on_event(railHandle, stackEvent, supplement); + #else + status = sl_rail_util_ieee802154_on_event(stackEvent, supplement); + #endif + } + + #ifdef SL_CATALOG_RAIL_MULTIPLEXER_PRESENT + exit: + #endif + return status; + } + + void sli_ot_radio_events_handle_phy_stack_event(sl_rail_util_ieee802154_stack_event_t stackEvent, uint32_t supplement) + { + sli_ot_radio_events_handle_phy_stack_event_with_status(stackEvent, supplement); + } + #endif // SL_CATALOG_RAIL_UTIL_IEEE802154_STACK_EVENT_PRESENT + + void sli_ot_radio_events_process_callback(sl_rail_handle_t aRailHandle, sl_rail_events_t aEvents) + { + // Process RX sync detection events first + #ifdef SL_CATALOG_RAIL_UTIL_IEEE802154_STACK_EVENT_PRESENT + if (aEvents & (SL_RAIL_EVENT_RX_SYNC_0_DETECT | SL_RAIL_EVENT_RX_SYNC_1_DETECT)) + { + processRxSyncDetectedEvent(); + } + #endif + + // Process coexistence events + #ifdef SL_CATALOG_RAIL_UTIL_COEX_PRESENT + if (aEvents & SL_RAIL_EVENT_SIGNAL_DETECTED) + { + processCoexSignalDetectedEvent(); + } + #endif + + // Process data request command events + if ((aEvents & SL_RAIL_EVENT_IEEE802154_DATA_REQUEST_COMMAND) + #ifdef SL_CATALOG_RAIL_UTIL_COEX_PRESENT + && !sl_rail_is_rx_auto_ack_paused(aRailHandle) + #endif + ) + { + processDataRequestCommandEvent(aRailHandle); + } + + // Process RX filter passed events + #ifdef SL_CATALOG_RAIL_UTIL_IEEE802154_STACK_EVENT_PRESENT + if (aEvents & SL_RAIL_EVENT_RX_FILTER_PASSED) + { + processRxFilterPassedEvent(); + } + #endif + + // Process TX events + sli_ot_radio_events_process_tx_events(aEvents); + + // Process scheduled events for Thread 1.2+ + #if OPENTHREAD_CONFIG_THREAD_VERSION >= OT_THREAD_VERSION_1_2 + if (sli_ot_radio_state_is_rx_scheduled()) + { + sli_ot_radio_events_process_scheduled_rx_events(aEvents); + } + else + { + sli_ot_radio_events_process_scheduled_tx_events(aEvents); + } + #endif + + // Process RX packet received events + if (aEvents & SL_RAIL_EVENT_RX_PACKET_RECEIVED) + { + processRxPacketReceivedEvent(); + } + + // Process RX error events + #ifdef SL_CATALOG_RAIL_UTIL_IEEE802154_STACK_EVENT_PRESENT + if (aEvents & SL_RAIL_EVENT_RX_FRAME_ERROR) + { + processRxFrameErrorEvent(); + } + + if (aEvents + & (SL_RAIL_EVENT_RX_PACKET_ABORTED | SL_RAIL_EVENT_RX_ADDRESS_FILTERED | SL_RAIL_EVENT_RX_FIFO_OVERFLOW)) + { + processRxFilteredEvent(); + } + #endif + + // Process ACK events + sli_ot_radio_events_process_ack_events(aEvents); + + if (aEvents & SL_RAIL_EVENT_CONFIG_UNSCHEDULED) + { + sli_ot_radio_events_handle_phy_stack_event(SL_RAIL_UTIL_IEEE802154_STACK_EVENT_RX_IDLED, 0U); + #if RADIO_CONFIG_DEBUG_COUNTERS_SUPPORT + railDebugCounters.mRailEventConfigUnScheduled++; + #endif + } + + if (aEvents & SL_RAIL_EVENT_CONFIG_SCHEDULED) + { + #if RADIO_CONFIG_DEBUG_COUNTERS_SUPPORT + railDebugCounters.mRailEventConfigScheduled++; + #endif + } + + if (aEvents & SL_RAIL_EVENT_SCHEDULER_STATUS) + { + schedulerEventCallback(aRailHandle); + } + + if (aEvents & SL_RAIL_EVENT_CAL_NEEDED) + { + sl_rail_status_t status; + + status = sl_rail_calibrate(aRailHandle, NULL, SL_RAIL_CAL_ALL_PENDING); + // Non-RTOS DMP case fails but is unsupported + #if (!defined(SL_CATALOG_BLUETOOTH_PRESENT) || defined(SL_CATALOG_KERNEL_PRESENT)) + // TEMPORARY - this asserts on Mux - OT_ASSERT(status == SL_RAIL_STATUS_NO_ERROR); + OT_UNUSED_VARIABLE(status); + #else + OT_UNUSED_VARIABLE(status); + #endif + + #if RADIO_CONFIG_DEBUG_COUNTERS_SUPPORT + railDebugCounters.mRailEventCalNeeded++; + #endif + } + + // scheduled and unscheduled config events happen very often, + // especially in a DMP situation where there is an active BLE connection. + // Waking up the OT RTOS task on every one of these occurrences causes + // a lower priority Serial task to starve and makes it appear like a code lockup + // There is no reason to wake the OT task for these events! + if (!(aEvents & SL_RAIL_EVENT_CONFIG_SCHEDULED) && !(aEvents & SL_RAIL_EVENT_CONFIG_UNSCHEDULED)) + { + otSysEventSignalPending(); + } + } + + void sli_ot_radio_events_process_tx_events(sl_rail_events_t aEvents) + { + if (aEvents & SL_RAIL_EVENT_TX_PACKET_SENT) + { + processTxPacketSentEvent(); + } + else if (aEvents & SL_RAIL_EVENT_TX_CHANNEL_BUSY) + { + processTxChannelBusyEvent(); + } + else if (aEvents & SL_RAIL_EVENT_TX_BLOCKED) + { + processTxBlockedEvent(); + } + else if (aEvents & (SL_RAIL_EVENT_TX_UNDERFLOW | SL_RAIL_EVENT_TX_ABORTED)) + { + processTxUnderflowAbortedEvent(); + } + else + { + // Process CCA-related events + processTxCcaEvents(aEvents); + } + } + + void sli_ot_radio_events_process_rx_events(sl_rail_events_t aEvents) + { + // RX events are processed in the main callback + // This function is provided for future extensibility + OT_UNUSED_VARIABLE(aEvents); + } + + void sli_ot_radio_events_process_scheduled_tx_events(sl_rail_events_t aEvents) + { + if (aEvents & SL_RAIL_EVENT_TX_SCHEDULED_TX_STARTED) + { + processScheduledTxEvent(); + } + else if (aEvents & SL_RAIL_EVENT_TX_SCHEDULED_TX_MISSED) + { + processScheduledTxMissedEvent(); + } + } + + void sli_ot_radio_events_process_scheduled_rx_events(sl_rail_events_t aEvents) + { + if (aEvents & SL_RAIL_EVENT_RX_SCHEDULED_RX_STARTED) + { + processScheduledRxEvent(); + } + + if (aEvents & SL_RAIL_EVENT_RX_SCHEDULED_RX_END || aEvents & SL_RAIL_EVENT_RX_SCHEDULED_RX_MISSED) + { + processScheduledRxEndMissedEvent(); + } + } + + void sli_ot_radio_events_process_ack_events(sl_rail_events_t aEvents) + { + if (aEvents & SL_RAIL_EVENT_TXACK_PACKET_SENT) + { + processAckSentEvent(); + } + + if (aEvents & (SL_RAIL_EVENT_TXACK_ABORTED | SL_RAIL_EVENT_TXACK_UNDERFLOW)) + { + processAckAbortedEvent(); + } + + if (aEvents & SL_RAIL_EVENT_TXACK_BLOCKED) + { + processAckBlockedEvent(); + } + + // Deal with ACK timeout after possible RX completion in case RAIL + // notifies us of the ACK and the timeout simultaneously -- we want + // the ACK to win over the timeout. + if ((aEvents & SL_RAIL_EVENT_RX_ACK_TIMEOUT) && (sli_ot_radio_state_get_internal_flag(FLAG_WAITING_FOR_ACK))) + { + ackTimeoutCallback(); + } + } + + void sli_ot_radio_events_process_coex_events(sl_rail_events_t aEvents) + { + // Coexistence events are processed in the main callback + // This function is provided for future extensibility + OT_UNUSED_VARIABLE(aEvents); + } + + void sli_ot_radio_events_process_data_request_events(sl_rail_handle_t aRailHandle, sl_rail_events_t aEvents) + { + if (aEvents & SL_RAIL_EVENT_IEEE802154_DATA_REQUEST_COMMAND) + { + processDataRequestCommandEvent(aRailHandle); + } + } + + void sli_ot_radio_events_process_error_events(sl_rail_events_t aEvents) + { + // Error events are processed in the main callback + // This function is provided for future extensibility + OT_UNUSED_VARIABLE(aEvents); + } + + // Internal event processing functions + static inline void processTxPacketSentEvent(void) + { + packetSentCallback(false); + } + + static inline void processTxChannelBusyEvent(void) + { + sli_ot_radio_events_handle_phy_stack_event(SL_RAIL_UTIL_IEEE802154_STACK_EVENT_TX_BLOCKED, + static_cast(txWaitingForAck())); + txFailedCallback(false, EVENT_TX_CCA_FAILED); + } + + static inline void processTxBlockedEvent(void) + { + sli_ot_radio_events_handle_phy_stack_event(SL_RAIL_UTIL_IEEE802154_STACK_EVENT_TX_BLOCKED, + static_cast(txWaitingForAck())); + txFailedCallback(false, EVENT_TX_FAILED); + } + + static inline void processTxUnderflowAbortedEvent(void) + { + sli_ot_radio_events_handle_phy_stack_event(SL_RAIL_UTIL_IEEE802154_STACK_EVENT_TX_ABORTED, + static_cast(txWaitingForAck())); + txFailedCallback(false, EVENT_TX_FAILED); + } + + static inline void processTxCcaEvents(sl_rail_events_t aEvents) + { + #ifdef SL_CATALOG_RAIL_UTIL_IEEE802154_STACK_EVENT_PRESENT + if (aEvents & SL_RAIL_EVENT_TX_START_CCA) + { + sli_ot_radio_events_handle_phy_stack_event(SL_RAIL_UTIL_IEEE802154_STACK_EVENT_TX_CCA_SOON, 0U); + } + + if (aEvents & SL_RAIL_EVENT_TX_CCA_RETRY) + { + sl_rail_handle_t railHandle = sli_ot_radio_interface_get_rail_handle(); + sli_ot_radio_events_handle_phy_stack_event(SL_RAIL_UTIL_IEEE802154_STACK_EVENT_TX_CCA_BUSY, + static_cast(sl_rail_is_next_cca_now(railHandle))); + } + + if (aEvents & SL_RAIL_EVENT_TX_CHANNEL_CLEAR) + { + sli_ot_radio_events_handle_phy_stack_event(SL_RAIL_UTIL_IEEE802154_STACK_EVENT_TX_STARTED, 0U); + } + #else + OT_UNUSED_VARIABLE(aEvents); + #endif + } + + static inline void processRxPacketReceivedEvent(void) + { + packetReceivedCallback(); + } + + #ifdef SL_CATALOG_RAIL_UTIL_IEEE802154_STACK_EVENT_PRESENT + static inline void processRxSyncDetectedEvent(void) + { + sli_ot_radio_events_handle_phy_stack_event(SL_RAIL_UTIL_IEEE802154_STACK_EVENT_RX_STARTED, + static_cast(sli_ot_radio_state_is_receiving_frame())); + } + + static inline void processRxFilterPassedEvent(void) + { + sli_ot_radio_events_handle_phy_stack_event(SL_RAIL_UTIL_IEEE802154_STACK_EVENT_RX_ACCEPTED, + static_cast(sli_ot_radio_state_is_receiving_frame())); + } + + static inline void processRxFrameErrorEvent(void) + { + sli_ot_radio_events_handle_phy_stack_event(SL_RAIL_UTIL_IEEE802154_STACK_EVENT_RX_CORRUPTED, + static_cast(sli_ot_radio_state_is_receiving_frame())); + } + + static inline void processRxFilteredEvent(void) + { + sli_ot_radio_events_handle_phy_stack_event(SL_RAIL_UTIL_IEEE802154_STACK_EVENT_RX_FILTERED, + static_cast(sli_ot_radio_state_is_receiving_frame())); + } + #endif // SL_CATALOG_RAIL_UTIL_IEEE802154_STACK_EVENT_PRESENT + + static inline void processAckSentEvent(void) + { + sli_ot_radio_events_handle_phy_stack_event(SL_RAIL_UTIL_IEEE802154_STACK_EVENT_RX_ACK_SENT, + static_cast(sli_ot_radio_state_is_receiving_frame())); + packetSentCallback(true); + } + + static inline void processAckAbortedEvent(void) + { + sli_ot_radio_events_handle_phy_stack_event(SL_RAIL_UTIL_IEEE802154_STACK_EVENT_RX_ACK_ABORTED, + static_cast(sli_ot_radio_state_is_receiving_frame())); + txFailedCallback(true, 0xFF); + } + + static inline void processAckBlockedEvent(void) + { + sli_ot_radio_events_handle_phy_stack_event(SL_RAIL_UTIL_IEEE802154_STACK_EVENT_RX_ACK_BLOCKED, + static_cast(sli_ot_radio_state_is_receiving_frame())); + } + + static inline void processScheduledTxEvent(void) + { + sli_ot_radio_state_set_internal_flag(EVENT_SCHEDULED_TX_STARTED, true); + sli_ot_radio_state_set_internal_flag(FLAG_SCHEDULED_TX_PENDING, false); + } + + static inline void processScheduledTxMissedEvent(void) + { + sli_ot_radio_state_set_internal_flag(FLAG_SCHEDULED_TX_PENDING, false); + txFailedCallback(false, EVENT_TX_SCHEDULER_ERROR); + } + + static inline void processScheduledRxEvent(void) + { + sli_ot_radio_state_set_internal_flag(EVENT_SCHEDULED_RX_STARTED, true); + } + + static inline void processScheduledRxEndMissedEvent(void) + { + sli_ot_radio_state_set_internal_flag(FLAG_SCHEDULED_RX_PENDING | EVENT_SCHEDULED_RX_STARTED, false); + sli_ot_radio_state_set_idle(); + } + + #ifdef SL_CATALOG_RAIL_UTIL_COEX_PRESENT + static inline void processCoexSignalDetectedEvent(void) + { + sli_ot_radio_events_handle_phy_stack_event(SL_RAIL_UTIL_IEEE802154_STACK_EVENT_SIGNAL_DETECTED, 0U); + } + #endif // SL_CATALOG_RAIL_UTIL_COEX_PRESENT + + static inline void processDataRequestCommandEvent(sl_rail_handle_t aRailHandle) + { + dataRequestCommandCallback(aRailHandle); + } + //============================================================================== + + //------------------------------------------------------------------------------ + // Helper Functions + + #ifdef SL_CATALOG_RAIL_UTIL_IEEE802154_STACK_EVENT_PRESENT + + SL_CODE_CLASSIFY(SL_CODE_COMPONENT_OT_PLATFORM_ABSTRACTION, SL_CODE_CLASS_TIME_CRITICAL) + static bool phyStackEventIsEnabled(void) + { + bool result = false; + + #if (defined(SL_CATALOG_RAIL_UTIL_ANT_DIV_PRESENT) && SL_RAIL_UTIL_ANT_DIV_RX_RUNTIME_PHY_SELECT) + result = true; + #endif // SL_CATALOG_RAIL_UTIL_ANT_DIV_PRESENT + + #ifdef SL_CATALOG_RAIL_UTIL_COEX_PRESENT + if (sli_ot_radio_interface_is_coex_enabled()) + { + result |= sl_rail_util_coex_is_enabled(); + #ifdef SL_RAIL_UTIL_COEX_RUNTIME_PHY_SELECT + result |= SL_RAIL_UTIL_COEX_RUNTIME_PHY_SELECT; + #endif + } + #endif // SL_CATALOG_RAIL_UTIL_COEX_PRESENT + + return result; + } + + #endif // SL_CATALOG_RAIL_UTIL_IEEE802154_STACK_EVENT_PRESENT + + SL_CODE_CLASSIFY(SL_CODE_COMPONENT_OT_PLATFORM_ABSTRACTION, SL_CODE_CLASS_TIME_CRITICAL) + static inline bool txWaitingForAck(void) + { + return (sli_ot_radio_state_is_tx_data_ongoing() && sCurrentTxPacket != nullptr + && ((sCurrentTxPacket->frame.mPsdu[0] & IEEE802154_FRAME_FLAG_ACK_REQUIRED) != 0)); + } + + SL_CODE_CLASSIFY(SL_CODE_COMPONENT_OT_PLATFORM_ABSTRACTION, SL_CODE_CLASS_TIME_CRITICAL) + static bool txIsDataRequest(void) + { + bool isDataRequest = false; + uint16_t fcf; + + otEXPECT(sli_ot_radio_state_is_tx_data_ongoing() && sCurrentTxPacket != nullptr); + + fcf = (uint16_t)sCurrentTxPacket->frame.mPsdu[IEEE802154_FCF_OFFSET] + | (uint16_t)(sCurrentTxPacket->frame.mPsdu[IEEE802154_FCF_OFFSET + 1] << 8); + + isDataRequest = ((fcf & IEEE802154_FRAME_TYPE_MASK) == IEEE802154_FRAME_TYPE_COMMAND); + + exit: + return isDataRequest; + } + + #if (OPENTHREAD_CONFIG_THREAD_VERSION >= OT_THREAD_VERSION_1_2) + static otError radioScheduleRx(uint8_t aChannel, uint32_t aStart, uint32_t aDuration) + { + otError error = OT_ERROR_NONE; + sl_rail_status_t status; + + #if FAST_CHANNEL_SWITCHING_SUPPORT && OPENTHREAD_CONFIG_MULTIPLE_INSTANCE_ENABLE + // UID 1327639: Schedule Rx and Concurrent listening when used together + // will cause undefined behavior. Therefore it was decided to assert upon detecting + // this condition + assert(0); + #endif // FAST_CHANNEL_SWITCHING_SUPPORT && OPENTHREAD_CONFIG_MULTIPLE_INSTANCE_ENABLE + + sl_rail_scheduler_info_t bgRxSchedulerInfo = {.priority = SL_802154_RADIO_PRIO_BACKGROUND_RX_VALUE, + .slip_time = 0, + .transaction_time = 0}; + + // Configure scheduled receive as requested + sl_rail_scheduled_rx_config_t rxCfg = { + .start = aStart, + .start_mode = SL_RAIL_TIME_ABSOLUTE, + .end = aDuration, + .end_mode = SL_RAIL_TIME_DELAY, + .rx_transition_end_schedule = 0, // To stay in schedule Rx state after packet receive. + .hard_window_end = 0}; // This lets us receive a packet near a window-end-event + + status = sli_ot_radio_interface_rail_start_scheduled_rx(aChannel, &rxCfg, &bgRxSchedulerInfo); + otEXPECT_ACTION(status == SL_RAIL_STATUS_NO_ERROR, error = OT_ERROR_FAILED); + + sli_ot_radio_events_handle_phy_stack_event(SL_RAIL_UTIL_IEEE802154_STACK_EVENT_RX_LISTEN, 0U); + exit: + return error; + } + #endif // (OPENTHREAD_CONFIG_THREAD_VERSION >= OT_THREAD_VERSION_1_2) + + template static void efr32ConfigInit(EventCallback aEventCallback) + { + // Set event callback in common config + efr32CommonConfig *commonConfig = sli_ot_radio_interface_get_common_config_ptr(); + commonConfig->mRailConfig.events_callback = aEventCallback; + + sli_init_power_manager(); + + OT_ASSERT(sli_ot_radio_interface_rail_init(commonConfig) != nullptr); + + sli_ot_radio_events_update_config(SL_RAIL_EVENTS_ALL, + (0 | SL_RAIL_EVENT_RX_ACK_TIMEOUT | SL_RAIL_EVENT_RX_PACKET_RECEIVED + #if OPENTHREAD_CONFIG_THREAD_VERSION >= OT_THREAD_VERSION_1_2 + | SL_RAIL_EVENT_TX_SCHEDULED_TX_STARTED | SL_RAIL_EVENT_TX_SCHEDULED_TX_MISSED + | SL_RAIL_EVENT_RX_SCHEDULED_RX_STARTED | SL_RAIL_EVENT_RX_SCHEDULED_RX_END + | SL_RAIL_EVENT_RX_SCHEDULED_RX_MISSED + #endif + | SL_RAIL_EVENTS_TXACK_COMPLETION | SL_RAIL_EVENTS_TX_COMPLETION + | SL_RAIL_EVENT_IEEE802154_DATA_REQUEST_COMMAND + #if RADIO_CONFIG_DEBUG_COUNTERS_SUPPORT || RADIO_CONFIG_DMP_SUPPORT + | SL_RAIL_EVENT_CONFIG_SCHEDULED | SL_RAIL_EVENT_CONFIG_UNSCHEDULED + | SL_RAIL_EVENT_SCHEDULER_STATUS + #endif + | SL_RAIL_EVENT_CAL_NEEDED)); + + sli_ot_radio_interface_load_rail_config(sli_ot_radio_interface_get_band_config_ptr(), + OPENTHREAD_CONFIG_DEFAULT_TRANSMIT_POWER); + } + + void efr32RadioInit(void) + { + if (sli_ot_radio_state_is_initialized()) + { + return; + } + sl_rail_status_t status; + sl_status_t rxMemPoolStatus; + bool queueStatus; + sl_rail_timer_sync_config_t timer_sync_config = SL_RAIL_TIMER_SYNC_DEFAULT; + + // check if RAIL_TX_FIFO_SIZE is power of two.. + OT_ASSERT((RAIL_TX_FIFO_SIZE & (RAIL_TX_FIFO_SIZE - 1)) == 0); + + // check the limits of the RAIL_TX_FIFO_SIZE. + OT_ASSERT((RAIL_TX_FIFO_SIZE >= SL_RAIL_MINIMUM_FIFO_BYTES) || (RAIL_TX_FIFO_SIZE <= SL_RAIL_MAXIMUM_FIFO_BYTES)); + + sli_ot_radio_events_init(); + sli_ot_radio_interface_init_config(); + efr32ConfigInit(sli_ot_radio_events_process_callback); + sli_ot_radio_state_mark_initialized(); + status = sli_ot_radio_interface_rail_config_sleep(&timer_sync_config); + OT_ASSERT(status == SL_RAIL_STATUS_NO_ERROR); + + sReceive.frame.mLength = 0; + sReceive.frame.mPsdu = nullptr; + + sReceiveAck.frame.mLength = 0; + sReceiveAck.frame.mPsdu = sReceiveAckPsdu; + + #if OPENTHREAD_CONFIG_MULTIPLE_INSTANCE_ENABLE + sli_ot_radio_instance_init_command_queue(); + #endif + + for (uint8_t i = 0; i < RADIO_REQUEST_BUFFER_COUNT; i++) + { + // Initialize the tx buffer params. + sTransmitBuffer[i].instance = nullptr; + sTransmitBuffer[i].frame.mLength = 0; + sTransmitBuffer[i].frame.mPsdu = sTransmitPsdu[i]; + + #if OPENTHREAD_CONFIG_MAC_HEADER_IE_SUPPORT + sTransmitBuffer[i].frame.mInfo.mTxInfo.mIeInfo = &sTransmitIeInfo[i]; + #endif + } + + #if OPENTHREAD_CONFIG_MLE_LINK_METRICS_SUBJECT_ENABLE + otLinkMetricsInit(SL_OPENTHREAD_RECEIVE_SENSITIVITY); + #endif + sli_ot_radio_interface_set_current_band_config( + sli_ot_radio_interface_get_band_config(OPENTHREAD_CONFIG_DEFAULT_CHANNEL)); + OT_ASSERT(sli_ot_radio_interface_get_current_band_config() != nullptr); + + sl_rail_util_pa_init(); + sli_ot_radio_interface_set_tx_power(OPENTHREAD_CONFIG_DEFAULT_TRANSMIT_POWER); + + status = sli_ot_radio_interface_rail_config_rx_options(SL_RAIL_RX_OPTION_TRACK_ABORTED_FRAMES, + SL_RAIL_RX_OPTION_TRACK_ABORTED_FRAMES); + OT_ASSERT(status == SL_RAIL_STATUS_NO_ERROR); + efr32PhyStackInit(); + sli_ot_radio_interface_set_cca_mode(SL_OPENTHREAD_RADIO_CCA_MODE); + + sli_ot_energy_scan_init(); + + #if FAST_CHANNEL_SWITCHING_SUPPORT && OPENTHREAD_CONFIG_MULTIPLE_INSTANCE_ENABLE + sli_ot_radio_channel_switching_init(); + #endif + + #if OPENTHREAD_CONFIG_THREAD_VERSION >= OT_THREAD_VERSION_1_2 + sli_ot_radio_csl_init(); + #endif + + // Initialize the queue for received packets. + queueStatus = queueInit(&sRxPacketQueue, SL_OPENTHREAD_RADIO_RX_BUFFER_COUNT); + OT_ASSERT(queueStatus); + + // Specify a callback to be called upon queue overflow. + queueStatus = queueOverflow(&sRxPacketQueue, &rxPacketQueueOverflowCallback); + OT_ASSERT(queueStatus); + + // Initialize the memory pool for rx packets. + rxMemPoolStatus = + sl_memory_create_pool(sizeof(rxBuffer), SL_OPENTHREAD_RADIO_RX_BUFFER_COUNT, &sRxPacketMemPoolHandle); + OT_ASSERT(rxMemPoolStatus == SL_STATUS_OK); + + otLogInfoPlat("Initialized"); + } + + void efr32RadioDeinit(void) + { + sl_rail_status_t status; + + sli_ot_radio_interface_rail_idle_abort(); + status = sli_ot_radio_interface_rail_config_events(SL_RAIL_EVENTS_ALL, 0); + OT_ASSERT(status == SL_RAIL_STATUS_NO_ERROR); + + sli_ot_radio_interface_set_current_band_config(nullptr); + sli_ot_radio_events_deinit(); + + // Clean up any ongoing energy scan + sli_ot_energy_scan_deinit(); + + #if OPENTHREAD_CONFIG_THREAD_VERSION >= OT_THREAD_VERSION_1_2 + sli_ot_radio_csl_deinit(); + #endif + + sl_memory_delete_pool(&sRxPacketMemPoolHandle); + } + + //------------------------------------------------------------------------------ + // Stack support + + void otPlatRadioSetPanId(otInstance *aInstance, uint16_t aPanId) + { + sl_rail_status_t status; + panIndex_t panIndex = sli_ot_radio_instance_get_pan_index(aInstance); + + otEXPECT(sl_ot_rtos_task_can_access_pal()); + otLogInfoPlat("PANID=%X index=%u", aPanId, panIndex); + utilsSoftSrcMatchSetPanId(aInstance, aPanId); + + status = sli_ot_radio_interface_rail_set_pan_id(aPanId, panIndex); + OT_ASSERT(status == SL_RAIL_STATUS_NO_ERROR); + + #if OPENTHREAD_CONFIG_MULTIPLE_INSTANCE_ENABLE + sli_ot_radio_instance_update_rail_filter_mask_for_pan_id(aPanId, panIndex); + #endif + exit: + return; + } + + void otPlatRadioSetExtendedAddress(otInstance *aInstance, const otExtAddress *aAddress) + { + sl_rail_status_t status; + panIndex_t panIndex = sli_ot_radio_instance_get_pan_index(aInstance); + + otEXPECT(sl_ot_rtos_task_can_access_pal()); + + for (size_t i = 0; i < sizeof(*aAddress); i++) + { + sExtAddress[panIndex].m8[i] = aAddress->m8[sizeof(*aAddress) - 1 - i]; + } + + otLogInfoPlat("ExtAddr=%X%X%X%X%X%X%X%X index=%u", + aAddress->m8[7], + aAddress->m8[6], + aAddress->m8[5], + aAddress->m8[4], + aAddress->m8[3], + aAddress->m8[2], + aAddress->m8[1], + aAddress->m8[0], + panIndex); + + status = sli_ot_radio_interface_rail_set_long_address((const uint8_t *)aAddress->m8, panIndex); + OT_ASSERT(status == SL_RAIL_STATUS_NO_ERROR); + + exit: + return; + } + + void otPlatRadioSetShortAddress(otInstance *aInstance, uint16_t aAddress) + { + sl_rail_status_t status; + panIndex_t panIndex = sli_ot_radio_instance_get_pan_index(aInstance); + + otEXPECT(sl_ot_rtos_task_can_access_pal()); + otLogInfoPlat("ShortAddr=%X index=%u", aAddress, panIndex); + + status = sli_ot_radio_interface_rail_set_short_address(aAddress, panIndex); + OT_ASSERT(status == SL_RAIL_STATUS_NO_ERROR); + + exit: + return; + } + + otError otPlatRadioEnable(otInstance *aInstance) + { + otError error = OT_ERROR_NONE; + + otEXPECT(!otPlatRadioIsEnabled(aInstance)); + + otLogInfoPlat("State=OT_RADIO_STATE_SLEEP"); + + exit: + return error; + } + + otError otPlatRadioDisable(otInstance *aInstance) + { + otError error = OT_ERROR_NONE; + + otEXPECT_ACTION(sl_ot_rtos_task_can_access_pal(), error = OT_ERROR_REJECTED); + otEXPECT_ACTION(otPlatRadioIsEnabled(aInstance), error = OT_ERROR_INVALID_STATE); + + otLogInfoPlat("State=OT_RADIO_STATE_DISABLED"); + + exit: + return error; + } + + otError otPlatRadioReceive(otInstance *aInstance, uint8_t aChannel) + { + otError error = OT_ERROR_NONE; + sl_rail_status_t status; + int8_t txPower; + + otEXPECT_ACTION(sl_ot_rtos_task_can_access_pal(), error = OT_ERROR_REJECTED); + otEXPECT_ACTION(!sli_ot_radio_state_is_tx_data_ongoing() && !sli_ot_energy_scan_is_blocking_receive(aInstance), + error = OT_ERROR_INVALID_STATE); + + #if (FAST_CHANNEL_SWITCHING_SUPPORT && OPENTHREAD_CONFIG_MULTIPLE_INSTANCE_ENABLE) + sli_ot_radio_channel_switching_configure(aInstance, aChannel); + #endif + + txPower = sl_get_tx_power_for_current_channel(aInstance); + error = sli_ot_radio_interface_load_channel_config(aChannel, txPower); + otEXPECT(error == OT_ERROR_NONE); + + status = sli_ot_radio_interface_set_rx(aChannel); + otEXPECT_ACTION(status == SL_RAIL_STATUS_NO_ERROR, error = OT_ERROR_FAILED); + sli_ot_radio_state_set_scheduled_rx_pending(false); + + sReceive.frame.mChannel = aChannel; + sReceiveAck.frame.mChannel = aChannel; + + exit: + return error; + } + + #if (OPENTHREAD_CONFIG_THREAD_VERSION >= OT_THREAD_VERSION_1_2) + otError otPlatRadioReceiveAt(otInstance *aInstance, uint8_t aChannel, uint32_t aStart, uint32_t aDuration) + { + otError error = OT_ERROR_NONE; + int8_t txPower = sl_get_tx_power_for_current_channel(aInstance); + + // We can only have one schedule request i.e. either Rx or Tx as they use the + // same RAIL resources. + otEXPECT_ACTION(!sli_ot_radio_state_is_tx_scheduled(), error = OT_ERROR_FAILED); + + otEXPECT_ACTION(sl_ot_rtos_task_can_access_pal(), error = OT_ERROR_REJECTED); + OT_UNUSED_VARIABLE(aInstance); + + error = sli_ot_radio_interface_load_channel_config(aChannel, txPower); + otEXPECT(error == OT_ERROR_NONE); + + // Set the flag first and then schedule the Rx as the rail scheduler can trigger the events even before + // sl_rail_start_scheduled_rx() API returns the status if start time is too close to the current time which could + // otherwise cause the race condition. + sli_ot_radio_state_set_scheduled_rx_pending(true); + error = radioScheduleRx(aChannel, aStart, aDuration); + otEXPECT_ACTION(error == OT_ERROR_NONE, sli_ot_radio_state_set_scheduled_rx_pending(false)); + + // Set channel for global receive state + sReceive.frame.mChannel = aChannel; + sReceiveAck.frame.mChannel = aChannel; + + exit: + return error; + } + #endif // (OPENTHREAD_CONFIG_THREAD_VERSION >= OT_THREAD_VERSION_1_2) + + otError otPlatRadioTransmit(otInstance *aInstance, otRadioFrame *aFrame) + { + otError error = OT_ERROR_NONE; + int8_t txPower = sl_get_tx_power_for_current_channel(aInstance); + instanceIndex_t txBufIndex = sli_ot_radio_instance_get_index(aInstance); + + otEXPECT_ACTION(sl_ot_rtos_task_can_access_pal(), error = OT_ERROR_REJECTED); + + #if OPENTHREAD_CONFIG_MULTIPAN_RCP_ENABLE + // Accept GP packets even if radio is not in required state. + if ((sl_gp_intf_get_state() != SL_GP_STATE_SEND_RESPONSE) && sl_gp_intf_should_buffer_pkt(aInstance, aFrame, false)) + { + sl_gp_intf_buffer_pkt(aInstance); + } + else + #endif + { + OT_ASSERT(txBufIndex < RADIO_REQUEST_BUFFER_COUNT); + OT_ASSERT(aFrame == &sTransmitBuffer[txBufIndex].frame); + OT_ASSERT(aFrame->mPsdu == sTransmitPsdu[txBufIndex]); + + if (!aFrame->mInfo.mTxInfo.mIsARetx) + { + sTransmitBuffer[txBufIndex].currentRadioTxPriority = SL_802154_RADIO_PRIO_TX_MIN; + } + else if (sTransmitBuffer[txBufIndex].currentRadioTxPriority > SL_802154_RADIO_PRIO_TX_STEP) + { + sTransmitBuffer[txBufIndex].currentRadioTxPriority -= SL_802154_RADIO_PRIO_TX_STEP; + } + // TX priority is always bounded by the maximum priority configured + if (sTransmitBuffer[txBufIndex].currentRadioTxPriority < SL_802154_RADIO_PRIO_TX_MAX) + { + sTransmitBuffer[txBufIndex].currentRadioTxPriority = SL_802154_RADIO_PRIO_TX_MAX; + } + + #if OPENTHREAD_CONFIG_MULTIPLE_INSTANCE_ENABLE + // Push pending transmit and exit if radio is busy. + if (sli_ot_radio_state_is_transmitting_or_scanning()) + { + sli_ot_radio_instance_queue_transmit(aInstance, aFrame); + ExitNow(error = OT_ERROR_NONE); + } + #endif + error = sli_ot_radio_interface_load_channel_config(aFrame->mChannel, txPower); + otEXPECT(error == OT_ERROR_NONE); + + OT_ASSERT(!sli_ot_radio_state_is_tx_data_ongoing()); + + sli_ot_radio_state_clear_all_tx_events(); + sTransmitBuffer[txBufIndex].instance = aInstance; + sCurrentTxPacket = &sTransmitBuffer[txBufIndex]; + + sli_ot_radio_state_set_using_csma(aFrame->mInfo.mTxInfo.mCsmaCaEnabled); + + #if OPENTHREAD_CONFIG_THREAD_VERSION >= OT_THREAD_VERSION_1_2 + sli_ot_radio_csl_set_present(aInstance, aFrame->mInfo.mTxInfo.mCslPresent); + #if OPENTHREAD_CONFIG_MAC_CSL_RECEIVER_ENABLE + if (sli_ot_radio_csl_get_period(aInstance) > 0 && sCurrentTxPacket->frame.mInfo.mTxInfo.mTxDelay == 0) + { + // Only called for CSL children (CSL period > 0) + // Note: Our SSEDs "schedule" transmissions to their parent in order to know + // exactly when in the future the data packets go out so they can calculate + // the accurate CSL phase to send to their parent. + sCurrentTxPacket->frame.mInfo.mTxInfo.mTxDelayBaseTime = sl_rail_get_time(SL_RAIL_EFR32_HANDLE); + sCurrentTxPacket->frame.mInfo.mTxInfo.mTxDelay = + SCHEDULE_TX_DELAY_US; // Chosen after internal certification testing + sli_ot_radio_csl_set_present(aInstance, true); + } + #endif + updateIeInfoTxFrame(sCurrentTxPacket->frame.mInfo.mTxInfo.mTxDelayBaseTime + + sCurrentTxPacket->frame.mInfo.mTxInfo.mTxDelay + SHR_DURATION_US); + + // Note - we need to call this outside of txCurrentPacket as for Series 2, + // this results in calling the SE interface from a critical section which is not permitted. + (void)sli_ot_radio_security_process_transmit(&sCurrentTxPacket->frame, sCurrentTxPacket->instance); + #endif // OPENTHREAD_CONFIG_THREAD_VERSION >= OT_THREAD_VERSION_1_2 + + CORE_DECLARE_IRQ_STATE; + CORE_ENTER_ATOMIC(); + sli_ot_radio_state_set_tx_data_ongoing(true); + tryTxCurrentPacket(); + CORE_EXIT_ATOMIC(); + + if (sli_ot_radio_state_has_tx_failed()) + { + otPlatRadioTxStarted(aInstance, aFrame); + } + } + exit: + return error; + } + + #if OPENTHREAD_CONFIG_THREAD_VERSION >= OT_THREAD_VERSION_1_2 + SL_CODE_CLASSIFY(SL_CODE_COMPONENT_OT_PLATFORM_ABSTRACTION, SL_CODE_CLASS_TIME_CRITICAL) + void updateIeInfoTxFrame(uint32_t shrTxTime) + { + OT_ASSERT(sCurrentTxPacket != nullptr); + + #if OPENTHREAD_CONFIG_MAC_HEADER_IE_SUPPORT && OPENTHREAD_CONFIG_TIME_SYNC_ENABLE + // Seek the time sync offset and update the rendezvous time + if (sCurrentTxPacket->frame.mInfo.mTxInfo.mIeInfo->mTimeIeOffset != 0) + { + uint8_t *timeIe = sCurrentTxPacket->frame.mPsdu + sCurrentTxPacket->frame.mInfo.mTxInfo.mIeInfo->mTimeIeOffset; + uint64_t time = otPlatTimeGet(); + + // Use the same mechanism as CSL children to schedule tx for the future without CSMA + // so that the value written to the time IE exactly matches the actual tx time of the packet + sCurrentTxPacket->frame.mInfo.mTxInfo.mTxDelayBaseTime = + (uint32_t)time; // Bottom 32 bits are sl_rail_get_time() + sCurrentTxPacket->frame.mInfo.mTxInfo.mTxDelay = SCHEDULE_TX_DELAY_US; + time += sCurrentTxPacket->frame.mInfo.mTxInfo.mIeInfo->mNetworkTimeOffset + + sCurrentTxPacket->frame.mInfo.mTxInfo.mTxDelay + SHR_DURATION_US; + *timeIe = sCurrentTxPacket->frame.mInfo.mTxInfo.mIeInfo->mTimeSyncSeq; + + *(++timeIe) = (uint8_t)(time & 0xff); + for (uint8_t i = 1; i < sizeof(uint64_t); i++) + { + time = time >> 8; + *(++timeIe) = (uint8_t)(time & 0xff); + } + } + #endif // OPENTHREAD_CONFIG_MAC_HEADER_IE_SUPPORT && OPENTHREAD_CONFIG_TIME_SYNC_ENABLE + + #if OPENTHREAD_CONFIG_MAC_CSL_RECEIVER_ENABLE + // Update IE data in the 802.15.4 header with the newest CSL period / phase + otInstance *instance = sCurrentTxPacket->instance; + if (sli_ot_radio_csl_get_period(instance) > 0 && !sCurrentTxPacket->frame.mInfo.mTxInfo.mIsHeaderUpdated) + { + otMacFrameSetCslIe(&sCurrentTxPacket->frame, + (uint16_t)sli_ot_radio_csl_get_period(instance), + sli_ot_radio_csl_get_phase(instance, shrTxTime)); + } + #else + OT_UNUSED_VARIABLE(shrTxTime); + #endif // OPENTHREAD_CONFIG_MAC_CSL_RECEIVER_ENABLE + } + #endif // OPENTHREAD_CONFIG_THREAD_VERSION >= OT_THREAD_VERSION_1_2 + + void txCurrentPacket(void) + { + OT_ASSERT(sli_ot_radio_state_is_tx_data_ongoing()); + OT_ASSERT(sCurrentTxPacket != nullptr); + + sl_rail_tx_options_t txOptions = SL_RAIL_TX_OPTIONS_DEFAULT; + sl_rail_status_t status = SL_RAIL_STATUS_INVALID_STATE; + uint8_t frameLength; + bool ackRequested; + + #if RADIO_CONFIG_DEBUG_COUNTERS_SUPPORT + railDebugCounters.mRailPlatTxTriggered++; + #endif + // signalling this event earlier, as this event can OT_ASSERT REQ (expecially for a + // non-CSMA transmit) giving the Coex master a little more time to grant or deny. + sli_ot_radio_events_handle_phy_stack_event(SL_RAIL_UTIL_IEEE802154_STACK_EVENT_TX_PENDED_PHY, + static_cast(sli_ot_radio_state_is_using_csma())); + + frameLength = (uint8_t)sCurrentTxPacket->frame.mLength; + + if (PHY_HEADER_SIZE == 1) + { + sli_ot_radio_interface_rail_write_tx_fifo(&frameLength, sizeof frameLength, true); + } + else + { // 2 byte PHR for Sub-GHz + uint8_t PHRByte1 = (0x08U /*FCS=2byte*/ | 0x10U /*Whiten=enabled*/); + uint8_t PHRByte2 = (uint8_t)(__RBIT(frameLength) >> 24); + + sli_ot_radio_interface_rail_write_tx_fifo(&PHRByte1, sizeof PHRByte1, true); + sli_ot_radio_interface_rail_write_tx_fifo(&PHRByte2, sizeof PHRByte2, false); + } + sli_ot_radio_interface_rail_write_tx_fifo(sCurrentTxPacket->frame.mPsdu, frameLength - 2, false); + + sl_rail_scheduler_info_t txSchedulerInfo = { + .priority = sCurrentTxPacket->currentRadioTxPriority, + .slip_time = RADIO_SCHEDULER_CHANNEL_SLIP_TIME, + .transaction_time = 0 // will be calculated later if DMP is used + }; + + ackRequested = (sCurrentTxPacket->frame.mPsdu[0] & IEEE802154_FRAME_FLAG_ACK_REQUIRED); + if (ackRequested) + { + txOptions |= SL_RAIL_TX_OPTION_WAIT_FOR_ACK; + + #if RADIO_CONFIG_DMP_SUPPORT + // time we wait for ACK + if (sli_ot_radio_interface_rail_get_symbol_rate() > 0) + { + txSchedulerInfo.transaction_time += + (sl_rail_time_t)(12 * 1e6 / sli_ot_radio_interface_rail_get_symbol_rate()); + } + else + { + txSchedulerInfo.transaction_time += 12 * RADIO_TIMING_DEFAULT_SYMBOLTIME_US; + } + #endif + } + + #ifdef SL_CATALOG_RAIL_UTIL_ANT_DIV_PRESENT + // Update Tx options to use currently-selected antenna. + // If antenna diverisity on Tx is disabled, leave both options 0 + // so Tx antenna tracks Rx antenna. + if (sl_rail_util_ant_div_get_tx_antenna_mode() != SL_RAIL_UTIL_ANT_DIV_DISABLED) + { + txOptions |= ((sl_rail_util_ant_div_get_tx_antenna_selected() == SL_RAIL_UTIL_ANTENNA_SELECT_ANTENNA1) + ? SL_RAIL_TX_OPTION_ANTENNA_0 + : SL_RAIL_TX_OPTION_ANTENNA_1); + } + #endif // SL_CATALOG_RAIL_UTIL_ANT_DIV_PRESENT + + #if RADIO_CONFIG_DMP_SUPPORT + // time needed for the frame itself + // 4B preamble, 1B SFD, 1B PHR is not counted in frameLength + if (sli_ot_radio_interface_rail_get_bit_rate() > 0) + { + txSchedulerInfo.transaction_time += + (sl_rail_time_t)((frameLength + 4 + 1 + 1) * 8 * 1e6 / sli_ot_radio_interface_rail_get_bit_rate()); + } + else + { // assume 250kbps + txSchedulerInfo.transaction_time += (frameLength + 4 + 1 + 1) * RADIO_TIMING_DEFAULT_BYTETIME_US; + } + #endif + + // Prioritize the Tx over schedule Rx to avoid missing data check-ins such as data polls. + if (sli_ot_radio_state_is_rx_scheduled()) + { + sli_ot_radio_interface_rail_idle(); + sli_ot_radio_state_set_scheduled_rx_pending(false); + sli_ot_radio_state_set_scheduled_rx_started(false); + } + + if (sCurrentTxPacket->frame.mInfo.mTxInfo.mTxDelay == 0) + { + if (sli_ot_radio_state_is_using_csma()) + { + #if RADIO_CONFIG_DMP_SUPPORT + // time needed for CSMA/CA + txSchedulerInfo.transaction_time += RADIO_TIMING_CSMA_OVERHEAD_US; + #endif + csmaConfig.csma_tries = sCurrentTxPacket->frame.mInfo.mTxInfo.mMaxCsmaBackoffs; + csmaConfig.cca_threshold_dbm = sli_ot_radio_interface_get_cca_threshold(); + + status = sli_ot_radio_interface_rail_start_cca_csma_tx(sCurrentTxPacket->frame.mChannel, + txOptions, + &csmaConfig, + &txSchedulerInfo); + } + else + { + status = + sli_ot_radio_interface_rail_start_tx(sCurrentTxPacket->frame.mChannel, txOptions, &txSchedulerInfo); + } + + if (status == SL_RAIL_STATUS_NO_ERROR) + { + sli_ot_radio_events_handle_phy_stack_event(SL_RAIL_UTIL_IEEE802154_STACK_EVENT_TX_STARTED, 0U); + } + } + else + { + // For CSL transmitters (FTDs): + // mTxDelayBaseTime = rx-timestamp (end of sync word) when we received CSL-sync with IEs + // mTxDelay = Delay starting from mTxDelayBaseTime + // + // For CSL receivers (SSEDs): + // mTxDelayBaseTime = timestamp when otPlatRadioTransmit is called + // mTxDelay = Chosen value in the future where transmit is scheduled, so we know exactly + // when to calculate the phase (we can't do this on-the-fly as the packet is going out + // due to platform limitations. see radioScheduleRx) + // + // Note that both use single CCA config, overriding any CCA/CSMA configs from the stack + // + #if OPENTHREAD_CONFIG_THREAD_VERSION >= OT_THREAD_VERSION_1_2 + sl_rail_scheduled_tx_config_t scheduleTxOptions = { + .when = sCurrentTxPacket->frame.mInfo.mTxInfo.mTxDelayBaseTime + + sCurrentTxPacket->frame.mInfo.mTxInfo.mTxDelay - SHR_DURATION_US, + .mode = SL_RAIL_TIME_ABSOLUTE, + .tx_during_rx = SL_RAIL_SCHEDULED_TX_DURING_RX_POSTPONE_TX}; + + // Set ccaBackoff to some constant value, so we have predictable radio warmup time for schedule tx. + cslCsmaConfig.cca_backoff_us = CSL_CSMA_BACKOFF_TIME_IN_US; + scheduleTxOptions.when -= cslCsmaConfig.cca_backoff_us; + + // CSL transmissions don't use CSMA but MAC accounts for single CCA time. + // cslCsmaConfig is set to SL_RAIL_CSMA_CONFIG_SINGLE_CCA above. + status = sli_ot_radio_interface_rail_start_scheduled_cca_csma_tx(sCurrentTxPacket->frame.mChannel, + txOptions, + &scheduleTxOptions, + &cslCsmaConfig, + &txSchedulerInfo); + + if (status == SL_RAIL_STATUS_NO_ERROR) + { + sli_ot_radio_state_set_scheduled_tx_pending(true); + #if RADIO_CONFIG_DEBUG_COUNTERS_SUPPORT + railDebugCounters.mRailEventsScheduledTxTriggeredCount++; + #endif + sli_ot_radio_events_handle_phy_stack_event(SL_RAIL_UTIL_IEEE802154_STACK_EVENT_TX_STARTED, 0U); + } + #endif + } + + if (status == SL_RAIL_STATUS_NO_ERROR) + { + #if RADIO_CONFIG_DEBUG_COUNTERS_SUPPORT + railDebugCounters.mRailTxStarted++; + #endif + } + else + { + #if RADIO_CONFIG_DEBUG_COUNTERS_SUPPORT + railDebugCounters.mRailTxStartFailed++; + #endif + sli_ot_radio_events_handle_phy_stack_event(SL_RAIL_UTIL_IEEE802154_STACK_EVENT_TX_BLOCKED, + static_cast(ackRequested)); + txFailedCallback(false, EVENT_TX_FAILED); + + otSysEventSignalPending(); + } + } + + // This API gets called from init procedure so instance to IID mapping does not exist + // at that point. Also this api will get called sequentially so assign new transmit + // buffer for the given instance. + otRadioFrame *otPlatRadioGetTransmitBuffer(otInstance *aInstance) + { + uint8_t index = 0; + otRadioFrame *aRadioFrame = nullptr; + + otEXPECT(sl_ot_rtos_task_can_access_pal()); + + #if OPENTHREAD_CONFIG_MULTIPLE_INSTANCE_ENABLE + index = otInstanceGetIndex(aInstance); + #else + // In single-instance mode, always use index 0 + OT_UNUSED_VARIABLE(aInstance); + #endif + + aRadioFrame = &sTransmitBuffer[index].frame; + + exit: + return aRadioFrame; + } + + int8_t otPlatRadioGetRssi(otInstance *aInstance) + { + int8_t rssi = OT_RADIO_RSSI_INVALID; + uint8_t channel = sReceive.frame.mChannel; + + otEXPECT(sl_ot_rtos_task_can_access_pal()); + otEXPECT(!sli_ot_radio_state_is_tx_data_ongoing()); + + #if (FAST_CHANNEL_SWITCHING_SUPPORT && OPENTHREAD_CONFIG_MULTIPLE_INSTANCE_ENABLE) + channel = sli_ot_radio_channel_switching_get_channel(aInstance); + #endif + + sli_ot_energy_scan(aInstance, channel, SL_OPENTHREAD_RSSI_AVERAGING_TIME, &rssi); + + exit: + return rssi; + } + + otError otPlatRadioSetTransmitPower(otInstance *aInstance, int8_t aPower) + { + return sli_set_default_tx_power(aInstance, aPower); + } + + // Required for RCP error recovery + // See src/lib/spinel/radio_spinel.cpp::RestoreProperties() + otError otPlatRadioSetChannelMaxTransmitPower(otInstance *aInstance, uint8_t aChannel, int8_t aMaxPower) + { + return sli_set_channel_max_tx_power(aInstance, aChannel, aMaxPower); + } + + otError otPlatRadioEnergyScan(otInstance *aInstance, uint8_t aScanChannel, uint16_t aScanDuration) + { + otError error = OT_ERROR_NONE; + bool shouldDefer = false; + + otEXPECT_ACTION(sl_ot_rtos_task_can_access_pal(), error = OT_ERROR_REJECTED); + + shouldDefer = sli_ot_radio_instance_energy_scan_should_defer(); + otEXPECT_ACTION(!shouldDefer, sli_ot_radio_instance_energy_scan_defer(aInstance, aScanChannel, aScanDuration)); + + error = sli_ot_energy_scan_status_to_ot_error( + sli_ot_energy_scan_async(aInstance, aScanChannel, (sl_rail_time_t)aScanDuration * US_IN_MS)); + + exit: + return error; + } + + //------------------------------------------------------------------------------ + // Radio Config: Thread 1.2 transmit security support + + #if (OPENTHREAD_CONFIG_THREAD_VERSION >= OT_THREAD_VERSION_1_2) + void otPlatRadioSetMacKey(otInstance *aInstance, + uint8_t aKeyIdMode, + uint8_t aKeyId, + const otMacKeyMaterial *aPrevKey, + const otMacKeyMaterial *aCurrKey, + const otMacKeyMaterial *aNextKey, + otRadioKeyType aKeyType) + { + sli_ot_radio_security_set_mac_key(aInstance, aKeyIdMode, aKeyId, aPrevKey, aCurrKey, aNextKey, aKeyType); + } + + void otPlatRadioSetMacFrameCounter(otInstance *aInstance, uint32_t aMacFrameCounter) + { + sli_ot_radio_security_set_mac_frame_counter(aInstance, aMacFrameCounter); + } + + void otPlatRadioSetMacFrameCounterIfLarger(otInstance *aInstance, uint32_t aMacFrameCounter) + { + sli_ot_radio_security_set_mac_frame_counter_if_larger(aInstance, aMacFrameCounter); + } + #endif // (OPENTHREAD_CONFIG_THREAD_VERSION >= OT_THREAD_VERSION_1_2) + + #if (OPENTHREAD_CONFIG_THREAD_VERSION >= OT_THREAD_VERSION_1_2) + //------------------------------------------------------------------------------ + // Radio implementation: Enhanced ACKs, CSL + + // Return false if we should generate an immediate ACK + // Return true otherwise + SL_CODE_CLASSIFY(SL_CODE_COMPONENT_OT_PLATFORM_ABSTRACTION, SL_CODE_CLASS_TIME_CRITICAL) + static bool writeIeee802154EnhancedAck(sl_rail_handle_t aRailHandle, + sl_rail_rx_packet_info_t *packetInfoForEnhAck, + uint32_t rxTimestamp, + uint8_t *initialPktReadBytes, + uint8_t *receivedPsdu) + { + // RAIL will generate an Immediate ACK for us. + // For an Enhanced ACK, we need to generate the whole packet ourselves. + + // An 802.15.4 packet from RAIL should look like: + // 1/2 | 1/2 | 0/1 | 0/2 | 0/2/8 | 0/2 | 0/2/8 | 14 + // PHR | MacFCF | Seq# | DstPan | DstAdr | SrcPan | SrcAdr | SecHdr + + // With sl_rail_ieee802154_enable_early_frame_pending(), SL_RAIL_EVENT_IEEE802154_DATA_REQUEST_COMMAND + // is triggered after receiving through the SrcAdr field of Version 0/1 packets, + // and after receiving through the SecHdr for Version 2 packets. + + otRadioFrame receivedFrame, enhAckFrame; + uint8_t enhAckPsdu[IEEE802154_MAX_LENGTH]; + + #define EARLY_FRAME_PENDING_EXPECTED_BYTES (2U + 2U + 1U + 2U + 8U + 2U + 8U + 14U) + #define FINAL_PACKET_LENGTH_WITH_IE (EARLY_FRAME_PENDING_EXPECTED_BYTES + OT_ACK_IE_MAX_SIZE) + + otMacAddress aSrcAddress; + uint8_t linkMetricsDataLen; + uint8_t *dataPtr; + bool setFramePending; + uint8_t *macFcfPointer; + otInstance *instance = nullptr; + sl_rail_status_t enhAckStatus; + + otEXPECT((packetInfoForEnhAck != nullptr) && (initialPktReadBytes != nullptr) && (receivedPsdu != nullptr)); + + *initialPktReadBytes = readInitialPacketData(packetInfoForEnhAck, + EARLY_FRAME_PENDING_EXPECTED_BYTES, + (PHY_HEADER_SIZE + 2), + receivedPsdu, + FINAL_PACKET_LENGTH_WITH_IE); + + if (*initialPktReadBytes == 0U) + { + return true; // Nothing to read, which means generating an immediate ACK is also pointless + } + + receivedFrame.mPsdu = receivedPsdu + PHY_HEADER_SIZE; + // This should be set to the expected length of the packet is being received. + // We consider this while calculating the phase value below. + receivedFrame.mLength = packetInfoForEnhAck->p_first_portion_data[0]; + enhAckFrame.mPsdu = enhAckPsdu + PHY_HEADER_SIZE; + + if (!otMacFrameIsVersion2015(&receivedFrame)) + { + return false; + } + + linkMetricsDataLen = 0; + dataPtr = nullptr; + setFramePending = false; + + instance = sli_ot_radio_instance_from_filter_mask(packetInfoForEnhAck->filter_mask); + + (void)otMacFrameGetSrcAddr(&receivedFrame, &aSrcAddress); + + if (instance != nullptr && sli_ot_radio_interface_is_src_match_enabled() + && (aSrcAddress.mType != OT_MAC_ADDRESS_TYPE_NONE)) + { + setFramePending = (aSrcAddress.mType == OT_MAC_ADDRESS_TYPE_EXTENDED + ? (utilsSoftSrcMatchExtFindEntry(instance, &aSrcAddress.mAddress.mExtAddress) >= 0) + : (utilsSoftSrcMatchShortFindEntry(instance, aSrcAddress.mAddress.mShortAddress) >= 0)); + } + + // Generate our IE header. + // Write IE data for enhanced ACK (link metrics + allocate bytes for CSL) + + #if OPENTHREAD_CONFIG_MLE_LINK_METRICS_SUBJECT_ENABLE + uint8_t linkMetricsData[OT_ENH_PROBING_IE_DATA_MAX_SIZE]; + + linkMetricsDataLen = otLinkMetricsEnhAckGenData(&aSrcAddress, sLastLqi, sLastRssi, linkMetricsData); + + if (linkMetricsDataLen > 0) + { + dataPtr = linkMetricsData; + } + #endif + + sAckIeDataLength = generateAckIeData(instance, dataPtr, linkMetricsDataLen, &receivedFrame); + + otEXPECT(otMacFrameGenerateEnhAck(&receivedFrame, setFramePending, sAckIeData, sAckIeDataLength, &enhAckFrame) + == OT_ERROR_NONE); + + #if OPENTHREAD_CONFIG_MAC_CSL_RECEIVER_ENABLE + sli_ot_radio_csl_update_enh_ack_ie(instance, + &enhAckFrame, + rxTimestamp, + packetInfoForEnhAck->packet_bytes, + receivedFrame.mLength); + #else + OT_UNUSED_VARIABLE(rxTimestamp); + #endif + + if (otMacFrameIsSecurityEnabled(&enhAckFrame)) + { + otEXPECT(sli_ot_radio_security_process_transmit(&enhAckFrame, instance) == OT_ERROR_NONE); + } + + // Before we're done, store some important info in reserved bits in the + // MAC header (cleared later) + // Check whether frame pending is set. + // Check whether enhanced ACK is secured. + otEXPECT((skipRxPacketLengthBytes(packetInfoForEnhAck)) == OT_ERROR_NONE); + macFcfPointer = ((packetInfoForEnhAck->first_portion_bytes == 0) ? packetInfoForEnhAck->p_last_portion_data + : packetInfoForEnhAck->p_first_portion_data); + + if (otMacFrameIsSecurityEnabled(&enhAckFrame)) + { + *macFcfPointer |= IEEE802154_SECURED_OUTGOING_ENHANCED_ACK; + } + + if (setFramePending) + { + *macFcfPointer |= IEEE802154_FRAME_PENDING_SET_IN_OUTGOING_ACK; + } + + // Fill in PHR now that we know Enh-ACK's length + if (PHY_HEADER_SIZE == 2U) + { // Not true till SubGhz implementation is in place + enhAckPsdu[0] = (0x08U /*FCS=2byte*/ | 0x10U /*Whiten=enabled*/); + enhAckPsdu[1] = (uint8_t)(__RBIT(enhAckFrame.mLength) >> 24); + } + else + { + enhAckPsdu[0] = enhAckFrame.mLength; + } + + enhAckStatus = sl_rail_ieee802154_write_enh_ack(aRailHandle, enhAckPsdu, enhAckFrame.mLength); + #if RADIO_CONFIG_DEBUG_COUNTERS_SUPPORT + otEXPECT_ACTION(enhAckStatus == SL_RAIL_STATUS_NO_ERROR, railDebugCounters.mRailEventsEnhAckTxFailed++); + #else + otEXPECT(enhAckStatus == SL_RAIL_STATUS_NO_ERROR); + #endif + + exit: + return true; + } + #endif // (OPENTHREAD_CONFIG_THREAD_VERSION >= OT_THREAD_VERSION_1_2) + + //------------------------------------------------------------------------------ + // RAIL callbacks + + SL_CODE_CLASSIFY(SL_CODE_COMPONENT_OT_PLATFORM_ABSTRACTION, SL_CODE_CLASS_TIME_CRITICAL) + void dataRequestCommandCallback(sl_rail_handle_t aRailHandle) + { + #define MAX_EXPECTED_BYTES (2U + 2U + 1U) // PHR + FCF + DSN + + uint8_t receivedPsdu[IEEE802154_MAX_LENGTH]; + uint8_t pktOffset = PHY_HEADER_SIZE; + uint8_t initialPktReadBytes; + sl_rail_rx_packet_info_t packetInfo; + uint32_t rxCallbackTimestamp = otPlatAlarmMicroGetNow(); + + // This callback occurs after the address fields of an incoming + // ACK-requesting CMD or DATA frame have been received and we + // can do a frame pending check. We must also figure out what + // kind of ACK is being requested -- Immediate or Enhanced. + + #if (OPENTHREAD_CONFIG_THREAD_VERSION >= OT_THREAD_VERSION_1_2) + if (writeIeee802154EnhancedAck(aRailHandle, &packetInfo, rxCallbackTimestamp, &initialPktReadBytes, receivedPsdu)) + { + // We also return true above if there were failures in + // generating an enhanced ACK. + return; + } + #else + OT_UNUSED_VARIABLE(rxCallbackTimestamp); + initialPktReadBytes = + readInitialPacketData(&packetInfo, MAX_EXPECTED_BYTES, pktOffset + 2, receivedPsdu, MAX_EXPECTED_BYTES); + #endif + + // Calculate frame pending for immediate-ACK + // If not, RAIL will send an immediate ACK, but we need to do FP lookup. + sl_rail_status_t status = SL_RAIL_STATUS_NO_ERROR; + + // Check if we read the FCF, if not, set macFcf to 0 + uint16_t macFcf = (initialPktReadBytes <= pktOffset) ? 0U : receivedPsdu[pktOffset]; + + bool framePendingSet = false; + + if (sli_ot_radio_interface_is_src_match_enabled()) + { + sl_rail_ieee802154_address_t sourceAddress; + + status = sl_rail_ieee802154_get_address(aRailHandle, &sourceAddress); + otEXPECT(status == SL_RAIL_STATUS_NO_ERROR); + + otInstance *instance = sli_ot_radio_instance_from_filter_mask(packetInfo.filter_mask); + if (instance != nullptr + && ((sourceAddress.address_length == SL_RAIL_IEEE802154_LONG_ADDRESS + && utilsSoftSrcMatchExtFindEntry(instance, (otExtAddress *)sourceAddress.long_address) >= 0) + || (sourceAddress.address_length == SL_RAIL_IEEE802154_SHORT_ADDRESS + && utilsSoftSrcMatchShortFindEntry(instance, sourceAddress.short_address) >= 0))) + { + status = sl_rail_ieee802154_toggle_frame_pending(aRailHandle); + otEXPECT(status == SL_RAIL_STATUS_NO_ERROR); + framePendingSet = true; + } + } + else if ((macFcf & IEEE802154_FRAME_TYPE_MASK) != IEEE802154_FRAME_TYPE_DATA) + { + status = sl_rail_ieee802154_toggle_frame_pending(aRailHandle); + otEXPECT(status == SL_RAIL_STATUS_NO_ERROR); + framePendingSet = true; + } + + if (framePendingSet) + { + // Store whether frame pending was set in the outgoing ACK in a reserved + // bit of the MAC header (cleared later) + + otEXPECT((skipRxPacketLengthBytes(&packetInfo)) == OT_ERROR_NONE); + uint8_t *macFcfPointer = + ((packetInfo.first_portion_bytes == 0) ? packetInfo.p_last_portion_data : packetInfo.p_first_portion_data); + *macFcfPointer |= IEEE802154_FRAME_PENDING_SET_IN_OUTGOING_ACK; + } + + exit: + if (status == SL_RAIL_STATUS_INVALID_STATE) + { + otLogWarnPlat("Too late to modify outgoing FP"); + } + else + { + OT_ASSERT(status == SL_RAIL_STATUS_NO_ERROR); + } + } + + SL_CODE_CLASSIFY(SL_CODE_COMPONENT_OT_PLATFORM_ABSTRACTION, SL_CODE_CLASS_TIME_CRITICAL) + void packetReceivedCallback(void) + { + sl_rail_rx_packet_info_t packetInfo; + sl_rail_rx_packet_details_t packetDetails; + uint16_t length = 0; + bool framePendingInAck = false; + bool dropPacket = false; + otInstance *instance = nullptr; + sl_status_t status; + bool isRxPacketQueued; + rxBuffer *rxPacketBuf = nullptr; + + sl_rail_rx_packet_handle_t packetHandle = + sli_ot_radio_interface_rail_get_rx_packet_info(SL_RAIL_RX_PACKET_HANDLE_NEWEST, &packetInfo); + otEXPECT_ACTION((packetHandle != SL_RAIL_RX_PACKET_HANDLE_INVALID + && packetInfo.packet_status == SL_RAIL_RX_PACKET_READY_SUCCESS), + dropPacket = true); + + otEXPECT_ACTION(validatePacketDetails(packetHandle, &packetDetails, &packetInfo, &length), dropPacket = true); + + uint8_t macFcf; + otEXPECT_ACTION((skipRxPacketLengthBytes(&packetInfo)) == OT_ERROR_NONE, dropPacket = true); + + macFcf = ((packetInfo.first_portion_bytes == 0) ? packetInfo.p_last_portion_data[0] + : packetInfo.p_first_portion_data[0]); + + instance = sli_ot_radio_instance_from_filter_mask(packetInfo.filter_mask); + + #if OPENTHREAD_CONFIG_MULTIPLE_INSTANCE_ENABLE + // Drop packet if instance is nullptr and it's not a valid case where nullptr is expected + // Valid nullptr cases: Case 1 (broadcast) or Case 3 (missing addressing info) + otEXPECT_ACTION(!(instance == nullptr && !isFilterMaskBroadcast(packetInfo.filter_mask) + && !isFilterMaskMissingAddressing(packetInfo.filter_mask)), + dropPacket = true); + #endif + + if (packetDetails.is_ack) + { + otEXPECT_ACTION( + (length >= IEEE802154_MIN_LENGTH && (macFcf & IEEE802154_FRAME_TYPE_MASK) == IEEE802154_FRAME_TYPE_ACK), + dropPacket = true); + + // read packet + sli_ot_radio_interface_rail_copy_rx_packet(sReceiveAck.frame.mPsdu, &packetInfo); + + #if RADIO_CONFIG_DEBUG_COUNTERS_SUPPORT + railDebugCounters.mRailEventAcksReceived++; + #endif + sReceiveAck.frame.mLength = length; + + sli_ot_radio_events_handle_phy_stack_event( + SL_RAIL_UTIL_IEEE802154_STACK_EVENT_RX_ENDED, + static_cast(sli_ot_radio_interface_rail_is_receiving_frame())); + + if (txWaitingForAck() + && (sReceiveAck.frame.mPsdu[IEEE802154_DSN_OFFSET] == sCurrentTxPacket->frame.mPsdu[IEEE802154_DSN_OFFSET])) + { + otEXPECT_ACTION(validatePacketTimestamp(&packetDetails, length), dropPacket = true); + + sReceiveAck.frame.mInfo.mRxInfo.mRssi = packetDetails.rssi_dbm; + sReceiveAck.frame.mInfo.mRxInfo.mLqi = packetDetails.lqi; + sReceiveAck.instance = instance; + updateRxFrameTimestamp(true, packetDetails.time_received.packet_time); + + // Processing the ACK frame in ISR context avoids the Tx state to be messed up, + // in case the Rx FIFO queue gets wiped out in a DMP situation. + sli_ot_radio_state_set_tx_success(true); + sli_ot_radio_state_clear_tx_data_and_wait_for_ack(); + + framePendingInAck = ((macFcf & IEEE802154_FRAME_FLAG_FRAME_PENDING) != 0); + sli_ot_radio_events_handle_phy_stack_event(SL_RAIL_UTIL_IEEE802154_STACK_EVENT_TX_ACK_RECEIVED, + static_cast(framePendingInAck)); + + if (txIsDataRequest() && framePendingInAck) + { + sli_ot_radio_state_set_em_pending_data(true); + } + } + // Yield the radio upon receiving an ACK as long as it is not related to + // a data request. + if (!txIsDataRequest()) + { + sli_ot_radio_interface_rail_yield_radio(); + } + } + else + { + otEXPECT_ACTION(sli_ot_radio_interface_get_promiscuous() || (length >= IEEE802154_MIN_DATA_LENGTH), + dropPacket = true); + + otEXPECT_ACTION(validatePacketTimestamp(&packetDetails, length), dropPacket = true); + + // Drop the packet if queue is full. + otEXPECT_ACTION(!queueIsFull(&sRxPacketQueue), dropPacket = true); + // Allocate a block from memory pool for the received packet. + status = sl_memory_pool_alloc(&sRxPacketMemPoolHandle, (void **)&rxPacketBuf); + // Drop the packet if no more memory block present in the pool to store it. + otEXPECT_ACTION(status == SL_STATUS_OK && rxPacketBuf != nullptr, dropPacket = true); + + // read packet + sli_ot_radio_interface_rail_copy_rx_packet(rxPacketBuf->psdu, &packetInfo); + + rxPacketBuf->packetInfo.length = (uint8_t)length; + rxPacketBuf->packetInfo.channel = (uint8_t)packetDetails.channel; + rxPacketBuf->packetInfo.rssi = packetDetails.rssi_dbm; + rxPacketBuf->packetInfo.lqi = packetDetails.lqi; + rxPacketBuf->packetInfo.timestamp = packetDetails.time_received.packet_time; + // Set instance to nullptr for broadcast packets in multi-instance mode, specific instance otherwise + #if OPENTHREAD_CONFIG_MULTIPLE_INSTANCE_ENABLE + rxPacketBuf->packetInfo.instance = + sli_ot_radio_instance_is_filter_mask_broadcast_pan(packetInfo.filter_mask) ? nullptr : instance; + #else + rxPacketBuf->packetInfo.instance = instance; + #endif + + // Queue the rx packet or drop it if queueing fails and free the memory block. + isRxPacketQueued = queueAdd(&sRxPacketQueue, (void *)rxPacketBuf); + otEXPECT_ACTION(isRxPacketQueued, dropPacket = true); + + #if RADIO_CONFIG_DEBUG_COUNTERS_SUPPORT + railDebugCounters.mRailPlatRadioReceiveProcessedCount++; + #endif + + if (macFcf & IEEE802154_FRAME_FLAG_ACK_REQUIRED) + { + sli_ot_radio_events_handle_phy_stack_event( + (sli_ot_radio_interface_rail_is_rx_auto_ack_paused() + ? SL_RAIL_UTIL_IEEE802154_STACK_EVENT_RX_ACK_BLOCKED + : SL_RAIL_UTIL_IEEE802154_STACK_EVENT_RX_ACKING), + static_cast(sli_ot_radio_interface_rail_is_receiving_frame())); + sli_ot_radio_state_set_tx_ack_ongoing(true); + } + else + { + sli_ot_radio_events_handle_phy_stack_event( + SL_RAIL_UTIL_IEEE802154_STACK_EVENT_RX_ENDED, + static_cast(sli_ot_radio_interface_rail_is_receiving_frame())); + // We received a frame that does not require an ACK as result of a data + // poll: we yield the radio here. + if (sli_ot_radio_state_get_em_pending_data()) + { + sli_ot_radio_interface_rail_yield_radio(); + sli_ot_radio_state_set_em_pending_data(false); + } + } + } + exit: + if (dropPacket) + { + sli_ot_radio_events_handle_phy_stack_event( + SL_RAIL_UTIL_IEEE802154_STACK_EVENT_RX_CORRUPTED, + static_cast(sli_ot_radio_interface_rail_is_receiving_frame())); + + (void)sl_memory_pool_free(&sRxPacketMemPoolHandle, rxPacketBuf); + } + } + + SL_CODE_CLASSIFY(SL_CODE_COMPONENT_OT_PLATFORM_ABSTRACTION, SL_CODE_CLASS_TIME_CRITICAL) + void packetSentCallback(bool isAck) + { + if (isAck) + { + // We successfully sent out an ACK. + sli_ot_radio_state_set_tx_ack_ongoing(false); + // We acked the packet we received after a poll: we can yield now. + if (sli_ot_radio_state_get_em_pending_data()) + { + sli_ot_radio_interface_rail_yield_radio(); + sli_ot_radio_state_set_em_pending_data(false); + } + } + else if (sli_ot_radio_state_is_tx_data_ongoing()) + { + sli_ot_radio_state_set_using_csma(false); + + if (txWaitingForAck()) + { + sli_ot_radio_state_set_waiting_for_ack(true); + sli_ot_radio_events_handle_phy_stack_event(SL_RAIL_UTIL_IEEE802154_STACK_EVENT_TX_ACK_WAITING, 0U); + } + else + { + sli_ot_radio_events_handle_phy_stack_event(SL_RAIL_UTIL_IEEE802154_STACK_EVENT_TX_ENDED, 0U); + sli_ot_radio_interface_rail_yield_radio(); + sli_ot_radio_state_set_tx_success(true); + // Broadcast packet clear the ONGOING flag here. + sli_ot_radio_state_set_tx_data_ongoing(false); + sli_ot_radio_state_set_scheduled_tx_started(false); + } + #if RADIO_CONFIG_DEBUG_COUNTERS_SUPPORT + railDebugCounters.mRailEventPacketSent++; + #endif + } + } + + SL_CODE_CLASSIFY(SL_CODE_COMPONENT_OT_PLATFORM_ABSTRACTION, SL_CODE_CLASS_TIME_CRITICAL) + void txFailedCallback(bool isAck, uint32_t status) + { + if (isAck) + { + sli_ot_radio_state_set_tx_ack_ongoing(false); + } + else if (sli_ot_radio_state_is_tx_data_ongoing()) + { + if (status == EVENT_TX_CCA_FAILED) + { + sli_ot_radio_state_set_tx_cca_failed(true); + sli_ot_radio_state_set_using_csma(false); + #if RADIO_CONFIG_DEBUG_COUNTERS_SUPPORT + railDebugCounters.mRailEventChannelBusy++; + #endif + } + else + { + sli_ot_radio_state_set_tx_failed(true); + #if RADIO_CONFIG_DEBUG_COUNTERS_SUPPORT + railDebugCounters.mRailEventTxAbort++; + #endif + } + sli_ot_radio_state_clear_tx_data_and_wait_for_ack(); + sli_ot_radio_interface_rail_yield_radio(); + } + } + + SL_CODE_CLASSIFY(SL_CODE_COMPONENT_OT_PLATFORM_ABSTRACTION, SL_CODE_CLASS_TIME_CRITICAL) + void ackTimeoutCallback(void) + { + OT_ASSERT(txWaitingForAck()); + OT_ASSERT(sli_ot_radio_state_is_waiting_for_ack()); + + sli_ot_radio_state_set_tx_no_ack(true); + sli_ot_radio_state_set_tx_data_ongoing(false); + sli_ot_radio_state_set_scheduled_tx_started(false); + + #if RADIO_CONFIG_DEBUG_COUNTERS_SUPPORT + railDebugCounters.mRailEventNoAck++; + #endif + + #ifdef SL_CATALOG_RAIL_UTIL_ANT_DIV_PRESENT + // If antenna diversity is enabled toggle the selected antenna. + sl_rail_util_ant_div_toggle_tx_antenna(); + #endif // SL_CATALOG_RAIL_UTIL_ANT_DIV_PRESENT + // TO DO: Check if we have an OT function that + // provides the number of mac retry attempts left + sli_ot_radio_events_handle_phy_stack_event(SL_RAIL_UTIL_IEEE802154_STACK_EVENT_TX_ACK_TIMEDOUT, 0); + + sli_ot_radio_state_set_waiting_for_ack(false); + sli_ot_radio_interface_rail_yield_radio(); + sli_ot_radio_state_set_em_pending_data(false); + } + + SL_CODE_CLASSIFY(SL_CODE_COMPONENT_OT_PLATFORM_ABSTRACTION, SL_CODE_CLASS_TIME_CRITICAL) + void schedulerEventCallback(sl_rail_handle_t aRailHandle) + { + sl_rail_scheduler_status_t scheduler_status; + sl_rail_status_t rail_status; + sl_rail_get_scheduler_status(aRailHandle, &scheduler_status, &rail_status); + if (scheduler_status != SL_RAIL_SCHEDULER_STATUS_NO_ERROR) + { + sli_ot_radio_state_clear_all_scheduled_events(); + if (sli_ot_radio_state_is_tx_ack_ongoing()) + { + sli_ot_radio_events_handle_phy_stack_event( + SL_RAIL_UTIL_IEEE802154_STACK_EVENT_RX_ACK_ABORTED, + static_cast(sli_ot_radio_interface_rail_is_receiving_frame())); + txFailedCallback(true, EVENT_TX_FAILED); + } + // We were in the process of TXing a data frame, treat it as a CCA_FAIL. + if (sli_ot_radio_state_is_tx_data_ongoing()) + { + sli_ot_radio_events_handle_phy_stack_event(SL_RAIL_UTIL_IEEE802154_STACK_EVENT_TX_BLOCKED, + static_cast(txWaitingForAck())); + txFailedCallback(false, EVENT_TX_CCA_FAILED); + } + // We are waiting for an ACK: we will never get the ACK we were waiting for. + // We want to call ackTimeoutCallback() only if the PACKET_SENT event + // already fired (which would clear the FLAG_ONGOING_TX_DATA flag). + if (sli_ot_radio_state_is_waiting_for_ack()) + { + ackTimeoutCallback(); + } + + #if RADIO_CONFIG_DEBUG_COUNTERS_SUPPORT + railDebugCounters.mRailEventSchedulerStatusError++; + #endif + } + } + + //------------------------------------------------------------------------------ + // Main thread packet handling + + SL_CODE_CLASSIFY(SL_CODE_COMPONENT_OT_PLATFORM_ABSTRACTION, SL_CODE_CLASS_TIME_CRITICAL) + static bool validatePacketDetails(sl_rail_rx_packet_handle_t packetHandle, + sl_rail_rx_packet_details_t *pPacketDetails, + const sl_rail_rx_packet_info_t *pPacketInfo, + uint16_t *packetLength) + { + bool pktValid = true; + sl_rail_status_t rStatus; + #if RADIO_CONFIG_DEBUG_COUNTERS_SUPPORT + rxDebugStep = 0; + #endif + + rStatus = sli_ot_radio_interface_rail_get_rx_packet_details(packetHandle, pPacketDetails); + otEXPECT_ACTION(rStatus == SL_RAIL_STATUS_NO_ERROR, pktValid = false); + #if RADIO_CONFIG_DEBUG_COUNTERS_SUPPORT + rxDebugStep++; + #endif + + otEXPECT_ACTION(isFilterMaskValid(pPacketInfo->filter_mask), pktValid = false); + #if RADIO_CONFIG_DEBUG_COUNTERS_SUPPORT + rxDebugStep++; + #endif + + // RAIL's packetBytes includes the (1 or 2 byte) PHY header but not the 2-byte CRC. + // We want *packetLength to match the PHY header length so we add 2 for CRC + // and subtract the PHY header size. + *packetLength = pPacketInfo->packet_bytes + 2U - PHY_HEADER_SIZE; + + if (PHY_HEADER_SIZE == 1) + { + otEXPECT_ACTION(*packetLength == pPacketInfo->p_first_portion_data[0], pktValid = false); + } + else + { + uint8_t lengthByte = ((pPacketInfo->first_portion_bytes > 1) ? pPacketInfo->p_first_portion_data[1] + : pPacketInfo->p_last_portion_data[0]); + otEXPECT_ACTION(*packetLength == (uint16_t)(__RBIT(lengthByte) >> 24), pktValid = false); + } + #if RADIO_CONFIG_DEBUG_COUNTERS_SUPPORT + rxDebugStep++; + #endif + + // check the length validity of recv packet; RAIL should take care of this. + otEXPECT_ACTION((*packetLength >= IEEE802154_MIN_LENGTH && *packetLength <= IEEE802154_MAX_LENGTH), + pktValid = false); + #if RADIO_CONFIG_DEBUG_COUNTERS_SUPPORT + rxDebugStep++; + #endif + + exit: + #if (OPENTHREAD_CONFIG_LOG_LEVEL == OT_LOG_LEVEL_DEBG) + if (!pktValid) + { + otLogDebgPlat("RX Pkt Invalid: rStatus=0x%lX, filterMask=0x%2X, pktLen=%i", + rStatus, + pPacketInfo->filter_mask, + *packetLength); + #if RADIO_CONFIG_DEBUG_COUNTERS_SUPPORT + otLogDebgPlat("RX debug step=%i", rxDebugStep); + #endif + } + #endif + return pktValid; + } + + SL_CODE_CLASSIFY(SL_CODE_COMPONENT_OT_PLATFORM_ABSTRACTION, SL_CODE_CLASS_TIME_CRITICAL) + static bool validatePacketTimestamp(sl_rail_rx_packet_details_t *pPacketDetails, uint16_t packetLength) + { + bool rxTimestampValid = true; + + // Get the timestamp when the SFD was received + otEXPECT_ACTION(pPacketDetails->time_received.time_position != SL_RAIL_PACKET_TIME_INVALID, + rxTimestampValid = false); + + // + PHY HEADER SIZE for PHY header + // We would not need this if PHR is not included and we want the MHR + pPacketDetails->time_received.total_packet_bytes = packetLength + PHY_HEADER_SIZE; + + otEXPECT_ACTION((sli_ot_radio_interface_rail_get_rx_time_sync_word_end(pPacketDetails) == SL_RAIL_STATUS_NO_ERROR), + rxTimestampValid = false); + exit: + return rxTimestampValid; + } + + SL_CODE_CLASSIFY(SL_CODE_COMPONENT_OT_PLATFORM_ABSTRACTION, SL_CODE_CLASS_TIME_CRITICAL) + static void updateRxFrameTimestamp(bool aIsAckFrame, sl_rail_time_t aTimestamp) + { + // Current time > sync-receive timestamp + // Therefore lower 32 bits of current time should always be greater than lower 32 bits + // of sync-rx timestamp unless there is a overflow. In such cases, we do not want to + // take overflow into consideration for sync-rx timestamp. + uint64_t railUsTimeNow = otPlatTimeGet(); + uint32_t railUsTimerWraps = railUsTimeNow >> 32; + + // Address multiple overflows, such as what would happen if the current time overflows + // from 0x00000001FFFFFFFF to 0x0000000200000000 (leave the higher 32 bits as 0) + if ((railUsTimeNow & 0xFFFFFFFF) <= aTimestamp) + { + railUsTimerWraps--; + } + + if (aIsAckFrame) + { + sReceiveAck.frame.mInfo.mRxInfo.mTimestamp = aTimestamp + ((uint64_t)railUsTimerWraps << 32); + } + else + { + sReceive.frame.mInfo.mRxInfo.mTimestamp = aTimestamp + ((uint64_t)railUsTimerWraps << 32); + } + } + + SL_CODE_CLASSIFY(SL_CODE_COMPONENT_OT_PLATFORM_ABSTRACTION, SL_CODE_CLASS_TIME_CRITICAL) + static otError skipRxPacketLengthBytes(sl_rail_rx_packet_info_t *pPacketInfo) + { + otError error = OT_ERROR_NONE; + otEXPECT_ACTION(pPacketInfo->first_portion_bytes > 0, error = OT_ERROR_FAILED); + + pPacketInfo->p_first_portion_data += PHY_HEADER_SIZE; + pPacketInfo->packet_bytes -= PHY_HEADER_SIZE; + + if (PHY_HEADER_SIZE == 1 || pPacketInfo->first_portion_bytes > 1) + { + pPacketInfo->first_portion_bytes -= PHY_HEADER_SIZE; + } + else + { + pPacketInfo->first_portion_bytes = 0U; + // Increment lastPortionData to skip the second byte of the PHY header + otEXPECT_ACTION(pPacketInfo->p_last_portion_data != nullptr, error = OT_ERROR_FAILED); + pPacketInfo->p_last_portion_data++; + } + + exit: + return error; + } + + static rxBuffer *prepareNextRxPacketforCb(void) + { + rxBuffer *rxPacketBuf = (rxBuffer *)queueRemove(&sRxPacketQueue); + OT_ASSERT(rxPacketBuf != nullptr); + uint8_t *psdu = rxPacketBuf->psdu; + + // Check reserved bits in MAC header for enhanced ACK security status + sReceive.frame.mInfo.mRxInfo.mAckedWithSecEnhAck = ((*psdu & IEEE802154_SECURED_OUTGOING_ENHANCED_ACK) != 0); + *psdu &= ~IEEE802154_SECURED_OUTGOING_ENHANCED_ACK; + + // Check reserved bits in MAC header for frame pending status + sReceive.frame.mInfo.mRxInfo.mAckedWithFramePending = ((*psdu & IEEE802154_FRAME_PENDING_SET_IN_OUTGOING_ACK) != 0); + *psdu &= ~IEEE802154_FRAME_PENDING_SET_IN_OUTGOING_ACK; + + sReceive.frame.mChannel = rxPacketBuf->packetInfo.channel; + sReceive.frame.mLength = rxPacketBuf->packetInfo.length; + sReceive.frame.mPsdu = rxPacketBuf->psdu; + + sReceive.frame.mInfo.mRxInfo.mRssi = rxPacketBuf->packetInfo.rssi; + sLastRssi = rxPacketBuf->packetInfo.rssi; + + sReceive.frame.mInfo.mRxInfo.mLqi = rxPacketBuf->packetInfo.lqi; + sLastLqi = rxPacketBuf->packetInfo.lqi; + + // Set instance (nullptr indicates broadcast packet) + sReceive.instance = rxPacketBuf->packetInfo.instance; + + // Security key fields are populated per-instance in deliverRxPacketToInstance() + + updateRxFrameTimestamp(false, rxPacketBuf->packetInfo.timestamp); + return rxPacketBuf; + } + + static inline bool isRxPacketBroadcast(void) + { + return (sReceive.instance == nullptr); + } + + static void deliverRxPacketToInstance(otInstance *aInstance) + { + OT_ASSERT(aInstance != nullptr); + + #if OPENTHREAD_CONFIG_THREAD_VERSION >= OT_THREAD_VERSION_1_2 + sReceive.frame.mInfo.mRxInfo.mAckKeyId = sli_ot_radio_security_get_ack_key_id(aInstance); + sReceive.frame.mInfo.mRxInfo.mAckFrameCounter = sli_ot_radio_security_get_ack_frame_counter(aInstance); + #endif + + #if OPENTHREAD_CONFIG_MULTIPAN_RCP_ENABLE + sl_gp_intf_should_buffer_pkt(aInstance, &sReceive.frame, true); + #else + bool isGpPacket = sl_gp_intf_is_gp_pkt(&sReceive.frame); + otEXPECT(!isGpPacket); + #endif + + otPlatRadioReceiveDone(aInstance, &sReceive.frame, sReceiveError); + + #if RADIO_CONFIG_DEBUG_COUNTERS_SUPPORT + railDebugCounters.mRailPlatRadioReceiveDoneCbCount++; + #endif + + #if !OPENTHREAD_CONFIG_MULTIPAN_RCP_ENABLE + exit: + return; + #endif + } + + #if OPENTHREAD_CONFIG_MULTIPLE_INSTANCE_ENABLE + static void processBroadcastRxPacket(void) + { + for (uint8_t i = 0; i < RADIO_INTERFACE_COUNT; i++) + { + otInstance *instance = sli_ot_radio_instance_get(i); + if (instance != nullptr && otInstanceIsInitialized(instance)) + { + deliverRxPacketToInstance(instance); + } + } + } + #endif + + static void processNextRxPacket(otInstance *aInstance) + { + sReceiveError = OT_ERROR_NONE; + rxBuffer *rxPacketBuf = prepareNextRxPacketforCb(); + + #if OPENTHREAD_CONFIG_MULTIPLE_INSTANCE_ENABLE + OT_UNUSED_VARIABLE(aInstance); + + if (isRxPacketBroadcast()) + { + processBroadcastRxPacket(); + } + else + { + deliverRxPacketToInstance(sReceive.instance); + } + #else + deliverRxPacketToInstance(aInstance); + #endif + + (void)sl_memory_pool_free(&sRxPacketMemPoolHandle, rxPacketBuf); + otSysEventSignalPending(); + } + + static void processRxPackets(otInstance *aInstance) + { + while (!queueIsEmpty(&sRxPacketQueue)) + { + processNextRxPacket(aInstance); + } + } + + static void processTxComplete(otInstance *aInstance) + { + OT_UNUSED_VARIABLE(aInstance); + otError txStatus; + otRadioFrame *ackFrame = nullptr; + + if (sli_ot_radio_state_has_tx_events()) + { + if (sli_ot_radio_state_has_tx_success()) + { + txStatus = OT_ERROR_NONE; + + if (sCurrentTxPacket->frame.mPsdu[0] & IEEE802154_FRAME_FLAG_ACK_REQUIRED) + { + ackFrame = &sReceiveAck.frame; + } + + sli_ot_radio_state_set_tx_success(false); + } + else if (sli_ot_radio_state_has_tx_cca_failed()) + { + txStatus = OT_ERROR_CHANNEL_ACCESS_FAILURE; + sli_ot_radio_state_set_tx_cca_failed(false); + } + else if (sli_ot_radio_state_has_tx_no_ack()) + { + txStatus = OT_ERROR_NO_ACK; + sli_ot_radio_state_set_tx_no_ack(false); + } + else + { + txStatus = OT_ERROR_ABORT; + sli_ot_radio_state_set_tx_failed(false); + } + + if (txStatus != OT_ERROR_NONE) + { + otLogDebgPlat("Transmit failed ErrorCode=%d", txStatus); + } + + // Clear any internally-set txDelays so future transmits are not affected. + sCurrentTxPacket->frame.mInfo.mTxInfo.mTxDelayBaseTime = 0; + sCurrentTxPacket->frame.mInfo.mTxInfo.mTxDelay = 0; + + #if OPENTHREAD_CONFIG_MULTIPLE_INSTANCE_ENABLE + CORE_DECLARE_IRQ_STATE; + CORE_ENTER_ATOMIC(); + + sli_ot_radio_instance_set_tx_busy(false); + + CORE_EXIT_ATOMIC(); + #endif + otPlatRadioTxDone(sCurrentTxPacket->instance, &sCurrentTxPacket->frame, ackFrame, txStatus); + + #if RADIO_CONFIG_DEBUG_COUNTERS_SUPPORT + railDebugCounters.mRailPlatRadioTxDoneCbCount++; + #endif + otSysEventSignalPending(); + } + } + + void efr32RadioProcess(otInstance *aInstance) + { + sli_ot_radio_events_handle_phy_stack_event(SL_RAIL_UTIL_IEEE802154_STACK_EVENT_TICK, 0U); + + // We should process the received packet first. Adding it at the end of this function, + // will delay the stack notification until the next call to efr32RadioProcess() + processRxPackets(aInstance); + processTxComplete(aInstance); + sli_ot_energy_scan_process(aInstance); + + #if OPENTHREAD_CONFIG_MULTIPLE_INSTANCE_ENABLE + sli_ot_radio_instance_process_commands(); + #endif // OPENTHREAD_CONFIG_MULTIPLE_INSTANCE_ENABLE + } + + //------------------------------------------------------------------------------ + // Antenna Diversity, Wifi coexistence and Runtime PHY select support + + #ifdef SL_CATALOG_RAIL_UTIL_IEEE802154_PHY_SELECT_PRESENT + + otError setRadioState(otRadioState state) + { + otError error = OT_ERROR_NONE; + + // Defer idling the radio if we have an ongoing TX task + otEXPECT_ACTION(!sli_ot_radio_state_is_tx_data_ongoing(), error = OT_ERROR_FAILED); + + switch (state) + { + case OT_RADIO_STATE_RECEIVE: + otEXPECT_ACTION(sli_ot_radio_interface_set_rx(sReceive.frame.mChannel) == OT_ERROR_NONE, + error = OT_ERROR_FAILED); + break; + case OT_RADIO_STATE_SLEEP: + sli_ot_radio_state_set_idle(); + break; + default: + error = OT_ERROR_FAILED; + } + exit: + return error; + } + + void sl_ot_update_active_radio_config(void) + { + CORE_DECLARE_IRQ_STATE; + otRadioState currentState; + + CORE_ENTER_ATOMIC(); + + // Proceed with PHY selection only if 2.4 GHz band is used + otEXPECT(sli_ot_radio_interface_get_band_config_ptr()->mChannelConfig == nullptr); + + currentState = otPlatRadioGetState(nullptr); + otEXPECT(setRadioState(OT_RADIO_STATE_SLEEP) == OT_ERROR_NONE); + sli_ot_radio_interface_rail_config_radio(); + otEXPECT(setRadioState(currentState) == OT_ERROR_NONE); + + exit: + CORE_EXIT_ATOMIC(); + return; + } + #endif // SL_CATALOG_RAIL_UTIL_IEEE802154_PHY_SELECT_PRESENT + + #ifdef SL_CATALOG_RAIL_UTIL_IEEE802154_STACK_EVENT_PRESENT + + static void changeDynamicEvents(void) + { + /* clang-format off */ + const sl_rail_events_t eventMask = SL_RAIL_EVENTS_NONE + | SL_RAIL_EVENT_RX_SYNC_0_DETECT + | SL_RAIL_EVENT_RX_SYNC_1_DETECT + | SL_RAIL_EVENT_RX_FRAME_ERROR + | SL_RAIL_EVENT_RX_FIFO_OVERFLOW + | SL_RAIL_EVENT_RX_ADDRESS_FILTERED + | SL_RAIL_EVENT_RX_PACKET_ABORTED + | SL_RAIL_EVENT_RX_FILTER_PASSED + | SL_RAIL_EVENT_TX_CHANNEL_CLEAR + | SL_RAIL_EVENT_TX_CCA_RETRY + | SL_RAIL_EVENT_TX_START_CCA + | SL_RAIL_EVENT_SIGNAL_DETECTED; + /* clang-format on */ + sl_rail_events_t eventValues = SL_RAIL_EVENTS_NONE; + + if (phyStackEventIsEnabled()) + { + eventValues |= eventMask; + } + sli_ot_radio_events_update_config(eventMask, eventValues); + } + #endif // SL_CATALOG_RAIL_UTIL_IEEE802154_STACK_EVENT_PRESENT + + static void efr32PhyStackInit(void) + { + #ifdef SL_CATALOG_RAIL_UTIL_ANT_DIV_PRESENT + sli_ot_radio_interface_init_antenna_config(); + #endif // SL_CATALOG_RAIL_UTIL_ANT_DIV_PRESENT + + #ifdef SL_CATALOG_RAIL_UTIL_COEX_PRESENT + efr32CoexInit(); + #endif // SL_CATALOG_RAIL_UTIL_COEX_PRESENT + + #ifdef SL_CATALOG_RAIL_UTIL_IEEE802154_STACK_EVENT_PRESENT + changeDynamicEvents(); + #endif + } + + #ifdef SL_CATALOG_RAIL_UTIL_COEX_PRESENT + + static void emRadioEnableAutoAck(void) + { + CORE_DECLARE_IRQ_STATE; + CORE_ENTER_ATOMIC(); + + if (sli_ot_radio_state_is_initialized()) + { + if ((sRhoActive >= RHO_INT_ACTIVE) // Internal always holds ACKs + || ((sRhoActive > RHO_INACTIVE) + && ((sl_rail_util_coex_get_options() & SL_RAIL_UTIL_COEX_OPT_ACK_HOLDOFF) + != SL_RAIL_UTIL_COEX_OPT_DISABLED))) + { + sli_ot_radio_interface_rail_pause_rx_auto_ack(true); + } + else + { + sli_ot_radio_interface_rail_pause_rx_auto_ack(false); + } + } + CORE_EXIT_ATOMIC(); + } + + static void emRadioEnablePta(bool enable) + { + halInternalInitPta(); + + // When PTA is enabled, we want to negate PTA_REQ as soon as an incoming + // frame is aborted, e.g. due to filtering. To do that we must turn off + // the TRACKABFRAME feature that's normally on to benefit sniffing on PTI. + sl_rail_status_t status = sli_ot_radio_interface_rail_config_rx_options( + SL_RAIL_RX_OPTION_TRACK_ABORTED_FRAMES, + (enable ? SL_RAIL_RX_OPTIONS_NONE : SL_RAIL_RX_OPTION_TRACK_ABORTED_FRAMES)); + OT_ASSERT(status == SL_RAIL_STATUS_NO_ERROR); + } + + static void efr32CoexInit(void) + { + #if SL_OPENTHREAD_COEX_COUNTER_ENABLE && defined(SL_CATALOG_RAIL_MULTIPLEXER_PRESENT) + sli_ot_radio_interface_rail_set_coex_counter_handler((void *)(&sli_ot_radio_coex_counter_on_event)); + #else + sli_radio_coex_reset(); + #endif // SL_OPENTHREAD_COEX_COUNTER_ENABLE && defined(SL_CATALOG_RAIL_MULTIPLEXER_PRESENT) + + #if OPENTHREAD_CONFIG_PLATFORM_RADIO_COEX_ENABLE + #if defined(SL_RAIL_UTIL_COEX_REQ_GPIO) || defined(SL_RAIL_UTIL_COEX_REQ_PORT) || defined(SL_RAIL_UTIL_COEX_GNT_GPIO) \ + || defined(SL_RAIL_UTIL_COEX_GNT_PORT) || SL_RAIL_UTIL_COEX_RUNTIME_PHY_SELECT + sl_rail_util_ot_enable_coex_state_event_filter(); + #endif + #endif // OPENTHREAD_CONFIG_PLATFORM_RADIO_COEX_ENABLE + + sl_rail_util_coex_options_t coexOptions = sl_rail_util_coex_get_options(); + + #if SL_OPENTHREAD_COEX_MAC_HOLDOFF_ENABLE + coexOptions |= SL_RAIL_UTIL_COEX_OPT_MAC_HOLDOFF; + #else + if (sl_rail_util_coex_get_radio_holdoff()) + { + coexOptions |= SL_RAIL_UTIL_COEX_OPT_MAC_HOLDOFF; + } + #endif // SL_OPENTHREAD_COEX_MAC_HOLDOFF_ENABLE + + sl_rail_util_coex_set_options(coexOptions); + + emRadioEnableAutoAck(); // Might suspend AutoACK if RHO already in effect + emRadioEnablePta(sl_rail_util_coex_is_enabled()); + } + + // Managing radio transmission + static void onPtaGrantTx(sl_rail_util_coex_req_t ptaStatus) + { + // Only pay attention to first PTA Grant callback, ignore any further ones + if (sPtaGntEventReported) + { + return; + } + sPtaGntEventReported = true; + + OT_ASSERT(ptaStatus == SL_RAIL_UTIL_COEX_REQCB_GRANTED); + // PTA is telling us we've gotten GRANT and should send ASAP *without* CSMA + sli_ot_radio_state_set_using_csma(false); + txCurrentPacket(); + } + + static void tryTxCurrentPacket(void) + { + OT_ASSERT(sli_ot_radio_state_is_tx_data_ongoing()); + + sPtaGntEventReported = false; + sl_rail_util_ieee802154_stack_event_t ptaStatus = + sli_ot_radio_events_handle_phy_stack_event_with_status(SL_RAIL_UTIL_IEEE802154_STACK_EVENT_TX_PENDED_MAC, + reinterpret_cast(&onPtaGrantTx)); + if (ptaStatus == SL_RAIL_UTIL_IEEE802154_STACK_STATUS_SUCCESS) + { + // Normal case where PTA allows us to start the (CSMA) transmit below + txCurrentPacket(); + } + else if (ptaStatus == SL_RAIL_UTIL_IEEE802154_STACK_STATUS_CB_PENDING) + { + // onPtaGrantTx() callback will take over (and might already have) + } + else if (ptaStatus == SL_RAIL_UTIL_IEEE802154_STACK_STATUS_HOLDOFF) + { + txFailedCallback(false, EVENT_TX_FAILED); + } + } + + // Managing CCA Threshold + static void setCcaThreshold(void) + { + CORE_DECLARE_IRQ_STATE; + CORE_ENTER_ATOMIC(); + int8_t thresholddBm = sli_ot_radio_interface_get_cca_threshold(); + + if (sli_ot_radio_state_is_initialized()) + { + if (sRhoActive > RHO_INACTIVE) + { + thresholddBm = SL_RAIL_RSSI_INVALID_DBM; + } + sl_rail_status_t status = sli_ot_radio_interface_rail_set_cca_threshold(thresholddBm); + OT_ASSERT(status == SL_RAIL_STATUS_NO_ERROR); + } + CORE_EXIT_ATOMIC(); + } + + static void emRadioHoldOffInternalIsr(uint8_t active) + { + if (active != sRhoActive) + { + sRhoActive = active; // Update sRhoActive early + if (sli_ot_radio_state_is_initialized()) + { + setCcaThreshold(); + emRadioEnableAutoAck(); + } + } + } + + extern "C" { + // External API used by Coex Component + SL_WEAK void emRadioHoldOffIsr(bool active) + { + emRadioHoldOffInternalIsr((uint8_t)active | (sRhoActive & ~RHO_EXT_ACTIVE)); + } + } // extern "C" + + #endif // SL_CATALOG_RAIL_UTIL_COEX_PRESENT + \ No newline at end of file diff --git a/sdk-copies/platform/radio/rail_lib/autogen/librail_release/librail_config_mgm240l022rnf_gcc.a b/sdk-copies/platform/radio/rail_lib/autogen/librail_release/librail_config_mgm240l022rnf_gcc.a deleted file mode 100644 index 5d94ea092..000000000 Binary files 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--- a/sdk-copies/protocol/openthread/platform-abstraction/efr32/radio.c +++ /dev/null @@ -1,3917 +0,0 @@ -/* - * Copyright (c) 2023, The OpenThread Authors. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. Neither the name of the copyright holder nor the - * names of its contributors may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. - */ - -/** - * @file - * This file implements the OpenThread platform abstraction for radio communication. - * - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#if OPENTHREAD_CONFIG_MULTIPAN_RCP_ENABLE -#include -#endif - -#include "common/code_utils.hpp" -#include "common/debug.hpp" -#include "common/logging.hpp" -#include "utils/code_utils.h" -#include "utils/link_metrics.h" -#include "utils/mac_frame.h" - -#include "circular_queue.h" -#include "em_device.h" -#include "sl_core.h" -#if defined _SILICON_LABS_32B_SERIES_2 -#include "em_system.h" -#else -#include "sl_hal_system.h" -#endif -#include "ieee802154mac.h" -#include "platform-band.h" -#include "platform-efr32.h" -#include "radio_coex.h" -#include "radio_multi_channel.h" -#include "radio_power_manager.h" -#include "rail_config.h" -#include "sl_memory_manager.h" -#include "sl_multipan.h" -#include "sl_packet_utils.h" -#include "sl_rail.h" -#include "sl_rail_ieee802154.h" -#include "protocol/openthread/platform-abstraction/efr32/soft_source_match_table.h" // Full path to avoid ninja finding the wrong one first - -#include "pa_conversions_efr32.h" -#include "sl_openthread_radio_config.h" - -#ifdef SL_COMPONENT_CATALOG_PRESENT -#include "sl_component_catalog.h" -#endif // SL_COMPONENT_CATALOG_PRESENT - -#ifdef SL_CATALOG_RAIL_MULTIPLEXER_PRESENT -#include "sl_rail_mux_rename.h" -#endif - -#ifdef SL_CATALOG_RAIL_UTIL_ANT_DIV_PRESENT -#include "sl_rail_util_ant_div.h" -#include "sl_rail_util_ant_div_config.h" -#endif // SL_CATALOG_RAIL_UTIL_ANT_DIV_PRESENT - -#ifdef SL_CATALOG_RAIL_UTIL_COEX_PRESENT -#include "coexistence-802154.h" -#include "coexistence-ot.h" -#endif // SL_CATALOG_RAIL_UTIL_COEX_PRESENT - -#ifdef SL_CATALOG_RAIL_UTIL_IEEE802154_STACK_EVENT_PRESENT -#include "sl_rail_util_ieee802154_stack_event.h" -#endif // SL_CATALOG_RAIL_UTIL_IEEE802154_STACK_EVENT_PRESENT - -#ifdef SL_CATALOG_RAIL_UTIL_IEEE802154_PHY_SELECT_PRESENT -#include "sl_rail_util_ieee802154_phy_select.h" -#endif // #ifdef SL_CATALOG_RAIL_UTIL_IEEE802154_PHY_SELECT_PRESENT - -#include "sl_gp_interface.h" - -#ifdef SL_CATALOG_RAIL_UTIL_IEEE802154_FAST_CHANNEL_SWITCHING_PRESENT -#include "sl_rail_util_ieee802154_fast_channel_switching_config.h" -#endif // SL_CATALOG_RAIL_UTIL_IEEE802154_FAST_CHANNEL_SWITCHING_PRESENT - -//------------------------------------------------------------------------------ -// Enums, macros and static variables - -#ifndef LOW_BYTE -#define LOW_BYTE(n) ((uint8_t)((n)&0xFF)) -#endif // LOW_BTE - -#ifndef HIGH_BYTE -#define HIGH_BYTE(n) ((uint8_t)(LOW_BYTE((n) >> 8))) -#endif // HIGH_BYTE - -#ifndef BIT32 -#define BIT32(x) (((uint32_t)1) << (x)) -#endif // BIT32 - -// Intentionally maintaining separate groups for the different device series. -// This gives flexibility to add new elements to be read, like CCA Thresholds. -#if defined(_SILICON_LABS_32B_SERIES_2) -#define USERDATA_MFG_CUSTOM_EUI_64 (2) -#endif - -#ifndef USERDATA_END -#define USERDATA_END (USERDATA_BASE + FLASH_PAGE_SIZE) -#endif - -#if SL_OPENTHREAD_RADIO_RX_BUFFER_COUNT > CIRCULAR_QUEUE_LEN_MAX -#error "Rx buffer count cannot be greater than max circular queue length." -#endif - -// Internal flags -#define FLAG_RADIO_INIT_DONE 0x00000001 -#define FLAG_ONGOING_TX_DATA 0x00000002 -#define FLAG_ONGOING_TX_ACK 0x00000004 -#define FLAG_WAITING_FOR_ACK 0x00000008 -#define FLAG_CURRENT_TX_USE_CSMA 0x00000010 -#define FLAG_SCHEDULED_RX_PENDING 0x00000020 -#define FLAG_SCHEDULED_TX_PENDING 0x00000040 - -// Radio Events -#define EVENT_TX_SUCCESS 0x00000100 -#define EVENT_TX_CCA_FAILED 0x00000200 -#define EVENT_TX_NO_ACK 0x00000400 -#define EVENT_TX_SCHEDULER_ERROR 0x00000800 -#define EVENT_TX_FAILED 0x00001000 -#define EVENT_ACK_SENT_WITH_FP_SET 0x00002000 -#define EVENT_SECURED_ACK_SENT 0x00004000 -#define EVENT_SCHEDULED_RX_STARTED 0x00008000 -#define EVENT_SCHEDULED_TX_STARTED 0x00010000 - -#define TX_WAITING_FOR_ACK 0x00 -#define TX_NO_ACK 0x01 - -#define RADIO_TX_EVENTS \ - (EVENT_TX_SUCCESS | EVENT_TX_CCA_FAILED | EVENT_TX_NO_ACK | EVENT_TX_SCHEDULER_ERROR | EVENT_TX_FAILED) - -#define QUARTER_DBM_IN_DBM 4 -#define US_IN_MS 1000 - -/* FilterMask provided by RAIL is structured as follows: - * | Bit:7 | Bit:6 | Bit:5 | Bit:4 | Bit:3 | Bit:2 | Bit:1 | Bit:0 | - * | Addr2 | Addr1 | Addr0 | Bcast Addr | Pan Id2 | Pan Id1 | Pan Id0 | Bcast PanId | - * | Matched | Matched | Matched | Matched | Matched | Matched | Matched | Matched | - */ - -#define RADIO_BCAST_IID (0) -#define RADIO_GET_FILTER_MASK(iid) (1 << (iid)) -#define RADIO_PANID_FILTER_SHIFT (0) -#define RADIO_ADDR_FILTER_SHIFT (4) - -#define RADIO_BCAST_PANID_FILTER_MASK RADIO_GET_FILTER_MASK(0) -#define RADIO_INDEX0_PANID_FILTER_MASK RADIO_GET_FILTER_MASK(1) -#define RADIO_INDEX1_PANID_FILTER_MASK RADIO_GET_FILTER_MASK(2) -#define RADIO_INDEX2_PANID_FILTER_MASK RADIO_GET_FILTER_MASK(3) - -#define RADIO_GET_PANID_FILTER_MASK(filter) \ - (filter \ - & (RADIO_BCAST_PANID_FILTER_MASK | RADIO_INDEX0_PANID_FILTER_MASK | RADIO_INDEX1_PANID_FILTER_MASK \ - | RADIO_INDEX2_PANID_FILTER_MASK)) - -#define RADIO_BCAST_ADDR_FILTER_MASK (RADIO_GET_FILTER_MASK(0) << RADIO_ADDR_FILTER_SHIFT) -#define RADIO_INDEX0_ADDR_FILTER_MASK (RADIO_GET_FILTER_MASK(1) << RADIO_ADDR_FILTER_SHIFT) -#define RADIO_INDEX1_ADDR_FILTER_MASK (RADIO_GET_FILTER_MASK(2) << RADIO_ADDR_FILTER_SHIFT) -#define RADIO_INDEX2_ADDR_FILTER_MASK (RADIO_GET_FILTER_MASK(3) << RADIO_ADDR_FILTER_SHIFT) - -#define RADIO_GET_ADDR_FILTER_MASK(filter) \ - (filter \ - & (RADIO_BCAST_ADDR_FILTER_MASK | RADIO_INDEX0_ADDR_FILTER_MASK | RADIO_INDEX1_ADDR_FILTER_MASK \ - | RADIO_INDEX2_ADDR_FILTER_MASK)) - -#define RADIO_BCAST_PANID (0xFFFF) - -#if defined(_SILICON_LABS_32B_SERIES_2) -#define DEVICE_CAPABILITY_MCU_EN (DEVINFO->SWCAPA1 & _DEVINFO_SWCAPA1_RFMCUEN_MASK) -#else -#define DEVICE_CAPABILITY_MCU_EN (DEVINFO->SWCAPA & _DEVINFO_SWCAPA_RFMCUEN_MASK) -#endif - -#define ENERGY_READS_MAX -128 -#define SYMBOLS_PER_ENERGY_READING 8 // we take a reading every 8 symbols - -static otRadioCaps sRadioCapabilities = - (OT_RADIO_CAPS_ACK_TIMEOUT | OT_RADIO_CAPS_CSMA_BACKOFF | OT_RADIO_CAPS_ENERGY_SCAN | OT_RADIO_CAPS_SLEEP_TO_TX -#if (OPENTHREAD_CONFIG_THREAD_VERSION >= OT_THREAD_VERSION_1_2) - | OT_RADIO_CAPS_TRANSMIT_SEC - // When scheduled tx is required, we support sl_rail_start_scheduled_cca_csma_tx - // (delay is indicated in tx frame info set in MAC) - | OT_RADIO_CAPS_TRANSMIT_TIMING - // When scheduled rx is required, we support sl_rail_start_scheduled_rx in our - // implementation of otPlatRadioReceiveAt - | OT_RADIO_CAPS_RECEIVE_TIMING -#endif - ); -static uint32_t sScanFrameCounter = 0; // How many 'frames' left in the current scan. -static uint32_t sScanFrameCounterMax = 0; // Max 'frames' when performing scan -static int8_t sEnergyReadsMax = ENERGY_READS_MAX; -static sl_rail_multi_timer_t rail_timer; - -// Energy Scan -typedef enum -{ - ENERGY_SCAN_STATUS_IDLE, - ENERGY_SCAN_STATUS_IN_PROGRESS, - ENERGY_SCAN_STATUS_COMPLETED -} energyScanStatus; - -typedef enum -{ - ENERGY_SCAN_MODE_SYNC, - ENERGY_SCAN_MODE_ASYNC -} energyScanMode; - -typedef struct -{ - uint8_t length; - uint8_t channel; - uint8_t lqi; - int8_t rssi; - uint8_t iid; - sl_rail_time_t timestamp; -} rxPacketDetails; - -typedef struct -{ - rxPacketDetails packetInfo; - uint8_t psdu[IEEE802154_MAX_LENGTH]; -} rxBuffer; - -typedef uint8_t rxBufferIndex_t; - -static volatile energyScanStatus sEnergyScanStatus; -static volatile int8_t sEnergyScanResultDbm; -static energyScanMode sEnergyScanMode; -// To track active interface the energy scan is being performed. -static uint8_t sEnergyScanActiveInterface = INVALID_INTERFACE_INDEX; - -static bool sIsSrcMatchEnabled = false; - -#if OPENTHREAD_CONFIG_MULTIPAN_RCP_ENABLE -#define RADIO_EXT_ADDR_COUNT (RADIO_INTERFACE_COUNT - 1) -// To hold transmit/energy-scan requests from the hosts i.e. one per instance/host, -// if radio is busy. -#define RADIO_REQUEST_BUFFER_COUNT OPENTHREAD_CONFIG_MULTIPLE_INSTANCE_NUM -#else -#define RADIO_EXT_ADDR_COUNT (RADIO_INTERFACE_COUNT) -#define RADIO_REQUEST_BUFFER_COUNT 1 -#endif - -typedef struct -{ - otRadioFrame frame; - uint8_t iid; - uint8_t currentRadioTxPriority; -} radioFrame; - -// Receive -static Queue_t sRxPacketQueue; -static sl_memory_pool_t sRxPacketMemPoolHandle = {0}; -static uint8_t sReceiveAckPsdu[IEEE802154_MAX_LENGTH]; -static radioFrame sReceive; -static radioFrame sReceiveAck; -static otError sReceiveError; - -// Transmit -// One of the IID is reserved for broadcast hence we need RADIO_INTERFACE_COUNT - 1. -// IID zero is for broadcast, so request from host1 (i.e. iid = 1) will use tx buffer -// index 0 (i.e. iid - 1) and so on. -static radioFrame sTransmitBuffer[RADIO_REQUEST_BUFFER_COUNT]; -static uint8_t sTransmitPsdu[RADIO_REQUEST_BUFFER_COUNT][IEEE802154_MAX_LENGTH]; -static radioFrame *sCurrentTxPacket = NULL; -static uint8_t sLastLqi = 0; -static int8_t sLastRssi = 0; -static otExtAddress sExtAddress[RADIO_EXT_ADDR_COUNT]; - -// CSMA config: Should be globally scoped -#define CSL_CSMA_BACKOFF_TIME_IN_US 150 -sl_rail_csma_config_t csmaConfig = SL_RAIL_CSMA_CONFIG_802_15_4_2003_2P4_GHZ_OQPSK_CSMA; -sl_rail_csma_config_t cslCsmaConfig = SL_RAIL_CSMA_CONFIG_SINGLE_CCA; - -#define SCHEDULE_TX_DELAY_US 3000 // Chosen after internal certification testing - -#if OPENTHREAD_CONFIG_MAC_HEADER_IE_SUPPORT -static otRadioIeInfo sTransmitIeInfo[RADIO_REQUEST_BUFFER_COUNT]; -#endif - -// Radio -#define CCA_THRESHOLD_UNINIT 127 -#define CCA_THRESHOLD_DEFAULT -75 // dBm - default for 2.4GHz 802.15.4 - -#define UNINITIALIZED_CHANNEL 0xFF - -static bool sPromiscuous = false; -static efr32CommonConfig sCommonConfig; -static efr32BandConfig sBandConfig; -static efr32BandConfig *sCurrentBandConfig = NULL; - -static int8_t sCcaThresholdDbm = CCA_THRESHOLD_DEFAULT; - -#if RADIO_CONFIG_DEBUG_COUNTERS_SUPPORT -efr32RadioCounters railDebugCounters; - -// Create an alias for readability of RX debug tracking -#define rxDebugStep (railDebugCounters.mRadioDebugData.m8[RX_DEBUG_COUNTER0]) -#endif - -#if OPENTHREAD_CONFIG_MULTIPAN_RCP_ENABLE -// Type of commands that can be added to the pending command buffer. -typedef enum -{ - kPendingCommandTypeTransmit, - kPendingCommandTypeEnergyScan, -} pendingCommandType; - -typedef struct -{ - // Energy scan channel. - uint8_t scanChannel; - // Energy scan duration. - uint16_t scanDuration; -} energyScanParams; - -// The structure representing pending transmit and energy-scan command requests. -typedef struct -{ - // The union of transmit and energy-scan requests parameters. - union - { - // A pointer to the transmit radio frame. - otRadioFrame *txFrame; - // The structure of energy-scan request parameters. - energyScanParams energyScan; - } request; - // The pending command type. - pendingCommandType cmdType : 2; - // The interface iid of the pending command. - uint8_t iid : 2; -} pendingCommandEntry; - -static Queue_t sPendingCommandQueue; - -extern otInstance *sInstances[OPENTHREAD_CONFIG_MULTIPLE_INSTANCE_NUM]; -static uint8_t sRailFilterMask = RADIO_BCAST_PANID_FILTER_MASK; -static bool isRadioTransmittingOrScanning(void); - -#if FAST_CHANNEL_SWITCHING_SUPPORT -static sl_rail_ieee802154_rx_channel_switching_cfg_t sChannelSwitchingCfg; -static SL_RAIL_IEEE802154_RX_CHANNEL_SWITCHING_BUF_ALIGNMENT_TYPE - sChannelSwitchingBuffer[SL_RAIL_IEEE802154_RX_CHANNEL_SWITCHING_BUF_BYTES - / SL_RAIL_IEEE802154_RX_CHANNEL_SWITCHING_BUF_ALIGNMENT]; - -bool sl_is_multi_channel_enabled(void) -{ - uint8_t firstChannel = UNINITIALIZED_CHANNEL; - for (uint8_t i = 0U; i < SL_RAIL_IEEE802154_RX_CHANNEL_SWITCHING_NUM_CHANNELS; i++) - { - if (sChannelSwitchingCfg.channels[i] != UNINITIALIZED_CHANNEL) - { - if (firstChannel == UNINITIALIZED_CHANNEL) - { - firstChannel = sChannelSwitchingCfg.channels[i]; - } - else if (firstChannel != sChannelSwitchingCfg.channels[i]) - { - return true; - } - } - } - return false; -} - -otError sl_get_channel_switching_cfg(sl_rail_ieee802154_rx_channel_switching_cfg_t *channelSwitchingCfg) -{ - otError error = OT_ERROR_NONE; - - otEXPECT_ACTION(channelSwitchingCfg != NULL, error = OT_ERROR_INVALID_ARGS); - - memcpy(channelSwitchingCfg, &sChannelSwitchingCfg, sizeof(sChannelSwitchingCfg)); - -exit: - return error; -} - -static uint8_t fastChannelIndex(uint8_t aChannel) -{ - for (uint8_t i = 0U; i < SL_RAIL_IEEE802154_RX_CHANNEL_SWITCHING_NUM_CHANNELS; i++) - { - if (sChannelSwitchingCfg.channels[i] == aChannel) - { - return i; - } - } - return INVALID_INTERFACE_INDEX; -} - -#endif // FAST_CHANNEL_SWITCHING_SUPPORT -#endif // OPENTHREAD_CONFIG_MULTIPAN_RCP_ENABLE - -static void efr32ScanTimerHandler(struct sl_rail_multi_timer *tmr, sl_rail_time_t expectedTimeOfEvent, void *cbArg); -static sl_rail_status_t efr32ScanDwell(uint16_t symbols); - -// RAIL - -#ifdef SL_CATALOG_RAIL_MULTIPLEXER_PRESENT -sl_rail_handle_t gRailHandle; -#if SL_OPENTHREAD_COEX_COUNTER_ENABLE -static void sl_ot_coex_counter_on_event(sl_rail_util_coex_event_t event); -#endif // SL_OPENTHREAD_COEX_COUNTER_ENABLE -#else -sl_rail_handle_t emPhyRailHandle; -#endif // SL_CATALOG_RAIL_MULTIPLEXER_PRESENT - -static const sl_rail_ieee802154_config_t sRailIeee802154Config = { - .p_addresses = NULL, - .ack_config = - { - .enable = true, - .ack_timeout_us = 672, - .rx_transitions = - { - .success = SL_RAIL_RF_STATE_RX, - .error = SL_RAIL_RF_STATE_RX, - }, - .tx_transitions = - { - .success = SL_RAIL_RF_STATE_RX, - .error = SL_RAIL_RF_STATE_RX, - }, - }, - .timings = - { - .idle_to_rx = 100, - .tx_to_rx = 192 - 10, - .idle_to_tx = 100, -#if OPENTHREAD_CONFIG_THREAD_VERSION >= OT_THREAD_VERSION_1_2 - .rx_to_tx = 256, // accommodate enhanced ACKs -#else - .rx_to_tx = 192, -#endif - .rxsearch_timeout = 0, - .tx_to_rxsearch_timeout = 0, - .tx_to_tx = 0, - }, - .frames_mask = SL_RAIL_IEEE802154_ACCEPT_STANDARD_FRAMES, - .promiscuous_mode = false, - .is_pan_coordinator = false, - .default_frame_pending_in_outgoing_acks = false, -}; - -#if RADIO_CONFIG_SUBGHZ_SUPPORT -#define PHY_HEADER_SIZE 2 -// SHR: 4 bytes preamble, 2 bytes SFD -// 802.15.4 spec describes GFSK SHR to be the same format as SUN O-QPSK -// except preamble is 32 symbols (4 octets). -#define SHR_SIZE 6 -#else -#define PHY_HEADER_SIZE 1 -#define SHR_SIZE 5 // 4 bytes of preamble, 1 byte sync-word -#endif - -#define SHR_DURATION_US 160 // Duration of SHR in us. - -// Misc -static volatile uint32_t miscRadioState = 0; -static bool emPendingData = false; - -#ifdef SL_CATALOG_RAIL_UTIL_COEX_PRESENT -enum -{ - RHO_INACTIVE = 0, - RHO_EXT_ACTIVE, - RHO_INT_ACTIVE, // Not used - RHO_BOTH_ACTIVE, -}; - -static uint8_t rhoActive = RHO_INACTIVE; -static bool ptaGntEventReported; -static bool sRadioCoexEnabled = true; - -#if SL_OPENTHREAD_COEX_COUNTER_ENABLE -uint32_t efr32RadioCoexCounters[SL_RAIL_UTIL_COEX_EVENT_COUNT] = {0}; -#endif // SL_OPENTHREAD_COEX_COUNTER_ENABLE - -#endif // SL_CATALOG_RAIL_UTIL_COEX_PRESENT - -// Note: This callback can be called from ISR context. -SL_CODE_CLASSIFY(SL_CODE_COMPONENT_OT_PLATFORM_ABSTRACTION, SL_CODE_CLASS_TIME_CRITICAL) -static bool rxPacketQueueOverflowCallback(const Queue_t *queue, void *data) -{ - OT_UNUSED_VARIABLE(queue); - OT_UNUSED_VARIABLE(data); - - // True to discard the queue item being considered for removal. - // False for nothing to be discarded from the queue. - // Do not discard the oldest entry from the queue, rather drop - // the new received packet, hence, return false. - return false; -} - -#if OPENTHREAD_CONFIG_MULTIPAN_RCP_ENABLE -static bool pendingCommandQueueOverflowCallback(const Queue_t *queue, void *data) -{ - OT_UNUSED_VARIABLE(queue); - OT_UNUSED_VARIABLE(data); - - // We should never hit this callback because a host can only request - // one command at a time. Hence, added a assert if it happens. - OT_ASSERT(false); - - return false; -} -#endif - -#if RADIO_CONFIG_ENABLE_CUSTOM_EUI_SUPPORT && defined(_SILICON_LABS_32B_SERIES_2) -/* - * This API reads the UserData page on the given EFR device. - */ -static int readUserData(void *buffer, uint16_t index, int len, bool changeByteOrder) -{ - uint8_t *readLocation = (uint8_t *)USERDATA_BASE + index; - uint8_t *writeLocation = (uint8_t *)buffer; - - // Sanity check to verify if the ouput buffer is valid and the index and len are valid. - // If invalid, change the len to -1 and return. - otEXPECT_ACTION((writeLocation != NULL) && ((readLocation + len) <= (uint8_t *)USERDATA_END), len = -1); - - // Copy the contents of flash into output buffer. - - for (int idx = 0; idx < len; idx++) - { - if (changeByteOrder) - { - writeLocation[idx] = readLocation[(len - 1) - idx]; - } - else - { - writeLocation[idx] = readLocation[idx]; - } - } - -exit: - // Return len, len was changed to -1 to indicate failure. - return len; -} -#endif - -/* - * This API converts the FilterMask to appropriate IID. If there are any errors, it will fallback on bcast IID. - * - */ -SL_CODE_CLASSIFY(SL_CODE_COMPONENT_OT_PLATFORM_ABSTRACTION, SL_CODE_CLASS_TIME_CRITICAL) -static inline uint8_t getIidFromFilterMask(uint8_t mask) -{ - uint8_t iid = INVALID_INTERFACE_INDEX; - -#if OPENTHREAD_CONFIG_MULTIPAN_RCP_ENABLE - // We need only the Pan Id masks here, as we are not matching the addresses. - // Also mask all the unused indices. - mask &= sRailFilterMask; - - // The only acceptable values for mask at this point are: - // 1 - BCAST PANID - IID(0) - // 2 - INDEX 0 - IID(1) - // 4 - INDEX 1 - IID(2) - // 8 - INDEX 2 - IID(3) - // - // The packet should either be directed to one of the PANs or Bcast. - // (mask & (mask -1) is a simplistic way of testing if the mask is a power of 2. - otEXPECT_ACTION(((mask != 0) && (mask & (mask - 1)) == 0), iid = 0); - - while (mask) - { - iid++; - mask >>= 1; - } - -exit: -#else - (void)mask; - iid = RADIO_BCAST_IID; -#endif - return iid; -} - -/* - * This API validates the received FilterMask by checking if the destination address - * in the received packet corresponds to destination PanID. - */ -SL_CODE_CLASSIFY(SL_CODE_COMPONENT_OT_PLATFORM_ABSTRACTION, SL_CODE_CLASS_TIME_CRITICAL) -static bool isFilterMaskValid(uint8_t mask) -{ - bool valid = false; - -#if OPENTHREAD_CONFIG_MULTIPAN_RCP_ENABLE - - /* Packet will be considered as a valid packet in 3 cases: - * Case 1: If the packet was directed towards bcast address or bcast panid - * - * Case 2: If the packet was directed to one of our valid address/PANID combos - * (Compare all non-bcast PANID filters against their corresponding - * address filters for same IID and see if any match) - * - * Case 3: We don't have either the destination addressing field or destination PanId - * in the received packet to determine if the dest address and dest pan match. - */ - if (((mask & RADIO_BCAST_PANID_FILTER_MASK) || (mask & RADIO_BCAST_ADDR_FILTER_MASK)) - || // Case 1 - // Find any non-broadcast PAN ID match and get ready to compare it - ((((mask & (RADIO_INDEX0_PANID_FILTER_MASK | RADIO_INDEX1_PANID_FILTER_MASK | RADIO_INDEX2_PANID_FILTER_MASK)) - >> RADIO_PANID_FILTER_SHIFT) - & - // ...To see if it coincides with any address matches for same IID - (RADIO_GET_ADDR_FILTER_MASK(mask) >> RADIO_ADDR_FILTER_SHIFT)) - != 0) - || // Case 2 - (((RADIO_GET_PANID_FILTER_MASK(mask)) == 0) || ((RADIO_GET_ADDR_FILTER_MASK(mask)) == 0)) // Case 3 - ) - { - valid = true; - } -#else - (void)mask; - valid = true; -#endif - - return valid; -} - -#if (OPENTHREAD_CONFIG_THREAD_VERSION >= OT_THREAD_VERSION_1_2) - -enum -{ - MAC_KEY_PREV, - MAC_KEY_CURRENT, - MAC_KEY_NEXT, - MAC_KEY_COUNT -}; - -typedef struct securityMaterial -{ - uint8_t ackKeyId; - uint8_t keyId; - uint32_t macFrameCounter; - uint32_t ackFrameCounter; - otMacKeyMaterial keys[MAC_KEY_COUNT]; -} securityMaterial; - -// Transmit Security -static securityMaterial sMacKeys[RADIO_INTERFACE_COUNT]; - -#if OPENTHREAD_CONFIG_MAC_CSL_RECEIVER_ENABLE - -// CSL parameters -static uint32_t sCslPeriod; -static uint32_t sCslSampleTime; - -SL_CODE_CLASSIFY(SL_CODE_COMPONENT_OT_PLATFORM_ABSTRACTION, SL_CODE_CLASS_TIME_CRITICAL) -static uint16_t getCslPhase(uint32_t shrTxTime) -{ - uint32_t cslPeriodInUs = sCslPeriod * OT_US_PER_TEN_SYMBOLS; - uint32_t diff; - - if (shrTxTime == 0U) - { - shrTxTime = otPlatAlarmMicroGetNow(); - } - - diff = ((sCslSampleTime % cslPeriodInUs) - (shrTxTime % cslPeriodInUs) + cslPeriodInUs) % cslPeriodInUs; - - return (uint16_t)(diff / OT_US_PER_TEN_SYMBOLS); -} -#endif // OPENTHREAD_CONFIG_MAC_CSL_RECEIVER_ENABLE - -// Enhanced ACK IE data -static uint8_t sAckIeData[OT_ACK_IE_MAX_SIZE]; -static uint8_t sAckIeDataLength = 0; - -SL_CODE_CLASSIFY(SL_CODE_COMPONENT_OT_PLATFORM_ABSTRACTION, SL_CODE_CLASS_TIME_CRITICAL) -static uint8_t generateAckIeData(uint8_t *aLinkMetricsIeData, uint8_t aLinkMetricsIeDataLen) -{ - OT_UNUSED_VARIABLE(aLinkMetricsIeData); - OT_UNUSED_VARIABLE(aLinkMetricsIeDataLen); - - uint8_t offset = 0; - -#if OPENTHREAD_CONFIG_MAC_CSL_RECEIVER_ENABLE - if (sCslPeriod > 0) - { - offset += otMacFrameGenerateCslIeTemplate(sAckIeData); - } -#endif - -#if OPENTHREAD_CONFIG_MLE_LINK_METRICS_SUBJECT_ENABLE - if (aLinkMetricsIeData != NULL && aLinkMetricsIeDataLen > 0) - { - offset += otMacFrameGenerateEnhAckProbingIe(sAckIeData, aLinkMetricsIeData, aLinkMetricsIeDataLen); - } -#endif - - return offset; -} - -SL_CODE_CLASSIFY(SL_CODE_COMPONENT_OT_PLATFORM_ABSTRACTION, SL_CODE_CLASS_TIME_CRITICAL) -static otError radioProcessTransmitSecurity(otRadioFrame *aFrame, uint8_t iid) -{ - otError error = OT_ERROR_NONE; - uint8_t keyId; - uint8_t keyToUse; - uint8_t panIndex = efr32GetPanIndexFromIid(iid); - - otEXPECT(otMacFrameIsSecurityEnabled(aFrame) && otMacFrameIsKeyIdMode1(aFrame) - && !aFrame->mInfo.mTxInfo.mIsSecurityProcessed); - - OT_ASSERT(panIndex != INVALID_INTERFACE_INDEX); - - if (otMacFrameIsAck(aFrame)) - { - keyId = otMacFrameGetKeyId(aFrame); - - otEXPECT_ACTION(keyId != 0, error = OT_ERROR_FAILED); - - if (keyId == sMacKeys[iid].keyId - 1) - { - keyToUse = MAC_KEY_PREV; - } - else if (keyId == sMacKeys[iid].keyId) - { - keyToUse = MAC_KEY_CURRENT; - } - else if (keyId == sMacKeys[iid].keyId + 1) - { - keyToUse = MAC_KEY_NEXT; - } - else - { - error = OT_ERROR_SECURITY; - otEXPECT(false); - } - } - else - { - keyId = sMacKeys[iid].keyId; - keyToUse = MAC_KEY_CURRENT; - } - - aFrame->mInfo.mTxInfo.mAesKey = &sMacKeys[iid].keys[keyToUse]; - - if (!aFrame->mInfo.mTxInfo.mIsHeaderUpdated) - { - if (otMacFrameIsAck(aFrame)) - { - // Store ack frame counter and ack key ID for receive frame - sMacKeys[iid].ackKeyId = keyId; - sMacKeys[iid].ackFrameCounter = sMacKeys[iid].macFrameCounter; - } - - otMacFrameSetKeyId(aFrame, keyId); - otMacFrameSetFrameCounter(aFrame, sMacKeys[iid].macFrameCounter++); - } - - efr32PlatProcessTransmitAesCcm(aFrame, &sExtAddress[panIndex]); - -exit: - return error; -} -#endif // (OPENTHREAD_CONFIG_THREAD_VERSION >= OT_THREAD_VERSION_1_2) - -SL_CODE_CLASSIFY(SL_CODE_COMPONENT_OT_PLATFORM_ABSTRACTION, SL_CODE_CLASS_TIME_CRITICAL) -static uint8_t readInitialPacketData(sl_rail_rx_packet_info_t *packetInfo, - uint8_t expected_data_bytes_max, - uint8_t expected_data_bytes_min, - uint8_t *buffer, - uint8_t buffer_len) -{ - uint8_t packetBytesRead = 0; - sl_rail_rx_packet_info_t adjustedPacketInfo; - - // Check if we have enough buffer - OT_ASSERT((buffer_len >= expected_data_bytes_max) || (packetInfo != NULL)); - - // Read the packet info - sl_rail_get_rx_incoming_packet_info(gRailHandle, packetInfo); - - // We are trying to get the packet info of a packet before it is completely received. - // We do this to evaluate the FP bit in response and add IEs to ACK if needed. - // Check to see if we have received atleast minimum number of bytes requested. - otEXPECT_ACTION(packetInfo->packet_bytes >= expected_data_bytes_min, packetBytesRead = 0); - - adjustedPacketInfo = *packetInfo; - - // Only extract what we care about - if (packetInfo->packet_bytes > expected_data_bytes_max) - { - adjustedPacketInfo.packet_bytes = expected_data_bytes_max; - // Check if the initial portion of the packet received so far exceeds the max value requested. - if (packetInfo->first_portion_bytes >= expected_data_bytes_max) - { - // If we have received more, make sure to copy only the required bytes into the buffer. - adjustedPacketInfo.first_portion_bytes = expected_data_bytes_max; - adjustedPacketInfo.p_last_portion_data = NULL; - } - } - - // Copy number of bytes as indicated in `packetInfo->first_portion_bytes` into the buffer. - sl_rail_copy_rx_packet(gRailHandle, buffer, &adjustedPacketInfo); - // Put it back to packetBytes. - packetBytesRead = (uint8_t)adjustedPacketInfo.packet_bytes; - -exit: - return packetBytesRead; -} - -//------------------------------------------------------------------------------ -// Forward Declarations - -static void RAILCb_Generic(sl_rail_handle_t aRailHandle, sl_rail_events_t aEvents); - -static void efr32PhyStackInit(void); - -#if OPENTHREAD_CONFIG_THREAD_VERSION >= OT_THREAD_VERSION_1_2 -static void updateIeInfoTxFrame(uint32_t shrTxTime); -#endif - -#ifdef SL_CATALOG_RAIL_UTIL_COEX_PRESENT -static void efr32CoexInit(void); -// Try to transmit the current outgoing frame subject to MAC-level PTA -static void tryTxCurrentPacket(void); -#else -// Transmit the current outgoing frame. -void txCurrentPacket(void); -#define tryTxCurrentPacket txCurrentPacket -#endif // SL_CATALOG_RAIL_UTIL_COEX_PRESENT - -static void txFailedCallback(bool isAck, uint32_t status); - -static bool validatePacketDetails(sl_rail_rx_packet_handle_t packetHandle, - sl_rail_rx_packet_details_t *pPacketDetails, - sl_rail_rx_packet_info_t *pPacketInfo, - uint16_t *packetLength); -static bool validatePacketTimestamp(sl_rail_rx_packet_details_t *pPacketDetails, uint16_t packetLength); - -static void updateRxFrameTimestamp(bool aIsAckFrame, sl_rail_time_t aTimestamp); - -static otError skipRxPacketLengthBytes(sl_rail_rx_packet_info_t *pPacketInfo); - -//------------------------------------------------------------------------------ -// Helper Functions - -#ifdef SL_CATALOG_RAIL_UTIL_IEEE802154_STACK_EVENT_PRESENT - -SL_CODE_CLASSIFY(SL_CODE_COMPONENT_OT_PLATFORM_ABSTRACTION, SL_CODE_CLASS_TIME_CRITICAL) -static bool phyStackEventIsEnabled(void) -{ - bool result = false; - -#if (defined(SL_CATALOG_RAIL_UTIL_ANT_DIV_PRESENT) && SL_RAIL_UTIL_ANT_DIV_RX_RUNTIME_PHY_SELECT) - result = true; -#endif // SL_CATALOG_RAIL_UTIL_ANT_DIV_PRESENT - -#ifdef SL_CATALOG_RAIL_UTIL_COEX_PRESENT - if (sRadioCoexEnabled) - { - result |= sl_rail_util_coex_is_enabled(); -#ifdef SL_RAIL_UTIL_COEX_RUNTIME_PHY_SELECT - result |= SL_RAIL_UTIL_COEX_RUNTIME_PHY_SELECT; -#endif - } -#endif // SL_CATALOG_RAIL_UTIL_COEX_PRESENT - - return result; -} - -static sl_rail_events_t currentEventConfig = SL_RAIL_EVENTS_NONE; -static void updateEvents(sl_rail_events_t mask, sl_rail_events_t values) -{ - sl_rail_status_t status; - sl_rail_events_t newEventConfig = (currentEventConfig & ~mask) | (values & mask); - if (newEventConfig != currentEventConfig) - { - currentEventConfig = newEventConfig; - status = sl_rail_config_events(gRailHandle, mask, values); - OT_ASSERT(status == SL_RAIL_STATUS_NO_ERROR); - } -} - -SL_CODE_CLASSIFY(SL_CODE_COMPONENT_OT_PLATFORM_ABSTRACTION, SL_CODE_CLASS_TIME_CRITICAL) -static sl_rail_util_ieee802154_stack_event_t handlePhyStackEvent(sl_rail_util_ieee802154_stack_event_t stackEvent, - uint32_t supplement) -{ - return (phyStackEventIsEnabled() -#ifdef SL_CATALOG_RAIL_MULTIPLEXER_PRESENT - ? sl_rail_mux_ieee802154_on_event(gRailHandle, stackEvent, supplement) -#else - ? sl_rail_util_ieee802154_on_event(stackEvent, supplement) -#endif - : 0); -} -#else -static void updateEvents(sl_rail_events_t mask, sl_rail_events_t values) -{ - sl_rail_status_t status; - status = sl_rail_config_events(gRailHandle, mask, values); - OT_ASSERT(status == SL_RAIL_STATUS_NO_ERROR); -} - -#define handlePhyStackEvent(event, supplement) 0 -#endif // SL_CATALOG_RAIL_UTIL_IEEE802154_STACK_EVENT_PRESENT - -// Set or clear the passed flag. -SL_CODE_CLASSIFY(SL_CODE_COMPONENT_OT_PLATFORM_ABSTRACTION, SL_CODE_CLASS_TIME_CRITICAL) -static inline void setInternalFlag(uint32_t flag, bool val) -{ - CORE_DECLARE_IRQ_STATE; - CORE_ENTER_ATOMIC(); - miscRadioState = (val ? (miscRadioState | flag) : (miscRadioState & ~flag)); - CORE_EXIT_ATOMIC(); -} -// Returns true if the passed flag is set, false otherwise. -SL_CODE_CLASSIFY(SL_CODE_COMPONENT_OT_PLATFORM_ABSTRACTION, SL_CODE_CLASS_TIME_CRITICAL) -static inline bool getInternalFlag(uint32_t flag) -{ - bool isFlagSet; - CORE_DECLARE_IRQ_STATE; - CORE_ENTER_ATOMIC(); - isFlagSet = (miscRadioState & flag) ? true : false; - CORE_EXIT_ATOMIC(); - - return isFlagSet; -} - -SL_CODE_CLASSIFY(SL_CODE_COMPONENT_OT_PLATFORM_ABSTRACTION, SL_CODE_CLASS_TIME_CRITICAL) -static inline bool txWaitingForAck(void) -{ - return (getInternalFlag(FLAG_ONGOING_TX_DATA) - && ((sCurrentTxPacket->frame.mPsdu[0] & IEEE802154_FRAME_FLAG_ACK_REQUIRED) != 0)); -} - -static inline bool isRadioTransmittingOrScanning(void) -{ - return ((sEnergyScanStatus != ENERGY_SCAN_STATUS_IDLE) || getInternalFlag(FLAG_ONGOING_TX_DATA) - || getInternalFlag(RADIO_TX_EVENTS)); -} - -SL_CODE_CLASSIFY(SL_CODE_COMPONENT_OT_PLATFORM_ABSTRACTION, SL_CODE_CLASS_TIME_CRITICAL) -static bool txIsDataRequest(void) -{ - uint16_t fcf = sCurrentTxPacket->frame.mPsdu[IEEE802154_FCF_OFFSET] - | (sCurrentTxPacket->frame.mPsdu[IEEE802154_FCF_OFFSET + 1] << 8); - - return (getInternalFlag(FLAG_ONGOING_TX_DATA) - && (fcf & IEEE802154_FRAME_TYPE_MASK) == IEEE802154_FRAME_TYPE_COMMAND); -} - -#ifdef SL_CATALOG_RAIL_UTIL_IEEE802154_STACK_EVENT_PRESENT -static inline bool isReceivingFrame(void) -{ - return (sl_rail_get_radio_state(gRailHandle) & SL_RAIL_RF_STATE_RX_ACTIVE) == SL_RAIL_RF_STATE_RX_ACTIVE; -} -#endif - -SL_CODE_CLASSIFY(SL_CODE_COMPONENT_OT_PLATFORM_ABSTRACTION, SL_CODE_CLASS_TIME_CRITICAL) -static void radioSetIdle(void) -{ - if (sl_rail_get_radio_state(gRailHandle) != SL_RAIL_RF_STATE_IDLE) - { - sl_rail_idle(gRailHandle, SL_RAIL_IDLE, true); - (void)handlePhyStackEvent(SL_RAIL_UTIL_IEEE802154_STACK_EVENT_TX_IDLED, 0U); - (void)handlePhyStackEvent(SL_RAIL_UTIL_IEEE802154_STACK_EVENT_RX_IDLED, 0U); - } - sl_rail_yield_radio(gRailHandle); -} - -static otError radioSetRx(uint8_t aChannel) -{ - otError error = OT_ERROR_NONE; - sl_rail_status_t status; - - sl_rail_scheduler_info_t bgRxSchedulerInfo = { - .priority = SL_802154_RADIO_PRIO_BACKGROUND_RX_VALUE, - // sliptime/transaction time is not used for bg rx - }; - -#if FAST_CHANNEL_SWITCHING_SUPPORT && OPENTHREAD_CONFIG_MULTIPAN_RCP_ENABLE - if (sl_is_multi_channel_enabled()) - { - // Calling sl_rail_start_rx with a channel not listed in the channel - // switching config is a bug. - OT_ASSERT(fastChannelIndex(aChannel) != INVALID_INTERFACE_INDEX); - - radioSetIdle(); - status = sl_rail_ieee802154_config_rx_channel_switching(gRailHandle, &sChannelSwitchingCfg); - OT_ASSERT(status == SL_RAIL_STATUS_NO_ERROR); - status = sl_rail_config_rx_options(gRailHandle, - SL_RAIL_RX_OPTION_CHANNEL_SWITCHING, - SL_RAIL_RX_OPTION_CHANNEL_SWITCHING); - OT_ASSERT(status == SL_RAIL_STATUS_NO_ERROR); - } - else - { - status = sl_rail_config_rx_options(gRailHandle, SL_RAIL_RX_OPTION_CHANNEL_SWITCHING, SL_RAIL_RX_OPTIONS_NONE); - OT_ASSERT(status == SL_RAIL_STATUS_NO_ERROR); - } -#endif - - status = sl_rail_start_rx(gRailHandle, aChannel, &bgRxSchedulerInfo); - otEXPECT_ACTION(status == SL_RAIL_STATUS_NO_ERROR, error = OT_ERROR_FAILED); - - (void)handlePhyStackEvent(SL_RAIL_UTIL_IEEE802154_STACK_EVENT_RX_LISTEN, 0U); - - otLogInfoPlat("State=OT_RADIO_STATE_RECEIVE"); -exit: - return error; -} - -#if (OPENTHREAD_CONFIG_THREAD_VERSION >= OT_THREAD_VERSION_1_2) -static otError radioScheduleRx(uint8_t aChannel, uint32_t aStart, uint32_t aDuration) -{ - otError error = OT_ERROR_NONE; - sl_rail_status_t status; - -#if FAST_CHANNEL_SWITCHING_SUPPORT && OPENTHREAD_CONFIG_MULTIPAN_RCP_ENABLE - // UID 1327639: Schedule Rx and Concurrent listening when used together - // will cause undefined behavior. Therefore it was decided to assert upon detecting - // this condition - assert(0); -#endif // FAST_CHANNEL_SWITCHING_SUPPORT && OPENTHREAD_CONFIG_MULTIPAN_RCP_ENABLE - - sl_rail_scheduler_info_t bgRxSchedulerInfo = { - .priority = SL_802154_RADIO_PRIO_BACKGROUND_RX_VALUE, - // sliptime/transaction time is not used for bg rx - }; - - // Configure scheduled receive as requested - sl_rail_scheduled_rx_config_t rxCfg = { - .start = aStart, - .start_mode = SL_RAIL_TIME_ABSOLUTE, - .end = aDuration, - .end_mode = SL_RAIL_TIME_DELAY, - .rx_transition_end_schedule = 0, // To stay in schedule Rx state after packet receive. - .hard_window_end = 0}; // This lets us receive a packet near a window-end-event - - status = sl_rail_start_scheduled_rx(gRailHandle, aChannel, &rxCfg, &bgRxSchedulerInfo); - otEXPECT_ACTION(status == SL_RAIL_STATUS_NO_ERROR, error = OT_ERROR_FAILED); - - (void)handlePhyStackEvent(SL_RAIL_UTIL_IEEE802154_STACK_EVENT_RX_LISTEN, 0U); -exit: - return error; -} -#endif // (OPENTHREAD_CONFIG_THREAD_VERSION >= OT_THREAD_VERSION_1_2) - -//------------------------------------------------------------------------------ -// Radio Initialization -static sl_rail_handle_t efr32RailInit(efr32CommonConfig *aCommonConfig) -{ - sl_rail_status_t status; - sl_rail_handle_t handle = SL_RAIL_EFR32_HANDLE; - -#if !OPENTHREAD_RADIO - OT_ASSERT(DEVICE_CAPABILITY_MCU_EN); -#endif - - aCommonConfig->mRailConfig.rx_packet_queue_entries = sl_rail_builtin_rx_packet_queue_entries; - aCommonConfig->mRailConfig.p_rx_packet_queue = sl_rail_builtin_rx_packet_queue_ptr; - - aCommonConfig->mRailConfig.rx_fifo_bytes = sl_rail_builtin_rx_fifo_bytes; - aCommonConfig->mRailConfig.p_rx_fifo_buffer = sl_rail_builtin_rx_fifo_ptr; - - aCommonConfig->mRailConfig.tx_fifo_init_bytes = 0U; - aCommonConfig->mRailConfig.p_tx_fifo_buffer = NULL; - - status = sl_rail_init(&handle, &aCommonConfig->mRailConfig, NULL); - OT_ASSERT(status == SL_RAIL_STATUS_NO_ERROR); - -#if defined(SL_CATALOG_POWER_MANAGER_PRESENT) - status = sl_rail_init_power_manager(); - OT_ASSERT(status == SL_RAIL_STATUS_NO_ERROR); -#endif // SL_CATALOG_POWER_MANAGER_PRESENT - - status = sl_rail_config_cal(handle, SL_RAIL_CAL_ALL); - OT_ASSERT(status == SL_RAIL_STATUS_NO_ERROR); - - status = sl_rail_set_pti_protocol(handle, SL_RAIL_PTI_PROTOCOL_THREAD); - OT_ASSERT(status == SL_RAIL_STATUS_NO_ERROR); - - status = sl_rail_ieee802154_init(handle, &sRailIeee802154Config); - OT_ASSERT(status == SL_RAIL_STATUS_NO_ERROR); - -#if (OPENTHREAD_CONFIG_THREAD_VERSION >= OT_THREAD_VERSION_1_2) - // Enhanced Frame Pending - status = sl_rail_ieee802154_enable_early_frame_pending(handle, true); - OT_ASSERT(status == SL_RAIL_STATUS_NO_ERROR); - - status = sl_rail_ieee802154_enable_data_frame_pending(handle, true); - OT_ASSERT(status == SL_RAIL_STATUS_NO_ERROR); - - // Copies of MAC keys for encrypting at the radio layer - memset(sMacKeys, 0, sizeof(sMacKeys)); -#endif // (OPENTHREAD_CONFIG_THREAD_VERSION >= OT_THREAD_VERSION_1_2) - - status = sl_rail_set_tx_fifo(handle, - (sl_rail_fifo_buffer_align_t *)aCommonConfig->mRailTxFifo.fifo, - sizeof(aCommonConfig->mRailTxFifo.fifo), - 0, - 0); - OT_ASSERT(status == SL_RAIL_STATUS_NO_ERROR); - - // Enable RAIL multi-timer - sl_rail_config_multi_timer(handle, true); - - return handle; -} - -static void efr32RailConfigLoad(efr32BandConfig *aBandConfig, int8_t aTxPower) -{ - sl_rail_status_t status; - sl_rail_tx_power_config_t *txPowerConfig = NULL; - - if (aBandConfig->mChannelConfig != NULL) - { - status = sl_rail_ieee802154_set_phy_id(gRailHandle, RAIL_IEEE802154_PTI_RADIO_CONFIG_915MHZ_R23_NA_EXT); - OT_ASSERT(status == SL_RAIL_STATUS_NO_ERROR); - status = sl_rail_config_channels(gRailHandle, aBandConfig->mChannelConfig, NULL); - OT_ASSERT(status == SL_RAIL_STATUS_NO_ERROR); - uint16_t firstChannel = sl_rail_get_first_channel(gRailHandle, aBandConfig->mChannelConfig); - OT_ASSERT(firstChannel == aBandConfig->mChannelMin); - status = sl_rail_prepare_channel(gRailHandle, firstChannel); - OT_ASSERT(status == SL_RAIL_STATUS_NO_ERROR); - status = sl_rail_ieee802154_config_g_options(gRailHandle, - SL_RAIL_IEEE802154_G_OPTION_GB868, - SL_RAIL_IEEE802154_G_OPTION_GB868); - OT_ASSERT(status == SL_RAIL_STATUS_NO_ERROR); - - txPowerConfig = (sl_rail_tx_power_config_t *)sl_rail_util_pa_get_tx_power_config_subghz(); - } - else - { -#if defined(SL_CATALOG_RAIL_UTIL_IEEE802154_PHY_SELECT_PRESENT) - status = sl_rail_util_ieee802154_config_radio(gRailHandle); -#else - status = sl_rail_ieee802154_config_2p4_ghz_radio(gRailHandle); -#endif // SL_CATALOG_RAIL_UTIL_IEEE802154_PHY_SELECT_PRESENT - OT_ASSERT(status == SL_RAIL_STATUS_NO_ERROR); - - txPowerConfig = (sl_rail_tx_power_config_t *)sl_rail_util_pa_get_tx_power_config_2p4ghz(); - } - -#if (OPENTHREAD_CONFIG_THREAD_VERSION >= OT_THREAD_VERSION_1_2) - // 802.15.4E support (only on platforms that support it, so error checking is disabled) - // Note: This has to be called after sl_rail_ieee802154_config_2p4_ghz_radio due to a bug where this call - // can overwrite options set below. - sl_rail_ieee802154_config_e_options(gRailHandle, - (SL_RAIL_IEEE802154_E_OPTION_GB868 | SL_RAIL_IEEE802154_E_OPTION_ENH_ACK), - (SL_RAIL_IEEE802154_E_OPTION_GB868 | SL_RAIL_IEEE802154_E_OPTION_ENH_ACK)); -#endif // (OPENTHREAD_CONFIG_THREAD_VERSION >= OT_THREAD_VERSION_1_2) - - if (aTxPower != SL_INVALID_TX_POWER) - { - sli_update_tx_power_after_config_update(txPowerConfig, aTxPower); - } -} - -static efr32BandConfig *efr32RadioGetBandConfig(uint8_t aChannel) -{ - efr32BandConfig *config = NULL; - - if ((sBandConfig.mChannelMin <= aChannel) && (aChannel <= sBandConfig.mChannelMax)) - { - config = &sBandConfig; - } - - return config; -} - -static void efr32ConfigInit(void (*aEventCallback)(sl_rail_handle_t railHandle, sl_rail_events_t events)) -{ - sCommonConfig.mRailConfig.events_callback = aEventCallback; - -#if RADIO_CONFIG_2P4GHZ_OQPSK_SUPPORT - sBandConfig.mChannelConfig = NULL; -#else - sBandConfig.mChannelConfig = channelConfigs[0]; -#endif - sBandConfig.mChannelMin = SL_CHANNEL_MIN; - sBandConfig.mChannelMax = SL_CHANNEL_MAX; - -#if RADIO_CONFIG_DEBUG_COUNTERS_SUPPORT - memset(&railDebugCounters, 0x00, sizeof(efr32RadioCounters)); -#endif - - sli_init_power_manager(); - - gRailHandle = efr32RailInit(&sCommonConfig); - OT_ASSERT(gRailHandle != NULL); - - updateEvents(SL_RAIL_EVENTS_ALL, - (0 | SL_RAIL_EVENT_RX_ACK_TIMEOUT | SL_RAIL_EVENT_RX_PACKET_RECEIVED -#if OPENTHREAD_CONFIG_THREAD_VERSION >= OT_THREAD_VERSION_1_2 - | SL_RAIL_EVENT_TX_SCHEDULED_TX_STARTED | SL_RAIL_EVENT_TX_SCHEDULED_TX_MISSED - | SL_RAIL_EVENT_RX_SCHEDULED_RX_STARTED | SL_RAIL_EVENT_RX_SCHEDULED_RX_END - | SL_RAIL_EVENT_RX_SCHEDULED_RX_MISSED -#endif - | SL_RAIL_EVENTS_TXACK_COMPLETION | SL_RAIL_EVENTS_TX_COMPLETION - | SL_RAIL_EVENT_IEEE802154_DATA_REQUEST_COMMAND -#if RADIO_CONFIG_DEBUG_COUNTERS_SUPPORT || RADIO_CONFIG_DMP_SUPPORT - | SL_RAIL_EVENT_CONFIG_SCHEDULED | SL_RAIL_EVENT_CONFIG_UNSCHEDULED | SL_RAIL_EVENT_SCHEDULER_STATUS -#endif - | SL_RAIL_EVENT_CAL_NEEDED)); - - efr32RailConfigLoad(&(sBandConfig), OPENTHREAD_CONFIG_DEFAULT_TRANSMIT_POWER); -} - -void efr32RadioInit(void) -{ - if (getInternalFlag(FLAG_RADIO_INIT_DONE)) - { - return; - } - sl_rail_status_t status; - sl_status_t rxMemPoolStatus; - bool queueStatus; - sl_rail_timer_sync_config_t timer_sync_config = SL_RAIL_TIMER_SYNC_DEFAULT; - - // check if RAIL_TX_FIFO_SIZE is power of two.. - OT_ASSERT((RAIL_TX_FIFO_SIZE & (RAIL_TX_FIFO_SIZE - 1)) == 0); - - // check the limits of the RAIL_TX_FIFO_SIZE. - OT_ASSERT((RAIL_TX_FIFO_SIZE >= SL_RAIL_MINIMUM_FIFO_BYTES) || (RAIL_TX_FIFO_SIZE <= SL_RAIL_MAXIMUM_FIFO_BYTES)); - - efr32ConfigInit(RAILCb_Generic); - setInternalFlag(FLAG_RADIO_INIT_DONE, true); - status = sl_rail_config_sleep(gRailHandle, &timer_sync_config); - OT_ASSERT(status == SL_RAIL_STATUS_NO_ERROR); - - sReceive.frame.mLength = 0; - sReceive.frame.mPsdu = NULL; - - sReceiveAck.frame.mLength = 0; - sReceiveAck.frame.mPsdu = sReceiveAckPsdu; - -#if OPENTHREAD_CONFIG_MULTIPAN_RCP_ENABLE - // Initialize the queue for received packets. - queueStatus = queueInit(&sPendingCommandQueue, RADIO_REQUEST_BUFFER_COUNT); - OT_ASSERT(queueStatus); - - // Specify a callback to be called upon queue overflow. - queueStatus = queueOverflow(&sPendingCommandQueue, &pendingCommandQueueOverflowCallback); - OT_ASSERT(queueStatus); -#endif - - for (uint8_t i = 0; i < RADIO_REQUEST_BUFFER_COUNT; i++) - { - // Initialize the tx buffer params. - sTransmitBuffer[i].iid = INVALID_INTERFACE_INDEX; - sTransmitBuffer[i].frame.mLength = 0; - sTransmitBuffer[i].frame.mPsdu = sTransmitPsdu[i]; - -#if OPENTHREAD_CONFIG_MAC_HEADER_IE_SUPPORT - sTransmitBuffer[i].frame.mInfo.mTxInfo.mIeInfo = &sTransmitIeInfo[i]; -#endif - } - -#if OPENTHREAD_CONFIG_MLE_LINK_METRICS_SUBJECT_ENABLE - otLinkMetricsInit(SL_OPENTHREAD_RECEIVE_SENSITIVITY); -#endif - sCurrentBandConfig = efr32RadioGetBandConfig(OPENTHREAD_CONFIG_DEFAULT_CHANNEL); - OT_ASSERT(sCurrentBandConfig != NULL); - - sl_rail_util_pa_init(); - sli_set_tx_power_in_rail(OPENTHREAD_CONFIG_DEFAULT_TRANSMIT_POWER); - - status = sl_rail_config_rx_options(gRailHandle, - SL_RAIL_RX_OPTION_TRACK_ABORTED_FRAMES, - SL_RAIL_RX_OPTION_TRACK_ABORTED_FRAMES); - OT_ASSERT(status == SL_RAIL_STATUS_NO_ERROR); - efr32PhyStackInit(); - efr32RadioSetCcaMode(SL_OPENTHREAD_RADIO_CCA_MODE); - - sEnergyScanStatus = ENERGY_SCAN_STATUS_IDLE; - -#if FAST_CHANNEL_SWITCHING_SUPPORT && OPENTHREAD_CONFIG_MULTIPAN_RCP_ENABLE - sChannelSwitchingCfg.buffer_bytes = SL_RAIL_IEEE802154_RX_CHANNEL_SWITCHING_BUF_BYTES; - sChannelSwitchingCfg.p_buffer = sChannelSwitchingBuffer; - for (uint8_t i = 0U; i < SL_RAIL_IEEE802154_RX_CHANNEL_SWITCHING_NUM_CHANNELS; i++) - { - sChannelSwitchingCfg.channels[i] = UNINITIALIZED_CHANNEL; - } -#endif - - // Initialize the queue for received packets. - queueStatus = queueInit(&sRxPacketQueue, SL_OPENTHREAD_RADIO_RX_BUFFER_COUNT); - OT_ASSERT(queueStatus); - - // Specify a callback to be called upon queue overflow. - queueStatus = queueOverflow(&sRxPacketQueue, &rxPacketQueueOverflowCallback); - OT_ASSERT(queueStatus); - - // Initialize the memory pool for rx packets. - rxMemPoolStatus = - sl_memory_create_pool(sizeof(rxBuffer), SL_OPENTHREAD_RADIO_RX_BUFFER_COUNT, &sRxPacketMemPoolHandle); - OT_ASSERT(rxMemPoolStatus == SL_STATUS_OK); - - otLogInfoPlat("Initialized"); -} - -void efr32RadioDeinit(void) -{ - sl_rail_status_t status; - - sl_rail_idle(gRailHandle, SL_RAIL_IDLE_ABORT, true); - status = sl_rail_config_events(gRailHandle, SL_RAIL_EVENTS_ALL, 0); - OT_ASSERT(status == SL_RAIL_STATUS_NO_ERROR); - - sCurrentBandConfig = NULL; - - sl_memory_delete_pool(&sRxPacketMemPoolHandle); -} - -//------------------------------------------------------------------------------ -// Energy Scan support - -SL_CODE_CLASSIFY(SL_CODE_COMPONENT_OT_PLATFORM_ABSTRACTION, SL_CODE_CLASS_TIME_CRITICAL) -static void energyScanComplete(int8_t scanResultDbm) -{ - sEnergyScanResultDbm = scanResultDbm; - sEnergyScanStatus = ENERGY_SCAN_STATUS_COMPLETED; -} - -static uint16_t efr32GetSymbolDurationUs(void) -{ - uint32_t symbolRate = sl_rail_get_symbol_rate(gRailHandle); - if (symbolRate) - { - symbolRate = (uint16_t)(1000000 / symbolRate); - } - return (symbolRate > 0) ? (uint16_t)symbolRate : 1; -} - -SL_CODE_CLASSIFY(SL_CODE_COMPONENT_OT_PLATFORM_ABSTRACTION, SL_CODE_CLASS_TIME_CRITICAL) -static void efr32ScanTimerHandler(struct sl_rail_multi_timer *tmr, sl_rail_time_t expectedTimeOfEvent, void *cbArg) -{ - OT_UNUSED_VARIABLE(tmr); - OT_UNUSED_VARIABLE(expectedTimeOfEvent); - OT_UNUSED_VARIABLE(cbArg); - int16_t currentRSSIQuarterdBm = - sl_rail_get_rssi(gRailHandle, - ((sScanFrameCounter == sScanFrameCounterMax) ? SL_RAIL_GET_RSSI_WAIT_WITHOUT_TIMEOUT - : SL_RAIL_GET_RSSI_NO_WAIT)); - - if (currentRSSIQuarterdBm != SL_RAIL_RSSI_INVALID) - { - int8_t currentRSSI = (int8_t)(currentRSSIQuarterdBm / QUARTER_DBM_IN_DBM); - if (sEnergyReadsMax < currentRSSI) - { - sEnergyReadsMax = currentRSSI; - } - } - - if (sScanFrameCounter != 0) - { - efr32ScanDwell(SYMBOLS_PER_ENERGY_READING); - sScanFrameCounter--; - } - else - { - // done energy scan, reporting rssi value - energyScanComplete(sEnergyReadsMax); - OT_ASSERT( - sl_rail_config_rx_options(gRailHandle, SL_RAIL_RX_OPTION_DISABLE_FRAME_DETECTION, SL_RAIL_RX_OPTIONS_NONE) - == SL_RAIL_STATUS_NO_ERROR); -#if RADIO_CONFIG_DEBUG_COUNTERS_SUPPORT - railDebugCounters.mRailPlatRadioEnergyScanDoneCbCount++; -#endif - } -} - -static sl_rail_status_t efr32ScanDwell(uint16_t symbols) -{ - sl_rail_cancel_multi_timer(gRailHandle, &rail_timer); - return sl_rail_set_multi_timer(gRailHandle, - &rail_timer, - symbols * efr32GetSymbolDurationUs(), - SL_RAIL_TIME_DELAY, - efr32ScanTimerHandler, - NULL); -} - -static otError efr32StartEnergyScan(energyScanMode aMode, uint16_t aChannel, sl_rail_time_t aAveragingTimeUs) -{ - sl_rail_status_t status = SL_RAIL_STATUS_NO_ERROR; - otError error = OT_ERROR_NONE; - efr32BandConfig *config = NULL; - - otEXPECT_ACTION(sEnergyScanStatus == ENERGY_SCAN_STATUS_IDLE, error = OT_ERROR_BUSY); - - sEnergyScanStatus = ENERGY_SCAN_STATUS_IN_PROGRESS; - sEnergyScanMode = aMode; - - sl_rail_idle(gRailHandle, SL_RAIL_IDLE, true); - - config = efr32RadioGetBandConfig(aChannel); - otEXPECT_ACTION(config != NULL, error = OT_ERROR_INVALID_ARGS); - - if (sCurrentBandConfig != config) - { - efr32RailConfigLoad(config, SL_INVALID_TX_POWER); - sCurrentBandConfig = config; - } - if (sScanFrameCounter != 0) - { - return OT_ERROR_FAILED; - } - - sEnergyReadsMax = ENERGY_READS_MAX; - sScanFrameCounterMax = aAveragingTimeUs / (efr32GetSymbolDurationUs() * SYMBOLS_PER_ENERGY_READING); - sScanFrameCounter = sScanFrameCounterMax; - - status = sl_rail_config_rx_options(gRailHandle, - SL_RAIL_RX_OPTION_DISABLE_FRAME_DETECTION, - SL_RAIL_RX_OPTION_DISABLE_FRAME_DETECTION); - otEXPECT_ACTION(status == SL_RAIL_STATUS_NO_ERROR, error = OT_ERROR_FAILED); - - // set radio to Rx - otEXPECT_ACTION(radioSetRx(aChannel) == OT_ERROR_NONE, error = OT_ERROR_FAILED); - - // start energy scan - status = efr32ScanDwell(SYMBOLS_PER_ENERGY_READING); - otEXPECT_ACTION(status == SL_RAIL_STATUS_NO_ERROR, error = OT_ERROR_FAILED); - -exit: - if (status != SL_RAIL_STATUS_NO_ERROR) - { - energyScanComplete(OT_RADIO_RSSI_INVALID); - } - return error; -} - -//------------------------------------------------------------------------------ -// Stack support - -uint64_t otPlatRadioGetNow(otInstance *aInstance) -{ - OT_UNUSED_VARIABLE(aInstance); - - return otPlatTimeGet(); -} - -void otPlatRadioGetIeeeEui64(otInstance *aInstance, uint8_t *aIeeeEui64) -{ - OT_UNUSED_VARIABLE(aInstance); - -#if (RADIO_CONFIG_ENABLE_CUSTOM_EUI_SUPPORT) && defined(_SILICON_LABS_32B_SERIES_2) - // Invalid EUI - uint8_t nullEui[] = {0xFFU, 0xFFU, 0xFFU, 0xFFU, 0xFFU, 0xFFU, 0xFFU, 0xFFU}; - - // Read the Custom EUI and compare it to nullEui - if ((readUserData(aIeeeEui64, USERDATA_MFG_CUSTOM_EUI_64, OT_EXT_ADDRESS_SIZE, true) == -1) - || (memcmp(aIeeeEui64, nullEui, OT_EXT_ADDRESS_SIZE) == 0)) -#endif - { - uint64_t eui64; - uint8_t *eui64Ptr = NULL; - -#if defined(_SILICON_LABS_32B_SERIES_2) - eui64 = SYSTEM_GetUnique(); -#else - eui64 = sl_hal_system_get_unique(); -#endif - eui64Ptr = (uint8_t *)&eui64; - - for (uint8_t i = 0; i < OT_EXT_ADDRESS_SIZE; i++) - { - aIeeeEui64[i] = eui64Ptr[(OT_EXT_ADDRESS_SIZE - 1) - i]; - } - } -} - -void otPlatRadioSetPanId(otInstance *aInstance, uint16_t aPanId) -{ - sl_rail_status_t status; - uint8_t iid = efr32GetIidFromInstance(aInstance); - uint8_t panIndex = efr32GetPanIndexFromIid(iid); - - otEXPECT(sl_ot_rtos_task_can_access_pal()); - OT_ASSERT(panIndex != INVALID_INTERFACE_INDEX); - otLogInfoPlat("PANID=%X index=%u IID=%d", aPanId, panIndex, iid); - utilsSoftSrcMatchSetPanId(iid, aPanId); - - status = sl_rail_ieee802154_set_pan_id(gRailHandle, aPanId, panIndex); - OT_ASSERT(status == SL_RAIL_STATUS_NO_ERROR); - -#if OPENTHREAD_CONFIG_MULTIPAN_RCP_ENABLE - // We already have IID 0 enabled in filtermask to track BCAST Packets, so - // track only unique PanIds. - if (aPanId != RADIO_BCAST_PANID) - { - sRailFilterMask |= RADIO_GET_FILTER_MASK(iid); - } -#endif -exit: - return; -} - -void otPlatRadioSetExtendedAddress(otInstance *aInstance, const otExtAddress *aAddress) -{ - sl_rail_status_t status; - uint8_t iid = efr32GetIidFromInstance(aInstance); - uint8_t panIndex = efr32GetPanIndexFromIid(iid); - - otEXPECT(sl_ot_rtos_task_can_access_pal()); - OT_ASSERT(panIndex != INVALID_INTERFACE_INDEX); - - for (size_t i = 0; i < sizeof(*aAddress); i++) - { - sExtAddress[panIndex].m8[i] = aAddress->m8[sizeof(*aAddress) - 1 - i]; - } - - otLogInfoPlat("ExtAddr=%X%X%X%X%X%X%X%X index=%u", - aAddress->m8[7], - aAddress->m8[6], - aAddress->m8[5], - aAddress->m8[4], - aAddress->m8[3], - aAddress->m8[2], - aAddress->m8[1], - aAddress->m8[0], - panIndex); - - status = sl_rail_ieee802154_set_long_address(gRailHandle, (const uint8_t *)aAddress->m8, panIndex); - OT_ASSERT(status == SL_RAIL_STATUS_NO_ERROR); - -exit: - return; -} - -void otPlatRadioSetShortAddress(otInstance *aInstance, uint16_t aAddress) -{ - sl_rail_status_t status; - uint8_t iid = efr32GetIidFromInstance(aInstance); - uint8_t panIndex = efr32GetPanIndexFromIid(iid); - - otEXPECT(sl_ot_rtos_task_can_access_pal()); - OT_ASSERT(panIndex != INVALID_INTERFACE_INDEX); - otLogInfoPlat("ShortAddr=%X index=%u", aAddress, panIndex); - - status = sl_rail_ieee802154_set_short_address(gRailHandle, aAddress, panIndex); - OT_ASSERT(status == SL_RAIL_STATUS_NO_ERROR); - -exit: - return; -} - -otRadioState otPlatRadioGetState(otInstance *aInstance) -{ - otRadioState radioState = OT_RADIO_STATE_INVALID; - - OT_UNUSED_VARIABLE(aInstance); - - switch (sl_rail_get_radio_state(gRailHandle)) - { - case SL_RAIL_RF_STATE_RX: - case SL_RAIL_RF_STATE_RX_ACTIVE: - radioState = OT_RADIO_STATE_RECEIVE; - break; - - case SL_RAIL_RF_STATE_TX: - case SL_RAIL_RF_STATE_TX_ACTIVE: - radioState = OT_RADIO_STATE_TRANSMIT; - break; - - case SL_RAIL_RF_STATE_IDLE: - radioState = OT_RADIO_STATE_SLEEP; - break; - - case SL_RAIL_RF_STATE_INACTIVE: - radioState = OT_RADIO_STATE_DISABLED; - break; - default: - break; - } - - return radioState; -} - -bool otPlatRadioIsEnabled(otInstance *aInstance) -{ - OT_UNUSED_VARIABLE(aInstance); - - return (getInternalFlag(FLAG_RADIO_INIT_DONE)); -} - -otError otPlatRadioEnable(otInstance *aInstance) -{ - otError error = OT_ERROR_NONE; - - otEXPECT(!otPlatRadioIsEnabled(aInstance)); - - otLogInfoPlat("State=OT_RADIO_STATE_SLEEP"); - -exit: - return error; -} - -otError otPlatRadioDisable(otInstance *aInstance) -{ - otError error = OT_ERROR_NONE; - - otEXPECT_ACTION(sl_ot_rtos_task_can_access_pal(), error = OT_ERROR_REJECTED); - otEXPECT_ACTION(otPlatRadioIsEnabled(aInstance), error = OT_ERROR_INVALID_STATE); - - otLogInfoPlat("State=OT_RADIO_STATE_DISABLED"); - -exit: - return error; -} - -otError otPlatRadioSleep(otInstance *aInstance) -{ - OT_UNUSED_VARIABLE(aInstance); - otError error = OT_ERROR_NONE; - - otEXPECT_ACTION(!getInternalFlag(FLAG_ONGOING_TX_DATA), error = OT_ERROR_BUSY); - - otLogInfoPlat("State=OT_RADIO_STATE_SLEEP"); - setInternalFlag(FLAG_SCHEDULED_RX_PENDING, false); - radioSetIdle(); - -exit: - return error; -} - -otError efr32RadioLoadChannelConfig(uint8_t aChannel, int8_t aTxPower) -{ - otError error = OT_ERROR_NONE; - efr32BandConfig *config; - - config = efr32RadioGetBandConfig(aChannel); - otEXPECT_ACTION(config != NULL, error = OT_ERROR_INVALID_ARGS); - - if (sCurrentBandConfig != config) - { - sl_rail_idle(gRailHandle, SL_RAIL_IDLE, true); - efr32RailConfigLoad(config, aTxPower); - sCurrentBandConfig = config; - } - else - { - sli_set_tx_power_in_rail(aTxPower); - } - -exit: - return error; -} - -otError otPlatRadioReceive(otInstance *aInstance, uint8_t aChannel) -{ - otError error = OT_ERROR_NONE; - sl_rail_status_t status; - int8_t txPower; - uint8_t iid = efr32GetIidFromInstance(aInstance); - - otEXPECT_ACTION(sl_ot_rtos_task_can_access_pal(), error = OT_ERROR_REJECTED); - otEXPECT_ACTION(!getInternalFlag(FLAG_ONGOING_TX_DATA) && sEnergyScanStatus != ENERGY_SCAN_STATUS_IN_PROGRESS, - error = OT_ERROR_INVALID_STATE); - - OT_UNUSED_VARIABLE(iid); -#if FAST_CHANNEL_SWITCHING_SUPPORT && OPENTHREAD_CONFIG_MULTIPAN_RCP_ENABLE - uint8_t index = efr32GetPanIndexFromIid(iid); - OT_ASSERT(index < SL_RAIL_IEEE802154_RX_CHANNEL_SWITCHING_NUM_CHANNELS); - sChannelSwitchingCfg.channels[index] = aChannel; -#endif - - txPower = sl_get_tx_power_for_current_channel(aInstance); - error = efr32RadioLoadChannelConfig(aChannel, txPower); - otEXPECT(error == OT_ERROR_NONE); - - status = radioSetRx(aChannel); - otEXPECT_ACTION(status == SL_RAIL_STATUS_NO_ERROR, error = OT_ERROR_FAILED); - setInternalFlag(FLAG_SCHEDULED_RX_PENDING, false); - - sReceive.frame.mChannel = aChannel; - sReceiveAck.frame.mChannel = aChannel; - -exit: - return error; -} - -#if (OPENTHREAD_CONFIG_THREAD_VERSION >= OT_THREAD_VERSION_1_2) -otError otPlatRadioReceiveAt(otInstance *aInstance, uint8_t aChannel, uint32_t aStart, uint32_t aDuration) -{ - otError error = OT_ERROR_NONE; - int8_t txPower = sl_get_tx_power_for_current_channel(aInstance); - - // We can only have one schedule request i.e. either Rx or Tx as they use the - // same RAIL resources. - otEXPECT_ACTION(!getInternalFlag(FLAG_SCHEDULED_TX_PENDING | EVENT_SCHEDULED_TX_STARTED), error = OT_ERROR_FAILED); - - otEXPECT_ACTION(sl_ot_rtos_task_can_access_pal(), error = OT_ERROR_REJECTED); - OT_UNUSED_VARIABLE(aInstance); - - error = efr32RadioLoadChannelConfig(aChannel, txPower); - otEXPECT(error == OT_ERROR_NONE); - - // Set the flag first and then schedule the Rx as the rail scheduler can trigger the events even before - // sl_rail_start_scheduled_rx() API returns the status if start time is too close to the current time which could - // otherwise cause the race condition. - setInternalFlag(FLAG_SCHEDULED_RX_PENDING, true); - error = radioScheduleRx(aChannel, aStart, aDuration); - otEXPECT_ACTION(error == OT_ERROR_NONE, setInternalFlag(FLAG_SCHEDULED_RX_PENDING, false)); - - sReceive.frame.mChannel = aChannel; - sReceiveAck.frame.mChannel = aChannel; - -exit: - return error; -} -#endif // (OPENTHREAD_CONFIG_THREAD_VERSION >= OT_THREAD_VERSION_1_2) - -#if OPENTHREAD_CONFIG_MULTIPAN_RCP_ENABLE -inline static void pushPendingCommand(pendingCommandType aCmdType, uint8_t aIid, void *aCmdParams) -{ - pendingCommandEntry *pendingCommand = (pendingCommandEntry *)sl_malloc(sizeof(pendingCommandEntry)); - OT_ASSERT(pendingCommand != NULL); - - pendingCommand->cmdType = aCmdType; - pendingCommand->iid = aIid; - - if (aCmdType == kPendingCommandTypeTransmit) - { - otRadioFrame *txFrame = (otRadioFrame *)aCmdParams; - pendingCommand->request.txFrame = txFrame; - } - else if (aCmdType == kPendingCommandTypeEnergyScan) - { - energyScanParams *energyScanReq = (energyScanParams *)aCmdParams; - pendingCommand->request.energyScan.scanChannel = energyScanReq->scanChannel; - pendingCommand->request.energyScan.scanDuration = energyScanReq->scanDuration; - } - - if (!queueAdd(&sPendingCommandQueue, (void *)pendingCommand)) - { - sl_free(pendingCommand); - } -} -#endif - -otError otPlatRadioTransmit(otInstance *aInstance, otRadioFrame *aFrame) -{ - otError error = OT_ERROR_NONE; - int8_t txPower = sl_get_tx_power_for_current_channel(aInstance); - uint8_t iid = efr32GetIidFromInstance(aInstance); - - // sTransmitBuffer's index 0 corresponds to host 1 i.e. iid 1 and reason is, - // iid zero is reserved for broadcast frames in multipan case. - uint8_t txBufIndex = iid ? (iid - 1) : 0; - - otEXPECT_ACTION(sl_ot_rtos_task_can_access_pal(), error = OT_ERROR_REJECTED); - -#if OPENTHREAD_CONFIG_MULTIPAN_RCP_ENABLE - // Accept GP packets even if radio is not in required state. - if ((sl_gp_intf_get_state() != SL_GP_STATE_SEND_RESPONSE) && sl_gp_intf_should_buffer_pkt(aInstance, aFrame, false)) - { - sl_gp_intf_buffer_pkt(aInstance); - } - else -#endif - { - OT_ASSERT(txBufIndex < RADIO_REQUEST_BUFFER_COUNT); - OT_ASSERT(aFrame == &sTransmitBuffer[txBufIndex].frame); - OT_ASSERT(aFrame->mPsdu == sTransmitPsdu[txBufIndex]); - - if (!aFrame->mInfo.mTxInfo.mIsARetx) - { - sTransmitBuffer[txBufIndex].currentRadioTxPriority = SL_802154_RADIO_PRIO_TX_MIN; - } - else if (sTransmitBuffer[txBufIndex].currentRadioTxPriority > SL_802154_RADIO_PRIO_TX_STEP) - { - sTransmitBuffer[txBufIndex].currentRadioTxPriority -= SL_802154_RADIO_PRIO_TX_STEP; - } - // TX priority is always bounded by the maximum priority configured - if (sTransmitBuffer[txBufIndex].currentRadioTxPriority < SL_802154_RADIO_PRIO_TX_MAX) - { - sTransmitBuffer[txBufIndex].currentRadioTxPriority = SL_802154_RADIO_PRIO_TX_MAX; - } - -#if OPENTHREAD_CONFIG_MULTIPAN_RCP_ENABLE - OT_ASSERT((iid != RADIO_BCAST_IID) && (iid < RADIO_INTERFACE_COUNT)); - // Push pending transmit and exit if radio is busy. - if (isRadioTransmittingOrScanning()) - { - pushPendingCommand(kPendingCommandTypeTransmit, iid, aFrame); - ExitNow(error = OT_ERROR_NONE); - } -#endif - error = efr32RadioLoadChannelConfig(aFrame->mChannel, txPower); - otEXPECT(error == OT_ERROR_NONE); - - OT_ASSERT(!getInternalFlag(FLAG_ONGOING_TX_DATA)); - - setInternalFlag(RADIO_TX_EVENTS, false); - sTransmitBuffer[txBufIndex].iid = iid; - sCurrentTxPacket = &sTransmitBuffer[txBufIndex]; - - setInternalFlag(FLAG_CURRENT_TX_USE_CSMA, aFrame->mInfo.mTxInfo.mCsmaCaEnabled); - -#if OPENTHREAD_CONFIG_THREAD_VERSION >= OT_THREAD_VERSION_1_2 -#if OPENTHREAD_CONFIG_MAC_CSL_RECEIVER_ENABLE - if (sCslPeriod > 0 && sCurrentTxPacket->frame.mInfo.mTxInfo.mTxDelay == 0) - { - // Only called for CSL children (sCslPeriod > 0) - // Note: Our SSEDs "schedule" transmissions to their parent in order to know - // exactly when in the future the data packets go out so they can calculate - // the accurate CSL phase to send to their parent. - sCurrentTxPacket->frame.mInfo.mTxInfo.mTxDelayBaseTime = sl_rail_get_time(SL_RAIL_EFR32_HANDLE); - sCurrentTxPacket->frame.mInfo.mTxInfo.mTxDelay = - SCHEDULE_TX_DELAY_US; // Chosen after internal certification testing - } -#endif - updateIeInfoTxFrame(sCurrentTxPacket->frame.mInfo.mTxInfo.mTxDelayBaseTime - + sCurrentTxPacket->frame.mInfo.mTxInfo.mTxDelay + SHR_DURATION_US); - // Note - we need to call this outside of txCurrentPacket as for Series 2, - // this results in calling the SE interface from a critical section which is not permitted. - radioProcessTransmitSecurity(&sCurrentTxPacket->frame, sCurrentTxPacket->iid); -#endif // OPENTHREAD_CONFIG_THREAD_VERSION >= OT_THREAD_VERSION_1_2 - - CORE_DECLARE_IRQ_STATE; - CORE_ENTER_ATOMIC(); - setInternalFlag(FLAG_ONGOING_TX_DATA, true); - tryTxCurrentPacket(); - CORE_EXIT_ATOMIC(); - - if (getInternalFlag(EVENT_TX_FAILED)) - { - otPlatRadioTxStarted(aInstance, aFrame); - } - } -exit: - return error; -} - -#if OPENTHREAD_CONFIG_THREAD_VERSION >= OT_THREAD_VERSION_1_2 -SL_CODE_CLASSIFY(SL_CODE_COMPONENT_OT_PLATFORM_ABSTRACTION, SL_CODE_CLASS_TIME_CRITICAL) -void updateIeInfoTxFrame(uint32_t shrTxTime) -{ - OT_ASSERT(sCurrentTxPacket != NULL); - -#if OPENTHREAD_CONFIG_MAC_HEADER_IE_SUPPORT && OPENTHREAD_CONFIG_TIME_SYNC_ENABLE - // Seek the time sync offset and update the rendezvous time - if (sCurrentTxPacket->frame.mInfo.mTxInfo.mIeInfo->mTimeIeOffset != 0) - { - uint8_t *timeIe = sCurrentTxPacket->frame.mPsdu + sCurrentTxPacket->frame.mInfo.mTxInfo.mIeInfo->mTimeIeOffset; - uint64_t time = otPlatTimeGet(); - - // Use the same mechanism as CSL children to schedule tx for the future without CSMA - // so that the value written to the time IE exactly matches the actual tx time of the packet - sCurrentTxPacket->frame.mInfo.mTxInfo.mTxDelayBaseTime = - (uint32_t)time; // Bottom 32 bits are sl_rail_get_time() - sCurrentTxPacket->frame.mInfo.mTxInfo.mTxDelay = SCHEDULE_TX_DELAY_US; - time += sCurrentTxPacket->frame.mInfo.mTxInfo.mIeInfo->mNetworkTimeOffset - + sCurrentTxPacket->frame.mInfo.mTxInfo.mTxDelay + SHR_DURATION_US; - *timeIe = sCurrentTxPacket->frame.mInfo.mTxInfo.mIeInfo->mTimeSyncSeq; - - *(++timeIe) = (uint8_t)(time & 0xff); - for (uint8_t i = 1; i < sizeof(uint64_t); i++) - { - time = time >> 8; - *(++timeIe) = (uint8_t)(time & 0xff); - } - } -#endif // OPENTHREAD_CONFIG_MAC_HEADER_IE_SUPPORT && OPENTHREAD_CONFIG_TIME_SYNC_ENABLE - -#if OPENTHREAD_CONFIG_MAC_CSL_RECEIVER_ENABLE - // Update IE data in the 802.15.4 header with the newest CSL period / phase - if (sCslPeriod > 0 && !sCurrentTxPacket->frame.mInfo.mTxInfo.mIsHeaderUpdated) - { - otMacFrameSetCslIe(&sCurrentTxPacket->frame, (uint16_t)sCslPeriod, getCslPhase(shrTxTime)); - } -#else - OT_UNUSED_VARIABLE(shrTxTime); -#endif // OPENTHREAD_CONFIG_MAC_CSL_RECEIVER_ENABLE -} -#endif // OPENTHREAD_CONFIG_THREAD_VERSION >= OT_THREAD_VERSION_1_2 - -void txCurrentPacket(void) -{ - OT_ASSERT(getInternalFlag(FLAG_ONGOING_TX_DATA)); - OT_ASSERT(sCurrentTxPacket != NULL); - - sl_rail_tx_options_t txOptions = SL_RAIL_TX_OPTIONS_DEFAULT; - sl_rail_status_t status = SL_RAIL_STATUS_INVALID_STATE; - uint8_t frameLength; - bool ackRequested; - -#if RADIO_CONFIG_DEBUG_COUNTERS_SUPPORT - railDebugCounters.mRailPlatTxTriggered++; -#endif - // signalling this event earlier, as this event can OT_ASSERT REQ (expecially for a - // non-CSMA transmit) giving the Coex master a little more time to grant or deny. - if (getInternalFlag(FLAG_CURRENT_TX_USE_CSMA)) - { - (void)handlePhyStackEvent(SL_RAIL_UTIL_IEEE802154_STACK_EVENT_TX_PENDED_PHY, (uint32_t) true); - } - else - { - (void)handlePhyStackEvent(SL_RAIL_UTIL_IEEE802154_STACK_EVENT_TX_PENDED_PHY, (uint32_t) false); - } - - frameLength = (uint8_t)sCurrentTxPacket->frame.mLength; - - if (PHY_HEADER_SIZE == 1) - { - sl_rail_write_tx_fifo(gRailHandle, &frameLength, sizeof frameLength, true); - } - else - { // 2 byte PHR for Sub-GHz - uint8_t PHRByte1 = (0x08U /*FCS=2byte*/ | 0x10U /*Whiten=enabled*/); - uint8_t PHRByte2 = (uint8_t)(__RBIT(frameLength) >> 24); - - sl_rail_write_tx_fifo(gRailHandle, &PHRByte1, sizeof PHRByte1, true); - sl_rail_write_tx_fifo(gRailHandle, &PHRByte2, sizeof PHRByte2, false); - } - sl_rail_write_tx_fifo(gRailHandle, sCurrentTxPacket->frame.mPsdu, frameLength - 2, false); - - sl_rail_scheduler_info_t txSchedulerInfo = { - .priority = sCurrentTxPacket->currentRadioTxPriority, - .slip_time = RADIO_SCHEDULER_CHANNEL_SLIP_TIME, - .transaction_time = 0, // will be calculated later if DMP is used - }; - - ackRequested = (sCurrentTxPacket->frame.mPsdu[0] & IEEE802154_FRAME_FLAG_ACK_REQUIRED); - if (ackRequested) - { - txOptions |= SL_RAIL_TX_OPTION_WAIT_FOR_ACK; - -#if RADIO_CONFIG_DMP_SUPPORT - // time we wait for ACK - if (sl_rail_get_symbol_rate(gRailHandle) > 0) - { - txSchedulerInfo.transaction_time += (sl_rail_time_t)(12 * 1e6 / sl_rail_get_symbol_rate(gRailHandle)); - } - else - { - txSchedulerInfo.transaction_time += 12 * RADIO_TIMING_DEFAULT_SYMBOLTIME_US; - } -#endif - } - -#ifdef SL_CATALOG_RAIL_UTIL_ANT_DIV_PRESENT - // Update Tx options to use currently-selected antenna. - // If antenna diverisity on Tx is disabled, leave both options 0 - // so Tx antenna tracks Rx antenna. - if (sl_rail_util_ant_div_get_tx_antenna_mode() != SL_RAIL_UTIL_ANT_DIV_DISABLED) - { - txOptions |= ((sl_rail_util_ant_div_get_tx_antenna_selected() == SL_RAIL_UTIL_ANTENNA_SELECT_ANTENNA1) - ? SL_RAIL_TX_OPTION_ANTENNA_0 - : SL_RAIL_TX_OPTION_ANTENNA_1); - } -#endif // SL_CATALOG_RAIL_UTIL_ANT_DIV_PRESENT - -#if RADIO_CONFIG_DMP_SUPPORT - // time needed for the frame itself - // 4B preamble, 1B SFD, 1B PHR is not counted in frameLength - if (sl_rail_get_bit_rate(gRailHandle) > 0) - { - txSchedulerInfo.transaction_time += - (sl_rail_time_t)((frameLength + 4 + 1 + 1) * 8 * 1e6 / sl_rail_get_bit_rate(gRailHandle)); - } - else - { // assume 250kbps - txSchedulerInfo.transaction_time += (frameLength + 4 + 1 + 1) * RADIO_TIMING_DEFAULT_BYTETIME_US; - } -#endif - - // Prioritize the Tx over schedule Rx to avoid missing data check-ins such as data polls. - if (getInternalFlag(FLAG_SCHEDULED_RX_PENDING)) - { - sl_rail_idle(gRailHandle, SL_RAIL_IDLE, true); - setInternalFlag(FLAG_SCHEDULED_RX_PENDING | EVENT_SCHEDULED_RX_STARTED, false); - } - - if (sCurrentTxPacket->frame.mInfo.mTxInfo.mTxDelay == 0) - { - if (getInternalFlag(FLAG_CURRENT_TX_USE_CSMA)) - { -#if RADIO_CONFIG_DMP_SUPPORT - // time needed for CSMA/CA - txSchedulerInfo.transaction_time += RADIO_TIMING_CSMA_OVERHEAD_US; -#endif - csmaConfig.csma_tries = sCurrentTxPacket->frame.mInfo.mTxInfo.mMaxCsmaBackoffs; - csmaConfig.cca_threshold_dbm = sCcaThresholdDbm; - - status = sl_rail_start_cca_csma_tx(gRailHandle, - sCurrentTxPacket->frame.mChannel, - txOptions, - &csmaConfig, - &txSchedulerInfo); - } - else - { - status = sl_rail_start_tx(gRailHandle, sCurrentTxPacket->frame.mChannel, txOptions, &txSchedulerInfo); - } - - if (status == SL_RAIL_STATUS_NO_ERROR) - { - (void)handlePhyStackEvent(SL_RAIL_UTIL_IEEE802154_STACK_EVENT_TX_STARTED, 0U); - } - } - else - { - // For CSL transmitters (FTDs): - // mTxDelayBaseTime = rx-timestamp (end of sync word) when we received CSL-sync with IEs - // mTxDelay = Delay starting from mTxDelayBaseTime - // - // For CSL receivers (SSEDs): - // mTxDelayBaseTime = timestamp when otPlatRadioTransmit is called - // mTxDelay = Chosen value in the future where transmit is scheduled, so we know exactly - // when to calculate the phase (we can't do this on-the-fly as the packet is going out - // due to platform limitations. see radioScheduleRx) - // - // Note that both use single CCA config, overriding any CCA/CSMA configs from the stack - // -#if OPENTHREAD_CONFIG_THREAD_VERSION >= OT_THREAD_VERSION_1_2 - sl_rail_scheduled_tx_config_t scheduleTxOptions = { - .when = sCurrentTxPacket->frame.mInfo.mTxInfo.mTxDelayBaseTime - + sCurrentTxPacket->frame.mInfo.mTxInfo.mTxDelay - SHR_DURATION_US, - .mode = SL_RAIL_TIME_ABSOLUTE, - .tx_during_rx = SL_RAIL_SCHEDULED_TX_DURING_RX_POSTPONE_TX}; - - // Set ccaBackoff to some constant value, so we have predictable radio warmup time for schedule tx. - cslCsmaConfig.cca_backoff_us = CSL_CSMA_BACKOFF_TIME_IN_US; - scheduleTxOptions.when -= cslCsmaConfig.cca_backoff_us; - - // CSL transmissions don't use CSMA but MAC accounts for single CCA time. - // cslCsmaConfig is set to SL_RAIL_CSMA_CONFIG_SINGLE_CCA above. - status = sl_rail_start_scheduled_cca_csma_tx(gRailHandle, - sCurrentTxPacket->frame.mChannel, - txOptions, - &scheduleTxOptions, - &cslCsmaConfig, - &txSchedulerInfo); - - if (status == SL_RAIL_STATUS_NO_ERROR) - { - setInternalFlag(FLAG_SCHEDULED_TX_PENDING, true); -#if RADIO_CONFIG_DEBUG_COUNTERS_SUPPORT - railDebugCounters.mRailEventsScheduledTxTriggeredCount++; -#endif - (void)handlePhyStackEvent(SL_RAIL_UTIL_IEEE802154_STACK_EVENT_TX_STARTED, 0U); - } -#endif - } - - if (status == SL_RAIL_STATUS_NO_ERROR) - { -#if RADIO_CONFIG_DEBUG_COUNTERS_SUPPORT - railDebugCounters.mRailTxStarted++; -#endif - } - else - { -#if RADIO_CONFIG_DEBUG_COUNTERS_SUPPORT - railDebugCounters.mRailTxStartFailed++; -#endif - (void)handlePhyStackEvent(SL_RAIL_UTIL_IEEE802154_STACK_EVENT_TX_BLOCKED, (uint32_t)ackRequested); - txFailedCallback(false, EVENT_TX_FAILED); - - otSysEventSignalPending(); - } -} - -// This API gets called from init procedure so instance to IID mapping does not exist -// at that point. Also this api will get called sequentially so assign new transmit -// buffer if aInstance does not exist in sInstances. -otRadioFrame *otPlatRadioGetTransmitBuffer(otInstance *aInstance) -{ - OT_UNUSED_VARIABLE(aInstance); - uint8_t index = 0; - otRadioFrame *aRadioFrame = NULL; - - otEXPECT(sl_ot_rtos_task_can_access_pal()); - -#if OPENTHREAD_CONFIG_MULTIPAN_RCP_ENABLE - for (index = 0; index < OPENTHREAD_CONFIG_MULTIPLE_INSTANCE_NUM; index++) - { - if (sInstances[index] == aInstance || sInstances[index] == NULL) - { - break; - } - } -#endif // OPENTHREAD_CONFIG_MULTIPAN_RCP_ENABLE - - aRadioFrame = &sTransmitBuffer[index].frame; - -exit: - return aRadioFrame; -} - -int8_t otPlatRadioGetRssi(otInstance *aInstance) -{ - otError error; - uint32_t start; - int8_t rssi = OT_RADIO_RSSI_INVALID; - uint8_t aChannel = sReceive.frame.mChannel; - uint8_t iid = efr32GetIidFromInstance(aInstance); - - otEXPECT(sl_ot_rtos_task_can_access_pal()); - otEXPECT(!getInternalFlag(FLAG_ONGOING_TX_DATA)); - - OT_UNUSED_VARIABLE(iid); -#if FAST_CHANNEL_SWITCHING_SUPPORT && OPENTHREAD_CONFIG_MULTIPAN_RCP_ENABLE - uint8_t index = efr32GetPanIndexFromIid(iid); - OT_ASSERT(index < SL_RAIL_IEEE802154_RX_CHANNEL_SWITCHING_NUM_CHANNELS); - if (sChannelSwitchingCfg.channels[index] != UNINITIALIZED_CHANNEL) - { - aChannel = sChannelSwitchingCfg.channels[index]; - } -#endif - - error = efr32StartEnergyScan(ENERGY_SCAN_MODE_SYNC, aChannel, SL_OPENTHREAD_RSSI_AVERAGING_TIME); - otEXPECT(error == OT_ERROR_NONE); - - start = sl_rail_get_time(SL_RAIL_EFR32_HANDLE); - - // waiting for the event SL_RAIL_EVENT_RSSI_AVERAGE_DONE - while (sEnergyScanStatus == ENERGY_SCAN_STATUS_IN_PROGRESS - && ((sl_rail_get_time(SL_RAIL_EFR32_HANDLE) - start) < SL_OPENTHREAD_RSSI_AVERAGING_TIMEOUT)) - ; - - if (sEnergyScanStatus == ENERGY_SCAN_STATUS_COMPLETED) - { - rssi = sEnergyScanResultDbm; - } - - sEnergyScanStatus = ENERGY_SCAN_STATUS_IDLE; -exit: - return rssi; -} - -otRadioCaps otPlatRadioGetCaps(otInstance *aInstance) -{ - OT_UNUSED_VARIABLE(aInstance); - - return sRadioCapabilities; -} - -bool otPlatRadioGetPromiscuous(otInstance *aInstance) -{ - OT_UNUSED_VARIABLE(aInstance); - - return sPromiscuous; -} - -void otPlatRadioSetPromiscuous(otInstance *aInstance, bool aEnable) -{ - OT_UNUSED_VARIABLE(aInstance); - - sl_rail_status_t status; - - otEXPECT(sl_ot_rtos_task_can_access_pal()); - sPromiscuous = aEnable; - - status = sl_rail_ieee802154_set_promiscuous_mode(gRailHandle, aEnable); - OT_ASSERT(status == SL_RAIL_STATUS_NO_ERROR); - -exit: - return; -} - -void otPlatRadioEnableSrcMatch(otInstance *aInstance, bool aEnable) -{ - OT_UNUSED_VARIABLE(aInstance); - - otEXPECT(sl_ot_rtos_task_can_access_pal()); - // set Frame Pending bit for all outgoing ACKs if aEnable is false - sIsSrcMatchEnabled = aEnable; - -exit: - return; -} - -otError otPlatRadioGetTransmitPower(otInstance *aInstance, int8_t *aPower) -{ - OT_UNUSED_VARIABLE(aInstance); - - otError error = OT_ERROR_NONE; - - otEXPECT_ACTION(aPower != NULL, error = OT_ERROR_INVALID_ARGS); - // sl_rail_get_tx_power_dbm() returns power in deci-dBm (0.1dBm) - // Divide by 10 because aPower is supposed be in units dBm - *aPower = (int8_t)(sl_rail_get_tx_power_dbm(gRailHandle) / 10); - -exit: - return error; -} - -otError otPlatRadioSetTransmitPower(otInstance *aInstance, int8_t aPower) -{ - return sli_set_default_tx_power(aInstance, aPower); -} - -// Required for RCP error recovery -// See src/lib/spinel/radio_spinel.cpp::RestoreProperties() -otError otPlatRadioSetChannelMaxTransmitPower(otInstance *aInstance, uint8_t aChannel, int8_t aMaxPower) -{ - return sli_set_channel_max_tx_power(aInstance, aChannel, aMaxPower); -} - -otError otPlatRadioGetCcaEnergyDetectThreshold(otInstance *aInstance, int8_t *aThreshold) -{ - OT_UNUSED_VARIABLE(aInstance); - - otError error = OT_ERROR_NONE; - otEXPECT_ACTION(aThreshold != NULL, error = OT_ERROR_INVALID_ARGS); - - *aThreshold = sCcaThresholdDbm; - -exit: - return error; -} - -otError otPlatRadioSetCcaEnergyDetectThreshold(otInstance *aInstance, int8_t aThreshold) -{ - OT_UNUSED_VARIABLE(aInstance); - - otError error = OT_ERROR_NONE; - - otEXPECT_ACTION(sl_ot_rtos_task_can_access_pal(), error = OT_ERROR_REJECTED); - sCcaThresholdDbm = aThreshold; - -exit: - return error; -} - -int8_t otPlatRadioGetReceiveSensitivity(otInstance *aInstance) -{ - OT_UNUSED_VARIABLE(aInstance); - - return SL_OPENTHREAD_RECEIVE_SENSITIVITY; -} - -otError otPlatRadioEnergyScan(otInstance *aInstance, uint8_t aScanChannel, uint16_t aScanDuration) -{ - otError error = OT_ERROR_NONE; - uint8_t iid = efr32GetIidFromInstance(aInstance); - - otEXPECT_ACTION(sl_ot_rtos_task_can_access_pal(), error = OT_ERROR_REJECTED); -#if OPENTHREAD_CONFIG_MULTIPAN_RCP_ENABLE - OT_ASSERT((iid != RADIO_BCAST_IID) && (iid < RADIO_INTERFACE_COUNT)); - - // Push pending energy-scan and exit if radio is busy. - if (isRadioTransmittingOrScanning()) - { - energyScanParams params = {aScanChannel, aScanDuration}; - pushPendingCommand(kPendingCommandTypeEnergyScan, iid, ¶ms); - ExitNow(error = OT_ERROR_NONE); - } -#endif - - sEnergyScanActiveInterface = iid; - error = efr32StartEnergyScan(ENERGY_SCAN_MODE_ASYNC, aScanChannel, (sl_rail_time_t)aScanDuration * US_IN_MS); - -exit: - return error; -} - -//------------------------------------------------------------------------------ -// Radio Config: Thread 1.2 transmit security support - -#if (OPENTHREAD_CONFIG_THREAD_VERSION >= OT_THREAD_VERSION_1_2) -void otPlatRadioSetMacKey(otInstance *aInstance, - uint8_t aKeyIdMode, - uint8_t aKeyId, - const otMacKeyMaterial *aPrevKey, - const otMacKeyMaterial *aCurrKey, - const otMacKeyMaterial *aNextKey, - otRadioKeyType aKeyType) -{ - OT_UNUSED_VARIABLE(aKeyIdMode); - OT_UNUSED_VARIABLE(aKeyType); - - uint8_t iid = efr32GetIidFromInstance(aInstance); - - otEXPECT(sl_ot_rtos_task_can_access_pal()); - OT_ASSERT(aPrevKey != NULL && aCurrKey != NULL && aNextKey != NULL); - - // MAC frame counters are reset before updating keys. This order - // safeguards against issues that can arise when the radio - // platform handles TX security and counter assignment. The - // radio platform might prepare an enhanced ACK to a received - // frame from an parallel (e.g., ISR) context, which consumes - // a MAC frame counter value. - // - // If the MAC key is updated before the frame counter is cleared, - // the radio could receive and send an enhanced ACK between these - // two actions, possibly using the new MAC key with a larger - // (current) frame counter value. This could then prevent the - // receiver from accepting subsequent transmissions after the - // frame counter reset for a long time. - // - // While resetting counters first might briefly cause an enhanced - // ACK to be sent with the old key and a zero counter (which might - // be rejected by the receiver), this is a transient issue that - // quickly resolves itself. - otPlatRadioSetMacFrameCounter(aInstance, 0); - - sMacKeys[iid].keyId = aKeyId; - memcpy(&sMacKeys[iid].keys[MAC_KEY_PREV], aPrevKey, sizeof(otMacKeyMaterial)); - memcpy(&sMacKeys[iid].keys[MAC_KEY_CURRENT], aCurrKey, sizeof(otMacKeyMaterial)); - memcpy(&sMacKeys[iid].keys[MAC_KEY_NEXT], aNextKey, sizeof(otMacKeyMaterial)); - -#if (OPENTHREAD_CONFIG_CRYPTO_LIB == OPENTHREAD_CONFIG_CRYPTO_LIB_PSA) - size_t aKeyLen = 0; - otError error = OT_ERROR_NONE; - - error = otPlatCryptoExportKey(sMacKeys[iid].keys[MAC_KEY_PREV].mKeyMaterial.mKeyRef, - sMacKeys[iid].keys[MAC_KEY_PREV].mKeyMaterial.mKey.m8, - sizeof(sMacKeys[iid].keys[MAC_KEY_PREV]), - &aKeyLen); - OT_ASSERT(error == OT_ERROR_NONE); - - error = otPlatCryptoExportKey(sMacKeys[iid].keys[MAC_KEY_CURRENT].mKeyMaterial.mKeyRef, - sMacKeys[iid].keys[MAC_KEY_CURRENT].mKeyMaterial.mKey.m8, - sizeof(sMacKeys[iid].keys[MAC_KEY_CURRENT]), - &aKeyLen); - OT_ASSERT(error == OT_ERROR_NONE); - - error = otPlatCryptoExportKey(sMacKeys[iid].keys[MAC_KEY_NEXT].mKeyMaterial.mKeyRef, - sMacKeys[iid].keys[MAC_KEY_NEXT].mKeyMaterial.mKey.m8, - sizeof(sMacKeys[iid].keys[MAC_KEY_NEXT]), - &aKeyLen); - OT_ASSERT(error == OT_ERROR_NONE); -#endif - -exit: - return; -} - -void otPlatRadioSetMacFrameCounter(otInstance *aInstance, uint32_t aMacFrameCounter) -{ - uint8_t iid = efr32GetIidFromInstance(aInstance); - - otEXPECT(sl_ot_rtos_task_can_access_pal()); - - CORE_DECLARE_IRQ_STATE; - CORE_ENTER_ATOMIC(); - - sMacKeys[iid].macFrameCounter = aMacFrameCounter; - - CORE_EXIT_ATOMIC(); - -exit: - return; -} - -void otPlatRadioSetMacFrameCounterIfLarger(otInstance *aInstance, uint32_t aMacFrameCounter) -{ - uint8_t iid = efr32GetIidFromInstance(aInstance); - - otEXPECT(sl_ot_rtos_task_can_access_pal()); - - CORE_DECLARE_IRQ_STATE; - CORE_ENTER_ATOMIC(); - - if (aMacFrameCounter > sMacKeys[iid].macFrameCounter) - { - sMacKeys[iid].macFrameCounter = aMacFrameCounter; - } - - CORE_EXIT_ATOMIC(); - -exit: - return; -} - -//------------------------------------------------------------------------------ -// Radio Config: Enhanced Acks, CSL - -#if OPENTHREAD_CONFIG_MAC_CSL_RECEIVER_ENABLE -otError otPlatRadioEnableCsl(otInstance *aInstance, - uint32_t aCslPeriod, - otShortAddress aShortAddr, - const otExtAddress *aExtAddr) -{ - otError error = OT_ERROR_NONE; - - OT_UNUSED_VARIABLE(aInstance); - OT_UNUSED_VARIABLE(aShortAddr); - OT_UNUSED_VARIABLE(aExtAddr); - - otEXPECT_ACTION(sl_ot_rtos_task_can_access_pal(), error = OT_ERROR_REJECTED); - - sCslPeriod = aCslPeriod; - -exit: - return error; -} - -void otPlatRadioUpdateCslSampleTime(otInstance *aInstance, uint32_t aCslSampleTime) -{ - OT_UNUSED_VARIABLE(aInstance); - - otEXPECT(sl_ot_rtos_task_can_access_pal()); - sCslSampleTime = aCslSampleTime; -exit: - return; -} - -#endif // OPENTHREAD_CONFIG_MAC_CSL_RECEIVER_ENABLE - -uint8_t otPlatRadioGetCslAccuracy(otInstance *aInstance) -{ - OT_UNUSED_VARIABLE(aInstance); - - return otPlatTimeGetXtalAccuracy(); -} - -uint8_t otPlatRadioGetCslUncertainty(otInstance *aInstance) -{ - OT_UNUSED_VARIABLE(aInstance); - - return SL_OPENTHREAD_CSL_TX_UNCERTAINTY; -} - -//------------------------------------------------------------------------------ -// Radio Config: Link Metrics - -#if OPENTHREAD_CONFIG_MLE_LINK_METRICS_SUBJECT_ENABLE -otError otPlatRadioConfigureEnhAckProbing(otInstance *aInstance, - otLinkMetrics aLinkMetrics, - const otShortAddress aShortAddress, - const otExtAddress *aExtAddress) -{ - otError error; - - OT_UNUSED_VARIABLE(aInstance); - otEXPECT_ACTION(sl_ot_rtos_task_can_access_pal(), error = OT_ERROR_REJECTED); - - error = otLinkMetricsConfigureEnhAckProbing(aShortAddress, aExtAddress, aLinkMetrics); - -exit: - return error; -} -#endif -#endif // (OPENTHREAD_CONFIG_THREAD_VERSION >= OT_THREAD_VERSION_1_2) - -#if OPENTHREAD_CONFIG_PLATFORM_RADIO_COEX_ENABLE -otError otPlatRadioSetCoexEnabled(otInstance *aInstance, bool aEnabled) -{ - otError error; - - OT_UNUSED_VARIABLE(aInstance); - otEXPECT_ACTION(sl_ot_rtos_task_can_access_pal(), error = OT_ERROR_REJECTED); - - sl_status_t status = sl_rail_util_coex_set_enable(aEnabled); - if (aEnabled && !sl_rail_util_coex_is_enabled()) - { - otLogInfoPlat("Coexistence GPIO configurations not set"); - return OT_ERROR_FAILED; - } - sRadioCoexEnabled = aEnabled; - - error = (status != SL_STATUS_OK) ? OT_ERROR_FAILED : OT_ERROR_NONE; - -exit: - return error; -} - -bool otPlatRadioIsCoexEnabled(otInstance *aInstance) -{ - OT_UNUSED_VARIABLE(aInstance); - return (sRadioCoexEnabled && sl_rail_util_coex_is_enabled()); -} - -#endif // OPENTHREAD_CONFIG_PLATFORM_RADIO_COEX_ENABLE - -#if (OPENTHREAD_CONFIG_THREAD_VERSION >= OT_THREAD_VERSION_1_2) -//------------------------------------------------------------------------------ -// Radio implementation: Enhanced ACKs, CSL - -// Return false if we should generate an immediate ACK -// Return true otherwise -SL_CODE_CLASSIFY(SL_CODE_COMPONENT_OT_PLATFORM_ABSTRACTION, SL_CODE_CLASS_TIME_CRITICAL) -static bool writeIeee802154EnhancedAck(sl_rail_handle_t aRailHandle, - sl_rail_rx_packet_info_t *packetInfoForEnhAck, - uint32_t rxTimestamp, - uint8_t *initialPktReadBytes, - uint8_t *receivedPsdu) -{ - // RAIL will generate an Immediate ACK for us. - // For an Enhanced ACK, we need to generate the whole packet ourselves. - - // An 802.15.4 packet from RAIL should look like: - // 1/2 | 1/2 | 0/1 | 0/2 | 0/2/8 | 0/2 | 0/2/8 | 14 - // PHR | MacFCF | Seq# | DstPan | DstAdr | SrcPan | SrcAdr | SecHdr - - // With sl_rail_ieee802154_enable_early_frame_pending(), SL_RAIL_EVENT_IEEE802154_DATA_REQUEST_COMMAND - // is triggered after receiving through the SrcAdr field of Version 0/1 packets, - // and after receiving through the SecHdr for Version 2 packets. - - otRadioFrame receivedFrame, enhAckFrame; - uint8_t enhAckPsdu[IEEE802154_MAX_LENGTH]; - -#define EARLY_FRAME_PENDING_EXPECTED_BYTES (2U + 2U + 1U + 2U + 8U + 2U + 8U + 14U) -#define FINAL_PACKET_LENGTH_WITH_IE (EARLY_FRAME_PENDING_EXPECTED_BYTES + OT_ACK_IE_MAX_SIZE) - - otEXPECT((packetInfoForEnhAck != NULL) && (initialPktReadBytes != NULL) && (receivedPsdu != NULL)); - - *initialPktReadBytes = readInitialPacketData(packetInfoForEnhAck, - EARLY_FRAME_PENDING_EXPECTED_BYTES, - (PHY_HEADER_SIZE + 2), - receivedPsdu, - FINAL_PACKET_LENGTH_WITH_IE); - - uint8_t iid = INVALID_INTERFACE_INDEX; - - if (*initialPktReadBytes == 0U) - { - return true; // Nothing to read, which means generating an immediate ACK is also pointless - } - - receivedFrame.mPsdu = receivedPsdu + PHY_HEADER_SIZE; - // This should be set to the expected length of the packet is being received. - // We consider this while calculating the phase value below. - receivedFrame.mLength = packetInfoForEnhAck->p_first_portion_data[0]; - enhAckFrame.mPsdu = enhAckPsdu + PHY_HEADER_SIZE; - - if (!otMacFrameIsVersion2015(&receivedFrame)) - { - return false; - } - - otMacAddress aSrcAddress; - uint8_t linkMetricsDataLen = 0; - uint8_t *dataPtr = NULL; - bool setFramePending = false; - - iid = getIidFromFilterMask(packetInfoForEnhAck->filter_mask); - - otMacFrameGetSrcAddr(&receivedFrame, &aSrcAddress); - - if (sIsSrcMatchEnabled && (aSrcAddress.mType != OT_MAC_ADDRESS_TYPE_NONE)) - { - setFramePending = (aSrcAddress.mType == OT_MAC_ADDRESS_TYPE_EXTENDED - ? (utilsSoftSrcMatchExtFindEntry(iid, &aSrcAddress.mAddress.mExtAddress) >= 0) - : (utilsSoftSrcMatchShortFindEntry(iid, aSrcAddress.mAddress.mShortAddress) >= 0)); - } - - // Generate our IE header. - // Write IE data for enhanced ACK (link metrics + allocate bytes for CSL) - -#if OPENTHREAD_CONFIG_MLE_LINK_METRICS_SUBJECT_ENABLE - uint8_t linkMetricsData[OT_ENH_PROBING_IE_DATA_MAX_SIZE]; - - linkMetricsDataLen = otLinkMetricsEnhAckGenData(&aSrcAddress, sLastLqi, sLastRssi, linkMetricsData); - - if (linkMetricsDataLen > 0) - { - dataPtr = linkMetricsData; - } -#endif - - sAckIeDataLength = generateAckIeData(dataPtr, linkMetricsDataLen); - - otEXPECT(otMacFrameGenerateEnhAck(&receivedFrame, setFramePending, sAckIeData, sAckIeDataLength, &enhAckFrame) - == OT_ERROR_NONE); - -#if OPENTHREAD_CONFIG_MAC_CSL_RECEIVER_ENABLE - if (sCslPeriod > 0) - { - // Calculate time in the future where the SHR is done being sent out - uint32_t ackShrDoneTime = // Currently partially received packet's SHR time - (rxTimestamp - - (packetInfoForEnhAck->packet_bytes * OT_RADIO_SYMBOL_TIME * 2) - // PHR of this packet - + (PHY_HEADER_SIZE * OT_RADIO_SYMBOL_TIME * 2) - // Received frame's expected time in the PHR - + (receivedFrame.mLength * OT_RADIO_SYMBOL_TIME * 2) - // rxToTx turnaround time - + sRailIeee802154Config.timings.rx_to_tx - // PHR time of the ACK - + (PHY_HEADER_SIZE * OT_RADIO_SYMBOL_TIME * 2) - // SHR time of the ACK - + (SHR_SIZE * OT_RADIO_SYMBOL_TIME * 2)); - - // Update IE data in the 802.15.4 header with the newest CSL period / phase - otMacFrameSetCslIe(&enhAckFrame, (uint16_t)sCslPeriod, getCslPhase(ackShrDoneTime)); - } -#else - OT_UNUSED_VARIABLE(rxTimestamp); -#endif - - if (otMacFrameIsSecurityEnabled(&enhAckFrame)) - { - otEXPECT(radioProcessTransmitSecurity(&enhAckFrame, iid) == OT_ERROR_NONE); - } - - // Before we're done, store some important info in reserved bits in the - // MAC header (cleared later) - // Check whether frame pending is set. - // Check whether enhanced ACK is secured. - otEXPECT((skipRxPacketLengthBytes(packetInfoForEnhAck)) == OT_ERROR_NONE); - uint8_t *macFcfPointer = - ((packetInfoForEnhAck->first_portion_bytes == 0) ? packetInfoForEnhAck->p_last_portion_data - : packetInfoForEnhAck->p_first_portion_data); - - if (otMacFrameIsSecurityEnabled(&enhAckFrame)) - { - *macFcfPointer |= IEEE802154_SECURED_OUTGOING_ENHANCED_ACK; - } - - if (setFramePending) - { - *macFcfPointer |= IEEE802154_FRAME_PENDING_SET_IN_OUTGOING_ACK; - } - - // Fill in PHR now that we know Enh-ACK's length - if (PHY_HEADER_SIZE == 2U) - { // Not true till SubGhz implementation is in place - enhAckPsdu[0] = (0x08U /*FCS=2byte*/ | 0x10U /*Whiten=enabled*/); - enhAckPsdu[1] = (uint8_t)(__RBIT(enhAckFrame.mLength) >> 24); - } - else - { - enhAckPsdu[0] = enhAckFrame.mLength; - } - - sl_rail_status_t enhAckStatus = sl_rail_ieee802154_write_enh_ack(aRailHandle, enhAckPsdu, enhAckFrame.mLength); -#if RADIO_CONFIG_DEBUG_COUNTERS_SUPPORT - otEXPECT_ACTION(enhAckStatus == SL_RAIL_STATUS_NO_ERROR, railDebugCounters.mRailEventsEnhAckTxFailed++); -#else - otEXPECT(enhAckStatus == SL_RAIL_STATUS_NO_ERROR); -#endif - -exit: - return true; -} -#endif // (OPENTHREAD_CONFIG_THREAD_VERSION >= OT_THREAD_VERSION_1_2) - -//------------------------------------------------------------------------------ -// RAIL callbacks - -SL_CODE_CLASSIFY(SL_CODE_COMPONENT_OT_PLATFORM_ABSTRACTION, SL_CODE_CLASS_TIME_CRITICAL) -static void dataRequestCommandCallback(sl_rail_handle_t aRailHandle) -{ -#define MAX_EXPECTED_BYTES (2U + 2U + 1U) // PHR + FCF + DSN - - uint8_t receivedPsdu[IEEE802154_MAX_LENGTH]; - uint8_t pktOffset = PHY_HEADER_SIZE; - uint8_t initialPktReadBytes; - sl_rail_rx_packet_info_t packetInfo; - uint32_t rxCallbackTimestamp = otPlatAlarmMicroGetNow(); - - // This callback occurs after the address fields of an incoming - // ACK-requesting CMD or DATA frame have been received and we - // can do a frame pending check. We must also figure out what - // kind of ACK is being requested -- Immediate or Enhanced. - -#if (OPENTHREAD_CONFIG_THREAD_VERSION >= OT_THREAD_VERSION_1_2) - if (writeIeee802154EnhancedAck(aRailHandle, &packetInfo, rxCallbackTimestamp, &initialPktReadBytes, receivedPsdu)) - { - // We also return true above if there were failures in - // generating an enhanced ACK. - return; - } -#else - OT_UNUSED_VARIABLE(rxCallbackTimestamp); - initialPktReadBytes = - readInitialPacketData(&packetInfo, MAX_EXPECTED_BYTES, pktOffset + 2, receivedPsdu, MAX_EXPECTED_BYTES); -#endif - - // Calculate frame pending for immediate-ACK - // If not, RAIL will send an immediate ACK, but we need to do FP lookup. - sl_rail_status_t status = SL_RAIL_STATUS_NO_ERROR; - - // Check if we read the FCF, if not, set macFcf to 0 - uint16_t macFcf = (initialPktReadBytes <= pktOffset) ? 0U : receivedPsdu[pktOffset]; - - bool framePendingSet = false; - - if (sIsSrcMatchEnabled) - { - sl_rail_ieee802154_address_t sourceAddress; - - status = sl_rail_ieee802154_get_address(aRailHandle, &sourceAddress); - otEXPECT(status == SL_RAIL_STATUS_NO_ERROR); - - uint8_t iid = getIidFromFilterMask(packetInfo.filter_mask); - if ((sourceAddress.address_length == SL_RAIL_IEEE802154_LONG_ADDRESS - && utilsSoftSrcMatchExtFindEntry(iid, (otExtAddress *)sourceAddress.long_address) >= 0) - || (sourceAddress.address_length == SL_RAIL_IEEE802154_SHORT_ADDRESS - && utilsSoftSrcMatchShortFindEntry(iid, sourceAddress.short_address) >= 0)) - { - status = sl_rail_ieee802154_toggle_frame_pending(aRailHandle); - otEXPECT(status == SL_RAIL_STATUS_NO_ERROR); - framePendingSet = true; - } - } - else if ((macFcf & IEEE802154_FRAME_TYPE_MASK) != IEEE802154_FRAME_TYPE_DATA) - { - status = sl_rail_ieee802154_toggle_frame_pending(aRailHandle); - otEXPECT(status == SL_RAIL_STATUS_NO_ERROR); - framePendingSet = true; - } - - if (framePendingSet) - { - // Store whether frame pending was set in the outgoing ACK in a reserved - // bit of the MAC header (cleared later) - - otEXPECT((skipRxPacketLengthBytes(&packetInfo)) == OT_ERROR_NONE); - uint8_t *macFcfPointer = - ((packetInfo.first_portion_bytes == 0) ? packetInfo.p_last_portion_data : packetInfo.p_first_portion_data); - *macFcfPointer |= IEEE802154_FRAME_PENDING_SET_IN_OUTGOING_ACK; - } - -exit: - if (status == SL_RAIL_STATUS_INVALID_STATE) - { - otLogWarnPlat("Too late to modify outgoing FP"); - } - else - { - OT_ASSERT(status == SL_RAIL_STATUS_NO_ERROR); - } -} - -SL_CODE_CLASSIFY(SL_CODE_COMPONENT_OT_PLATFORM_ABSTRACTION, SL_CODE_CLASS_TIME_CRITICAL) -static void packetReceivedCallback(void) -{ - sl_rail_rx_packet_info_t packetInfo; - sl_rail_rx_packet_details_t packetDetails; - uint16_t length = 0; - bool framePendingInAck = false; - bool dropPacket = false; - uint8_t iid = 0; - sl_status_t status; - bool isRxPacketQueued; - rxBuffer *rxPacketBuf = NULL; - - sl_rail_rx_packet_handle_t packetHandle = - sl_rail_get_rx_packet_info(gRailHandle, SL_RAIL_RX_PACKET_HANDLE_NEWEST, &packetInfo); - otEXPECT_ACTION((packetHandle != SL_RAIL_RX_PACKET_HANDLE_INVALID - && packetInfo.packet_status == SL_RAIL_RX_PACKET_READY_SUCCESS), - dropPacket = true); - - otEXPECT_ACTION(validatePacketDetails(packetHandle, &packetDetails, &packetInfo, &length), dropPacket = true); - - otEXPECT_ACTION((skipRxPacketLengthBytes(&packetInfo)) == OT_ERROR_NONE, dropPacket = true); - - uint8_t macFcf = ((packetInfo.first_portion_bytes == 0) ? packetInfo.p_last_portion_data[0] - : packetInfo.p_first_portion_data[0]); - - iid = getIidFromFilterMask(packetInfo.filter_mask); - - if (packetDetails.is_ack) - { - otEXPECT_ACTION( - (length >= IEEE802154_MIN_LENGTH && (macFcf & IEEE802154_FRAME_TYPE_MASK) == IEEE802154_FRAME_TYPE_ACK), - dropPacket = true); - - // read packet - sl_rail_copy_rx_packet(gRailHandle, sReceiveAck.frame.mPsdu, &packetInfo); - -#if RADIO_CONFIG_DEBUG_COUNTERS_SUPPORT - railDebugCounters.mRailEventAcksReceived++; -#endif - sReceiveAck.frame.mLength = length; - - (void)handlePhyStackEvent(SL_RAIL_UTIL_IEEE802154_STACK_EVENT_RX_ENDED, (uint32_t)isReceivingFrame()); - - if (txWaitingForAck() - && (sReceiveAck.frame.mPsdu[IEEE802154_DSN_OFFSET] == sCurrentTxPacket->frame.mPsdu[IEEE802154_DSN_OFFSET])) - { - otEXPECT_ACTION(validatePacketTimestamp(&packetDetails, length), dropPacket = true); - - sReceiveAck.frame.mInfo.mRxInfo.mRssi = packetDetails.rssi_dbm; - sReceiveAck.frame.mInfo.mRxInfo.mLqi = packetDetails.lqi; - sReceiveAck.iid = iid; - updateRxFrameTimestamp(true, packetDetails.time_received.packet_time); - - // Processing the ACK frame in ISR context avoids the Tx state to be messed up, - // in case the Rx FIFO queue gets wiped out in a DMP situation. - setInternalFlag(EVENT_TX_SUCCESS, true); - setInternalFlag(FLAG_WAITING_FOR_ACK | FLAG_ONGOING_TX_DATA | EVENT_SCHEDULED_TX_STARTED, false); - - framePendingInAck = ((macFcf & IEEE802154_FRAME_FLAG_FRAME_PENDING) != 0); - (void)handlePhyStackEvent(SL_RAIL_UTIL_IEEE802154_STACK_EVENT_TX_ACK_RECEIVED, (uint32_t)framePendingInAck); - - if (txIsDataRequest() && framePendingInAck) - { - emPendingData = true; - } - } - // Yield the radio upon receiving an ACK as long as it is not related to - // a data request. - if (!txIsDataRequest()) - { - sl_rail_yield_radio(gRailHandle); - } - } - else - { - otEXPECT_ACTION(sPromiscuous || (length >= IEEE802154_MIN_DATA_LENGTH), dropPacket = true); - - otEXPECT_ACTION(validatePacketTimestamp(&packetDetails, length), dropPacket = true); - - // Drop the packet if queue is full. - otEXPECT_ACTION(!queueIsFull(&sRxPacketQueue), dropPacket = true); - // Allocate a block from memory pool for the received packet. - status = sl_memory_pool_alloc(&sRxPacketMemPoolHandle, (void **)&rxPacketBuf); - // Drop the packet if no more memory block present in the pool to store it. - otEXPECT_ACTION(status == SL_STATUS_OK && rxPacketBuf != NULL, dropPacket = true); - - // read packet - sl_rail_copy_rx_packet(gRailHandle, rxPacketBuf->psdu, &packetInfo); - - rxPacketBuf->packetInfo.length = (uint8_t)length; - rxPacketBuf->packetInfo.channel = (uint8_t)packetDetails.channel; - rxPacketBuf->packetInfo.rssi = packetDetails.rssi_dbm; - rxPacketBuf->packetInfo.lqi = packetDetails.lqi; - rxPacketBuf->packetInfo.timestamp = packetDetails.time_received.packet_time; - rxPacketBuf->packetInfo.iid = iid; - - // Queue the rx packet or drop it if queueing fails and free the memory block. - isRxPacketQueued = queueAdd(&sRxPacketQueue, (void *)rxPacketBuf); - otEXPECT_ACTION(isRxPacketQueued, dropPacket = true); - -#if RADIO_CONFIG_DEBUG_COUNTERS_SUPPORT - railDebugCounters.mRailPlatRadioReceiveProcessedCount++; -#endif - - if (macFcf & IEEE802154_FRAME_FLAG_ACK_REQUIRED) - { - (void)handlePhyStackEvent((sl_rail_is_rx_auto_ack_paused(gRailHandle) - ? SL_RAIL_UTIL_IEEE802154_STACK_EVENT_RX_ACK_BLOCKED - : SL_RAIL_UTIL_IEEE802154_STACK_EVENT_RX_ACKING), - (uint32_t)isReceivingFrame()); - setInternalFlag(FLAG_ONGOING_TX_ACK, true); - } - else - { - (void)handlePhyStackEvent(SL_RAIL_UTIL_IEEE802154_STACK_EVENT_RX_ENDED, (uint32_t)isReceivingFrame()); - // We received a frame that does not require an ACK as result of a data - // poll: we yield the radio here. - if (emPendingData) - { - sl_rail_yield_radio(gRailHandle); - emPendingData = false; - } - } - } -exit: - if (dropPacket) - { - (void)handlePhyStackEvent(SL_RAIL_UTIL_IEEE802154_STACK_EVENT_RX_CORRUPTED, (uint32_t)isReceivingFrame()); - - IgnoreError(sl_memory_pool_free(&sRxPacketMemPoolHandle, rxPacketBuf)); - } -} - -SL_CODE_CLASSIFY(SL_CODE_COMPONENT_OT_PLATFORM_ABSTRACTION, SL_CODE_CLASS_TIME_CRITICAL) -static void packetSentCallback(bool isAck) -{ - if (isAck) - { - // We successfully sent out an ACK. - setInternalFlag(FLAG_ONGOING_TX_ACK, false); - // We acked the packet we received after a poll: we can yield now. - if (emPendingData) - { - sl_rail_yield_radio(gRailHandle); - emPendingData = false; - } - } - else if (getInternalFlag(FLAG_ONGOING_TX_DATA)) - { - setInternalFlag(FLAG_CURRENT_TX_USE_CSMA, false); - - if (txWaitingForAck()) - { - setInternalFlag(FLAG_WAITING_FOR_ACK, true); - (void)handlePhyStackEvent(SL_RAIL_UTIL_IEEE802154_STACK_EVENT_TX_ACK_WAITING, 0U); - } - else - { - (void)handlePhyStackEvent(SL_RAIL_UTIL_IEEE802154_STACK_EVENT_TX_ENDED, 0U); - sl_rail_yield_radio(gRailHandle); - setInternalFlag(EVENT_TX_SUCCESS, true); - // Broadcast packet clear the ONGOING flag here. - setInternalFlag(FLAG_ONGOING_TX_DATA | EVENT_SCHEDULED_TX_STARTED, false); - } -#if RADIO_CONFIG_DEBUG_COUNTERS_SUPPORT - railDebugCounters.mRailEventPacketSent++; -#endif - } -} - -SL_CODE_CLASSIFY(SL_CODE_COMPONENT_OT_PLATFORM_ABSTRACTION, SL_CODE_CLASS_TIME_CRITICAL) -static void txFailedCallback(bool isAck, uint32_t status) -{ - if (isAck) - { - setInternalFlag(FLAG_ONGOING_TX_ACK, false); - } - else if (getInternalFlag(FLAG_ONGOING_TX_DATA)) - { - if (status == EVENT_TX_CCA_FAILED) - { - setInternalFlag(EVENT_TX_CCA_FAILED, true); - setInternalFlag(FLAG_CURRENT_TX_USE_CSMA, false); -#if RADIO_CONFIG_DEBUG_COUNTERS_SUPPORT - railDebugCounters.mRailEventChannelBusy++; -#endif - } - else - { - setInternalFlag(EVENT_TX_FAILED, true); -#if RADIO_CONFIG_DEBUG_COUNTERS_SUPPORT - railDebugCounters.mRailEventTxAbort++; -#endif - } - setInternalFlag((FLAG_ONGOING_TX_DATA | FLAG_WAITING_FOR_ACK | EVENT_SCHEDULED_TX_STARTED), false); - sl_rail_yield_radio(gRailHandle); - } -} - -SL_CODE_CLASSIFY(SL_CODE_COMPONENT_OT_PLATFORM_ABSTRACTION, SL_CODE_CLASS_TIME_CRITICAL) -static void ackTimeoutCallback(void) -{ - OT_ASSERT(txWaitingForAck()); - OT_ASSERT(getInternalFlag(FLAG_WAITING_FOR_ACK)); - - setInternalFlag(EVENT_TX_NO_ACK, true); - setInternalFlag(FLAG_ONGOING_TX_DATA | EVENT_SCHEDULED_TX_STARTED, false); - -#if RADIO_CONFIG_DEBUG_COUNTERS_SUPPORT - railDebugCounters.mRailEventNoAck++; -#endif - -#ifdef SL_CATALOG_RAIL_UTIL_ANT_DIV_PRESENT - // If antenna diversity is enabled toggle the selected antenna. - sl_rail_util_ant_div_toggle_tx_antenna(); -#endif // SL_CATALOG_RAIL_UTIL_ANT_DIV_PRESENT - // TO DO: Check if we have an OT function that - // provides the number of mac retry attempts left - (void)handlePhyStackEvent(SL_RAIL_UTIL_IEEE802154_STACK_EVENT_TX_ACK_TIMEDOUT, 0); - - setInternalFlag(FLAG_WAITING_FOR_ACK, false); - sl_rail_yield_radio(gRailHandle); - emPendingData = false; -} - -SL_CODE_CLASSIFY(SL_CODE_COMPONENT_OT_PLATFORM_ABSTRACTION, SL_CODE_CLASS_TIME_CRITICAL) -static void schedulerEventCallback(sl_rail_handle_t aRailHandle) -{ - sl_rail_scheduler_status_t scheduler_status; - sl_rail_status_t rail_status; - sl_rail_get_scheduler_status(aRailHandle, &scheduler_status, &rail_status); - if (scheduler_status != SL_RAIL_SCHEDULER_STATUS_NO_ERROR) - { - setInternalFlag(FLAG_SCHEDULED_RX_PENDING | FLAG_SCHEDULED_TX_PENDING | EVENT_SCHEDULED_TX_STARTED, false); - if (getInternalFlag(FLAG_ONGOING_TX_ACK)) - { - (void)handlePhyStackEvent(SL_RAIL_UTIL_IEEE802154_STACK_EVENT_RX_ACK_ABORTED, (uint32_t)isReceivingFrame()); - txFailedCallback(true, EVENT_TX_FAILED); - } - // We were in the process of TXing a data frame, treat it as a CCA_FAIL. - if (getInternalFlag(FLAG_ONGOING_TX_DATA)) - { - (void)handlePhyStackEvent(SL_RAIL_UTIL_IEEE802154_STACK_EVENT_TX_BLOCKED, (uint32_t)txWaitingForAck()); - txFailedCallback(false, EVENT_TX_CCA_FAILED); - } - // We are waiting for an ACK: we will never get the ACK we were waiting for. - // We want to call ackTimeoutCallback() only if the PACKET_SENT event - // already fired (which would clear the FLAG_ONGOING_TX_DATA flag). - if (getInternalFlag(FLAG_WAITING_FOR_ACK)) - { - ackTimeoutCallback(); - } - -#if RADIO_CONFIG_DEBUG_COUNTERS_SUPPORT - railDebugCounters.mRailEventSchedulerStatusError++; -#endif - } -} - -SL_CODE_CLASSIFY(SL_CODE_COMPONENT_OT_PLATFORM_ABSTRACTION, SL_CODE_CLASS_TIME_CRITICAL) -static void RAILCb_Generic(sl_rail_handle_t aRailHandle, sl_rail_events_t aEvents) -{ -#ifdef SL_CATALOG_RAIL_UTIL_IEEE802154_STACK_EVENT_PRESENT - if (aEvents & (SL_RAIL_EVENT_RX_SYNC_0_DETECT | SL_RAIL_EVENT_RX_SYNC_1_DETECT)) - { - (void)handlePhyStackEvent(SL_RAIL_UTIL_IEEE802154_STACK_EVENT_RX_STARTED, (uint32_t)isReceivingFrame()); - } -#endif // SL_CATALOG_RAIL_UTIL_IEEE802154_STACK_EVENT_PRESENT - -#ifdef SL_CATALOG_RAIL_UTIL_COEX_PRESENT - if (aEvents & SL_RAIL_EVENT_SIGNAL_DETECTED) - { - (void)handlePhyStackEvent(SL_RAIL_UTIL_IEEE802154_STACK_EVENT_SIGNAL_DETECTED, 0U); - } -#endif // SL_CATALOG_RAIL_UTIL_COEX_PRESENT - - if ((aEvents & SL_RAIL_EVENT_IEEE802154_DATA_REQUEST_COMMAND) -#ifdef SL_CATALOG_RAIL_UTIL_COEX_PRESENT - && !sl_rail_is_rx_auto_ack_paused(aRailHandle) -#endif // SL_CATALOG_RAIL_UTIL_COEX_PRESENT - ) - { - dataRequestCommandCallback(aRailHandle); - } - -#ifdef SL_CATALOG_RAIL_UTIL_IEEE802154_STACK_EVENT_PRESENT - if (aEvents & SL_RAIL_EVENT_RX_FILTER_PASSED) - { - (void)handlePhyStackEvent(SL_RAIL_UTIL_IEEE802154_STACK_EVENT_RX_ACCEPTED, (uint32_t)isReceivingFrame()); - } -#endif // SL_CATALOG_RAIL_UTIL_IEEE802154_STACK_EVENT_PRESENT - - if (aEvents & SL_RAIL_EVENT_TX_PACKET_SENT) - { - packetSentCallback(false); - } - else if (aEvents & SL_RAIL_EVENT_TX_CHANNEL_BUSY) - { - (void)handlePhyStackEvent(SL_RAIL_UTIL_IEEE802154_STACK_EVENT_TX_BLOCKED, (uint32_t)txWaitingForAck()); - txFailedCallback(false, EVENT_TX_CCA_FAILED); - } - else if (aEvents & SL_RAIL_EVENT_TX_BLOCKED) - { - (void)handlePhyStackEvent(SL_RAIL_UTIL_IEEE802154_STACK_EVENT_TX_BLOCKED, (uint32_t)txWaitingForAck()); - txFailedCallback(false, EVENT_TX_FAILED); - } - else if (aEvents & (SL_RAIL_EVENT_TX_UNDERFLOW | SL_RAIL_EVENT_TX_ABORTED)) - { - (void)handlePhyStackEvent(SL_RAIL_UTIL_IEEE802154_STACK_EVENT_TX_ABORTED, (uint32_t)txWaitingForAck()); - txFailedCallback(false, EVENT_TX_FAILED); - } - else - { - // Pre-completion aEvents are processed in their logical order: -#ifdef SL_CATALOG_RAIL_UTIL_IEEE802154_STACK_EVENT_PRESENT - if (aEvents & SL_RAIL_EVENT_TX_START_CCA) - { - // We are starting RXWARM for a CCA check - (void)handlePhyStackEvent(SL_RAIL_UTIL_IEEE802154_STACK_EVENT_TX_CCA_SOON, 0U); - } - if (aEvents & SL_RAIL_EVENT_TX_CCA_RETRY) - { - // We failed a CCA check and need to retry - (void)handlePhyStackEvent(SL_RAIL_UTIL_IEEE802154_STACK_EVENT_TX_CCA_BUSY, 0U); - } - if (aEvents & SL_RAIL_EVENT_TX_CHANNEL_CLEAR) - { - // We're going on-air - (void)handlePhyStackEvent(SL_RAIL_UTIL_IEEE802154_STACK_EVENT_TX_STARTED, 0U); - } -#endif // SL_CATALOG_RAIL_UTIL_IEEE802154_STACK_EVENT_PRESENT - } - -#if OPENTHREAD_CONFIG_THREAD_VERSION >= OT_THREAD_VERSION_1_2 - - // Note: SL_RAIL_EVENT_TX_SCHEDULED_TX_STARTED and SL_RAIL_EVENT_RX_SCHEDULED_RX_STARTED have the - // same numerical value because one cannot schedule both RX and TX simultaneously. - // Have to take due care to check for these statuses depending on whether we're - // scheduling a transmit or receive. Therefore, we're using an internal flag - // 'FLAG_SCHEDULED_RX_PENDING' to track our scheduled-receive state. - - if (getInternalFlag(FLAG_SCHEDULED_RX_PENDING)) - { - if (aEvents & SL_RAIL_EVENT_RX_SCHEDULED_RX_STARTED) - { - setInternalFlag(EVENT_SCHEDULED_RX_STARTED, true); - } - - // Once done with scheduled receive, clear internal scheduled-rx flag and idle. - // If we miss a scheduled receive, let application schedule another. - if (aEvents & SL_RAIL_EVENT_RX_SCHEDULED_RX_END || aEvents & SL_RAIL_EVENT_RX_SCHEDULED_RX_MISSED) - { - setInternalFlag(FLAG_SCHEDULED_RX_PENDING | EVENT_SCHEDULED_RX_STARTED, false); - radioSetIdle(); - } - } - else - { - if (aEvents & SL_RAIL_EVENT_TX_SCHEDULED_TX_STARTED) - { - setInternalFlag(EVENT_SCHEDULED_TX_STARTED, true); - setInternalFlag(FLAG_SCHEDULED_TX_PENDING, false); -#if RADIO_CONFIG_DEBUG_COUNTERS_SUPPORT - railDebugCounters.mRailEventsScheduledTxStartedCount++; -#endif - } - else if (aEvents & SL_RAIL_EVENT_TX_SCHEDULED_TX_MISSED) - { - setInternalFlag(FLAG_SCHEDULED_TX_PENDING, false); - txFailedCallback(false, EVENT_TX_SCHEDULER_ERROR); - } - } -#endif // OPENTHREAD_CONFIG_THREAD_VERSION >= OT_THREAD_VERSION_1_2 - - if (aEvents & SL_RAIL_EVENT_RX_PACKET_RECEIVED) - { - packetReceivedCallback(); -#if RADIO_CONFIG_DEBUG_COUNTERS_SUPPORT - railDebugCounters.mRailEventPacketReceived++; -#endif - } - -#ifdef SL_CATALOG_RAIL_UTIL_IEEE802154_STACK_EVENT_PRESENT - if (aEvents & SL_RAIL_EVENT_RX_FRAME_ERROR) - { - (void)handlePhyStackEvent(SL_RAIL_UTIL_IEEE802154_STACK_EVENT_RX_CORRUPTED, (uint32_t)isReceivingFrame()); - } - // The following 3 events cause us to not receive a packet - if (aEvents - & (SL_RAIL_EVENT_RX_PACKET_ABORTED | SL_RAIL_EVENT_RX_ADDRESS_FILTERED | SL_RAIL_EVENT_RX_FIFO_OVERFLOW)) - { - (void)handlePhyStackEvent(SL_RAIL_UTIL_IEEE802154_STACK_EVENT_RX_FILTERED, (uint32_t)isReceivingFrame()); - } -#endif // SL_CATALOG_RAIL_UTIL_IEEE802154_STACK_EVENT_PRESENT - - if (aEvents & SL_RAIL_EVENT_TXACK_PACKET_SENT) - { - (void)handlePhyStackEvent(SL_RAIL_UTIL_IEEE802154_STACK_EVENT_RX_ACK_SENT, (uint32_t)isReceivingFrame()); - packetSentCallback(true); - } - if (aEvents & (SL_RAIL_EVENT_TXACK_ABORTED | SL_RAIL_EVENT_TXACK_UNDERFLOW)) - { - (void)handlePhyStackEvent(SL_RAIL_UTIL_IEEE802154_STACK_EVENT_RX_ACK_ABORTED, (uint32_t)isReceivingFrame()); - txFailedCallback(true, 0xFF); - } - if (aEvents & SL_RAIL_EVENT_TXACK_BLOCKED) - { - (void)handlePhyStackEvent(SL_RAIL_UTIL_IEEE802154_STACK_EVENT_RX_ACK_BLOCKED, (uint32_t)isReceivingFrame()); - txFailedCallback(true, 0xFF); - } - // Deal with ACK timeout after possible RX completion in case RAIL - // notifies us of the ACK and the timeout simultaneously -- we want - // the ACK to win over the timeout. - if ((aEvents & SL_RAIL_EVENT_RX_ACK_TIMEOUT) && (getInternalFlag(FLAG_WAITING_FOR_ACK))) - { - ackTimeoutCallback(); - } - - if (aEvents & SL_RAIL_EVENT_CONFIG_UNSCHEDULED) - { - (void)handlePhyStackEvent(SL_RAIL_UTIL_IEEE802154_STACK_EVENT_RX_IDLED, 0U); -#if RADIO_CONFIG_DEBUG_COUNTERS_SUPPORT - railDebugCounters.mRailEventConfigUnScheduled++; -#endif - } - - if (aEvents & SL_RAIL_EVENT_CONFIG_SCHEDULED) - { -#if RADIO_CONFIG_DEBUG_COUNTERS_SUPPORT - railDebugCounters.mRailEventConfigScheduled++; -#endif - } - - if (aEvents & SL_RAIL_EVENT_SCHEDULER_STATUS) - { - schedulerEventCallback(aRailHandle); - } - - if (aEvents & SL_RAIL_EVENT_CAL_NEEDED) - { - sl_rail_status_t status; - - status = sl_rail_calibrate(aRailHandle, NULL, SL_RAIL_CAL_ALL_PENDING); - // TODO: Non-RTOS DMP case fails -#if (!defined(SL_CATALOG_BLUETOOTH_PRESENT) || defined(SL_CATALOG_KERNEL_PRESENT)) - // TEMPORARY - this asserts on Mux - OT_ASSERT(status == SL_RAIL_STATUS_NO_ERROR); - OT_UNUSED_VARIABLE(status); -#else - OT_UNUSED_VARIABLE(status); -#endif - -#if RADIO_CONFIG_DEBUG_COUNTERS_SUPPORT - railDebugCounters.mRailEventCalNeeded++; -#endif - } - - // scheduled and unscheduled config events happen very often, - // especially in a DMP situation where there is an active BLE connection. - // Waking up the OT RTOS task on every one of these occurrences causes - // a lower priority Serial task to starve and makes it appear like a code lockup - // There is no reason to wake the OT task for these events! - if (!(aEvents & SL_RAIL_EVENT_CONFIG_SCHEDULED) && !(aEvents & SL_RAIL_EVENT_CONFIG_UNSCHEDULED)) - { - otSysEventSignalPending(); - } -} - -//------------------------------------------------------------------------------ -// Main thread packet handling - -SL_CODE_CLASSIFY(SL_CODE_COMPONENT_OT_PLATFORM_ABSTRACTION, SL_CODE_CLASS_TIME_CRITICAL) -static bool validatePacketDetails(sl_rail_rx_packet_handle_t packetHandle, - sl_rail_rx_packet_details_t *pPacketDetails, - sl_rail_rx_packet_info_t *pPacketInfo, - uint16_t *packetLength) -{ - bool pktValid = true; - sl_rail_status_t rStatus; -#if RADIO_CONFIG_DEBUG_COUNTERS_SUPPORT - rxDebugStep = 0; -#endif - - rStatus = sl_rail_get_rx_packet_details(gRailHandle, packetHandle, pPacketDetails); - otEXPECT_ACTION(rStatus == SL_RAIL_STATUS_NO_ERROR, pktValid = false); -#if RADIO_CONFIG_DEBUG_COUNTERS_SUPPORT - rxDebugStep++; -#endif - - otEXPECT_ACTION(isFilterMaskValid(pPacketInfo->filter_mask), pktValid = false); -#if RADIO_CONFIG_DEBUG_COUNTERS_SUPPORT - rxDebugStep++; -#endif - - // RAIL's packetBytes includes the (1 or 2 byte) PHY header but not the 2-byte CRC. - // We want *packetLength to match the PHY header length so we add 2 for CRC - // and subtract the PHY header size. - *packetLength = pPacketInfo->packet_bytes + 2U - PHY_HEADER_SIZE; - - if (PHY_HEADER_SIZE == 1) - { - otEXPECT_ACTION(*packetLength == pPacketInfo->p_first_portion_data[0], pktValid = false); - } - else - { - uint8_t lengthByte = ((pPacketInfo->first_portion_bytes > 1) ? pPacketInfo->p_first_portion_data[1] - : pPacketInfo->p_last_portion_data[0]); - otEXPECT_ACTION(*packetLength == (uint16_t)(__RBIT(lengthByte) >> 24), pktValid = false); - } -#if RADIO_CONFIG_DEBUG_COUNTERS_SUPPORT - rxDebugStep++; -#endif - - // check the length validity of recv packet; RAIL should take care of this. - otEXPECT_ACTION((*packetLength >= IEEE802154_MIN_LENGTH && *packetLength <= IEEE802154_MAX_LENGTH), - pktValid = false); -#if RADIO_CONFIG_DEBUG_COUNTERS_SUPPORT - rxDebugStep++; -#endif - -exit: -#if (OPENTHREAD_CONFIG_LOG_LEVEL == OT_LOG_LEVEL_DEBG) - if (!pktValid) - { - otLogDebgPlat("RX Pkt Invalid: rStatus=0x%lX, filterMask=0x%2X, pktLen=%i", - rStatus, - pPacketInfo->filter_mask, - *packetLength); -#if RADIO_CONFIG_DEBUG_COUNTERS_SUPPORT - otLogDebgPlat("RX debug step=%i", rxDebugStep); -#endif - } -#endif - return pktValid; -} - -SL_CODE_CLASSIFY(SL_CODE_COMPONENT_OT_PLATFORM_ABSTRACTION, SL_CODE_CLASS_TIME_CRITICAL) -static bool validatePacketTimestamp(sl_rail_rx_packet_details_t *pPacketDetails, uint16_t packetLength) -{ - bool rxTimestampValid = true; - - // Get the timestamp when the SFD was received - otEXPECT_ACTION(pPacketDetails->time_received.time_position != SL_RAIL_PACKET_TIME_INVALID, - rxTimestampValid = false); - - // + PHY HEADER SIZE for PHY header - // We would not need this if PHR is not included and we want the MHR - pPacketDetails->time_received.total_packet_bytes = packetLength + PHY_HEADER_SIZE; - - otEXPECT_ACTION((sl_rail_get_rx_time_sync_word_end(gRailHandle, pPacketDetails) == SL_RAIL_STATUS_NO_ERROR), - rxTimestampValid = false); -exit: - return rxTimestampValid; -} - -otError otPlatMultipanGetActiveInstance(otInstance **aInstance) -{ - otError error = OT_ERROR_NOT_IMPLEMENTED; - OT_UNUSED_VARIABLE(aInstance); - - return error; -} - -otError otPlatMultipanSetActiveInstance(otInstance *aInstance, bool aCompletePending) -{ - otError error = OT_ERROR_NOT_IMPLEMENTED; - - OT_UNUSED_VARIABLE(aInstance); - OT_UNUSED_VARIABLE(aCompletePending); - - return error; -} - -SL_CODE_CLASSIFY(SL_CODE_COMPONENT_OT_PLATFORM_ABSTRACTION, SL_CODE_CLASS_TIME_CRITICAL) -static void updateRxFrameTimestamp(bool aIsAckFrame, sl_rail_time_t aTimestamp) -{ - // Current time > sync-receive timestamp - // Therefore lower 32 bits of current time should always be greater than lower 32 bits - // of sync-rx timestamp unless there is a overflow. In such cases, we do not want to - // take overflow into consideration for sync-rx timestamp. - uint64_t railUsTimeNow = otPlatTimeGet(); - uint32_t railUsTimerWraps = railUsTimeNow >> 32; - - // Address multiple overflows, such as what would happen if the current time overflows - // from 0x00000001FFFFFFFF to 0x0000000200000000 (leave the higher 32 bits as 0) - if ((railUsTimeNow & 0xFFFFFFFF) <= aTimestamp) - { - railUsTimerWraps--; - } - - if (aIsAckFrame) - { - sReceiveAck.frame.mInfo.mRxInfo.mTimestamp = aTimestamp + ((uint64_t)railUsTimerWraps << 32); - } - else - { - sReceive.frame.mInfo.mRxInfo.mTimestamp = aTimestamp + ((uint64_t)railUsTimerWraps << 32); - } -} - -SL_CODE_CLASSIFY(SL_CODE_COMPONENT_OT_PLATFORM_ABSTRACTION, SL_CODE_CLASS_TIME_CRITICAL) -static otError skipRxPacketLengthBytes(sl_rail_rx_packet_info_t *pPacketInfo) -{ - otError error = OT_ERROR_NONE; - otEXPECT_ACTION(pPacketInfo->first_portion_bytes > 0, error = OT_ERROR_FAILED); - - pPacketInfo->p_first_portion_data += PHY_HEADER_SIZE; - pPacketInfo->packet_bytes -= PHY_HEADER_SIZE; - - if (PHY_HEADER_SIZE == 1 || pPacketInfo->first_portion_bytes > 1) - { - pPacketInfo->first_portion_bytes -= PHY_HEADER_SIZE; - } - else - { - pPacketInfo->first_portion_bytes = 0U; - // Increment lastPortionData to skip the second byte of the PHY header - otEXPECT_ACTION(pPacketInfo->p_last_portion_data != NULL, error = OT_ERROR_FAILED); - pPacketInfo->p_last_portion_data++; - } - -exit: - return error; -} - -// This function dequeues the rx-queue, move the content to sReceive buffer -// and return the memory block which was used to store the received packet. -// So that memory block can be freed after submitting the receiveDone Callback. -static rxBuffer *prepareNextRxPacketforCb(void) -{ - rxBuffer *rxPacketBuf = (rxBuffer *)queueRemove(&sRxPacketQueue); - OT_ASSERT(rxPacketBuf != NULL); - uint8_t *psdu = rxPacketBuf->psdu; - - // Check the reserved bits in the MAC header, then clear them. - // If we sent an enhanced ACK, check if it was secured. - // Set this flag only when the packet is really acknowledged with a secured enhanced ACK. - sReceive.frame.mInfo.mRxInfo.mAckedWithSecEnhAck = ((*psdu & IEEE802154_SECURED_OUTGOING_ENHANCED_ACK) != 0); - *psdu &= ~IEEE802154_SECURED_OUTGOING_ENHANCED_ACK; - - // Check whether frame pendinng bit was set in the outgoing ACK. - // Set this flag only when the packet is really acknowledged with frame pending set. - sReceive.frame.mInfo.mRxInfo.mAckedWithFramePending = ((*psdu & IEEE802154_FRAME_PENDING_SET_IN_OUTGOING_ACK) != 0); - *psdu &= ~IEEE802154_FRAME_PENDING_SET_IN_OUTGOING_ACK; - - sReceive.frame.mChannel = rxPacketBuf->packetInfo.channel; - sReceive.frame.mLength = rxPacketBuf->packetInfo.length; - sReceive.frame.mPsdu = rxPacketBuf->psdu; - - sReceive.frame.mInfo.mRxInfo.mRssi = rxPacketBuf->packetInfo.rssi; - sLastRssi = rxPacketBuf->packetInfo.rssi; - - sReceive.frame.mInfo.mRxInfo.mLqi = rxPacketBuf->packetInfo.lqi; - sLastLqi = rxPacketBuf->packetInfo.lqi; - - sReceive.iid = rxPacketBuf->packetInfo.iid; - -#if OPENTHREAD_CONFIG_THREAD_VERSION >= OT_THREAD_VERSION_1_2 - // Use stored values for these - sReceive.frame.mInfo.mRxInfo.mAckKeyId = sMacKeys[sReceive.iid].ackKeyId; - sReceive.frame.mInfo.mRxInfo.mAckFrameCounter = sMacKeys[sReceive.iid].ackFrameCounter; -#endif - - updateRxFrameTimestamp(false, rxPacketBuf->packetInfo.timestamp); - return rxPacketBuf; -} - -static void processNextRxPacket(otInstance *aInstance) -{ - OT_UNUSED_VARIABLE(aInstance); - sReceiveError = OT_ERROR_NONE; - uint8_t interfaceId = INVALID_INTERFACE_INDEX; - otInstance *instance = NULL; - rxBuffer *rxPacketBuf = NULL; - - rxPacketBuf = prepareNextRxPacketforCb(); - - // sReceive buffer gets populated from prepareNextRxPacketforCb. - interfaceId = sReceive.iid; - - // Submit broadcast packet to all initilized instances. - do - { -#if OPENTHREAD_CONFIG_MULTIPAN_RCP_ENABLE - instance = otPlatMultipanIidToInstance(interfaceId); -#else - instance = aInstance; -#endif - interfaceId++; - if (instance == NULL) - { - continue; - } -#if OPENTHREAD_CONFIG_DIAG_ENABLE - if (otPlatDiagModeGet()) - { - otPlatDiagRadioReceiveDone(instance, &sReceive.frame, sReceiveError); - } - else -#endif // OPENTHREAD_CONFIG_DIAG_ENABLE - { - bool isGpPacket = sl_gp_intf_is_gp_pkt(&sReceive.frame); -#if OPENTHREAD_CONFIG_MULTIPAN_RCP_ENABLE - // For multipan RCP, continue normal processing. - OT_UNUSED_VARIABLE(isGpPacket); -#else - // Else, we should not receive GP packets. - otEXPECT(!isGpPacket); -#endif - -#if OPENTHREAD_CONFIG_MULTIPAN_RCP_ENABLE - (void)sl_gp_intf_should_buffer_pkt(instance, &sReceive.frame, true); -#endif - otPlatRadioReceiveDone(instance, &sReceive.frame, sReceiveError); - } - } while (sReceive.iid == RADIO_BCAST_IID && interfaceId < RADIO_INTERFACE_COUNT); - -#if RADIO_CONFIG_DEBUG_COUNTERS_SUPPORT - railDebugCounters.mRailPlatRadioReceiveDoneCbCount++; -#endif - -#if !OPENTHREAD_CONFIG_MULTIPAN_RCP_ENABLE -exit: -#endif - IgnoreError(sl_memory_pool_free(&sRxPacketMemPoolHandle, rxPacketBuf)); - otSysEventSignalPending(); -} - -static void processRxPackets(otInstance *aInstance) -{ - while (!queueIsEmpty(&sRxPacketQueue)) - { - processNextRxPacket(aInstance); - } -} - -static void processTxComplete(otInstance *aInstance) -{ - OT_UNUSED_VARIABLE(aInstance); - otError txStatus; - otRadioFrame *ackFrame = NULL; - - if (getInternalFlag(RADIO_TX_EVENTS)) - { - if (getInternalFlag(EVENT_TX_SUCCESS)) - { - txStatus = OT_ERROR_NONE; - - if (sCurrentTxPacket->frame.mPsdu[0] & IEEE802154_FRAME_FLAG_ACK_REQUIRED) - { - ackFrame = &sReceiveAck.frame; - } - - setInternalFlag(EVENT_TX_SUCCESS, false); - } - else if (getInternalFlag(EVENT_TX_CCA_FAILED)) - { - txStatus = OT_ERROR_CHANNEL_ACCESS_FAILURE; - setInternalFlag(EVENT_TX_CCA_FAILED, false); - } - else if (getInternalFlag(EVENT_TX_NO_ACK)) - { - txStatus = OT_ERROR_NO_ACK; - setInternalFlag(EVENT_TX_NO_ACK, false); - } - else - { - txStatus = OT_ERROR_ABORT; - setInternalFlag(EVENT_TX_FAILED, false); - } - - if (txStatus != OT_ERROR_NONE) - { - otLogDebgPlat("Transmit failed ErrorCode=%d", txStatus); - } - -#if OPENTHREAD_CONFIG_DIAG_ENABLE - if (otPlatDiagModeGet()) - { -#if OPENTHREAD_CONFIG_MULTIPAN_RCP_ENABLE - otPlatDiagRadioTransmitDone(otPlatMultipanIidToInstance(sCurrentTxPacket->iid), - &sCurrentTxPacket->frame, - txStatus); -#else - otPlatDiagRadioTransmitDone(aInstance, &sCurrentTxPacket->frame, txStatus); -#endif - } - else -#endif - { - // Clear any internally-set txDelays so future transmits are not affected. - sCurrentTxPacket->frame.mInfo.mTxInfo.mTxDelayBaseTime = 0; - sCurrentTxPacket->frame.mInfo.mTxInfo.mTxDelay = 0; -#if OPENTHREAD_CONFIG_MULTIPAN_RCP_ENABLE - otPlatRadioTxDone(otPlatMultipanIidToInstance(sCurrentTxPacket->iid), - &sCurrentTxPacket->frame, - ackFrame, - txStatus); -#else - otPlatRadioTxDone(aInstance, &sCurrentTxPacket->frame, ackFrame, txStatus); -#endif - } - -#if RADIO_CONFIG_DEBUG_COUNTERS_SUPPORT - railDebugCounters.mRailPlatRadioTxDoneCbCount++; -#endif - otSysEventSignalPending(); - } -} - -#if OPENTHREAD_CONFIG_MULTIPAN_RCP_ENABLE -static inline void processPendingCommands(void) -{ - // Check and process pending transmit and energy scan commands if radio is not busy. - if (!queueIsEmpty(&sPendingCommandQueue) && (!isRadioTransmittingOrScanning())) - { - // Dequeue the pending command - pendingCommandEntry *pendingCommand = (pendingCommandEntry *)queueRemove(&sPendingCommandQueue); - OT_ASSERT(pendingCommand != NULL); - uint8_t iid = pendingCommand->iid; - - switch (pendingCommand->cmdType) - { - case kPendingCommandTypeTransmit: - otPlatRadioTransmit(otPlatMultipanIidToInstance(iid), pendingCommand->request.txFrame); - break; - - case kPendingCommandTypeEnergyScan: - otPlatRadioEnergyScan(otPlatMultipanIidToInstance(iid), - pendingCommand->request.energyScan.scanChannel, - pendingCommand->request.energyScan.scanDuration); - break; - - default: - OT_ASSERT(false); - break; - } - - // Free the allocated memory. - sl_free(pendingCommand); - } -} -#endif // OPENTHREAD_CONFIG_MULTIPAN_RCP_ENABLE - -void efr32RadioProcess(otInstance *aInstance) -{ - (void)handlePhyStackEvent(SL_RAIL_UTIL_IEEE802154_STACK_EVENT_TICK, 0U); - - // We should process the received packet first. Adding it at the end of this function, - // will delay the stack notification until the next call to efr32RadioProcess() - processRxPackets(aInstance); - processTxComplete(aInstance); - - if (sEnergyScanMode == ENERGY_SCAN_MODE_ASYNC && sEnergyScanStatus == ENERGY_SCAN_STATUS_COMPLETED) - { - sEnergyScanStatus = ENERGY_SCAN_STATUS_IDLE; - OT_ASSERT(sEnergyScanActiveInterface != INVALID_INTERFACE_INDEX); -#if OPENTHREAD_CONFIG_MULTIPAN_RCP_ENABLE - otPlatRadioEnergyScanDone(otPlatMultipanIidToInstance(sEnergyScanActiveInterface), sEnergyScanResultDbm); -#else - otPlatRadioEnergyScanDone(aInstance, sEnergyScanResultDbm); -#endif - sEnergyScanActiveInterface = INVALID_INTERFACE_INDEX; - otSysEventSignalPending(); - -#if RADIO_CONFIG_DEBUG_COUNTERS_SUPPORT - railDebugCounters.mRailEventEnergyScanCompleted++; -#endif - } - -#if OPENTHREAD_CONFIG_MULTIPAN_RCP_ENABLE - processPendingCommands(); -#endif // OPENTHREAD_CONFIG_MULTIPAN_RCP_ENABLE -} - -//------------------------------------------------------------------------------ -// Antenna Diversity, Wifi coexistence and Runtime PHY select support - -sl_rail_status_t efr32RadioSetCcaMode(uint8_t aMode) -{ - return sl_rail_ieee802154_config_cca_mode(gRailHandle, aMode); -} - -sl_rail_ieee802154_phy_t efr32GetPtiRadioConfig(void) -{ - return (sl_rail_ieee802154_get_phy_id(gRailHandle)); -} - -#ifdef SL_CATALOG_RAIL_UTIL_IEEE802154_PHY_SELECT_PRESENT - -otError setRadioState(otRadioState state) -{ - otError error = OT_ERROR_NONE; - - // Defer idling the radio if we have an ongoing TX task - otEXPECT_ACTION(!getInternalFlag(FLAG_ONGOING_TX_DATA), error = OT_ERROR_FAILED); - - switch (state) - { - case OT_RADIO_STATE_RECEIVE: - otEXPECT_ACTION(radioSetRx(sReceive.frame.mChannel) == OT_ERROR_NONE, error = OT_ERROR_FAILED); - break; - case OT_RADIO_STATE_SLEEP: - radioSetIdle(); - break; - default: - error = OT_ERROR_FAILED; - } -exit: - return error; -} - -void sl_ot_update_active_radio_config(void) -{ - CORE_DECLARE_IRQ_STATE; - CORE_ENTER_ATOMIC(); - - // Proceed with PHY selection only if 2.4 GHz band is used - otEXPECT(sBandConfig.mChannelConfig == NULL); - - otRadioState currentState = otPlatRadioGetState(NULL); - otEXPECT(setRadioState(OT_RADIO_STATE_SLEEP) == OT_ERROR_NONE); - sl_rail_util_ieee802154_config_radio(gRailHandle); - otEXPECT(setRadioState(currentState) == OT_ERROR_NONE); - -exit: - CORE_EXIT_ATOMIC(); - return; -} -#endif // SL_CATALOG_RAIL_UTIL_IEEE802154_PHY_SELECT_PRESENT - -#ifdef SL_CATALOG_RAIL_UTIL_ANT_DIV_PRESENT -void efr32AntennaConfigInit(void) -{ - sl_rail_status_t status; - sl_rail_util_ant_div_init(); - status = sl_rail_util_ant_div_update_antenna_config(); - OT_ASSERT(status == SL_RAIL_STATUS_NO_ERROR); -} -#endif // SL_CATALOG_RAIL_UTIL_ANT_DIV_PRESENT - -#ifdef SL_CATALOG_RAIL_UTIL_IEEE802154_STACK_EVENT_PRESENT - -static void changeDynamicEvents(void) -{ - /* clang-format off */ - const sl_rail_events_t eventMask = SL_RAIL_EVENTS_NONE - | SL_RAIL_EVENT_RX_SYNC_0_DETECT - | SL_RAIL_EVENT_RX_SYNC_1_DETECT - | SL_RAIL_EVENT_RX_FRAME_ERROR - | SL_RAIL_EVENT_RX_FIFO_OVERFLOW - | SL_RAIL_EVENT_RX_ADDRESS_FILTERED - | SL_RAIL_EVENT_RX_PACKET_ABORTED - | SL_RAIL_EVENT_RX_FILTER_PASSED - | SL_RAIL_EVENT_TX_CHANNEL_CLEAR - | SL_RAIL_EVENT_TX_CCA_RETRY - | SL_RAIL_EVENT_TX_START_CCA - | SL_RAIL_EVENT_SIGNAL_DETECTED; - /* clang-format on */ - sl_rail_events_t eventValues = SL_RAIL_EVENTS_NONE; - - if (phyStackEventIsEnabled()) - { - eventValues |= eventMask; - } - updateEvents(eventMask, eventValues); -} -#endif // SL_CATALOG_RAIL_UTIL_IEEE802154_STACK_EVENT_PRESENT - -static void efr32PhyStackInit(void) -{ -#ifdef SL_CATALOG_RAIL_UTIL_ANT_DIV_PRESENT - efr32AntennaConfigInit(); -#endif // SL_CATALOG_RAIL_UTIL_ANT_DIV_PRESENT - -#ifdef SL_CATALOG_RAIL_UTIL_COEX_PRESENT - efr32CoexInit(); -#endif // SL_CATALOG_RAIL_UTIL_COEX_PRESENT - -#ifdef SL_CATALOG_RAIL_UTIL_IEEE802154_STACK_EVENT_PRESENT - changeDynamicEvents(); -#endif -} - -#ifdef SL_CATALOG_RAIL_UTIL_COEX_PRESENT - -static void emRadioEnableAutoAck(void) -{ - CORE_DECLARE_IRQ_STATE; - CORE_ENTER_ATOMIC(); - - if (getInternalFlag(FLAG_RADIO_INIT_DONE)) - { - if ((rhoActive >= RHO_INT_ACTIVE) // Internal always holds ACKs - || ((rhoActive > RHO_INACTIVE) - && ((sl_rail_util_coex_get_options() & SL_RAIL_UTIL_COEX_OPT_ACK_HOLDOFF) - != SL_RAIL_UTIL_COEX_OPT_DISABLED))) - { - sl_rail_pause_rx_auto_ack(gRailHandle, true); - } - else - { - sl_rail_pause_rx_auto_ack(gRailHandle, false); - } - } - CORE_EXIT_ATOMIC(); -} - -static void emRadioEnablePta(bool enable) -{ - halInternalInitPta(); - - // When PTA is enabled, we want to negate PTA_REQ as soon as an incoming - // frame is aborted, e.g. due to filtering. To do that we must turn off - // the TRACKABFRAME feature that's normally on to benefit sniffing on PTI. - sl_rail_status_t status = - sl_rail_config_rx_options(gRailHandle, - SL_RAIL_RX_OPTION_TRACK_ABORTED_FRAMES, - (enable ? SL_RAIL_RX_OPTIONS_NONE : SL_RAIL_RX_OPTION_TRACK_ABORTED_FRAMES)); - OT_ASSERT(status == SL_RAIL_STATUS_NO_ERROR); -} - -static void efr32CoexInit(void) -{ -#if SL_OPENTHREAD_COEX_COUNTER_ENABLE && defined(SL_CATALOG_RAIL_MULTIPLEXER_PRESENT) - sl_rail_mux_set_coex_counter_handler(gRailHandle, &sl_ot_coex_counter_on_event); -#else - sli_radio_coex_reset(); -#endif // SL_OPENTHREAD_COEX_COUNTER_ENABLE && defined(SL_CATALOG_RAIL_MULTIPLEXER_PRESENT) - -#if OPENTHREAD_CONFIG_PLATFORM_RADIO_COEX_ENABLE -#if defined(SL_RAIL_UTIL_COEX_REQ_GPIO) || defined(SL_RAIL_UTIL_COEX_REQ_PORT) || defined(SL_RAIL_UTIL_COEX_GNT_GPIO) \ - || defined(SL_RAIL_UTIL_COEX_GNT_PORT) || SL_RAIL_UTIL_COEX_RUNTIME_PHY_SELECT - sl_rail_util_ot_enable_coex_state_event_filter(); -#endif -#endif // OPENTHREAD_CONFIG_PLATFORM_RADIO_COEX_ENABLE - - sl_rail_util_coex_options_t coexOptions = sl_rail_util_coex_get_options(); - -#if SL_OPENTHREAD_COEX_MAC_HOLDOFF_ENABLE - coexOptions |= SL_RAIL_UTIL_COEX_OPT_MAC_HOLDOFF; -#else - if (sl_rail_util_coex_get_radio_holdoff()) - { - coexOptions |= SL_RAIL_UTIL_COEX_OPT_MAC_HOLDOFF; - } -#endif // SL_OPENTHREAD_COEX_MAC_HOLDOFF_ENABLE - - sl_rail_util_coex_set_options(coexOptions); - - emRadioEnableAutoAck(); // Might suspend AutoACK if RHO already in effect - emRadioEnablePta(sl_rail_util_coex_is_enabled()); -} - -// Managing radio transmission -static void onPtaGrantTx(sl_rail_util_coex_req_t ptaStatus) -{ - // Only pay attention to first PTA Grant callback, ignore any further ones - if (ptaGntEventReported) - { - return; - } - ptaGntEventReported = true; - - OT_ASSERT(ptaStatus == SL_RAIL_UTIL_COEX_REQCB_GRANTED); - // PTA is telling us we've gotten GRANT and should send ASAP *without* CSMA - setInternalFlag(FLAG_CURRENT_TX_USE_CSMA, false); - txCurrentPacket(); -} - -static void tryTxCurrentPacket(void) -{ - OT_ASSERT(getInternalFlag(FLAG_ONGOING_TX_DATA)); - - ptaGntEventReported = false; - sl_rail_util_ieee802154_stack_event_t ptaStatus = - handlePhyStackEvent(SL_RAIL_UTIL_IEEE802154_STACK_EVENT_TX_PENDED_MAC, (uint32_t)&onPtaGrantTx); - if (ptaStatus == SL_RAIL_UTIL_IEEE802154_STACK_STATUS_SUCCESS) - { - // Normal case where PTA allows us to start the (CSMA) transmit below - txCurrentPacket(); - } - else if (ptaStatus == SL_RAIL_UTIL_IEEE802154_STACK_STATUS_CB_PENDING) - { - // onPtaGrantTx() callback will take over (and might already have) - } - else if (ptaStatus == SL_RAIL_UTIL_IEEE802154_STACK_STATUS_HOLDOFF) - { - txFailedCallback(false, EVENT_TX_FAILED); - } -} - -// Managing CCA Threshold -static void setCcaThreshold(void) -{ - if (sCcaThresholdDbm == CCA_THRESHOLD_UNINIT) - { - sCcaThresholdDbm = CCA_THRESHOLD_DEFAULT; - } - CORE_DECLARE_IRQ_STATE; - CORE_ENTER_ATOMIC(); - int8_t thresholddBm = sCcaThresholdDbm; - - if (getInternalFlag(FLAG_RADIO_INIT_DONE)) - { - if (rhoActive > RHO_INACTIVE) - { - thresholddBm = SL_RAIL_RSSI_INVALID_DBM; - } - sl_rail_status_t status = sl_rail_set_cca_threshold(gRailHandle, thresholddBm); - OT_ASSERT(status == SL_RAIL_STATUS_NO_ERROR); - } - CORE_EXIT_ATOMIC(); -} - -static void emRadioHoldOffInternalIsr(uint8_t active) -{ - if (active != rhoActive) - { - rhoActive = active; // Update rhoActive early - if (getInternalFlag(FLAG_RADIO_INIT_DONE)) - { - setCcaThreshold(); - emRadioEnableAutoAck(); - } - } -} - -// External API used by Coex Component -SL_WEAK void emRadioHoldOffIsr(bool active) -{ - emRadioHoldOffInternalIsr((uint8_t)active | (rhoActive & ~RHO_EXT_ACTIVE)); -} - -#if SL_OPENTHREAD_COEX_COUNTER_ENABLE - -#ifdef SL_CATALOG_RAIL_MULTIPLEXER_PRESENT -static void sl_ot_coex_counter_on_event(sl_rail_util_coex_event_t event) -#else -void sl_rail_util_coex_counter_on_event(sl_rail_util_coex_event_t event) -#endif -{ - otEXPECT(event < SL_RAIL_UTIL_COEX_EVENT_COUNT); - efr32RadioCoexCounters[event] += 1; -exit: - return; -} - -void efr32RadioClearCoexCounters(void) -{ - memset((void *)efr32RadioCoexCounters, 0, sizeof(efr32RadioCoexCounters)); -} - -#endif // SL_OPENTHREAD_COEX_COUNTER_ENABLE - -#endif // SL_CATALOG_RAIL_UTIL_COEX_PRESENT - -#if RADIO_CONFIG_DEBUG_COUNTERS_SUPPORT -void efr32ClearRadioCounters(void) -{ - memset(&railDebugCounters, 0, sizeof(railDebugCounters)); -} -#endif // RADIO_CONFIG_DEBUG_COUNTERS_SUPPORT