diff --git a/1_wire.h b/1_wire.h
new file mode 100644
index 00000000..ae29de0b
--- /dev/null
+++ b/1_wire.h
@@ -0,0 +1,119 @@
+#ifndef __1_WIRE_H
+#define __1_WIRE_H
+
+#include <stdbool.h>
+#include <stdlib.h>
+#include <string.h>
+#include <stdio.h>
+#include <stdint.h>
+
+//=========================== defines =========================================
+// ***  Congfig. defines
+// Define the HCLK source.
+#define HF_CLOCK // HF_CLOCK or LF_CLOCK
+// Enable strong pull-up 
+#define USE_STRONG_PULL 1 // 1 = true, 0 = false
+// GPIO pins are specified here.
+#define TX_PIN 0
+#define RX_PIN 1
+#define STRONG_PULL_UP_PIN 7
+// End Congfig. defines ***
+
+// ROM commands.
+#define READROM 0x33
+#define SKIPROM 0xCC
+#define MATCHROM 0x55
+#define SEARCHROM 0xF0
+//===================================
+// 1-wire search rom, code taken from;
+// https://www.analog.com/en/resources/app-notes/1wire-search-algorithm.html
+#define FALSE 0
+#define TRUE 1
+//===================================
+
+// Function Macros
+#define BUS_LOW() GPIO_REG__OUTPUT |= (1 << TX_PIN); // Pulls bus LOW
+#define BUS_RELEASE() GPIO_REG__OUTPUT &= ~(1 << TX_PIN); // Release bus to Pull-up
+#define BUS_READ() (GPIO_REG__INPUT &= (1 << RX_PIN)) ? 1 : 0; // Read the logic level of the bus.
+#define STRONG_PULL_UP_OFF() GPIO_REG__OUTPUT |= (1 << STRONG_PULL_UP_PIN);
+#define STRONG_PULL_UP_ON() GPIO_REG__OUTPUT &= ~(1 << STRONG_PULL_UP_PIN);
+// NOP Macros for us timing
+#define NOP_5() __asm("NOP\n\t" "NOP\n\t" "NOP\n\t" "NOP\n\t" "NOP\n\t"); //~1us
+#define NOP_10() {NOP_5(); NOP_5();} // 2us
+#define NOP_50() {NOP_10(); NOP_10(); NOP_10(); NOP_10(); NOP_10();} // 10us
+#define NOP_100() {NOP_50(); NOP_50()} // 20 us
+#define NOP_500() {NOP_100(); NOP_100(); NOP_100(); NOP_100(); NOP_100();} // 100us
+
+#ifdef HF_CLOCK
+//Delay Macros for 1-wire timing HF_clock
+#define DELAY_A {NOP_10(); NOP_10(); NOP_10();}//6us
+#define DELAY_B {NOP_100(); NOP_100(); NOP_100(); NOP_10(); NOP_10();}//64
+#define DELAY_C {NOP_100(); NOP_100(); NOP_100();}//60
+#define DELAY_D {NOP_50();}//10
+#define DELAY_E {NOP_10(); NOP_10(); NOP_10(); NOP_10(); NOP_5();}//9
+#define DELAY_F {NOP_100(); NOP_100(); NOP_50();}//55
+#define DELAY_G {}//0 
+#define DELAY_H {NOP_500(); NOP_500(); NOP_500(); NOP_500(); NOP_500(); NOP_100(); NOP_100(); NOP_100(); NOP_100();}//480
+#define DELAY_I {NOP_100(); NOP_100(); NOP_100(); NOP_50();}//70
+#define DELAY_J {NOP_500(); NOP_500(); NOP_500(); NOP_500(); NOP_50();}//410
+#endif
+#ifdef LF_CLOCK
+// Delay Macros for 1-wire timing LF_clock LF = HF * 2/3
+#define DELAY_A { NOP_10(); NOP_10();}//6us * 0.7 = 4.2 = 4
+#define DELAY_B {NOP_100(); NOP_100(); NOP_10(); NOP_10(); NOP_5();}//64 * 0.7 = 44.8 = 45
+#define DELAY_C {NOP_100(); NOP_100(); NOP_10();}//60 * 0.7 = 42
+#define DELAY_D {NOP_10(); NOP_10(); NOP_10(); NOP_5();}//10 * 0.7 = 7
+#define DELAY_E {NOP_10(); NOP_10(); NOP_10();}//9 * 0.7 = 6.3 = 6
+#define DELAY_F {NOP_100(); NOP_50(); NOP_10(); NOP_10(); NOP_10(); NOP_10(); NOP_5();}//55 * 0.7 = 38.5 = 39
+#define DELAY_G {}//0 
+#define DELAY_H {NOP_500(); NOP_500(); NOP_500(); NOP_100(); NOP_50(); NOP_10(); NOP_10(); NOP_10();}//480 * 0.7 = 336
+#define DELAY_I {NOP_100(); NOP_100(); NOP_10(); NOP_10(); NOP_10(); NOP_10(); NOP_5();}//70 * 0.7 = 49
+#define DELAY_J {NOP_500(); NOP_500(); NOP_100(); NOP_100(); NOP_100(); NOP_100(); NOP_10(); NOP_10(); NOP_10(); NOP_5();}//410 * 0.7 = 287
+#endif
+//=========================== variables =======================================
+// ROMs found on the bus are stored in a linked list structure. Where the root contains the 
+// pointed to the first node(next) and the total number of nodes(item_count). Each node stores
+// an individual ROM(rom) and the pointer to the next(next).
+typedef struct rom_list_root{
+	uint32_t item_count;
+	struct rom_list* next;
+} rom_list_root_t,	*bus_roms_root_prt_t;
+
+typedef struct rom_list{
+	uint64_t rom;
+	struct rom_list* next;
+} rom_list_t,	*bus_roms_list_prt_t;
+	
+//=========================== prototypes ======================================
+// User function
+// Configures SCuM I/O for bus, set up banks, leaves all pins except RX at outputs.
+void OW_gpio_config(int rx, int tx, int pull_up);
+// Read all roms on bus, returns base to linked list.
+bus_roms_root_prt_t OWSearch_bus(void);
+// Create an array of ROMs from linked list.
+void OWGet_rom_array(uint64_t* array, bus_roms_root_prt_t root);
+ // Write a rom to bus.
+void OWWrite_rom(uint64_t device_rom);
+// Isolate a device by reseting, geting presence and writing the ROM.
+int OWIsolate_device(uint64_t device_rom); 
+// Reads a byte from bus.
+uint8_t OWRead_byte(void);
+// Reads n bytes from bus.
+void OWRead_bytes(uint8_t* buffer, int size);
+// Returns the CRC8 of a series of bytes.
+int OWCRC_bytes(uint8_t* byte_array, int size); 
+	
+// Driver
+void OWStore_rom(unsigned char* rom_bytes, bus_roms_list_prt_t base);
+void OWWriteBit(uint8_t bit);
+uint8_t OWReadBit(void);
+int OWReset(void);
+void OWWriteByte(uint8_t byte);
+//===================================
+// 1-wire search rom, code taken from;
+// https://www.analog.com/en/resources/app-notes/1wire-search-algorithm.html
+int OWFirst(void);
+int OWNext(void);
+int OWSearch(void);
+unsigned char docrc8(unsigned char value);
+#endif
diff --git a/scm_v3c/1_wire.c b/scm_v3c/1_wire.c
new file mode 100644
index 00000000..f4e24c3c
--- /dev/null
+++ b/scm_v3c/1_wire.c
@@ -0,0 +1,587 @@
+#include <stdbool.h>
+#include <stdlib.h>
+#include <string.h>
+#include <stdio.h>
+
+#include "gpio.h"
+#include "rftimer.h"
+#include "scm3c_hw_interface.h"
+#include "memory_map.h"
+#include "1_wire.h"
+
+
+// 1wire-search-algorithm, code below taken from;
+// https://www.analog.com/en/resources/app-notes/1wire-search-algorithm.html
+unsigned char ROM_NO[8]; // Rom bytes are put here on search
+int LastDiscrepancy;
+int LastFamilyDiscrepancy;
+int LastDeviceFlag;
+unsigned char crc8;
+
+// Routine to configure gpio after mote_init.
+// Taken from the mote_init routine just changed the GPI/O_enable values
+// GPO are set default, just turn on the RX GPI and turn off the GPO for the RX pin.
+void OW_gpio_config(int rx, int tx, int pull_up)
+{
+	// Set GP0(tx, pull_up) pin set to bank6
+	int bank_n = 6;
+	if(tx < 4 || pull_up < 4)
+	{
+		for (int j = 0; j <= 3; j++) 
+		{
+			if ((bank_n >> j) & 0x1) {
+					set_asc_bit(245 + j);
+			} else {
+					clear_asc_bit(245 + j);
+			}
+		}
+	}
+	else if((tx >= 4 && tx < 8) || (pull_up >= 4 && pull_up < 8))
+	{
+		for (int j = 0; j <= 3; j++) 
+		{
+			if ((bank_n >> j) & 0x1) {
+					set_asc_bit(249 + j);
+			} else {
+					clear_asc_bit(249 + j);
+			}
+		}
+	}		
+	else if((tx >= 8 && tx < 12) || (pull_up >= 8 && pull_up < 12))
+	{
+		for (int j = 0; j <= 3; j++) 
+		{
+			if ((bank_n >> j) & 0x1) {
+					set_asc_bit(253 + j);
+			} else {
+					clear_asc_bit(253 + j);
+			}
+		}
+	}
+	else if((tx >= 12 && tx < 16) || (pull_up >= 12 && pull_up < 16))
+	{
+		for (int j = 0; j <= 3; j++) 
+		{
+			if ((bank_n >> j) & 0x1) {
+					set_asc_bit(257 + j);
+			} else {
+					clear_asc_bit(257 + j);
+			}
+		}
+	}
+	else if(tx >= 16 || pull_up >= 16) // out of bounds defaults to bank0
+	{
+		for (int j = 0; j <= 3; j++) 
+		{
+			if ((bank_n >> j) & 0x1) {
+					set_asc_bit(245 + j);
+			} else {
+					clear_asc_bit(245 + j);
+			}
+		}		
+	}
+	
+	// Set GPI(rx) pin set to bank0
+	bank_n = 0;
+	if(rx < 4)
+	{
+		for (int j = 0; j <= 3; j++) 
+		{
+			if ((bank_n >> j) & 0x1) {
+					set_asc_bit(261 + j);
+			} else {
+					clear_asc_bit(261 + j);
+			}
+		}
+	}
+	else if(rx >= 4 && rx < 8)
+	{
+		for (int j = 0; j <= 3; j++) 
+		{
+			if ((bank_n >> j) & 0x1) {
+					set_asc_bit(263 + j);
+			} else {
+					clear_asc_bit(263 + j);
+			}
+		}
+	}		
+	else if(rx >= 8 && rx < 12)
+	{
+		for (int j = 0; j <= 3; j++) 
+		{
+			if ((bank_n >> j) & 0x1) {
+					set_asc_bit(265 + j);
+			} else {
+					clear_asc_bit(265 + j);
+			}
+		}
+	}
+	else if(rx >= 12 && rx < 16)
+	{
+		for (int j = 0; j <= 3; j++) 
+		{
+			if ((bank_n >> j) & 0x1) {
+					set_asc_bit(267 + j);
+			} else {
+					clear_asc_bit(267 + j);
+			}
+		}
+	}
+	else if(rx >= 16) // out of bounds defaults to bank0
+	{
+		for (int j = 0; j <= 3; j++) 
+		{
+			if ((bank_n >> j) & 0x1) {
+					set_asc_bit(261 + j);
+			} else {
+					clear_asc_bit(261 + j);
+			}
+		}		
+	}	
+	
+	uint16_t gpi_mask = (0x01 << rx);
+	uint16_t gpo_mask = (0x01 << rx);
+
+	// Set GPI enables
+	GPI_enables(gpi_mask |= 0x0000); // enable GPIO 1 as RX for 1-wire
+	printf("gpi mask = 0x%X\r\n", gpi_mask);
+	// Set GPO enables
+	GPO_enables(~(gpo_mask &= 0xFFFF)); // GPIO 0 is 1-wire TX, turn off output on RX
+	printf("gpo mask = 0x%X\r\n", gpi_mask);
+	#ifdef HF_CLOCK
+	// Set HCLK source as HF_CLOCK
+	set_asc_bit(1147);//****
+	// Set RFTimer source as HF_CLOCK
+	set_asc_bit(1151);//****
+	// Disable LF_CLOCK
+	set_asc_bit(553);//*****
+	// HF_clock div		
+    set_asc_bit(49);
+    set_asc_bit(48);
+    clear_asc_bit(47);
+    set_asc_bit(46);
+    clear_asc_bit(45);
+    set_asc_bit(44);
+    set_asc_bit(43);
+    set_asc_bit(42);
+	#endif
+	#ifdef LF_CLOCK
+	// Let HCLK source be LF_CLOCK
+	clear_asc_bit(1147);//****
+	// Let RFTimer source be LF_CLOCK
+	clear_asc_bit(1151);//****
+	// Enable LF_CLOCK
+	clear_asc_bit(553);//*****
+	// LF_clock div	
+    set_asc_bit(49);
+    set_asc_bit(48);
+    set_asc_bit(47);
+    clear_asc_bit(46);
+    clear_asc_bit(45);
+    set_asc_bit(44);
+    clear_asc_bit(43);
+    clear_asc_bit(42);
+	#endif
+	
+	// scan chain
+	analog_scan_chain_write();
+	analog_scan_chain_load();
+	// Initialize all pins to be low.
+	GPIO_REG__OUTPUT &= ~0xFFFF;
+	STRONG_PULL_UP_OFF();
+}
+
+// Returns all roms in linked list
+bus_roms_root_prt_t OWSearch_bus(void)
+{
+	bus_roms_root_prt_t my_roms_root = malloc(sizeof(rom_list_root_t));
+	my_roms_root->next = malloc(sizeof(rom_list_t));
+	int cnt = 0;
+	int rslt = OWFirst();
+	while(rslt)
+	{
+		cnt++;
+		OWStore_rom(ROM_NO, my_roms_root->next);
+		rslt = OWNext();
+	}
+	my_roms_root->item_count = cnt;
+	if(cnt == 0)
+	{
+		free(my_roms_root);
+		my_roms_root = NULL;
+	}
+	return my_roms_root;
+}
+
+// Write a given rom to the bus.
+void OWWrite_rom(uint64_t device_rom)
+{	
+	int count = 0;
+	while(count < 8)
+	{
+		uint8_t byte = 0x0;
+		byte |= device_rom;
+		OWWriteByte(byte);
+		device_rom = (device_rom >> 8);
+		count++;
+	}
+}
+
+// Stores the IDs returned from OWsearch into a linked list element.
+void OWStore_rom(unsigned char* rom_bytes, bus_roms_list_prt_t base)
+{
+	uint64_t new_rom = 0;
+	for(int i = 7; i >= 0; i--)
+	{
+		new_rom |= rom_bytes[i];
+		if(i > 0)
+		{
+			new_rom = (new_rom << 8);
+		}
+	}
+	if(base->next == NULL)
+	{
+		base->rom = new_rom;
+		base->next = malloc(sizeof(rom_list_t));
+	}
+	else
+	{
+		while(base->next != NULL)
+		{
+			base = base->next;
+		}
+		base->rom = new_rom;
+		base->next = malloc(sizeof(rom_list_t));
+	}
+}
+
+// Moves roms from linked list to array and frees the list. 
+void OWGet_rom_array(uint64_t* array, bus_roms_root_prt_t root)
+{
+	int cnt = root->item_count;
+	bus_roms_list_prt_t rom_n = root->next;
+	free(root);
+	for(int i = 0; i < cnt; i++)
+	{
+		bus_roms_list_prt_t prev_rom = rom_n;
+		array[i] = rom_n->rom;
+		rom_n = rom_n->next;	
+		free(prev_rom);
+	}
+}
+// Reads single byte, use in OWRead_bytes
+inline uint8_t OWRead_byte(void)
+{
+	int count = 8;
+	uint8_t data = 0x00;
+		while(count > 0)
+	{
+		data = (data >> 1);
+		int new_bit = OWReadBit();
+		if(new_bit & 0x01)// if new_bit is a 1
+		{
+			new_bit = (new_bit << (7)); // set MSb 
+			data |= new_bit;
+		}
+		count--;
+	}
+	return data;
+}
+
+// Read sizeof(buffer) bytes into buffer array.
+void OWRead_bytes(uint8_t* buffer, int size)
+{
+	int n = size;
+	int count = 0;
+	while(count < n)
+	{
+		uint8_t new_byte = OWRead_byte();
+		buffer[count] = new_byte;
+		count++;
+	}
+}
+
+
+// CRC bytes, read elements [0 to size] through crc generator. 
+// crc8 value should match the crc produced my device if only the data is 
+// used to generate the crc value.
+// Alternitivly, pass the data and the crc from the device, the function should 
+// return 0.
+int OWCRC_bytes(uint8_t* byte_array, int size)
+{
+	crc8 = 0;
+	for(int i = 0; i < size - 1; i++)
+	{
+		docrc8(byte_array[i]);
+	}
+	return crc8;
+}
+
+/*
+isolating a device by; get presence responce, send MATCHROM command,
+send ROM
+*/
+int OWIsolate_device(uint64_t device_rom)
+{
+	int ret = 0;
+	ret = OWReset();
+	if(ret != 0)
+	{
+		OWWriteByte(MATCHROM);
+		OWWrite_rom(device_rom);
+	}
+	return ret;
+}
+
+// Platform specific function used in 1wire-search-algorithm=================
+// Write a bit to the bus
+inline void OWWriteBit(uint8_t bit)
+{
+	switch(bit)
+	{
+		case 0x00:
+			BUS_LOW();
+			DELAY_C
+			BUS_RELEASE();
+			DELAY_D
+			break;
+		default:
+			BUS_LOW();
+			DELAY_A
+			BUS_RELEASE();
+			DELAY_B
+			break;
+	}
+}
+
+
+// Reads a byte from the bus.
+inline uint8_t OWReadBit(void)
+{
+	BUS_LOW();
+	DELAY_A
+	BUS_RELEASE();
+	DELAY_E
+	uint8_t bit = BUS_READ();
+	DELAY_F
+	return bit;
+}
+
+// Return is 1 for presence is detected.
+inline int OWReset(void)
+{
+	BUS_LOW();
+	DELAY_H
+	BUS_RELEASE();
+	DELAY_I
+	int state = BUS_READ();
+	DELAY_J
+	return !state;
+}
+
+// Sends a byte 
+inline void OWWriteByte(uint8_t byte)
+{
+	int count = 8;
+	while(count > 0)
+	{
+		uint8_t temp_byte = byte & 0x01;
+		if(temp_byte == 1)
+		{
+			OWWriteBit(0x01);
+		}
+		else
+		{
+			OWWriteBit(0x00);
+		}
+		byte = (byte >> 1);
+		count--;
+	}
+}
+
+//==========================================================================
+// 1wire-search-algorithm, code below taken from;
+// https://www.analog.com/en/resources/app-notes/1wire-search-algorithm.html
+
+
+static unsigned char dscrc_table[] = {
+ 0, 94,188,226, 97, 63,221,131,194,156,126, 32,163,253, 31, 65,
+ 157,195, 33,127,252,162, 64, 30, 95, 1,227,189, 62, 96,130,220,
+ 35,125,159,193, 66, 28,254,160,225,191, 93, 3,128,222, 60, 98,
+ 190,224, 2, 92,223,129, 99, 61,124, 34,192,158, 29, 67,161,255,
+ 70, 24,250,164, 39,121,155,197,132,218, 56,102,229,187, 89, 7,
+ 219,133,103, 57,186,228, 6, 88, 25, 71,165,251,120, 38,196,154,
+ 101, 59,217,135, 4, 90,184,230,167,249, 27, 69,198,152,122, 36,
+ 248,166, 68, 26,153,199, 37,123, 58,100,134,216, 91, 5,231,185,
+ 140,210, 48,110,237,179, 81, 15, 78, 16,242,172, 47,113,147,205,
+ 17, 79,173,243,112, 46,204,146,211,141,111, 49,178,236, 14, 80,
+ 175,241, 19, 77,206,144,114, 44,109, 51,209,143, 12, 82,176,238,
+ 50,108,142,208, 83, 13,239,177,240,174, 76, 18,145,207, 45,115,
+ 202,148,118, 40,171,245, 23, 73, 8, 86,180,234,105, 55,213,139,
+ 87, 9,235,181, 54,104,138,212,149,203, 41,119,244,170, 72, 22,
+ 233,183, 85, 11,136,214, 52,106, 43,117,151,201, 74, 20,246,168,
+ 116, 42,200,150, 21, 75,169,247,182,232, 10, 84,215,137,107, 53};
+//--------------------------------------------------------------------------
+// Calculate the CRC8 of the byte value provided with the current 
+// global 'crc8' value. 
+// Returns current global crc8 value
+//
+unsigned char docrc8(unsigned char value)
+{
+ // See Application Note 27
+ 
+ // TEST BUILD
+ crc8 = dscrc_table[crc8 ^ value];
+ return crc8;
+}
+
+// Find the 'first' devices on the 1-Wire bus
+// Return TRUE : device found, ROM number in ROM_NO buffer
+// FALSE : no device present
+//
+int OWFirst(void)
+{
+ // reset the search state
+ LastDiscrepancy = 0;
+ LastDeviceFlag = FALSE;
+ LastFamilyDiscrepancy = 0;
+ return OWSearch();
+}
+//--------------------------------------------------------------------------
+// Find the 'next' devices on the 1-Wire bus
+// Return TRUE : device found, ROM number in ROM_NO buffer
+// FALSE : device not found, end of search
+//
+int OWNext(void)
+{
+ // leave the search state alone
+ return OWSearch();
+}
+//--------------------------------------------------------------------------
+// Perform the 1-Wire Search Algorithm on the 1-Wire bus using the existing
+// search state.
+// Return TRUE : device found, ROM number in ROM_NO buffer
+// FALSE : device not found, end of search
+//
+int OWSearch(void)
+{
+	int id_bit_number;
+	int last_zero, rom_byte_number, search_result;
+	int id_bit, cmp_id_bit;
+	unsigned char rom_byte_mask, search_direction;
+	// initialize for search
+	id_bit_number = 1;
+	last_zero = 0;
+	rom_byte_number = 0;
+	rom_byte_mask = 1;
+	search_result = 0;
+	crc8 = 0;
+	// if the last call was not the last one
+	if(!LastDeviceFlag)
+	{
+		// 1-Wire reset
+		if(!OWReset())
+		{
+			// reset the search
+			LastDiscrepancy = 0;
+			LastDeviceFlag = FALSE;
+			LastFamilyDiscrepancy = 0;
+			return FALSE;
+		}
+		// issue the search command 
+		OWWriteByte(SEARCHROM); 
+		// loop to do the search
+		do
+		{
+			// read a bit and its complement
+			id_bit = OWReadBit();
+			cmp_id_bit = OWReadBit();
+			// check for no devices on 1-wire
+			if((id_bit == 1) && (cmp_id_bit == 1))
+			{
+				break;
+			}
+			else
+			{
+				// all devices coupled have 0 or 1
+				if(id_bit != cmp_id_bit)
+				{
+					search_direction = id_bit; // bit write value for search
+				}
+				else
+				{
+					// if this discrepancy if before the Last Discrepancy
+					// on a previous next then pick the same as last time
+					if (id_bit_number < LastDiscrepancy)
+					{
+						search_direction = ((ROM_NO[rom_byte_number] & rom_byte_mask) > 0);\
+					}
+					else
+					{
+						// if equal to last pick 1, if not then pick 0
+						search_direction = (id_bit_number == LastDiscrepancy);
+						// if 0 was picked then record its position in LastZero
+					}
+
+					if(search_direction == 0)
+					{
+						last_zero = id_bit_number;
+						// check for Last discrepancy in family
+						if(last_zero < 9)
+						{
+							LastFamilyDiscrepancy = last_zero;
+						}
+					}
+				}
+				// set or clear the bit in the ROM byte rom_byte_number
+				// with mask rom_byte_mask
+				if(search_direction == 1)
+				{
+					ROM_NO[rom_byte_number] |= rom_byte_mask;
+				}
+				else
+				{
+					ROM_NO[rom_byte_number] &= ~rom_byte_mask;
+				}
+				// serial number search direction write bit
+				OWWriteBit(search_direction);
+				// increment the byte counter id_bit_number
+				// and shift the mask rom_byte_mask
+				id_bit_number++;
+				rom_byte_mask <<= 1;
+				// if the mask is 0 then go to new SerialNum byte rom_byte_number and reset mask
+				if(rom_byte_mask == 0)
+				{
+					docrc8(ROM_NO[rom_byte_number]); // accumulate the CRC
+					rom_byte_number++;
+					rom_byte_mask = 1;
+				}
+			}
+		}
+		while(rom_byte_number < 8); // loop until through all ROM bytes 0-7
+		// if the search was successful then
+		{
+			if(!((id_bit_number < 65) || (crc8 != 0)))
+			{
+				// search successful so set LastDiscrepancy,LastDeviceFlag,search_result
+				LastDiscrepancy = last_zero;
+				// check for last device
+				if(LastDiscrepancy == 0)
+				{
+					LastDeviceFlag = TRUE;
+				}
+				search_result = TRUE;
+			}
+		}
+	}
+
+	// if no device found then reset counters so next 'search' will be like a first
+	if(!search_result || !ROM_NO[0])
+	{
+		LastDiscrepancy = 0;
+		LastDeviceFlag = FALSE;
+		LastFamilyDiscrepancy = 0;
+		search_result = FALSE;
+	}
+	return search_result;
+}
diff --git a/scm_v3c/1_wire.h b/scm_v3c/1_wire.h
new file mode 100644
index 00000000..14e87044
--- /dev/null
+++ b/scm_v3c/1_wire.h
@@ -0,0 +1,119 @@
+#ifndef __1_WIRE_H
+#define __1_WIRE_H
+
+#include <stdbool.h>
+#include <stdlib.h>
+#include <string.h>
+#include <stdio.h>
+#include <stdint.h>
+
+//=========================== defines =========================================
+// ***  Congfig. defines
+// Define the HCLK source.
+#define LF_CLOCK // HF_CLOCK or LF_CLOCK
+// Enable strong pull-up 
+#define USE_STRONG_PULL 1 // 1 = true, 0 = false
+// GPIO pins are specified here.
+#define TX_PIN 5
+#define RX_PIN 6
+#define STRONG_PULL_UP_PIN 7
+// End Congfig. defines ***
+
+// ROM commands.
+#define READROM 0x33
+#define SKIPROM 0xCC
+#define MATCHROM 0x55
+#define SEARCHROM 0xF0
+//===================================
+// 1-wire search rom, code taken from;
+// https://www.analog.com/en/resources/app-notes/1wire-search-algorithm.html
+#define FALSE 0
+#define TRUE 1
+//===================================
+
+// Function Macros
+#define BUS_LOW() GPIO_REG__OUTPUT |= (1 << TX_PIN); // Pulls bus LOW
+#define BUS_RELEASE() GPIO_REG__OUTPUT &= ~(1 << TX_PIN); // Release bus to Pull-up
+#define BUS_READ() (GPIO_REG__INPUT &= (1 << RX_PIN)) ? 1 : 0; // Read the logic level of the bus.
+#define STRONG_PULL_UP_OFF() GPIO_REG__OUTPUT |= (1 << STRONG_PULL_UP_PIN);
+#define STRONG_PULL_UP_ON() GPIO_REG__OUTPUT &= ~(1 << STRONG_PULL_UP_PIN);
+// NOP Macros for us timing
+#define NOP_5() __asm("NOP\n\t" "NOP\n\t" "NOP\n\t" "NOP\n\t" "NOP\n\t"); //~1us
+#define NOP_10() {NOP_5(); NOP_5();} // 2us
+#define NOP_50() {NOP_10(); NOP_10(); NOP_10(); NOP_10(); NOP_10();} // 10us
+#define NOP_100() {NOP_50(); NOP_50()} // 20 us
+#define NOP_500() {NOP_100(); NOP_100(); NOP_100(); NOP_100(); NOP_100();} // 100us
+
+#ifdef HF_CLOCK
+//Delay Macros for 1-wire timing HF_clock
+#define DELAY_A {NOP_10(); NOP_10(); NOP_10();}//6us
+#define DELAY_B {NOP_100(); NOP_100(); NOP_100(); NOP_10(); NOP_10();}//64
+#define DELAY_C {NOP_100(); NOP_100(); NOP_100();}//60
+#define DELAY_D {NOP_50();}//10
+#define DELAY_E {NOP_10(); NOP_10(); NOP_10(); NOP_10(); NOP_5();}//9
+#define DELAY_F {NOP_100(); NOP_100(); NOP_50();}//55
+#define DELAY_G {}//0 
+#define DELAY_H {NOP_500(); NOP_500(); NOP_500(); NOP_500(); NOP_100(); NOP_100(); NOP_100(); NOP_100();}//480
+#define DELAY_I {NOP_100(); NOP_100(); NOP_100(); NOP_50();}//70
+#define DELAY_J {NOP_500(); NOP_500(); NOP_500(); NOP_500(); NOP_50();}//410
+#endif
+#ifdef LF_CLOCK
+// Delay Macros for 1-wire timing LF_clock LF = HF * 2/3
+#define DELAY_A { NOP_10(); NOP_10();}//6us * 0.7 = 4.2 = 4
+#define DELAY_B {NOP_100(); NOP_100(); NOP_10(); NOP_10(); NOP_5();}//64 * 0.7 = 44.8 = 45
+#define DELAY_C {NOP_100(); NOP_100(); NOP_10();}//60 * 0.7 = 42
+#define DELAY_D {NOP_10(); NOP_10(); NOP_10(); NOP_5();}//10 * 0.7 = 7
+#define DELAY_E {NOP_10(); NOP_10(); NOP_10();}//9 * 0.7 = 6.3 = 6
+#define DELAY_F {NOP_100(); NOP_50(); NOP_10(); NOP_10(); NOP_10(); NOP_10(); NOP_5();}//55 * 0.7 = 38.5 = 39
+#define DELAY_G {}//0 
+#define DELAY_H {NOP_500(); NOP_500(); NOP_500(); NOP_100(); NOP_50(); NOP_10(); NOP_10(); NOP_10();}//480 * 0.7 = 336
+#define DELAY_I {NOP_100(); NOP_100(); NOP_10(); NOP_10(); NOP_10(); NOP_10(); NOP_5();}//70 * 0.7 = 49
+#define DELAY_J {NOP_500(); NOP_500(); NOP_100(); NOP_100(); NOP_100(); NOP_100(); NOP_10(); NOP_10(); NOP_10(); NOP_5();}//410 * 0.7 = 287
+#endif
+//=========================== variables =======================================
+// ROMs found on the bus are stored in a linked list structure. Where the root contains the 
+// pointed to the first node(next) and the total number of nodes(item_count). Each node stores
+// an individual ROM(rom) and the pointer to the next(next).
+typedef struct rom_list_root{
+	uint32_t item_count;
+	struct rom_list* next;
+} rom_list_root_t,	*bus_roms_root_prt_t;
+
+typedef struct rom_list{
+	uint64_t rom;
+	struct rom_list* next;
+} rom_list_t,	*bus_roms_list_prt_t;
+	
+//=========================== prototypes ======================================
+// User function
+// Configures SCuM I/O for bus, set up banks, leaves all pins except RX at outputs.
+void OW_gpio_config(int rx, int tx, int pull_up);
+// Read all roms on bus, returns base to linked list.
+bus_roms_root_prt_t OWSearch_bus(void);
+// Create an array of ROMs from linked list.
+void OWGet_rom_array(uint64_t* array, bus_roms_root_prt_t root);
+ // Write a rom to bus.
+void OWWrite_rom(uint64_t device_rom);
+// Isolate a device by reseting, geting presence and writing the ROM.
+int OWIsolate_device(uint64_t device_rom); 
+// Reads a byte from bus.
+uint8_t OWRead_byte(void);
+// Reads n bytes from bus.
+void OWRead_bytes(uint8_t* buffer, int size);
+// Returns the CRC8 of a series of bytes.
+int OWCRC_bytes(uint8_t* byte_array, int size); 
+	
+// Driver
+void OWStore_rom(unsigned char* rom_bytes, bus_roms_list_prt_t base);
+void OWWriteBit(uint8_t bit);
+uint8_t OWReadBit(void);
+int OWReset(void);
+void OWWriteByte(uint8_t byte);
+//===================================
+// 1-wire search rom, code taken from;
+// https://www.analog.com/en/resources/app-notes/1wire-search-algorithm.html
+int OWFirst(void);
+int OWNext(void);
+int OWSearch(void);
+unsigned char docrc8(unsigned char value);
+#endif
diff --git a/scm_v3c/applications/1_wire/1_wire_project.uvoptx b/scm_v3c/applications/1_wire/1_wire_project.uvoptx
new file mode 100644
index 00000000..8a793242
--- /dev/null
+++ b/scm_v3c/applications/1_wire/1_wire_project.uvoptx
@@ -0,0 +1,464 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
+<ProjectOpt xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_optx.xsd">
+
+  <SchemaVersion>1.0</SchemaVersion>
+
+  <Header>### uVision Project, (C) Keil Software</Header>
+
+  <Extensions>
+    <cExt>*.c</cExt>
+    <aExt>*.s*; *.src; *.a*</aExt>
+    <oExt>*.obj; *.o</oExt>
+    <lExt>*.lib</lExt>
+    <tExt>*.txt; *.h; *.inc; *.md</tExt>
+    <pExt>*.plm</pExt>
+    <CppX>*.cpp; *.cc; *.cxx</CppX>
+    <nMigrate>0</nMigrate>
+  </Extensions>
+
+  <DaveTm>
+    <dwLowDateTime>0</dwLowDateTime>
+    <dwHighDateTime>0</dwHighDateTime>
+  </DaveTm>
+
+  <Target>
+    <TargetName>oneWire</TargetName>
+    <ToolsetNumber>0x4</ToolsetNumber>
+    <ToolsetName>ARM-ADS</ToolsetName>
+    <TargetOption>
+      <CLKADS>12000000</CLKADS>
+      <OPTTT>
+        <gFlags>1</gFlags>
+        <BeepAtEnd>1</BeepAtEnd>
+        <RunSim>0</RunSim>
+        <RunTarget>1</RunTarget>
+        <RunAbUc>0</RunAbUc>
+      </OPTTT>
+      <OPTHX>
+        <HexSelection>1</HexSelection>
+        <FlashByte>65535</FlashByte>
+        <HexRangeLowAddress>0</HexRangeLowAddress>
+        <HexRangeHighAddress>0</HexRangeHighAddress>
+        <HexOffset>0</HexOffset>
+      </OPTHX>
+      <OPTLEX>
+        <PageWidth>79</PageWidth>
+        <PageLength>66</PageLength>
+        <TabStop>8</TabStop>
+        <ListingPath>.\Listings\</ListingPath>
+      </OPTLEX>
+      <ListingPage>
+        <CreateCListing>1</CreateCListing>
+        <CreateAListing>1</CreateAListing>
+        <CreateLListing>1</CreateLListing>
+        <CreateIListing>0</CreateIListing>
+        <AsmCond>1</AsmCond>
+        <AsmSymb>1</AsmSymb>
+        <AsmXref>0</AsmXref>
+        <CCond>1</CCond>
+        <CCode>0</CCode>
+        <CListInc>0</CListInc>
+        <CSymb>0</CSymb>
+        <LinkerCodeListing>0</LinkerCodeListing>
+      </ListingPage>
+      <OPTXL>
+        <LMap>1</LMap>
+        <LComments>1</LComments>
+        <LGenerateSymbols>1</LGenerateSymbols>
+        <LLibSym>1</LLibSym>
+        <LLines>1</LLines>
+        <LLocSym>1</LLocSym>
+        <LPubSym>1</LPubSym>
+        <LXref>0</LXref>
+        <LExpSel>0</LExpSel>
+      </OPTXL>
+      <OPTFL>
+        <tvExp>1</tvExp>
+        <tvExpOptDlg>0</tvExpOptDlg>
+        <IsCurrentTarget>1</IsCurrentTarget>
+      </OPTFL>
+      <CpuCode>7</CpuCode>
+      <DebugOpt>
+        <uSim>0</uSim>
+        <uTrg>1</uTrg>
+        <sLdApp>1</sLdApp>
+        <sGomain>1</sGomain>
+        <sRbreak>1</sRbreak>
+        <sRwatch>1</sRwatch>
+        <sRmem>1</sRmem>
+        <sRfunc>1</sRfunc>
+        <sRbox>1</sRbox>
+        <tLdApp>1</tLdApp>
+        <tGomain>1</tGomain>
+        <tRbreak>1</tRbreak>
+        <tRwatch>1</tRwatch>
+        <tRmem>1</tRmem>
+        <tRfunc>0</tRfunc>
+        <tRbox>1</tRbox>
+        <tRtrace>1</tRtrace>
+        <sRSysVw>1</sRSysVw>
+        <tRSysVw>1</tRSysVw>
+        <sRunDeb>0</sRunDeb>
+        <sLrtime>0</sLrtime>
+        <bEvRecOn>1</bEvRecOn>
+        <bSchkAxf>0</bSchkAxf>
+        <bTchkAxf>0</bTchkAxf>
+        <nTsel>0</nTsel>
+        <sDll></sDll>
+        <sDllPa></sDllPa>
+        <sDlgDll></sDlgDll>
+        <sDlgPa></sDlgPa>
+        <sIfile></sIfile>
+        <tDll></tDll>
+        <tDllPa></tDllPa>
+        <tDlgDll></tDlgDll>
+        <tDlgPa></tDlgPa>
+        <tIfile></tIfile>
+        <pMon>BIN\UL2CM3.DLL</pMon>
+      </DebugOpt>
+      <TargetDriverDllRegistry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>UL2CM3</Key>
+          <Name>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000)</Name>
+        </SetRegEntry>
+      </TargetDriverDllRegistry>
+      <Breakpoint/>
+      <Tracepoint>
+        <THDelay>0</THDelay>
+      </Tracepoint>
+      <DebugFlag>
+        <trace>0</trace>
+        <periodic>0</periodic>
+        <aLwin>0</aLwin>
+        <aCover>0</aCover>
+        <aSer1>0</aSer1>
+        <aSer2>0</aSer2>
+        <aPa>0</aPa>
+        <viewmode>0</viewmode>
+        <vrSel>0</vrSel>
+        <aSym>0</aSym>
+        <aTbox>0</aTbox>
+        <AscS1>0</AscS1>
+        <AscS2>0</AscS2>
+        <AscS3>0</AscS3>
+        <aSer3>0</aSer3>
+        <eProf>0</eProf>
+        <aLa>0</aLa>
+        <aPa1>0</aPa1>
+        <AscS4>0</AscS4>
+        <aSer4>0</aSer4>
+        <StkLoc>0</StkLoc>
+        <TrcWin>0</TrcWin>
+        <newCpu>0</newCpu>
+        <uProt>0</uProt>
+      </DebugFlag>
+      <LintExecutable></LintExecutable>
+      <LintConfigFile></LintConfigFile>
+      <bLintAuto>0</bLintAuto>
+      <bAutoGenD>0</bAutoGenD>
+      <LntExFlags>0</LntExFlags>
+      <pMisraName></pMisraName>
+      <pszMrule></pszMrule>
+      <pSingCmds></pSingCmds>
+      <pMultCmds></pMultCmds>
+      <pMisraNamep></pMisraNamep>
+      <pszMrulep></pszMrulep>
+      <pSingCmdsp></pSingCmdsp>
+      <pMultCmdsp></pMultCmdsp>
+    </TargetOption>
+  </Target>
+
+  <Group>
+    <GroupName>app</GroupName>
+    <tvExp>1</tvExp>
+    <tvExpOptDlg>0</tvExpOptDlg>
+    <cbSel>0</cbSel>
+    <RteFlg>0</RteFlg>
+    <File>
+      <GroupNumber>1</GroupNumber>
+      <FileNumber>1</FileNumber>
+      <FileType>1</FileType>
+      <tvExp>0</tvExp>
+      <tvExpOptDlg>0</tvExpOptDlg>
+      <bDave2>0</bDave2>
+      <PathWithFileName>.\1_wire_test.c</PathWithFileName>
+      <FilenameWithoutPath>1_wire_test.c</FilenameWithoutPath>
+      <RteFlg>0</RteFlg>
+      <bShared>0</bShared>
+    </File>
+  </Group>
+
+  <Group>
+    <GroupName>drv</GroupName>
+    <tvExp>1</tvExp>
+    <tvExpOptDlg>0</tvExpOptDlg>
+    <cbSel>0</cbSel>
+    <RteFlg>0</RteFlg>
+    <File>
+      <GroupNumber>2</GroupNumber>
+      <FileNumber>2</FileNumber>
+      <FileType>2</FileType>
+      <tvExp>0</tvExp>
+      <tvExpOptDlg>0</tvExpOptDlg>
+      <bDave2>0</bDave2>
+      <PathWithFileName>..\..\cm0dsasm.s</PathWithFileName>
+      <FilenameWithoutPath>cm0dsasm.s</FilenameWithoutPath>
+      <RteFlg>0</RteFlg>
+      <bShared>0</bShared>
+    </File>
+    <File>
+      <GroupNumber>2</GroupNumber>
+      <FileNumber>3</FileNumber>
+      <FileType>5</FileType>
+      <tvExp>0</tvExp>
+      <tvExpOptDlg>0</tvExpOptDlg>
+      <bDave2>0</bDave2>
+      <PathWithFileName>..\..\memory_map.h</PathWithFileName>
+      <FilenameWithoutPath>memory_map.h</FilenameWithoutPath>
+      <RteFlg>0</RteFlg>
+      <bShared>0</bShared>
+    </File>
+    <File>
+      <GroupNumber>2</GroupNumber>
+      <FileNumber>4</FileNumber>
+      <FileType>1</FileType>
+      <tvExp>0</tvExp>
+      <tvExpOptDlg>0</tvExpOptDlg>
+      <bDave2>0</bDave2>
+      <PathWithFileName>..\..\retarget.c</PathWithFileName>
+      <FilenameWithoutPath>retarget.c</FilenameWithoutPath>
+      <RteFlg>0</RteFlg>
+      <bShared>0</bShared>
+    </File>
+    <File>
+      <GroupNumber>2</GroupNumber>
+      <FileNumber>5</FileNumber>
+      <FileType>5</FileType>
+      <tvExp>0</tvExp>
+      <tvExpOptDlg>0</tvExpOptDlg>
+      <bDave2>0</bDave2>
+      <PathWithFileName>..\..\optical.h</PathWithFileName>
+      <FilenameWithoutPath>optical.h</FilenameWithoutPath>
+      <RteFlg>0</RteFlg>
+      <bShared>0</bShared>
+    </File>
+    <File>
+      <GroupNumber>2</GroupNumber>
+      <FileNumber>6</FileNumber>
+      <FileType>1</FileType>
+      <tvExp>0</tvExp>
+      <tvExpOptDlg>0</tvExpOptDlg>
+      <bDave2>0</bDave2>
+      <PathWithFileName>..\..\optical.c</PathWithFileName>
+      <FilenameWithoutPath>optical.c</FilenameWithoutPath>
+      <RteFlg>0</RteFlg>
+      <bShared>0</bShared>
+    </File>
+    <File>
+      <GroupNumber>2</GroupNumber>
+      <FileNumber>7</FileNumber>
+      <FileType>1</FileType>
+      <tvExp>0</tvExp>
+      <tvExpOptDlg>0</tvExpOptDlg>
+      <bDave2>0</bDave2>
+      <PathWithFileName>..\..\adc.c</PathWithFileName>
+      <FilenameWithoutPath>adc.c</FilenameWithoutPath>
+      <RteFlg>0</RteFlg>
+      <bShared>0</bShared>
+    </File>
+    <File>
+      <GroupNumber>2</GroupNumber>
+      <FileNumber>8</FileNumber>
+      <FileType>5</FileType>
+      <tvExp>0</tvExp>
+      <tvExpOptDlg>0</tvExpOptDlg>
+      <bDave2>0</bDave2>
+      <PathWithFileName>..\..\adc.h</PathWithFileName>
+      <FilenameWithoutPath>adc.h</FilenameWithoutPath>
+      <RteFlg>0</RteFlg>
+      <bShared>0</bShared>
+    </File>
+    <File>
+      <GroupNumber>2</GroupNumber>
+      <FileNumber>9</FileNumber>
+      <FileType>1</FileType>
+      <tvExp>0</tvExp>
+      <tvExpOptDlg>0</tvExpOptDlg>
+      <bDave2>0</bDave2>
+      <PathWithFileName>..\..\uart.c</PathWithFileName>
+      <FilenameWithoutPath>uart.c</FilenameWithoutPath>
+      <RteFlg>0</RteFlg>
+      <bShared>0</bShared>
+    </File>
+    <File>
+      <GroupNumber>2</GroupNumber>
+      <FileNumber>10</FileNumber>
+      <FileType>5</FileType>
+      <tvExp>0</tvExp>
+      <tvExpOptDlg>0</tvExpOptDlg>
+      <bDave2>0</bDave2>
+      <PathWithFileName>..\..\uart.h</PathWithFileName>
+      <FilenameWithoutPath>uart.h</FilenameWithoutPath>
+      <RteFlg>0</RteFlg>
+      <bShared>0</bShared>
+    </File>
+    <File>
+      <GroupNumber>2</GroupNumber>
+      <FileNumber>11</FileNumber>
+      <FileType>1</FileType>
+      <tvExp>0</tvExp>
+      <tvExpOptDlg>0</tvExpOptDlg>
+      <bDave2>0</bDave2>
+      <PathWithFileName>..\..\gpio.c</PathWithFileName>
+      <FilenameWithoutPath>gpio.c</FilenameWithoutPath>
+      <RteFlg>0</RteFlg>
+      <bShared>0</bShared>
+    </File>
+    <File>
+      <GroupNumber>2</GroupNumber>
+      <FileNumber>12</FileNumber>
+      <FileType>5</FileType>
+      <tvExp>0</tvExp>
+      <tvExpOptDlg>0</tvExpOptDlg>
+      <bDave2>0</bDave2>
+      <PathWithFileName>..\..\gpio.h</PathWithFileName>
+      <FilenameWithoutPath>gpio.h</FilenameWithoutPath>
+      <RteFlg>0</RteFlg>
+      <bShared>0</bShared>
+    </File>
+    <File>
+      <GroupNumber>2</GroupNumber>
+      <FileNumber>13</FileNumber>
+      <FileType>1</FileType>
+      <tvExp>0</tvExp>
+      <tvExpOptDlg>0</tvExpOptDlg>
+      <bDave2>0</bDave2>
+      <PathWithFileName>..\..\rftimer.c</PathWithFileName>
+      <FilenameWithoutPath>rftimer.c</FilenameWithoutPath>
+      <RteFlg>0</RteFlg>
+      <bShared>0</bShared>
+    </File>
+    <File>
+      <GroupNumber>2</GroupNumber>
+      <FileNumber>14</FileNumber>
+      <FileType>5</FileType>
+      <tvExp>0</tvExp>
+      <tvExpOptDlg>0</tvExpOptDlg>
+      <bDave2>0</bDave2>
+      <PathWithFileName>..\..\rftimer.h</PathWithFileName>
+      <FilenameWithoutPath>rftimer.h</FilenameWithoutPath>
+      <RteFlg>0</RteFlg>
+      <bShared>0</bShared>
+    </File>
+    <File>
+      <GroupNumber>2</GroupNumber>
+      <FileNumber>15</FileNumber>
+      <FileType>1</FileType>
+      <tvExp>0</tvExp>
+      <tvExpOptDlg>0</tvExpOptDlg>
+      <bDave2>0</bDave2>
+      <PathWithFileName>..\..\scm3c_hw_interface.c</PathWithFileName>
+      <FilenameWithoutPath>scm3c_hw_interface.c</FilenameWithoutPath>
+      <RteFlg>0</RteFlg>
+      <bShared>0</bShared>
+    </File>
+    <File>
+      <GroupNumber>2</GroupNumber>
+      <FileNumber>16</FileNumber>
+      <FileType>5</FileType>
+      <tvExp>0</tvExp>
+      <tvExpOptDlg>0</tvExpOptDlg>
+      <bDave2>0</bDave2>
+      <PathWithFileName>..\..\scm3c_hw_interface.h</PathWithFileName>
+      <FilenameWithoutPath>scm3c_hw_interface.h</FilenameWithoutPath>
+      <RteFlg>0</RteFlg>
+      <bShared>0</bShared>
+    </File>
+    <File>
+      <GroupNumber>2</GroupNumber>
+      <FileNumber>17</FileNumber>
+      <FileType>1</FileType>
+      <tvExp>0</tvExp>
+      <tvExpOptDlg>0</tvExpOptDlg>
+      <bDave2>0</bDave2>
+      <PathWithFileName>..\..\radio.c</PathWithFileName>
+      <FilenameWithoutPath>radio.c</FilenameWithoutPath>
+      <RteFlg>0</RteFlg>
+      <bShared>0</bShared>
+    </File>
+    <File>
+      <GroupNumber>2</GroupNumber>
+      <FileNumber>18</FileNumber>
+      <FileType>5</FileType>
+      <tvExp>0</tvExp>
+      <tvExpOptDlg>0</tvExpOptDlg>
+      <bDave2>0</bDave2>
+      <PathWithFileName>..\..\radio.h</PathWithFileName>
+      <FilenameWithoutPath>radio.h</FilenameWithoutPath>
+      <RteFlg>0</RteFlg>
+      <bShared>0</bShared>
+    </File>
+    <File>
+      <GroupNumber>2</GroupNumber>
+      <FileNumber>19</FileNumber>
+      <FileType>5</FileType>
+      <tvExp>0</tvExp>
+      <tvExpOptDlg>0</tvExpOptDlg>
+      <bDave2>0</bDave2>
+      <PathWithFileName>..\..\scum_defs.h</PathWithFileName>
+      <FilenameWithoutPath>scum_defs.h</FilenameWithoutPath>
+      <RteFlg>0</RteFlg>
+      <bShared>0</bShared>
+    </File>
+    <File>
+      <GroupNumber>2</GroupNumber>
+      <FileNumber>20</FileNumber>
+      <FileType>1</FileType>
+      <tvExp>0</tvExp>
+      <tvExpOptDlg>0</tvExpOptDlg>
+      <bDave2>0</bDave2>
+      <PathWithFileName>..\..\1_wire.c</PathWithFileName>
+      <FilenameWithoutPath>1_wire.c</FilenameWithoutPath>
+      <RteFlg>0</RteFlg>
+      <bShared>0</bShared>
+    </File>
+    <File>
+      <GroupNumber>2</GroupNumber>
+      <FileNumber>21</FileNumber>
+      <FileType>5</FileType>
+      <tvExp>0</tvExp>
+      <tvExpOptDlg>0</tvExpOptDlg>
+      <bDave2>0</bDave2>
+      <PathWithFileName>..\..\1_wire.h</PathWithFileName>
+      <FilenameWithoutPath>1_wire.h</FilenameWithoutPath>
+      <RteFlg>0</RteFlg>
+      <bShared>0</bShared>
+    </File>
+    <File>
+      <GroupNumber>2</GroupNumber>
+      <FileNumber>22</FileNumber>
+      <FileType>1</FileType>
+      <tvExp>0</tvExp>
+      <tvExpOptDlg>0</tvExpOptDlg>
+      <bDave2>0</bDave2>
+      <PathWithFileName>.\DS18B20.c</PathWithFileName>
+      <FilenameWithoutPath>DS18B20.c</FilenameWithoutPath>
+      <RteFlg>0</RteFlg>
+      <bShared>0</bShared>
+    </File>
+    <File>
+      <GroupNumber>2</GroupNumber>
+      <FileNumber>23</FileNumber>
+      <FileType>5</FileType>
+      <tvExp>0</tvExp>
+      <tvExpOptDlg>0</tvExpOptDlg>
+      <bDave2>0</bDave2>
+      <PathWithFileName>.\DS18B20.h</PathWithFileName>
+      <FilenameWithoutPath>DS18B20.h</FilenameWithoutPath>
+      <RteFlg>0</RteFlg>
+      <bShared>0</bShared>
+    </File>
+  </Group>
+
+</ProjectOpt>
diff --git a/scm_v3c/applications/1_wire/1_wire_project.uvprojx b/scm_v3c/applications/1_wire/1_wire_project.uvprojx
new file mode 100644
index 00000000..1166f7a1
--- /dev/null
+++ b/scm_v3c/applications/1_wire/1_wire_project.uvprojx
@@ -0,0 +1,527 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
+<Project xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_projx.xsd">
+
+  <SchemaVersion>2.1</SchemaVersion>
+
+  <Header>### uVision Project, (C) Keil Software</Header>
+
+  <Targets>
+    <Target>
+      <TargetName>oneWire</TargetName>
+      <ToolsetNumber>0x4</ToolsetNumber>
+      <ToolsetName>ARM-ADS</ToolsetName>
+      <pCCUsed>5060960::V5.06 update 7 (build 960)::.\ARMCC</pCCUsed>
+      <uAC6>0</uAC6>
+      <TargetOption>
+        <TargetCommonOption>
+          <Device>ARMCM0</Device>
+          <Vendor>ARM</Vendor>
+          <PackID>ARM.CMSIS.5.8.0</PackID>
+          <PackURL>http://www.keil.com/pack/</PackURL>
+          <Cpu>IRAM(0x20000000,0x00020000) IROM(0x00000000,0x00040000) CPUTYPE("Cortex-M0") CLOCK(12000000) ESEL ELITTLE</Cpu>
+          <FlashUtilSpec></FlashUtilSpec>
+          <StartupFile></StartupFile>
+          <FlashDriverDll>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000)</FlashDriverDll>
+          <DeviceId>0</DeviceId>
+          <RegisterFile>$$Device:ARMCM0$Device\ARM\ARMCM0\Include\ARMCM0.h</RegisterFile>
+          <MemoryEnv></MemoryEnv>
+          <Cmp></Cmp>
+          <Asm></Asm>
+          <Linker></Linker>
+          <OHString></OHString>
+          <InfinionOptionDll></InfinionOptionDll>
+          <SLE66CMisc></SLE66CMisc>
+          <SLE66AMisc></SLE66AMisc>
+          <SLE66LinkerMisc></SLE66LinkerMisc>
+          <SFDFile></SFDFile>
+          <bCustSvd>0</bCustSvd>
+          <UseEnv>0</UseEnv>
+          <BinPath></BinPath>
+          <IncludePath></IncludePath>
+          <LibPath></LibPath>
+          <RegisterFilePath></RegisterFilePath>
+          <DBRegisterFilePath></DBRegisterFilePath>
+          <TargetStatus>
+            <Error>0</Error>
+            <ExitCodeStop>0</ExitCodeStop>
+            <ButtonStop>0</ButtonStop>
+            <NotGenerated>0</NotGenerated>
+            <InvalidFlash>1</InvalidFlash>
+          </TargetStatus>
+          <OutputDirectory>.\Objects\</OutputDirectory>
+          <OutputName>1_wire</OutputName>
+          <CreateExecutable>1</CreateExecutable>
+          <CreateLib>0</CreateLib>
+          <CreateHexFile>1</CreateHexFile>
+          <DebugInformation>1</DebugInformation>
+          <BrowseInformation>1</BrowseInformation>
+          <ListingPath>.\Listings\</ListingPath>
+          <HexFormatSelection>1</HexFormatSelection>
+          <Merge32K>0</Merge32K>
+          <CreateBatchFile>0</CreateBatchFile>
+          <BeforeCompile>
+            <RunUserProg1>0</RunUserProg1>
+            <RunUserProg2>0</RunUserProg2>
+            <UserProg1Name></UserProg1Name>
+            <UserProg2Name></UserProg2Name>
+            <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
+            <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
+            <nStopU1X>0</nStopU1X>
+            <nStopU2X>0</nStopU2X>
+          </BeforeCompile>
+          <BeforeMake>
+            <RunUserProg1>0</RunUserProg1>
+            <RunUserProg2>0</RunUserProg2>
+            <UserProg1Name></UserProg1Name>
+            <UserProg2Name></UserProg2Name>
+            <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
+            <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
+            <nStopB1X>0</nStopB1X>
+            <nStopB2X>0</nStopB2X>
+          </BeforeMake>
+          <AfterMake>
+            <RunUserProg1>1</RunUserProg1>
+            <RunUserProg2>1</RunUserProg2>
+            <UserProg1Name>fromelf --bin .\Objects\1_Wire.axf -o .\Objects\1_Wire.bin</UserProg1Name>
+            <UserProg2Name>fromelf -cvf .\Objects\1_Wire.axf -o .\Objects\disasm.txt</UserProg2Name>
+            <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
+            <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
+            <nStopA1X>0</nStopA1X>
+            <nStopA2X>0</nStopA2X>
+          </AfterMake>
+          <SelectedForBatchBuild>0</SelectedForBatchBuild>
+          <SVCSIdString></SVCSIdString>
+        </TargetCommonOption>
+        <CommonProperty>
+          <UseCPPCompiler>0</UseCPPCompiler>
+          <RVCTCodeConst>0</RVCTCodeConst>
+          <RVCTZI>0</RVCTZI>
+          <RVCTOtherData>0</RVCTOtherData>
+          <ModuleSelection>0</ModuleSelection>
+          <IncludeInBuild>1</IncludeInBuild>
+          <AlwaysBuild>0</AlwaysBuild>
+          <GenerateAssemblyFile>0</GenerateAssemblyFile>
+          <AssembleAssemblyFile>0</AssembleAssemblyFile>
+          <PublicsOnly>0</PublicsOnly>
+          <StopOnExitCode>3</StopOnExitCode>
+          <CustomArgument></CustomArgument>
+          <IncludeLibraryModules></IncludeLibraryModules>
+          <ComprImg>1</ComprImg>
+        </CommonProperty>
+        <DllOption>
+          <SimDllName>SARMCM3.DLL</SimDllName>
+          <SimDllArguments>  </SimDllArguments>
+          <SimDlgDll>DARMCM1.DLL</SimDlgDll>
+          <SimDlgDllArguments>-pCM0</SimDlgDllArguments>
+          <TargetDllName>SARMCM3.DLL</TargetDllName>
+          <TargetDllArguments> </TargetDllArguments>
+          <TargetDlgDll>TARMCM1.DLL</TargetDlgDll>
+          <TargetDlgDllArguments>-pCM0</TargetDlgDllArguments>
+        </DllOption>
+        <DebugOption>
+          <OPTHX>
+            <HexSelection>1</HexSelection>
+            <HexRangeLowAddress>0</HexRangeLowAddress>
+            <HexRangeHighAddress>0</HexRangeHighAddress>
+            <HexOffset>0</HexOffset>
+            <Oh166RecLen>16</Oh166RecLen>
+          </OPTHX>
+        </DebugOption>
+        <Utilities>
+          <Flash1>
+            <UseTargetDll>1</UseTargetDll>
+            <UseExternalTool>0</UseExternalTool>
+            <RunIndependent>0</RunIndependent>
+            <UpdateFlashBeforeDebugging>1</UpdateFlashBeforeDebugging>
+            <Capability>1</Capability>
+            <DriverSelection>4096</DriverSelection>
+          </Flash1>
+          <bUseTDR>1</bUseTDR>
+          <Flash2>BIN\UL2CM3.DLL</Flash2>
+          <Flash3>"" ()</Flash3>
+          <Flash4></Flash4>
+          <pFcarmOut></pFcarmOut>
+          <pFcarmGrp></pFcarmGrp>
+          <pFcArmRoot></pFcArmRoot>
+          <FcArmLst>0</FcArmLst>
+        </Utilities>
+        <TargetArmAds>
+          <ArmAdsMisc>
+            <GenerateListings>0</GenerateListings>
+            <asHll>1</asHll>
+            <asAsm>1</asAsm>
+            <asMacX>1</asMacX>
+            <asSyms>1</asSyms>
+            <asFals>1</asFals>
+            <asDbgD>1</asDbgD>
+            <asForm>1</asForm>
+            <ldLst>0</ldLst>
+            <ldmm>1</ldmm>
+            <ldXref>1</ldXref>
+            <BigEnd>0</BigEnd>
+            <AdsALst>1</AdsALst>
+            <AdsACrf>1</AdsACrf>
+            <AdsANop>0</AdsANop>
+            <AdsANot>0</AdsANot>
+            <AdsLLst>1</AdsLLst>
+            <AdsLmap>1</AdsLmap>
+            <AdsLcgr>1</AdsLcgr>
+            <AdsLsym>1</AdsLsym>
+            <AdsLszi>1</AdsLszi>
+            <AdsLtoi>1</AdsLtoi>
+            <AdsLsun>1</AdsLsun>
+            <AdsLven>1</AdsLven>
+            <AdsLsxf>1</AdsLsxf>
+            <RvctClst>0</RvctClst>
+            <GenPPlst>0</GenPPlst>
+            <AdsCpuType>"Cortex-M0"</AdsCpuType>
+            <RvctDeviceName></RvctDeviceName>
+            <mOS>0</mOS>
+            <uocRom>0</uocRom>
+            <uocRam>0</uocRam>
+            <hadIROM>1</hadIROM>
+            <hadIRAM>1</hadIRAM>
+            <hadXRAM>0</hadXRAM>
+            <uocXRam>0</uocXRam>
+            <RvdsVP>0</RvdsVP>
+            <RvdsMve>0</RvdsMve>
+            <RvdsCdeCp>0</RvdsCdeCp>
+            <hadIRAM2>0</hadIRAM2>
+            <hadIROM2>0</hadIROM2>
+            <StupSel>8</StupSel>
+            <useUlib>0</useUlib>
+            <EndSel>1</EndSel>
+            <uLtcg>0</uLtcg>
+            <nSecure>0</nSecure>
+            <RoSelD>3</RoSelD>
+            <RwSelD>3</RwSelD>
+            <CodeSel>0</CodeSel>
+            <OptFeed>0</OptFeed>
+            <NoZi1>0</NoZi1>
+            <NoZi2>0</NoZi2>
+            <NoZi3>0</NoZi3>
+            <NoZi4>0</NoZi4>
+            <NoZi5>0</NoZi5>
+            <Ro1Chk>0</Ro1Chk>
+            <Ro2Chk>0</Ro2Chk>
+            <Ro3Chk>0</Ro3Chk>
+            <Ir1Chk>1</Ir1Chk>
+            <Ir2Chk>0</Ir2Chk>
+            <Ra1Chk>0</Ra1Chk>
+            <Ra2Chk>0</Ra2Chk>
+            <Ra3Chk>0</Ra3Chk>
+            <Im1Chk>1</Im1Chk>
+            <Im2Chk>0</Im2Chk>
+            <OnChipMemories>
+              <Ocm1>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </Ocm1>
+              <Ocm2>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </Ocm2>
+              <Ocm3>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </Ocm3>
+              <Ocm4>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </Ocm4>
+              <Ocm5>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </Ocm5>
+              <Ocm6>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </Ocm6>
+              <IRAM>
+                <Type>0</Type>
+                <StartAddress>0x20000000</StartAddress>
+                <Size>0x20000</Size>
+              </IRAM>
+              <IROM>
+                <Type>1</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x40000</Size>
+              </IROM>
+              <XRAM>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </XRAM>
+              <OCR_RVCT1>
+                <Type>1</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT1>
+              <OCR_RVCT2>
+                <Type>1</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT2>
+              <OCR_RVCT3>
+                <Type>1</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT3>
+              <OCR_RVCT4>
+                <Type>1</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x10000</Size>
+              </OCR_RVCT4>
+              <OCR_RVCT5>
+                <Type>1</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT5>
+              <OCR_RVCT6>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT6>
+              <OCR_RVCT7>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT7>
+              <OCR_RVCT8>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT8>
+              <OCR_RVCT9>
+                <Type>0</Type>
+                <StartAddress>0x20000000</StartAddress>
+                <Size>0x10000</Size>
+              </OCR_RVCT9>
+              <OCR_RVCT10>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT10>
+            </OnChipMemories>
+            <RvctStartVector></RvctStartVector>
+          </ArmAdsMisc>
+          <Cads>
+            <interw>1</interw>
+            <Optim>1</Optim>
+            <oTime>0</oTime>
+            <SplitLS>0</SplitLS>
+            <OneElfS>0</OneElfS>
+            <Strict>0</Strict>
+            <EnumInt>0</EnumInt>
+            <PlainCh>0</PlainCh>
+            <Ropi>0</Ropi>
+            <Rwpi>0</Rwpi>
+            <wLevel>2</wLevel>
+            <uThumb>0</uThumb>
+            <uSurpInc>0</uSurpInc>
+            <uC99>1</uC99>
+            <uGnu>0</uGnu>
+            <useXO>0</useXO>
+            <v6Lang>3</v6Lang>
+            <v6LangP>3</v6LangP>
+            <vShortEn>1</vShortEn>
+            <vShortWch>1</vShortWch>
+            <v6Lto>0</v6Lto>
+            <v6WtE>0</v6WtE>
+            <v6Rtti>0</v6Rtti>
+            <VariousControls>
+              <MiscControls></MiscControls>
+              <Define></Define>
+              <Undefine></Undefine>
+              <IncludePath>../../</IncludePath>
+            </VariousControls>
+          </Cads>
+          <Aads>
+            <interw>1</interw>
+            <Ropi>0</Ropi>
+            <Rwpi>0</Rwpi>
+            <thumb>1</thumb>
+            <SplitLS>0</SplitLS>
+            <SwStkChk>0</SwStkChk>
+            <NoWarn>0</NoWarn>
+            <uSurpInc>0</uSurpInc>
+            <useXO>0</useXO>
+            <ClangAsOpt>1</ClangAsOpt>
+            <VariousControls>
+              <MiscControls></MiscControls>
+              <Define></Define>
+              <Undefine></Undefine>
+              <IncludePath></IncludePath>
+            </VariousControls>
+          </Aads>
+          <LDads>
+            <umfTarg>1</umfTarg>
+            <Ropi>0</Ropi>
+            <Rwpi>0</Rwpi>
+            <noStLib>0</noStLib>
+            <RepFail>1</RepFail>
+            <useFile>0</useFile>
+            <TextAddressRange>0x00000000</TextAddressRange>
+            <DataAddressRange>0x20000000</DataAddressRange>
+            <pXoBase></pXoBase>
+            <ScatterFile></ScatterFile>
+            <IncludeLibs></IncludeLibs>
+            <IncludeLibsPath></IncludeLibsPath>
+            <Misc></Misc>
+            <LinkerInputFile></LinkerInputFile>
+            <DisabledWarnings></DisabledWarnings>
+          </LDads>
+        </TargetArmAds>
+      </TargetOption>
+      <Groups>
+        <Group>
+          <GroupName>app</GroupName>
+          <Files>
+            <File>
+              <FileName>1_wire_test.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>.\1_wire_test.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>drv</GroupName>
+          <Files>
+            <File>
+              <FileName>cm0dsasm.s</FileName>
+              <FileType>2</FileType>
+              <FilePath>..\..\cm0dsasm.s</FilePath>
+            </File>
+            <File>
+              <FileName>memory_map.h</FileName>
+              <FileType>5</FileType>
+              <FilePath>..\..\memory_map.h</FilePath>
+            </File>
+            <File>
+              <FileName>retarget.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\retarget.c</FilePath>
+            </File>
+            <File>
+              <FileName>optical.h</FileName>
+              <FileType>5</FileType>
+              <FilePath>..\..\optical.h</FilePath>
+            </File>
+            <File>
+              <FileName>optical.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\optical.c</FilePath>
+            </File>
+            <File>
+              <FileName>adc.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\adc.c</FilePath>
+            </File>
+            <File>
+              <FileName>adc.h</FileName>
+              <FileType>5</FileType>
+              <FilePath>..\..\adc.h</FilePath>
+            </File>
+            <File>
+              <FileName>uart.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\uart.c</FilePath>
+            </File>
+            <File>
+              <FileName>uart.h</FileName>
+              <FileType>5</FileType>
+              <FilePath>..\..\uart.h</FilePath>
+            </File>
+            <File>
+              <FileName>gpio.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\gpio.c</FilePath>
+            </File>
+            <File>
+              <FileName>gpio.h</FileName>
+              <FileType>5</FileType>
+              <FilePath>..\..\gpio.h</FilePath>
+            </File>
+            <File>
+              <FileName>rftimer.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\rftimer.c</FilePath>
+            </File>
+            <File>
+              <FileName>rftimer.h</FileName>
+              <FileType>5</FileType>
+              <FilePath>..\..\rftimer.h</FilePath>
+            </File>
+            <File>
+              <FileName>scm3c_hw_interface.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\scm3c_hw_interface.c</FilePath>
+            </File>
+            <File>
+              <FileName>scm3c_hw_interface.h</FileName>
+              <FileType>5</FileType>
+              <FilePath>..\..\scm3c_hw_interface.h</FilePath>
+            </File>
+            <File>
+              <FileName>radio.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\radio.c</FilePath>
+            </File>
+            <File>
+              <FileName>radio.h</FileName>
+              <FileType>5</FileType>
+              <FilePath>..\..\radio.h</FilePath>
+            </File>
+            <File>
+              <FileName>scum_defs.h</FileName>
+              <FileType>5</FileType>
+              <FilePath>..\..\scum_defs.h</FilePath>
+            </File>
+            <File>
+              <FileName>1_wire.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\1_wire.c</FilePath>
+            </File>
+            <File>
+              <FileName>1_wire.h</FileName>
+              <FileType>5</FileType>
+              <FilePath>..\..\1_wire.h</FilePath>
+            </File>
+            <File>
+              <FileName>DS18B20.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>.\DS18B20.c</FilePath>
+            </File>
+            <File>
+              <FileName>DS18B20.h</FileName>
+              <FileType>5</FileType>
+              <FilePath>.\DS18B20.h</FilePath>
+            </File>
+          </Files>
+        </Group>
+      </Groups>
+    </Target>
+  </Targets>
+
+  <RTE>
+    <apis/>
+    <components/>
+    <files/>
+  </RTE>
+
+  <LayerInfo>
+    <Layers>
+      <Layer>
+        <LayName>oneWire</LayName>
+        <LayPrjMark>1</LayPrjMark>
+      </Layer>
+    </Layers>
+  </LayerInfo>
+
+</Project>
diff --git a/scm_v3c/applications/1_wire/1_wire_test.c b/scm_v3c/applications/1_wire/1_wire_test.c
new file mode 100644
index 00000000..aab262f1
--- /dev/null
+++ b/scm_v3c/applications/1_wire/1_wire_test.c
@@ -0,0 +1,102 @@
+#include <stdbool.h>
+#include <stdlib.h>
+#include <string.h>
+#include <stdio.h>
+
+#include "memory_map.h"
+#include "optical.h"
+#include "scm3c_hw_interface.h"
+#include "gpio.h"
+#include "rftimer.h"
+#include "1_wire.h"
+#include "DS18B20.h"
+
+//=========================== defines =========================================
+// SCuM
+#define CRC_VALUE (*((unsigned int*)0x0000FFFC))
+#define CODE_LENGTH (*((unsigned int*)0x0000FFF8))
+
+#define DS18B20 
+//=========================== variables =======================================
+// SCuM
+typedef struct {
+    uint8_t count;
+} app_vars_t;
+
+app_vars_t app_vars;
+
+//=========================== prototypes ======================================
+// 1-Wire
+
+void silence_callback(void);
+//=========================== main ============================================
+
+int main(void) {	
+	// ===================init the mote============================================
+	memset(&app_vars, 0, sizeof(app_vars_t)); 
+	printf("Initializing...\r\n");
+	initialize_mote();
+	crc_check();
+	perform_calibration();
+	printf("Initialization Complete.\r\n");
+	rftimer_set_callback_by_id(silence_callback, 1);
+	
+// Start -- 1-wire init.===========================================================
+	/*
+	GPIO 0, 1 are configured for bus using "OW_gpio_config();"
+	Declare List root.
+	Assign OWSearch_bus()'s output to the root. Returns NULL on fail.
+	Declare array with List root member "item_count" elements.
+	Pass both the root and the array to OWGet_rom_array tranfer() moves the list into an array.
+	*/
+	OW_gpio_config(RX_PIN, TX_PIN, STRONG_PULL_UP_PIN); // config for GPIO_0 = TX, GPIO_1 = RX, and  GPIO_2 = pull-up
+	bus_roms_root_prt_t rom_list_root; //Declaring List root.
+	if((rom_list_root = OWSearch_bus()) == NULL)// Try to get the ROMs of all devices
+	{
+		printf("No ROMs Found.\r\n");
+	}
+	else //OWSearch_bus() found >= 1 ROM
+	{
+		uint64_t ROMS[rom_list_root->item_count]; // Declare array with root member "item_count" elements.
+		OWGet_rom_array(ROMS, rom_list_root); // Store ROMs in array, frees linked list
+// END -- 1-wire init.=============================================================	
+		for(int i = 0; i < sizeof(ROMS) / sizeof(uint64_t); i++)// Print all ROMs
+		{
+			printf("0x%llX\r\n", ROMS[i]);
+		}
+
+	/*
+	After 1-wire init. success all roms discovered on bus are stored in ROMS[].
+	Individual devices can be isolated using OWIsolate_device(ROMS[n]);
+	*/
+		#ifdef DS18B20
+		for(int i = 0; i < sizeof(ROMS) / sizeof(uint64_t); i++)
+		{
+			if((ROMS[i] & 0x28) == 0x28)
+			{
+				init_DS18B20(ROMS[i], 100, 10, RESOLUTION); // resolution is defined in DS18B20.h
+			}
+		}
+		int count = 1;
+		while(1)
+		{
+			printf("Sample #%d\r\n", count);
+			for(int i = 0; i < sizeof(ROMS) / sizeof(uint64_t); i++)
+			{
+				if((ROMS[i] & 0x28) == 0x28)
+				{
+					OWIsolate_device(ROMS[i]);
+					printf("Sensor %d temp = %dC\r\n", i, get_temp(ROMS[i], USE_STRONG_PULL));
+				}
+			}
+			count++;
+			delay_milliseconds_synchronous(1000	, 1);
+		}
+		#endif
+	}
+}
+
+void silence_callback(void)
+{
+	//SHHHHH!!!!
+}
diff --git a/scm_v3c/applications/1_wire/Bus schematic.png b/scm_v3c/applications/1_wire/Bus schematic.png
new file mode 100644
index 00000000..75fd899b
Binary files /dev/null and b/scm_v3c/applications/1_wire/Bus schematic.png differ
diff --git a/scm_v3c/applications/1_wire/DS18B20.c b/scm_v3c/applications/1_wire/DS18B20.c
new file mode 100644
index 00000000..62e6d1ef
--- /dev/null
+++ b/scm_v3c/applications/1_wire/DS18B20.c
@@ -0,0 +1,123 @@
+#include <stdlib.h>
+#include <stdio.h>
+
+#include "DS18B20.h"
+#include "1_wire.h"
+#include "rftimer.h"
+
+// DS18B20 =======================================================================
+// Isolates then configures a DS18B20's alarms and resolution registers.
+// Write all changes to EEPROM
+// config = 9 | 10 | 11 | 12, for resolution bits
+void init_DS18B20(uint64_t device_rom, uint8_t T_h, uint8_t T_l, uint8_t resolution)
+{
+	int config; // resolution sets config
+	switch(RESOLUTION)
+	{
+		case 9:
+			config = 0x00;
+			break;
+		case 10:
+			config = 0x20;
+			break;
+		case 11:
+			config = 0x40;
+			break;
+		case 12:
+			config = 0x60;
+			break;
+		default:
+			config = 0x00;
+			break;
+	}
+
+	uint8_t scratch_mem[9] = {0}; // Read the scratch
+	int cnt = 0;
+	do
+	{
+		// Write the config registers.
+		OWIsolate_device(device_rom);
+		OWWriteByte(WRITE_SCRATCH);
+		OWWriteByte(T_h); // T_high alarm
+		OWWriteByte(T_l); // T_low alarm
+		OWWriteByte(config); // resolution config.
+		
+		// Copy scatch memory into device EEPROM 
+		OWIsolate_device(device_rom);
+		OWWriteByte(COPY_SCRATCH); // Copies to EEPROM
+		STRONG_PULL_UP_ON();
+		delay_milliseconds_synchronous(15, 1);
+		STRONG_PULL_UP_OFF();
+
+		// Read scatch memory for CRC check.
+		OWIsolate_device(device_rom);
+		OWWriteByte(READ_SCRATCH);
+		OWRead_bytes(scratch_mem, sizeof(scratch_mem));
+		cnt++;
+		if(cnt > 10)
+		{
+			printf("\r\nCRC fail\r\n");
+		}
+	}while(((OWCRC_bytes(scratch_mem, sizeof(scratch_mem) + 1)) != 0) && (cnt <= 10));
+}
+
+// Returns temperature data from a given ROM
+uint16_t get_temp(uint64_t device_rom, int use_strong_pull_up)
+{
+	int delay; // Resolution selects delay
+	switch(RESOLUTION)
+	{
+		case 9:
+			delay = T_CONV_9;
+			break;
+		case 10:
+			delay = T_CONV_10;
+			break;
+		case 11:
+			delay = T_CONV_11;
+			break;
+		case 12:
+			delay = T_CONV_12;
+			break;
+		default:
+			delay = T_CONV_9;
+			break;
+	}
+	uint8_t scratch_bytes[9] = {0};
+	uint16_t temp_val = 0x00;
+	int cnt = 0;
+	do{
+		OWIsolate_device(device_rom);
+		if(use_strong_pull_up > 0)
+		{
+			
+			OWWriteByte(CONVERT_T);// take a temperature reading
+			STRONG_PULL_UP_ON();
+			delay_milliseconds_synchronous(delay + 10, 1); // Let the sensor think
+			STRONG_PULL_UP_OFF();
+			NOP_500();
+		}
+		else
+		{
+			OWWriteByte(CONVERT_T);// take a temperature reading
+			delay_milliseconds_synchronous(delay, 1); // Let the sensor think
+		}
+		
+
+		OWIsolate_device(device_rom);
+		OWWriteByte(READ_SCRATCH);
+		OWRead_bytes(scratch_bytes, sizeof(scratch_bytes));
+		temp_val |= scratch_bytes[1]; // MSB
+		temp_val = (temp_val << 8);
+		temp_val |= scratch_bytes[0]; // LSB
+		temp_val = (temp_val >> 4); // Truncate the decimal for now.
+		cnt++;
+		if(cnt > 10)
+		{
+			printf("\r\nCRC fail\r\n");
+		}
+		//temp_val = (int)((temp_val * (9/5)) + 32); // convert to Freedom units ;)
+	}while(((OWCRC_bytes(scratch_bytes, sizeof(scratch_bytes) + 1)) != 0) && (cnt <= 10));
+	return temp_val;
+}
+
diff --git a/scm_v3c/applications/1_wire/DS18B20.h b/scm_v3c/applications/1_wire/DS18B20.h
new file mode 100644
index 00000000..2a15bd22
--- /dev/null
+++ b/scm_v3c/applications/1_wire/DS18B20.h
@@ -0,0 +1,29 @@
+#ifndef __DS18B20_H
+#define __DS18B20_H
+
+#include <stdint.h>
+#include <stdlib.h>
+#include <stdio.h>
+#include "memory_map.h"
+
+//=========================== defines =========================================
+// ***  Congfig. defines 
+// DS18B20 resolution - valid values are only {9,10,11,12}
+#define RESOLUTION 12
+// End Congfig. defines ***
+
+#define READ_SCRATCH 0xBE
+#define WRITE_SCRATCH 0x4E
+#define COPY_SCRATCH 0x48
+#define RECALL_E2 0xB8
+#define READ_POWER_SUPPLY 0xB4
+#define CONVERT_T 0x44
+#define T_CONV_9 94
+#define T_CONV_10 188
+#define T_CONV_11 375
+#define T_CONV_12 750
+//=========================== prototypes ======================================
+// DS18B20
+void init_DS18B20(uint64_t device_rom, uint8_t T_h, uint8_t T_l, uint8_t config);
+uint16_t get_temp(uint64_t device_rom, int use_strong_pull_up);
+#endif
diff --git a/scm_v3c/gpio.c b/scm_v3c/gpio.c
index 3f79c8c0..359d4cb9 100644
--- a/scm_v3c/gpio.c
+++ b/scm_v3c/gpio.c
@@ -11,6 +11,8 @@ void gpio_set_low(const gpio_e gpio) { GPIO_REG__OUTPUT &= ~(1 << gpio); }
 
 void gpio_toggle(const gpio_e gpio) { GPIO_REG__OUTPUT ^= (1 << gpio); }
 
+int gpio_read(const gpio_e gpio) { return (GPIO_REG__INPUT &= (1 << gpio)) ? 1 : 0; } 
+
 void gpio_init(void) {
     // Initialize all pins to be low.
     GPIO_REG__OUTPUT &= ~0xFFFF;
@@ -19,66 +21,82 @@ void gpio_init(void) {
 void gpio_0_set(void) { gpio_set_high(GPIO_0); }
 void gpio_0_clr(void) { gpio_set_low(GPIO_0); }
 void gpio_0_toggle(void) { gpio_toggle(GPIO_0); }
+int gpio_0_read(void)	{	return gpio_read(GPIO_0);	}
 
 void gpio_1_set(void) { gpio_set_high(GPIO_1); }
 void gpio_1_clr(void) { gpio_set_low(GPIO_1); }
 void gpio_1_toggle(void) { gpio_toggle(GPIO_1); }
+int gpio_1_read(void)	{	return gpio_read(GPIO_1);	}
 
 void gpio_2_set(void) { gpio_set_high(GPIO_2); }
 void gpio_2_clr(void) { gpio_set_low(GPIO_2); }
 void gpio_2_toggle(void) { gpio_toggle(GPIO_2); }
+int gpio_2_read(void)	{	return gpio_read(GPIO_2);	}
 
 void gpio_3_set(void) { gpio_set_high(GPIO_3); }
 void gpio_3_clr(void) { gpio_set_low(GPIO_3); }
 void gpio_3_toggle(void) { gpio_toggle(GPIO_3); }
+int gpio_3_read(void)	{	return gpio_read(GPIO_3);	}
 
 void gpio_4_set(void) { gpio_set_high(GPIO_4); }
 void gpio_4_clr(void) { gpio_set_low(GPIO_4); }
 void gpio_4_toggle(void) { gpio_toggle(GPIO_4); }
+int gpio_4_read(void)	{	return gpio_read(GPIO_4);	}
 
 void gpio_5_set(void) { gpio_set_high(GPIO_5); }
 void gpio_5_clr(void) { gpio_set_low(GPIO_5); }
 void gpio_5_toggle(void) { gpio_toggle(GPIO_5); }
+int gpio_5_read(void)	{	return gpio_read(GPIO_5);	}
 
 void gpio_6_set(void) { gpio_set_high(GPIO_6); }
 void gpio_6_clr(void) { gpio_set_low(GPIO_6); }
 void gpio_6_toggle(void) { gpio_toggle(GPIO_6); }
+int gpio_6_read(void)	{	return gpio_read(GPIO_6);	}
 
 void gpio_7_set(void) { gpio_set_high(GPIO_7); }
 void gpio_7_clr(void) { gpio_set_low(GPIO_7); }
 void gpio_7_toggle(void) { gpio_toggle(GPIO_7); }
+int gpio_7_read(void)	{	return gpio_read(GPIO_7);	}
 
 void gpio_8_set(void) { gpio_set_high(GPIO_8); }
 void gpio_8_clr(void) { gpio_set_low(GPIO_8); }
 void gpio_8_toggle(void) { gpio_toggle(GPIO_8); }
+int gpio_8_read(void)	{	return gpio_read(GPIO_8);	}
 
 void gpio_9_set(void) { gpio_set_high(GPIO_9); }
 void gpio_9_clr(void) { gpio_set_low(GPIO_9); }
 void gpio_9_toggle(void) { gpio_toggle(GPIO_9); }
+int gpio_9_read(void)	{	return gpio_read(GPIO_9);	}
 
 void gpio_10_set(void) { gpio_set_high(GPIO_10); }
 void gpio_10_clr(void) { gpio_set_low(GPIO_10); }
 void gpio_10_toggle(void) { gpio_toggle(GPIO_10); }
+int gpio_10_read(void)	{	return gpio_read(GPIO_10);	}
 
 void gpio_11_set(void) { gpio_set_high(GPIO_11); }
 void gpio_11_clr(void) { gpio_set_low(GPIO_11); }
 void gpio_11_toggle(void) { gpio_toggle(GPIO_11); }
+int gpio_11_read(void)	{	return gpio_read(GPIO_11);	}
 
 void gpio_12_set(void) { gpio_set_high(GPIO_12); }
 void gpio_12_clr(void) { gpio_set_low(GPIO_12); }
 void gpio_12_toggle(void) { gpio_toggle(GPIO_12); }
+int gpio_12_read(void)	{	return gpio_read(GPIO_12);	}
 
 void gpio_13_set(void) { gpio_set_high(GPIO_13); }
 void gpio_13_clr(void) { gpio_set_low(GPIO_13); }
 void gpio_13_toggle(void) { gpio_toggle(GPIO_13); }
+int gpio_13_read(void)	{	return gpio_read(GPIO_13);	}
 
 void gpio_14_set(void) { gpio_set_high(GPIO_14); }
 void gpio_14_clr(void) { gpio_set_low(GPIO_14); }
 void gpio_14_toggle(void) { gpio_toggle(GPIO_14); }
+int gpio_14_read(void)	{	return gpio_read(GPIO_14);	}
 
 void gpio_15_set(void) { gpio_set_high(GPIO_15); }
 void gpio_15_clr(void) { gpio_set_low(GPIO_15); }
 void gpio_15_toggle(void) { gpio_toggle(GPIO_15); }
+int gpio_15_read(void)	{	return gpio_read(GPIO_15);	}
 
 // ISRs for external interrupts.
 void ext_gpio3_activehigh_debounced_isr() {
diff --git a/scm_v3c/gpio.h b/scm_v3c/gpio.h
index ce876307..49c53900 100644
--- a/scm_v3c/gpio.h
+++ b/scm_v3c/gpio.h
@@ -31,76 +31,95 @@ void gpio_set_low(gpio_e gpio);
 // Toggle the GPIO.
 void gpio_toggle(gpio_e gpio);
 
+// Read the GPIO
+int gpio_read(const gpio_e gpio);
+
 void gpio_init(void);
 
 void gpio_0_set(void);
 void gpio_0_clr(void);
 void gpio_0_toggle(void);
+int gpio_0_read(void);
 
 // Frame.
 void gpio_1_set(void);
 void gpio_1_clr(void);
 void gpio_1_toggle(void);
+int gpio_1_read(void);
 
 // ISR.
 void gpio_2_set(void);
 void gpio_2_clr(void);
 void gpio_2_toggle(void);
+int gpio_2_read(void);
 
 // Slot.
 void gpio_3_set(void);
 void gpio_3_clr(void);
 void gpio_3_toggle(void);
+int gpio_3_read(void);
 
 // FSM.
 void gpio_4_set(void);
 void gpio_4_clr(void);
 void gpio_4_toggle(void);
+int gpio_4_read(void);
 
 // Task.
 void gpio_5_set(void);
 void gpio_5_clr(void);
 void gpio_5_toggle(void);
+int gpio_5_read(void);
 
 // Radio.
 void gpio_6_set(void);
 void gpio_6_clr(void);
 void gpio_6_toggle(void);
+int gpio_6_read(void);
 
 void gpio_7_set(void);
 void gpio_7_clr(void);
 void gpio_7_toggle(void);
+int gpio_7_read(void);
 
 void gpio_8_set(void);
 void gpio_8_clr(void);
 void gpio_8_toggle(void);
+int gpio_8_read(void);
 
 void gpio_9_set(void);
 void gpio_9_clr(void);
 void gpio_9_toggle(void);
+int gpio_9_read(void);
 
 void gpio_10_set(void);
 void gpio_10_clr(void);
 void gpio_10_toggle(void);
+int gpio_10_read(void);
 
 void gpio_11_set(void);
 void gpio_11_clr(void);
 void gpio_11_toggle(void);
+int gpio_11_read(void);
 
 void gpio_12_set(void);
 void gpio_12_clr(void);
 void gpio_12_toggle(void);
+int gpio_12_read(void);
 
 void gpio_13_set(void);
 void gpio_13_clr(void);
 void gpio_13_toggle(void);
+int gpio_13_read(void);
 
 void gpio_14_set(void);
 void gpio_14_clr(void);
 void gpio_14_toggle(void);
+int gpio_14_read(void);
 
 void gpio_15_set(void);
 void gpio_15_clr(void);
 void gpio_15_toggle(void);
+int gpio_15_read(void);
 
 #endif  // __GPIO_H
diff --git a/scm_v3c/scm3c_hw_interface.c b/scm_v3c/scm3c_hw_interface.c
index 0f0863aa..8564d573 100644
--- a/scm_v3c/scm3c_hw_interface.c
+++ b/scm_v3c/scm3c_hw_interface.c
@@ -1165,7 +1165,7 @@ void initialize_mote() {
     GPO_enables(0xFFFF);
 
     // Set HCLK source as HF_CLOCK
-    set_asc_bit(1147);
+    set_asc_bit(1147);//****
 
     // Set initial coarse/fine on HF_CLOCK
     // coarse 0:4 = 860 861 875b 876b 877b
@@ -1174,13 +1174,15 @@ void initialize_mote() {
                                scm3c_hw_interface_vars.HF_CLOCK_fine);
 
     // Set RFTimer source as HF_CLOCK
-    set_asc_bit(1151);
+    set_asc_bit(1151);//****
 
     // Disable LF_CLOCK
-    set_asc_bit(553);
+    set_asc_bit(553);//*****
 
     // HF_CLOCK will be trimmed to 20MHz, so set RFTimer div value to 40 to get
     // 500kHz (inverted, so 1101 0111)
+		
+// HF_clock div		
     set_asc_bit(49);
     set_asc_bit(48);
     clear_asc_bit(47);