diff --git a/CI/build_test.sh b/CI/build_test.sh index e9755e92..c9d56990 100755 --- a/CI/build_test.sh +++ b/CI/build_test.sh @@ -3,8 +3,8 @@ set -e echo "Building Host -------------------------------------------------------" -docker-compose run smooth ./CI//build_smooth_host.sh +docker-compose run smooth ./CI/build_smooth_host.sh echo "Running host tests ---------------------------------------------------" -docker-compose run -w /src/build_host/test/linux_unit_tests smooth ./linux_unit_tests +docker-compose run -w /src/build/host/test/linux_unit_tests smooth ./linux_unit_tests echo "Building esp32 test projects -----------------------------------------" docker-compose run smooth ./CI/build_smooth_esp32.sh diff --git a/Documents/SSD1306.pdf b/Documents/SSD1306.pdf new file mode 100644 index 00000000..c1794097 Binary files /dev/null and b/Documents/SSD1306.pdf differ diff --git a/README.md b/README.md index d13634c5..6acdfdc7 100644 --- a/README.md +++ b/README.md @@ -64,12 +64,14 @@ If you are working on Windows or you don't want to install the dependencies on y - ILI9341 - ST7735 - SH1107 + - SSD1306(I2C) - I2C - BME280 - MCP23017 - DHT12 - AxpPMU - PCF8563 + - SHT30 - RGB LED, i.e. WS2812(B), SK6812, WS2813, (a.k.a NeoPixel). - Filesystem helpers diff --git a/lib/files.cmake b/lib/files.cmake index f3ea7cde..a85ec2cf 100644 --- a/lib/files.cmake +++ b/lib/files.cmake @@ -5,6 +5,7 @@ set(smooth_inc_dir ${CMAKE_CURRENT_LIST_DIR}/smooth/include/smooth) set(SMOOTH_SOURCES ${smooth_dir}/application/display/LCDSpi.cpp + ${smooth_dir}/application/display/SSD1306I2C.cpp ${smooth_dir}/application/hash/base64.cpp ${smooth_dir}/application/hash/sha.cpp ${smooth_dir}/application/io/i2c/ADS1115.cpp @@ -105,6 +106,7 @@ set(SMOOTH_SOURCES ${smooth_inc_dir}/application/display/ILI9341.h ${smooth_inc_dir}/application/display/SH1107.h ${smooth_inc_dir}/application/display/ST7735.h + ${smooth_inc_dir}/application/display/SSD1306I2C.h ${smooth_inc_dir}/application/io/spi/BME280SPI.h ${smooth_inc_dir}/application/io/spi/BME280Core.h ${smooth_inc_dir}/application/io/i2c/ADS1115.h diff --git a/lib/smooth/application/display/SSD1306I2C.cpp b/lib/smooth/application/display/SSD1306I2C.cpp new file mode 100644 index 00000000..3cf89d66 --- /dev/null +++ b/lib/smooth/application/display/SSD1306I2C.cpp @@ -0,0 +1,189 @@ +/* +Smooth - A C++ framework for embedded programming on top of Espressif's ESP-IDF +Copyright 2019 Per Malmberg (https://gitbub.com/PerMalmberg) + +Licensed under the Apache License, Version 2.0 (the "License"); +you may not use this file except in compliance with the License. +You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + +Unless required by applicable law or agreed to in writing, software +distributed under the License is distributed on an "AS IS" BASIS, +WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +See the License for the specific language governing permissions and +limitations under the License. +*/ +#include +#include "smooth/application/display/SSD1306I2C.h" +#include "smooth/core/logging/log.h" + +using namespace smooth::core::logging; + +namespace smooth::application::display +{ + //static const char* TAG = "SSD1306I2C"; + static const bool PIN_HIGH = true; + static const bool PIN_LOW = false; + + SSD1306I2C::SSD1306I2C(i2c_port_t port, uint8_t address, std::mutex& guard) : I2CMasterDevice(port, address, guard) + { + } + + // Add reset pin + void SSD1306I2C::add_reset_pin(std::unique_ptr reset_pin) + { + reset_pin = std::move(reset_pin); + } + + // Hardware reset + void SSD1306I2C::hw_reset(bool active_low, + std::chrono::milliseconds active_time, + std::chrono::milliseconds delay_time) + { + if (reset_pin != nullptr) + { + if (active_low) + { + reset_pin->set_output_level(PIN_LOW); // force the display chip to reset + std::this_thread::sleep_for(active_time); + reset_pin->set_output_level(PIN_HIGH); + std::this_thread::sleep_for(delay_time); + } + else + { + reset_pin->set_output_level(PIN_HIGH); // force the display chip to reset + std::this_thread::sleep_for(active_time); + reset_pin->set_output_level(PIN_HIGH); + std::this_thread::sleep_for(delay_time); + } + } + } + + // Enter sleep mode + bool SSD1306I2C::enter_sleep_mode() + { + return send_cmd(SSD1306Cmd::DisplayOff); + } + + // Exit sleep mode + bool SSD1306I2C::exit_sleep_mode() + { + return send_cmd(SSD1306Cmd::DisplayOn); + } + + // Set the display inverted - white will be black and black will be white + bool SSD1306I2C::set_display_inverted() + { + return send_cmd(SSD1306Cmd::InvertedDisplay); + } + + // Set the display normal + bool SSD1306I2C::set_display_normal() + { + return send_cmd(SSD1306Cmd::NormalDisplay); + } + + // Send initialize sequence of commands and data to display + bool SSD1306I2C::init_display() + { + std::vector init_commands(begin(ssd1306_init_cmds), end(ssd1306_init_cmds)); + + return send_cmds(init_commands); + } + + // Send muliple commands to the display. + bool SSD1306I2C::send_cmds(std::vector& cmds) + { + return write(address, cmds); + } + + // Send a single command to the display. + bool SSD1306I2C::send_cmd(const uint8_t cmd) + { + std::vector data{ ControlByte::SingleCommand }; + data.push_back(cmd); + + return write(address, data); + } + + // Send data to the display ram + bool SSD1306I2C::send_data_stream(std::vector& data) + { + return write(address, data); + } + + // Create the command stream for page address mode + void SSD1306I2C::create_page_addr_mode_command_stream(std::vector& cmd_stream, + uint8_t start_page, + uint8_t start_col) + { + cmd_stream.push_back(ControlByte::CommandStream); // 0x00 + cmd_stream.push_back(SSD1306Cmd::MemoryAddressMode); // 0x20 + cmd_stream.push_back(AddressMode::Page); // 0x02 + cmd_stream.push_back(SSD1306Cmd::PageAddress0 | start_page); // 0xB0 - 0xB7 + cmd_stream.push_back(start_col & 0x0F); // start column lower nibble address + cmd_stream.push_back(((start_col >> 4) & 0x0F) | SSD1306Cmd::UpperColumnAddress); // start column upper + // nibble address + } + + // Create the command stream for vertical address mode + void SSD1306I2C::create_vert_addr_mode_command_stream(std::vector& cmd_stream, + uint8_t page_start, + uint8_t page_end, + uint8_t col_start, + uint8_t col_end) + { + cmd_stream.push_back(ControlByte::CommandStream); // 0x00 + cmd_stream.push_back(SSD1306Cmd::MemoryAddressMode); // 0x20 + cmd_stream.push_back(AddressMode::Vertical); // 0x01 + cmd_stream.push_back(SSD1306Cmd::PageAddress); // 0x22 + cmd_stream.push_back(page_start); + cmd_stream.push_back(page_end); + cmd_stream.push_back(SSD1306Cmd::ColumnAddress); // 0x21 + cmd_stream.push_back(col_start); + cmd_stream.push_back(col_end); + } + + // Create the command stream for horizontal address mode + void SSD1306I2C::create_horz_addr_mode_command_stream(std::vector& cmd_stream, + uint8_t page_start, + uint8_t page_end, + uint8_t col_start, + uint8_t col_end) + { + cmd_stream.push_back(ControlByte::CommandStream); // 0x00 + cmd_stream.push_back(SSD1306Cmd::MemoryAddressMode); // 0x20 + cmd_stream.push_back(AddressMode::Horizontal); // 0x00 + cmd_stream.push_back(SSD1306Cmd::PageAddress); // 0x22 + cmd_stream.push_back(page_start); + cmd_stream.push_back(page_end); + cmd_stream.push_back(SSD1306Cmd::ColumnAddress); // 0x21 + cmd_stream.push_back(col_start); + cmd_stream.push_back(col_end); + } + + // Fill display with the supplied fill value, black = 0x00, white = oxFF + bool SSD1306I2C::fill_display(uint8_t fill_value) + { + bool res = false; + std::vector cmd_stream; + std::array fill_data{}; + + fill_data.fill(fill_value); + + // create pixel data stream that contains black pixels + std::vector pixel_data = { ControlByte::DataStream }; + pixel_data.insert(pixel_data.end(), fill_data.data(), fill_data.data() + fill_data.size()); + + // Send pixel data stream to the 8 pages of the display + for (uint8_t page = 0; page < 8; page++) + { + create_page_addr_mode_command_stream(cmd_stream, page, 0); + res = send_cmds(cmd_stream); + res &= send_data_stream(pixel_data); + } + + return res; + } +} diff --git a/lib/smooth/include/smooth/application/display/SSD1306I2C.h b/lib/smooth/include/smooth/application/display/SSD1306I2C.h new file mode 100644 index 00000000..56ac2808 --- /dev/null +++ b/lib/smooth/include/smooth/application/display/SSD1306I2C.h @@ -0,0 +1,200 @@ +/* +Smooth - A C++ framework for embedded programming on top of Espressif's ESP-IDF +Copyright 2019 Per Malmberg (https://gitbub.com/PerMalmberg) + +Licensed under the Apache License, Version 2.0 (the "License"); +you may not use this file except in compliance with the License. +You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + +Unless required by applicable law or agreed to in writing, software +distributed under the License is distributed on an "AS IS" BASIS, +WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +See the License for the specific language governing permissions and +limitations under the License. +*/ +#pragma once + +#include +#include +#include +#include "smooth/core/io/i2c/I2CMasterDevice.h" +#include "smooth/application/display/DisplayPin.h" + +namespace smooth::application::display +{ + class SSD1306I2C : public core::io::i2c::I2CMasterDevice + { + public: + // I2C Control Byte + // b7 - Co - Continuation bit, + // if 1 no continuation only one byte to follow, + // if 0 the SDD1306 will expect mutiple bytes to follow + // b6 - D/C - Data Command Select bit + // if 1 then next byte or a byte stream will be data + // if 0 then next byte or a byte stream will be commands + enum ControlByte : uint8_t + { + SingleCommand = 0x80, + CommandStream = 0x00, + SingleData = 0xC0, + DataStream = 0x40, + }; + + enum AddressMode : uint8_t + { + Horizontal = 0x00, + Vertical = 0x01, + Page = 0x02, + }; + + enum SSD1306Cmd : uint8_t + { + LowerColumnAddress = 0x00, + UpperColumnAddress = 0x10, + MemoryAddressMode = 0x20, + ColumnAddress = 0x21, + PageAddress = 0x22, + DisplayStartLine = 0x40, + ConstratControl = 0x81, + SegmentReMapNormal = 0xA0, + SegnentReMapReverse = 0xA1, + DisplayOnWithRAM = 0XA4, + DisplayOnIgnoreRAM = 0xA5, + NormalDisplay = 0xA6, + InvertedDisplay = 0xA7, + MultiplexRatio = 0xA8, + DisplayOff = 0xAE, + DisplayOn = 0xAF, + PageAddress0 = 0xB0, + CommonOutputScanDirNormal = 0xC0, + CommonOutputScanDirReversed = 0xC8, + DisplayOffset = 0xD3, + ClockDivideRatio = 0xD5, + Precharge = 0xD9, + ComPinsHwConfig = 0xDA, + VcomDeselectLevel = 0xDB, + Nop = 0xE3, + HorizScrollSetup = 0x26, + ContinuousVertHorizScrollSetup = 0x29, + DeactivateScroll = 0x2E, + ActivateScroll = 0x2F, + SetVerticalScrollArea = 0xA3, + ChargePump = 0x8D, + }; + + // init commands version 1 + static constexpr std::array ssd1306_init_cmds = + { + ControlByte::CommandStream, // 1: + SSD1306Cmd::DisplayOff, // 2: 0xAE - Turn Display off + SSD1306Cmd::ClockDivideRatio, 0x80, // 3,4: 0xD5:0x80 - Set display clock div ratio = 0x80 + SSD1306Cmd::MultiplexRatio, 0x3F, // 5,6: 0xA8:0x3F - Set multiplex ratio for 128x64 (64-1) + SSD1306Cmd::DisplayOffset, 0x00, // 7,8: 0xD3:0x00 - Set display offset to 0x00 + SSD1306Cmd::DisplayStartLine, // 9: 0x40 - Set display start line + SSD1306Cmd::ChargePump, 0x14, // 10,11: 0x8D:0x14 - Set charge pump 0x14=internal DC/DC + SSD1306Cmd::SegnentReMapReverse, // 12: 0xA1 - Set segment remap + SSD1306Cmd::CommonOutputScanDirReversed, // 13: 0xC8 - Set com output scan dir to reverse + SSD1306Cmd::ComPinsHwConfig, 0x12, // 14,15: 0xDA:0x12 - Set Com HW configuration -- 0x12 if + // - display height > 32 else 0x02 + SSD1306Cmd::ConstratControl, 0x7F, // 16,17: 0x81:0x7F - Set contrast + SSD1306Cmd::Precharge, 0xF1, // 18,19: 0xD9:0xF1 - Set precharge period to 0xF1 = + // - for internal + SSD1306Cmd::VcomDeselectLevel, 0x30, // 20,21: 0xDB:0x40 - Set vcom deselect level + SSD1306Cmd::DisplayOnWithRAM, // 22: 0xA4 - Set display using RAM content + SSD1306Cmd::NormalDisplay, // 23: 0xA6 - Set normal display not inverted + SSD1306Cmd::DisplayOn, // 24: 0xAF - Set display on + }; + + /// The constructor + SSD1306I2C(i2c_port_t port, uint8_t address, std::mutex& guard); + + /// Add reset pin + /// \param reset_pin + void add_reset_pin(std::unique_ptr reset_pin); + + /// Hardware Reset + /// \param active_low If true the reset pin requires a LOW to force the chip to reset, + /// if false the reset pin requires a HIGH to force the chip to reset. + /// \param active_time The amount of time in milliseconds the pin will be in the active state + /// \param delay_time The amount of time in milliseconds after exiting the active state, + /// the pin is the non-active state (waiting for the chip to complete it's reset). + void hw_reset(bool active_low, std::chrono::milliseconds active_time, std::chrono::milliseconds delay_time); + + /// Place display in sleep mode + /// \return true on success, false on failure + bool enter_sleep_mode(); + + /// Exit SLEEP mode + /// \return true on success, false on failure + bool exit_sleep_mode(); + + /// Invert display + /// \return true on success, false on failure + bool set_display_inverted(); + + /// Set display to normal + /// \return true on success, false on failure + bool set_display_normal(); + + /// Send the intialization command to display + /// \return true on success, false on failure + bool init_display(); + + /// Send Commands - write multiple commands to display + /// \param cmds A vector that holds the commands + /// \return true on success, false on failure + bool send_cmds(std::vector& cmds); + + /// Send Command - write single command to display + /// \param cmd The command + /// \return true on success, false on failure + bool send_cmd(const uint8_t cmd); + + /// Send Data Stream - write data to display RAM + /// \param data A vector that contains pixel data to send to display + /// \return true on success, false on failure + bool send_data_stream(std::vector& data); + + /// Create page address mode command stream + /// \param cmd_stream A vector that will hold the commands + /// \param start_page The start page for the page address mode + /// \param start_col The start column for the page address mode + void create_page_addr_mode_command_stream(std::vector& cmd_stream, + uint8_t start_page, + uint8_t start_col); + + /// Create vertical address mode command stream + /// \param cmd_stream A vector that will hold the commands + /// \param page_start The start page for the vertical address mode + /// \param page_end The end page for the vertical address mode + /// \param col_start The start column for the vertical address mode + /// \param col_end The end column for the vertical address mode + void create_vert_addr_mode_command_stream(std::vector& cmd_stream, + uint8_t page_start, + uint8_t page_end, + uint8_t col_start, + uint8_t col_end); + + /// Create horizontal address mode command stream + /// \param cmd_stream A vector that will hold the commands + /// \param page_start The start page for the vertical address mode + /// \param page_end The end page for the vertical address mode + /// \param col_start The start column for the vertical address mode + /// \param col_end The end column for the vertical address mode + void create_horz_addr_mode_command_stream(std::vector& cmd_stream, + uint8_t page_start, + uint8_t page_end, + uint8_t col_start, + uint8_t col_end); + + /// Fill display with the supplied fill value. + /// \param fill_value The fill value; black = 0x00, white = 0xFF + /// \return true on success, false on failure + bool fill_display(uint8_t fill_value); + + private: + std::unique_ptr reset_pin{}; + }; +} diff --git a/sdkconfig b/sdkconfig index 2b6787bf..d99bcc02 100644 --- a/sdkconfig +++ b/sdkconfig @@ -59,6 +59,8 @@ CONFIG_BOOTLOADER_WDT_ENABLE=y CONFIG_BOOTLOADER_WDT_TIME_MS=9000 # CONFIG_BOOTLOADER_APP_ROLLBACK_ENABLE is not set # CONFIG_BOOTLOADER_SKIP_VALIDATE_IN_DEEP_SLEEP is not set +# CONFIG_BOOTLOADER_SKIP_VALIDATE_ON_POWER_ON is not set +# CONFIG_BOOTLOADER_SKIP_VALIDATE_ALWAYS is not set CONFIG_BOOTLOADER_RESERVE_RTC_SIZE=0 # CONFIG_BOOTLOADER_CUSTOM_RESERVE_RTC is not set # end of Bootloader config @@ -115,6 +117,7 @@ CONFIG_ESPTOOLPY_MONITOR_BAUD=115200 # Partition Table # # CONFIG_PARTITION_TABLE_SINGLE_APP is not set +# CONFIG_PARTITION_TABLE_SINGLE_APP_LARGE is not set # CONFIG_PARTITION_TABLE_TWO_OTA is not set CONFIG_PARTITION_TABLE_CUSTOM=y CONFIG_PARTITION_TABLE_CUSTOM_FILENAME="partitions.csv" @@ -133,6 +136,9 @@ CONFIG_COMPILER_OPTIMIZATION_DEFAULT=y CONFIG_COMPILER_OPTIMIZATION_ASSERTIONS_ENABLE=y # CONFIG_COMPILER_OPTIMIZATION_ASSERTIONS_SILENT is not set # CONFIG_COMPILER_OPTIMIZATION_ASSERTIONS_DISABLE is not set +CONFIG_COMPILER_OPTIMIZATION_ASSERTION_LEVEL=2 +# CONFIG_COMPILER_OPTIMIZATION_CHECKS_SILENT is not set +CONFIG_COMPILER_HIDE_PATHS_MACROS=y CONFIG_COMPILER_CXX_EXCEPTIONS=y CONFIG_COMPILER_CXX_EXCEPTIONS_EMG_POOL_SIZE=0 # CONFIG_COMPILER_CXX_RTTI is not set @@ -230,6 +236,10 @@ CONFIG_SPI_SLAVE_ISR_IN_IRAM=y # TWAI configuration # # CONFIG_TWAI_ISR_IN_IRAM is not set +# CONFIG_TWAI_ERRATA_FIX_BUS_OFF_REC is not set +# CONFIG_TWAI_ERRATA_FIX_TX_INTR_LOST is not set +# CONFIG_TWAI_ERRATA_FIX_RX_FRAME_INVALID is not set +# CONFIG_TWAI_ERRATA_FIX_RX_FIFO_CORRUPT is not set # end of TWAI configuration # @@ -317,6 +327,23 @@ CONFIG_SPIRAM_CACHE_WORKAROUND_STRATEGY_MEMW=y # CONFIG_SPIRAM_CACHE_WORKAROUND_STRATEGY_NOPS is not set # end of SPIRAM cache workaround debugging +# +# SPIRAM workaround libraries placement +# +CONFIG_SPIRAM_CACHE_LIBJMP_IN_IRAM=y +CONFIG_SPIRAM_CACHE_LIBMATH_IN_IRAM=y +CONFIG_SPIRAM_CACHE_LIBNUMPARSER_IN_IRAM=y +CONFIG_SPIRAM_CACHE_LIBIO_IN_IRAM=y +CONFIG_SPIRAM_CACHE_LIBTIME_IN_IRAM=y +CONFIG_SPIRAM_CACHE_LIBCHAR_IN_IRAM=y +CONFIG_SPIRAM_CACHE_LIBMEM_IN_IRAM=y +CONFIG_SPIRAM_CACHE_LIBSTR_IN_IRAM=y +CONFIG_SPIRAM_CACHE_LIBRAND_IN_IRAM=y +CONFIG_SPIRAM_CACHE_LIBENV_IN_IRAM=y +CONFIG_SPIRAM_CACHE_LIBFILE_IN_IRAM=y +CONFIG_SPIRAM_CACHE_LIBMISC_IN_IRAM=y +# end of SPIRAM workaround libraries placement + CONFIG_SPIRAM_BANKSWITCH_ENABLE=y CONFIG_SPIRAM_BANKSWITCH_RESERVE=8 # CONFIG_SPIRAM_ALLOW_STACK_EXTERNAL_MEMORY is not set @@ -348,9 +375,6 @@ CONFIG_SPIRAM_SPIWP_SD3_PIN=7 # CONFIG_ESP32_TRAX is not set CONFIG_ESP32_TRACEMEM_RESERVE_DRAM=0x0 -# CONFIG_ESP32_UNIVERSAL_MAC_ADDRESSES_TWO is not set -CONFIG_ESP32_UNIVERSAL_MAC_ADDRESSES_FOUR=y -CONFIG_ESP32_UNIVERSAL_MAC_ADDRESSES=4 # CONFIG_ESP32_ULP_COPROC_ENABLED is not set CONFIG_ESP32_ULP_COPROC_RESERVE_MEM=0 CONFIG_ESP32_DEBUG_OCDAWARE=y @@ -364,7 +388,6 @@ CONFIG_ESP32_BROWNOUT_DET_LVL_SEL_0=y # CONFIG_ESP32_BROWNOUT_DET_LVL_SEL_6 is not set # CONFIG_ESP32_BROWNOUT_DET_LVL_SEL_7 is not set CONFIG_ESP32_BROWNOUT_DET_LVL=0 -CONFIG_ESP32_REDUCE_PHY_TX_POWER=y CONFIG_ESP32_TIME_SYSCALL_USE_RTC_FRC1=y # CONFIG_ESP32_TIME_SYSCALL_USE_RTC is not set # CONFIG_ESP32_TIME_SYSCALL_USE_FRC1 is not set @@ -382,6 +405,7 @@ CONFIG_ESP32_XTAL_FREQ=40 # CONFIG_ESP32_DISABLE_BASIC_ROM_CONSOLE is not set # CONFIG_ESP32_NO_BLOBS is not set # CONFIG_ESP32_COMPATIBLE_PRE_V2_1_BOOTLOADERS is not set +# CONFIG_ESP32_COMPATIBLE_PRE_V3_1_BOOTLOADERS is not set # CONFIG_ESP32_USE_FIXED_STATIC_RAM_SIZE is not set CONFIG_ESP32_DPORT_DIS_INTERRUPT_LVL=5 # end of ESP32-specific @@ -398,33 +422,6 @@ CONFIG_ADC_CAL_LUT_ENABLE=y # Common ESP-related # CONFIG_ESP_ERR_TO_NAME_LOOKUP=y -CONFIG_ESP_SYSTEM_EVENT_QUEUE_SIZE=32 -CONFIG_ESP_SYSTEM_EVENT_TASK_STACK_SIZE=3072 -CONFIG_ESP_MAIN_TASK_STACK_SIZE=16384 -CONFIG_ESP_IPC_TASK_STACK_SIZE=1024 -CONFIG_ESP_IPC_USES_CALLERS_PRIORITY=y -CONFIG_ESP_MINIMAL_SHARED_STACK_SIZE=2048 -CONFIG_ESP_CONSOLE_UART_DEFAULT=y -# CONFIG_ESP_CONSOLE_UART_CUSTOM is not set -# CONFIG_ESP_CONSOLE_NONE is not set -CONFIG_ESP_CONSOLE_UART=y -CONFIG_ESP_CONSOLE_MULTIPLE_UART=y -CONFIG_ESP_CONSOLE_UART_NUM=0 -CONFIG_ESP_CONSOLE_UART_BAUDRATE=115200 -CONFIG_ESP_INT_WDT=y -CONFIG_ESP_INT_WDT_TIMEOUT_MS=300 -CONFIG_ESP_INT_WDT_CHECK_CPU1=y -CONFIG_ESP_TASK_WDT=y -# CONFIG_ESP_TASK_WDT_PANIC is not set -CONFIG_ESP_TASK_WDT_TIMEOUT_S=5 -CONFIG_ESP_TASK_WDT_CHECK_IDLE_TASK_CPU0=y -CONFIG_ESP_TASK_WDT_CHECK_IDLE_TASK_CPU1=y -# CONFIG_ESP_PANIC_HANDLER_IRAM is not set -CONFIG_ESP_MAC_ADDR_UNIVERSE_WIFI_STA=y -CONFIG_ESP_MAC_ADDR_UNIVERSE_WIFI_AP=y -CONFIG_ESP_MAC_ADDR_UNIVERSE_BT=y -CONFIG_ESP_MAC_ADDR_UNIVERSE_BT_OFFSET=2 -CONFIG_ESP_MAC_ADDR_UNIVERSE_ETH=y CONFIG_ESP_ALLOW_BSS_SEG_EXTERNAL_MEMORY=y # end of Common ESP-related @@ -444,6 +441,7 @@ CONFIG_ETH_DMA_TX_BUFFER_NUM=10 CONFIG_ETH_USE_SPI_ETHERNET=y CONFIG_ETH_SPI_ETHERNET_DM9051=y # CONFIG_ETH_SPI_ETHERNET_W5500 is not set +# CONFIG_ETH_SPI_ETHERNET_KSZ8851SNL is not set # CONFIG_ETH_USE_OPENETH is not set # end of Ethernet @@ -465,6 +463,7 @@ CONFIG_ESP_EVENT_POST_FROM_IRAM_ISR=y # CONFIG_ESP_HTTP_CLIENT_ENABLE_HTTPS=y # CONFIG_ESP_HTTP_CLIENT_ENABLE_BASIC_AUTH is not set +CONFIG_ESP_HTTP_CLIENT_ENABLE_DIGEST_AUTH=y # end of ESP HTTP client # @@ -490,6 +489,33 @@ CONFIG_HTTPD_PURGE_BUF_LEN=32 # CONFIG_ESP_HTTPS_SERVER_ENABLE is not set # end of ESP HTTPS server +# +# Hardware Settings +# + +# +# MAC Config +# +CONFIG_ESP_MAC_ADDR_UNIVERSE_WIFI_STA=y +CONFIG_ESP_MAC_ADDR_UNIVERSE_WIFI_AP=y +CONFIG_ESP_MAC_ADDR_UNIVERSE_BT=y +CONFIG_ESP_MAC_ADDR_UNIVERSE_ETH=y +# CONFIG_ESP32_UNIVERSAL_MAC_ADDRESSES_TWO is not set +CONFIG_ESP32_UNIVERSAL_MAC_ADDRESSES_FOUR=y +CONFIG_ESP32_UNIVERSAL_MAC_ADDRESSES=4 +# end of MAC Config + +# +# Sleep Config +# +# end of Sleep Config +# end of Hardware Settings + +# +# LCD and Touch Panel +# +# end of LCD and Touch Panel + # # ESP NETIF Adapter # @@ -499,6 +525,16 @@ CONFIG_ESP_NETIF_TCPIP_LWIP=y # CONFIG_ESP_NETIF_TCPIP_ADAPTER_COMPATIBLE_LAYER is not set # end of ESP NETIF Adapter +# +# PHY +# +CONFIG_ESP32_PHY_CALIBRATION_AND_DATA_STORAGE=y +# CONFIG_ESP32_PHY_INIT_DATA_IN_PARTITION is not set +CONFIG_ESP32_PHY_MAX_WIFI_TX_POWER=20 +CONFIG_ESP32_PHY_MAX_TX_POWER=20 +CONFIG_ESP32_REDUCE_PHY_TX_POWER=y +# end of PHY + # # Power Management # @@ -512,11 +548,39 @@ CONFIG_ESP_SYSTEM_PANIC_PRINT_HALT=y # CONFIG_ESP_SYSTEM_PANIC_PRINT_REBOOT is not set # CONFIG_ESP_SYSTEM_PANIC_SILENT_REBOOT is not set # CONFIG_ESP_SYSTEM_PANIC_GDBSTUB is not set +# CONFIG_ESP_SYSTEM_GDBSTUB_RUNTIME is not set # # Memory protection # # end of Memory protection + +CONFIG_ESP_SYSTEM_EVENT_QUEUE_SIZE=32 +CONFIG_ESP_SYSTEM_EVENT_TASK_STACK_SIZE=3072 +CONFIG_ESP_MAIN_TASK_STACK_SIZE=16384 +CONFIG_ESP_MAIN_TASK_AFFINITY_CPU0=y +# CONFIG_ESP_MAIN_TASK_AFFINITY_CPU1 is not set +# CONFIG_ESP_MAIN_TASK_AFFINITY_NO_AFFINITY is not set +CONFIG_ESP_MAIN_TASK_AFFINITY=0x0 +CONFIG_ESP_MINIMAL_SHARED_STACK_SIZE=2048 +CONFIG_ESP_CONSOLE_UART_DEFAULT=y +# CONFIG_ESP_CONSOLE_UART_CUSTOM is not set +# CONFIG_ESP_CONSOLE_NONE is not set +CONFIG_ESP_CONSOLE_UART=y +CONFIG_ESP_CONSOLE_MULTIPLE_UART=y +CONFIG_ESP_CONSOLE_UART_NUM=0 +CONFIG_ESP_CONSOLE_UART_BAUDRATE=115200 +CONFIG_ESP_INT_WDT=y +CONFIG_ESP_INT_WDT_TIMEOUT_MS=300 +CONFIG_ESP_INT_WDT_CHECK_CPU1=y +CONFIG_ESP_TASK_WDT=y +# CONFIG_ESP_TASK_WDT_PANIC is not set +CONFIG_ESP_TASK_WDT_TIMEOUT_S=5 +CONFIG_ESP_TASK_WDT_CHECK_IDLE_TASK_CPU0=y +CONFIG_ESP_TASK_WDT_CHECK_IDLE_TASK_CPU1=y +CONFIG_ESP_IPC_TASK_STACK_SIZE=1024 +CONFIG_ESP_IPC_USES_CALLERS_PRIORITY=y +# CONFIG_ESP_PANIC_HANDLER_IRAM is not set # end of ESP System Settings # @@ -526,6 +590,8 @@ CONFIG_ESP_SYSTEM_PANIC_PRINT_HALT=y CONFIG_ESP_TIME_FUNCS_USE_RTC_TIMER=y CONFIG_ESP_TIME_FUNCS_USE_ESP_TIMER=y CONFIG_ESP_TIMER_TASK_STACK_SIZE=3584 +CONFIG_ESP_TIMER_INTERRUPT_LEVEL=1 +# CONFIG_ESP_TIMER_SUPPORTS_ISR_DISPATCH_METHOD is not set # CONFIG_ESP_TIMER_IMPL_FRC2 is not set CONFIG_ESP_TIMER_IMPL_TG0_LAC=y # end of High resolution timer (esp_timer) @@ -555,17 +621,9 @@ CONFIG_ESP32_WIFI_IRAM_OPT=y CONFIG_ESP32_WIFI_RX_IRAM_OPT=y # CONFIG_ESP32_WIFI_ENABLE_WPA3_SAE is not set # CONFIG_ESP_WIFI_SLP_IRAM_OPT is not set +# CONFIG_ESP_WIFI_STA_DISCONNECTED_PM_ENABLE is not set # end of Wi-Fi -# -# PHY -# -CONFIG_ESP32_PHY_CALIBRATION_AND_DATA_STORAGE=y -# CONFIG_ESP32_PHY_INIT_DATA_IN_PARTITION is not set -CONFIG_ESP32_PHY_MAX_WIFI_TX_POWER=20 -CONFIG_ESP32_PHY_MAX_TX_POWER=20 -# end of PHY - # # Core dump # @@ -680,6 +738,16 @@ CONFIG_FREERTOS_DEBUG_OCDAWARE=y # CONFIG_FREERTOS_FPU_IN_ISR is not set # end of FreeRTOS +# +# Hardware Abstraction Layer (HAL) and Low Level (LL) +# +CONFIG_HAL_ASSERTION_EQUALS_SYSTEM=y +# CONFIG_HAL_ASSERTION_DISABLE is not set +# CONFIG_HAL_ASSERTION_SILIENT is not set +# CONFIG_HAL_ASSERTION_ENABLE is not set +CONFIG_HAL_DEFAULT_ASSERTION_LEVEL=2 +# end of Hardware Abstraction Layer (HAL) and Low Level (LL) + # # Heap memory debugging # @@ -714,6 +782,10 @@ CONFIG_LOG_DEFAULT_LEVEL_INFO=y # CONFIG_LOG_DEFAULT_LEVEL_DEBUG is not set # CONFIG_LOG_DEFAULT_LEVEL_VERBOSE is not set CONFIG_LOG_DEFAULT_LEVEL=3 +CONFIG_LOG_MAXIMUM_EQUALS_DEFAULT=y +# CONFIG_LOG_MAXIMUM_LEVEL_DEBUG is not set +# CONFIG_LOG_MAXIMUM_LEVEL_VERBOSE is not set +CONFIG_LOG_MAXIMUM_LEVEL=3 CONFIG_LOG_COLORS=y CONFIG_LOG_TIMESTAMP_SOURCE_RTOS=y # CONFIG_LOG_TIMESTAMP_SOURCE_SYSTEM is not set @@ -723,6 +795,7 @@ CONFIG_LOG_TIMESTAMP_SOURCE_RTOS=y # LWIP # CONFIG_LWIP_LOCAL_HOSTNAME="espressif" +# CONFIG_LWIP_NETIF_API is not set CONFIG_LWIP_DNS_SUPPORT_MDNS_QUERIES=y # CONFIG_LWIP_L2_TO_L3_COPY is not set # CONFIG_LWIP_IRAM_OPTIMIZATION is not set @@ -745,17 +818,24 @@ CONFIG_LWIP_ESP_GRATUITOUS_ARP=y CONFIG_LWIP_GARP_TMR_INTERVAL=60 CONFIG_LWIP_TCPIP_RECVMBOX_SIZE=32 CONFIG_LWIP_DHCP_DOES_ARP_CHECK=y +# CONFIG_LWIP_DHCP_DISABLE_CLIENT_ID is not set # CONFIG_LWIP_DHCP_RESTORE_LAST_IP is not set # # DHCP server # +CONFIG_LWIP_DHCPS=y CONFIG_LWIP_DHCPS_LEASE_UNIT=60 CONFIG_LWIP_DHCPS_MAX_STATION_NUM=8 # end of DHCP server # CONFIG_LWIP_AUTOIP is not set +CONFIG_LWIP_IPV6=y # CONFIG_LWIP_IPV6_AUTOCONFIG is not set +CONFIG_LWIP_IPV6_NUM_ADDRESSES=3 +# CONFIG_LWIP_IPV6_FORWARD is not set +CONFIG_LWIP_IPV6_RDNSS_MAX_DNS_SERVERS=0 +# CONFIG_LWIP_NETIF_STATUS_CALLBACK is not set CONFIG_LWIP_NETIF_LOOPBACK=y CONFIG_LWIP_LOOPBACK_MAX_PBUFS=8 @@ -811,6 +891,7 @@ CONFIG_LWIP_IPV6_ND6_NUM_NEIGHBORS=5 # # ICMP # +CONFIG_LWIP_ICMP=y # CONFIG_LWIP_MULTICAST_PING is not set # CONFIG_LWIP_BROADCAST_PING is not set # end of ICMP @@ -839,27 +920,15 @@ CONFIG_LWIP_HOOK_TCP_ISN_DEFAULT=y CONFIG_LWIP_HOOK_IP6_ROUTE_NONE=y # CONFIG_LWIP_HOOK_IP6_ROUTE_DEFAULT is not set # CONFIG_LWIP_HOOK_IP6_ROUTE_CUSTOM is not set +CONFIG_LWIP_HOOK_ND6_GET_GW_NONE=y +# CONFIG_LWIP_HOOK_ND6_GET_GW_DEFAULT is not set +# CONFIG_LWIP_HOOK_ND6_GET_GW_CUSTOM is not set CONFIG_LWIP_HOOK_NETCONN_EXT_RESOLVE_NONE=y # CONFIG_LWIP_HOOK_NETCONN_EXT_RESOLVE_DEFAULT is not set # CONFIG_LWIP_HOOK_NETCONN_EXT_RESOLVE_CUSTOM is not set # end of Hooks -# -# Debug -# -# CONFIG_LWIP_NETIF_DEBUG is not set -# CONFIG_LWIP_PBUF_DEBUG is not set -# CONFIG_LWIP_ETHARP_DEBUG is not set -# CONFIG_LWIP_API_LIB_DEBUG is not set -# CONFIG_LWIP_SOCKETS_DEBUG is not set -# CONFIG_LWIP_IP_DEBUG is not set -# CONFIG_LWIP_ICMP_DEBUG is not set -# CONFIG_LWIP_DHCP_STATE_DEBUG is not set -# CONFIG_LWIP_DHCP_DEBUG is not set -# CONFIG_LWIP_IP6_DEBUG is not set -# CONFIG_LWIP_ICMP6_DEBUG is not set -# CONFIG_LWIP_TCP_DEBUG is not set -# end of Debug +# CONFIG_LWIP_DEBUG is not set # end of LWIP # @@ -889,6 +958,7 @@ CONFIG_MBEDTLS_CERTIFICATE_BUNDLE_DEFAULT_FULL=y CONFIG_MBEDTLS_HARDWARE_AES=y CONFIG_MBEDTLS_HARDWARE_MPI=y CONFIG_MBEDTLS_HARDWARE_SHA=y +CONFIG_MBEDTLS_ROM_MD5=y # CONFIG_MBEDTLS_ATCA_HW_ECDSA_SIGN is not set # CONFIG_MBEDTLS_ATCA_HW_ECDSA_VERIFY is not set CONFIG_MBEDTLS_HAVE_TIME=y @@ -943,6 +1013,7 @@ CONFIG_MBEDTLS_RC4_DISABLED=y # CONFIG_MBEDTLS_XTEA_C is not set CONFIG_MBEDTLS_CCM_C=y CONFIG_MBEDTLS_GCM_C=y +# CONFIG_MBEDTLS_NIST_KW_C is not set # end of Symmetric Ciphers # CONFIG_MBEDTLS_RIPEMD160_C is not set @@ -992,6 +1063,7 @@ CONFIG_MDNS_TASK_AFFINITY_CPU0=y # CONFIG_MDNS_TASK_AFFINITY_CPU1 is not set CONFIG_MDNS_TASK_AFFINITY=0x0 CONFIG_MDNS_SERVICE_ADD_TIMEOUT_MS=2000 +# CONFIG_MDNS_STRICT_MODE is not set CONFIG_MDNS_TIMER_PERIOD_MS=100 # end of mDNS @@ -1036,6 +1108,12 @@ CONFIG_OPENSSL_ASSERT_DO_NOTHING=y # CONFIG_OPENSSL_ASSERT_EXIT is not set # end of OpenSSL +# +# OpenThread +# +# CONFIG_OPENTHREAD_ENABLED is not set +# end of OpenThread + # # PThreads # @@ -1067,6 +1145,7 @@ CONFIG_SPI_FLASH_ERASE_YIELD_TICKS=1 CONFIG_SPI_FLASH_WRITE_CHUNK_SIZE=8192 # CONFIG_SPI_FLASH_SIZE_OVERRIDE is not set # CONFIG_SPI_FLASH_CHECK_ERASE_TIMEOUT_DISABLED is not set +# CONFIG_SPI_FLASH_OVERRIDE_CHIP_DRIVER_LIST is not set # # Auto-detect flash chips @@ -1119,7 +1198,13 @@ CONFIG_SPIFFS_USE_MTIME=y # # TCP Transport # + +# +# Websocket +# +CONFIG_WS_TRANSPORT=y CONFIG_WS_BUFFER_SIZE=1024 +# end of Websocket # end of TCP Transport # @@ -1132,6 +1217,7 @@ CONFIG_WS_BUFFER_SIZE=1024 # CONFIG_UNITY_ENABLE_FLOAT=y CONFIG_UNITY_ENABLE_DOUBLE=y +# CONFIG_UNITY_ENABLE_64BIT is not set # CONFIG_UNITY_ENABLE_COLOR is not set CONFIG_UNITY_ENABLE_IDF_TEST_RUNNER=y # CONFIG_UNITY_ENABLE_FIXTURE is not set @@ -1233,6 +1319,7 @@ CONFIG_COMPILER_OPTIMIZATION_LEVEL_DEBUG=y CONFIG_OPTIMIZATION_ASSERTIONS_ENABLED=y # CONFIG_OPTIMIZATION_ASSERTIONS_SILENT is not set # CONFIG_OPTIMIZATION_ASSERTIONS_DISABLED is not set +CONFIG_OPTIMIZATION_ASSERTION_LEVEL=2 CONFIG_CXX_EXCEPTIONS=y CONFIG_CXX_EXCEPTIONS_EMG_POOL_SIZE=0 CONFIG_STACK_CHECK_NONE=y @@ -1252,9 +1339,6 @@ CONFIG_ADC2_DISABLE_DAC=y CONFIG_SPIRAM_SUPPORT=y CONFIG_WIFI_LWIP_ALLOCATION_FROM_SPIRAM_FIRST=y CONFIG_TRACEMEM_RESERVE_DRAM=0x0 -# CONFIG_TWO_UNIVERSAL_MAC_ADDRESS is not set -CONFIG_FOUR_UNIVERSAL_MAC_ADDRESS=y -CONFIG_NUMBER_OF_UNIVERSAL_MAC_ADDRESS=4 # CONFIG_ULP_COPROC_ENABLED is not set CONFIG_ULP_COPROC_RESERVE_MEM=0 CONFIG_BROWNOUT_DET=y @@ -1267,7 +1351,6 @@ CONFIG_BROWNOUT_DET_LVL_SEL_0=y # CONFIG_BROWNOUT_DET_LVL_SEL_6 is not set # CONFIG_BROWNOUT_DET_LVL_SEL_7 is not set CONFIG_BROWNOUT_DET_LVL=0 -CONFIG_REDUCE_PHY_TX_POWER=y CONFIG_ESP32_RTC_CLOCK_SOURCE_INTERNAL_RC=y # CONFIG_ESP32_RTC_CLOCK_SOURCE_EXTERNAL_CRYSTAL is not set # CONFIG_ESP32_RTC_CLOCK_SOURCE_EXTERNAL_OSC is not set @@ -1275,10 +1358,20 @@ CONFIG_ESP32_RTC_CLOCK_SOURCE_INTERNAL_RC=y # CONFIG_DISABLE_BASIC_ROM_CONSOLE is not set # CONFIG_NO_BLOBS is not set # CONFIG_COMPATIBLE_PRE_V2_1_BOOTLOADERS is not set +# CONFIG_EVENT_LOOP_PROFILING is not set +CONFIG_POST_EVENTS_FROM_ISR=y +CONFIG_POST_EVENTS_FROM_IRAM_ISR=y +# CONFIG_TWO_UNIVERSAL_MAC_ADDRESS is not set +CONFIG_FOUR_UNIVERSAL_MAC_ADDRESS=y +CONFIG_NUMBER_OF_UNIVERSAL_MAC_ADDRESS=4 +CONFIG_REDUCE_PHY_TX_POWER=y +CONFIG_ESP32S2_PANIC_PRINT_HALT=y +# CONFIG_ESP32S2_PANIC_PRINT_REBOOT is not set +# CONFIG_ESP32S2_PANIC_SILENT_REBOOT is not set +# CONFIG_ESP32S2_PANIC_GDBSTUB is not set CONFIG_SYSTEM_EVENT_QUEUE_SIZE=32 CONFIG_SYSTEM_EVENT_TASK_STACK_SIZE=3072 CONFIG_MAIN_TASK_STACK_SIZE=16384 -CONFIG_IPC_TASK_STACK_SIZE=1024 CONFIG_CONSOLE_UART_DEFAULT=y # CONFIG_CONSOLE_UART_CUSTOM is not set # CONFIG_ESP_CONSOLE_UART_NONE is not set @@ -1293,13 +1386,7 @@ CONFIG_TASK_WDT=y CONFIG_TASK_WDT_TIMEOUT_S=5 CONFIG_TASK_WDT_CHECK_IDLE_TASK_CPU0=y CONFIG_TASK_WDT_CHECK_IDLE_TASK_CPU1=y -# CONFIG_EVENT_LOOP_PROFILING is not set -CONFIG_POST_EVENTS_FROM_ISR=y -CONFIG_POST_EVENTS_FROM_IRAM_ISR=y -CONFIG_ESP32S2_PANIC_PRINT_HALT=y -# CONFIG_ESP32S2_PANIC_PRINT_REBOOT is not set -# CONFIG_ESP32S2_PANIC_SILENT_REBOOT is not set -# CONFIG_ESP32S2_PANIC_GDBSTUB is not set +CONFIG_IPC_TASK_STACK_SIZE=1024 CONFIG_TIMER_TASK_STACK_SIZE=3584 # CONFIG_ESP32_ENABLE_COREDUMP_TO_FLASH is not set # CONFIG_ESP32_ENABLE_COREDUMP_TO_UART is not set