Reduce buffer size in MAC RX clock crossing FIFO

[mn416]

A QSys clock-crossing FIFO is used to connect the MAC RX to the reliable link input port. This FIFO currently has space for 256 elements which seems totally unecessary now that the reliable link consumes data at full-rate. It should be fine to reduce this to 32, but I'm slightly unsure about the behaviour of the FIFO on packeted data (what happens if the packet is larger than the buffer?) and I don't want to change too many things at once.