diff --git a/epdiy-epub/project/Kconfig.proj b/epdiy-epub/project/Kconfig.proj index 67fb310..a227ea1 100644 --- a/epdiy-epub/project/Kconfig.proj +++ b/epdiy-epub/project/Kconfig.proj @@ -45,13 +45,20 @@ if !BSP_USING_BUILT_LCD config TSC_USING_FT6336U bool default n + + config TSC_USING_GT967 + bool + default n + config LCD_USING_EPD_CUSTOM bool default n - choice - prompt "Custom LCD driver" - default LCD_USING_EPD_YZC085_V100 + choice + prompt "Custom LCD driver" + default LCD_USING_EPD_YZC085_V100 if BSP_USING_BOARD_SF32_OED_EPD_V11 + default LCD_USING_EPD_YZC085_V100_V12 if BSP_USING_BOARD_SF32_OED_EPD_V12 + default LCD_USING_EPD_YZC085_V100 config LCD_USING_EPD_R7D005 bool "6.0 rect electronic paper display(EPD R7D005_-1.30 1448x1072)" @@ -59,6 +66,12 @@ if !BSP_USING_BUILT_LCD select LCD_USING_R7D005_130 select BSP_LCDC_USING_EPD_8BIT + config LCD_USING_EPD_YZC085_V100_V12 + bool "6.0 rect electronic paper display(EPD YZC085_V1.05 1032x758)" + select TSC_USING_GT967 if BSP_USING_TOUCHD + select LCD_USING_YZC085_V100 + select BSP_LCDC_USING_EPD_8BIT + config LCD_USING_EPD_YZC085_V100 bool "6.0 rect electronic paper display(EPD YZC085_V1.05 1032x758)" select TSC_USING_FT5446U_V01 if BSP_USING_TOUCHD @@ -94,6 +107,7 @@ if !BSP_USING_BUILT_LCD int default 1448 if LCD_USING_EPD_R7D005 default 1032 if LCD_USING_EPD_YZC085_V100 + default 1032 if LCD_USING_EPD_YZC085_V100_V12 default 1920 if LCD_USING_EPD_TE067XJHE01_V10 default 1032 if LCD_USING_EPD_YZC146_V100 default 1032 if LCD_USING_EPD_CUSTOM_MODULE @@ -102,6 +116,7 @@ if !BSP_USING_BUILT_LCD int default 1072 if LCD_USING_EPD_R7D005 default 758 if LCD_USING_EPD_YZC085_V100 + default 758 if LCD_USING_EPD_YZC085_V100_V12 default 960 if LCD_USING_EPD_TE067XJHE01_V10 default 758 if LCD_USING_EPD_YZC146_V100 default 758 if LCD_USING_EPD_CUSTOM_MODULE @@ -110,6 +125,7 @@ if !BSP_USING_BUILT_LCD int default 315 if LCD_USING_EPD_R7D005 default 300 if LCD_USING_EPD_YZC085_V100 + default 300 if LCD_USING_EPD_YZC085_V100_V12 default 320 if LCD_USING_EPD_TE067XJHE01_V10 default 300 if LCD_USING_EPD_YZC146_V100 default 300 if LCD_USING_EPD_CUSTOM_MODULE diff --git a/epdiy-epub/project/sf32-oed-epd_v12_hcpu/link.lds b/epdiy-epub/project/sf32-oed-epd_v12_hcpu/link.lds new file mode 100644 index 0000000..005fec4 --- /dev/null +++ b/epdiy-epub/project/sf32-oed-epd_v12_hcpu/link.lds @@ -0,0 +1,556 @@ +/****************************************************************************** + * @file gcc_arm.ld + * @brief GNU Linker Script for Cortex-M based device + * @version V2.0.0 + * @date 21. May 2019 + ******************************************************************************/ +#include "rtconfig.h" +#include "mem_map.h" +/* + * Copyright (c) 2009-2019 Arm Limited. All rights reserved. + * + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the License); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an AS IS BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +/* + *-------- <<< Use Configuration Wizard in Context Menu >>> ------------------- + */ + +/*---------------------- Flash Configuration ---------------------------------- + Flash Configuration + Flash Base Address <0x0-0xFFFFFFFF:8> + Flash Size (in Bytes) <0x0-0xFFFFFFFF:8> + + -----------------------------------------------------------------------------*/ +__ROM_BASE = CODE_START_ADDR; +__ROM_SIZE = CODE_SIZE; + +/*--------------------- Embedded RAM Configuration ---------------------------- + RAM Configuration + RAM Base Address <0x0-0xFFFFFFFF:8> + RAM Size (in Bytes) <0x0-0xFFFFFFFF:8> + + -----------------------------------------------------------------------------*/ +__RAM_BASE = HPSYS_RAM0_BASE; +__RAM_SIZE = HCPU_RAM_DATA_SIZE; + +/*--------------------- Stack / Heap Configuration ---------------------------- + Stack / Heap Configuration + Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> + Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> + + -----------------------------------------------------------------------------*/ +__STACK_SIZE = 0x00002000; +__HEAP_SIZE = 0x00000C00; + +__ROM_EX_BASE = HCPU_RO_DATA_START_ADDR; +__ROM_EX_SIZE = HCPU_RO_DATA_SIZE; + +__PSRAM_BASE = PSRAM_DATA_START_ADDR; +__PSRAM_SIZE = PSRAM_DATA_SIZE; + +__ROM2_BASE = BUILTIN_RESOURCE_START_ADDR; +__ROM2_SIZE = BUILTIN_RESOURCE_SIZE; + + + +/* + *-------------------- <<< end of configuration section >>> ------------------- + */ +MEMORY +{ + ROM (rx) : ORIGIN = __ROM_BASE, LENGTH = __ROM_SIZE + RAM (rw) : ORIGIN = __RAM_BASE, LENGTH = __RAM_SIZE + ROM_EX(rw):ORIGIN = __ROM_EX_BASE, LENGTH = __ROM_EX_SIZE + PSRAM(rw): ORIGIN = __PSRAM_BASE, LENGTH = __PSRAM_SIZE + ROM2 (rx): ORIGIN = __ROM2_BASE, LENGTH = __ROM2_SIZE +} + +/* Linker script to place sections and symbol values. Should be used together + * with other linker script that defines memory regions FLASH and RAM. + * It references following symbols, which must be defined in code: + * Reset_Handler : Entry of reset handler + * + * It defines following symbols, which code can use without definition: + * __exidx_start + * __exidx_end + * __copy_table_start__ + * __copy_table_end__ + * __zero_table_start__ + * __zero_table_end__ + * __etext + * __data_start__ + * __preinit_array_start + * __preinit_array_end + * __init_array_start + * __init_array_end + * __fini_array_start + * __fini_array_end + * __data_end__ + * __bss_start__ + * __bss_end__ + * __end__ + * end + * __HeapLimit + * __StackLimit + * __StackTop + * __stack + */ +ENTRY(Reset_Handler) + +SECTIONS +{ +#ifndef FLASH_TABLE_ONLY + .vectors : + { + _stext = ABSOLUTE(.); + KEEP(*(.vectors)); + /* workaround to avoid load address of .retm_data doesn't skip .vectors region */ + . = . + 4; + } > ROM + + .stack : + { + . = ALIGN(8); + __StackLimit = .; + . = . + __STACK_SIZE; + . = ALIGN(8); + __StackTop = .; + } > RAM + PROVIDE(__stack = __StackTop); + + .heap : + { + . = ALIGN(8); + __end__ = .; + PROVIDE(end = .); + . = . + __HEAP_SIZE; + . = ALIGN(8); + __HeapLimit = .; + } > RAM + + .retm_data : + { + . = ALIGN(4); + __rw_retm_data_start__ = .; + * (.*l1_ret_text_*) + * (.*l1_ret_rodata_*) + + *drv_spi_flash.o (.text* .rodata*) + *flash_table.o (.text* .rodata*) + *bf0_hal_mpi.o (.text* .rodata*) + *bf0_hal_mpi_ex.o (.text* .rodata*) + *bf0_hal_mpi_psram.o (.text* .rodata*) + *flash.o (.text* .rodata*) + *drv_psram.o (.text* .rodata*) + + *context_gcc.o (.text* .rodata*) + *drv_common.o (.text.HAL_GetTick) + *bf0_hal_rcc.o (.text* .rodata*) + + *bf0_pm.o (.text.sifli_light_handler) + *bf0_pm.o (.text.sifli_deep_handler) + *bf0_pm.o (.text.sifli_standby_handler) + *bf0_pm.o (.text.SystemInitFromStandby) + *.o (.text.SystemPowerOnModeGet) + + *bsp_init.o (.text* .rodata*) + *bsp_lcd_tp.o (.text* .rodata*) + *bsp_pinmux.o (.text* .rodata*) + *bsp_power.o (.text* .rodata*) + *bf0_hal_gpio.o (.text* .rodata*) + + *bf0_hal_hpaon.o (.text* .rodata*) + *bf0_hal.o (.text.HAL_Init) + *.o (.text.HAL_Delay_us) + *.o (.text.HAL_Delay_us_) + *.o (.text.HAL_Delay_us2_) + *.o (.text.HAL_MspInit) + *.o (.text.HAL_Delay) + *bf0_hal_pinmux.o (.text* .rodata*) + *bf0_pin_const.o (.text* .rodata*) + *drv_common.o (.text.rt_hw_us_delay) + *.o (.text.rt_memset) + *rt_memclr*.o (.text*) + *memset*.o (.text*) + + *.o (.retm_data_*) + + . = ALIGN(4); + __rw_retm_data_end__ = .; + + } > RAM AT > ROM +#endif /* !FLASH_TABLE_ONLY */ + + + .rom2 : + { + *epub_fonts.o (.text* .rodata*) + } > ROM2 + + + .text : + { +#ifdef FLASH_TABLE_ONLY + KEEP(*ftab.o(.text* .rodata*)) +#else + *(.text*) + *(.rodata*) + + KEEP(*(.init)) + KEEP(*(.fini)) + + /* .ctors */ + /* + *crtbegin.o(.ctors) + *crtbegin?.o(.ctors) + *(EXCLUDE_FILE(*crtend?.o *crtend.o) .ctors) + *(SORT(.ctors.*)) + *(.ctors) + */ + + /* .dtors */ + /* + *crtbegin.o(.dtors) + *crtbegin?.o(.dtors) + *(EXCLUDE_FILE(*crtend?.o *crtend.o) .dtors) + *(SORT(.dtors.*)) + *(.dtors) + */ + + /* section information for finsh shell */ + . = ALIGN(4); + __fsymtab_start = .; + KEEP(*(FSymTab)) + __fsymtab_end = .; + + . = ALIGN(4); + __vsymtab_start = .; + KEEP(*(VSymTab)) + __vsymtab_end = .; + + . = ALIGN(4); + LcdDriverDescTab_start = .; + KEEP(*(LcdDriverDescTab)) + LcdDriverDescTab_end = .; + + . = ALIGN(4); + __rt_utest_tc_tab_start = .; + KEEP(*(UtestTcTab)) + __rt_utest_tc_tab_end = .; + + /* section information for initial. */ + . = ALIGN(4); + __rt_init_start = .; + KEEP(*(SORT(.rti_fn*))) + __rt_init_end = .; + + . = ALIGN(4); + BuiltinAppTab_start = .; + KEEP(*(BuiltinAppTab)) + BuiltinAppTab_end = .; + + . = ALIGN(4); + __app_font_start__ = .; + KEEP(*(.app_font)) + __app_font_end__ = .; + + . = ALIGN(4); + __SerialTranExport_start__ = .; + KEEP(*(SerialTranExport)) + __SerialTranExport_end__ = .; + + . = ALIGN(4); + __sifli_reg_start__ = .; + KEEP(*(SORT(.sifli_reg*))) + __sifli_reg_end__ = .; + + . = ALIGN(4); + __bt_sifli_reg_start__ = .; + KEEP(*(SORT(.bt_sifli_reg*))) + __bt_sifli_reg_end__ = .; + + /* section information for modules */ + . = ALIGN(4); + __rtmsymtab_start = .; + KEEP(*(RTMSymTab)) + __rtmsymtab_end = .; + + . = ALIGN(4); + __usbh_class_info_start__ = .; + KEEP(*(.usbh_class_info)) + __usbh_class_info_end__ = .; + + KEEP(*(.eh_frame*)) + _etext = ABSOLUTE(.); +#endif + } > ROM + +#ifdef ZBT +#include "zbt_rom.lds" +#endif + +#ifndef FLASH_TABLE_ONLY + .rom_ex : + { + + . = ALIGN(4); + __rw_rom_ex_start__ = .; + __ER_IROM1_EX$$RO_start__ = .; + __ER_IROM1_EX$$RO_load_start__ = LOADADDR(.rom_ex); + + *(.l1_non_ret_text_*) + *(.l1_non_ret_rodata_*) + + . = ALIGN(4); + __rw_rom_ex_end__ = .; + __ER_IROM1_EX$$RO_end__ = .; + __ER_IROM1_EX$$RO_load_end__ = LOADADDR(.rom_ex) + SIZEOF(.rom_ex); + + } > ROM_EX AT > ROM + + /* + * SG veneers: + * All SG veneers are placed in the special output section .gnu.sgstubs. Its start address + * must be set, either with the command line option `--section-start` or in a linker script, + * to indicate where to place these veneers in memory. + */ +/* + .gnu.sgstubs : + { + . = ALIGN(32); + } > ROM +*/ + .ARM.extab : + { + *(.ARM.extab* .gnu.linkonce.armextab.*) + } > ROM + + __exidx_start = .; + .ARM.exidx : + { + *(.ARM.exidx* .gnu.linkonce.armexidx.*) + } > ROM + __exidx_end = .; + + .copy.table : + { + . = ALIGN(4); + __copy_table_start__ = .; + LONG (LOADADDR(.data)) + LONG (ADDR(.data)) + LONG (SIZEOF(.data)) + + LONG (LOADADDR(.retm_data)) + LONG (ADDR(.retm_data)) + LONG (SIZEOF(.retm_data)) + + LONG (LOADADDR(.rom_ex)) + LONG (ADDR(.rom_ex)) + LONG (SIZEOF(.rom_ex)) + + __copy_table_end__ = .; + } > ROM + + + .zero.table : + { + . = ALIGN(4); + __zero_table_start__ = .; + /* Add each additional bss section here */ + + LONG (__bss_start__) + LONG (__bss_end__ - __bss_start__) + + LONG (ADDR(.retm_bss)) + LONG (SIZEOF(.retm_bss)) + + __zero_table_end__ = .; + } > ROM + + .retm_bss : + { + . = ALIGN(4); + __rw_retm_bss_start__ = .; + __RW_IRAM_RET$$ZI_start__ = .; + * (.bss.retm_bss_*) + + . = ALIGN(4); + __RW_IRAM_RET$$ZI_end__ = .; + } > RAM + + .RW_IRAM0 : + { + *(non_ret) + *(.*l1_non_ret_data_*) + *(.*l1_non_ret_bss_*) +#ifndef BSP_USING_PSRAM + *(.nand_cache) + *(.*l2_non_ret_data_*) + *(.*l2_non_ret_bss_*) + *(.*l2_cache_non_ret_data_*) + *(.*l2_cache_non_ret_bss_*) +#endif /* BSP_USING_PSRAM */ + } > RAM + + /** + * Location counter can end up 2byte aligned with narrow Thumb code but + * __etext is assumed by startup code to be the LMA of a section in RAM + * which must be 4byte aligned + */ + __etext = ALIGN (4); + + .data : + { + _sdata = ABSOLUTE(.); + __data_start__ = .; + __RW_IRAM1_start__ = .; + *(vtable) + *(.data) + *(.data.*) + *(.l1_ret_data_*) + + . = ALIGN(4); + /* preinit data */ + PROVIDE_HIDDEN (__preinit_array_start = .); + KEEP(*(.preinit_array)) + PROVIDE_HIDDEN (__preinit_array_end = .); + + . = ALIGN(4); + /* init data */ + _sinit = ABSOLUTE(.); + PROVIDE(__ctors_start__ = .); + PROVIDE_HIDDEN (__init_array_start = .); + /* old GCC version uses .ctors */ + KEEP(*(SORT(.ctors.*))) + KEEP(*(.ctors)) + /* new GCC version uses .init_array */ + KEEP(*(SORT(.init_array.*))) + KEEP(*(.init_array)) + _einit = ABSOLUTE(.); + PROVIDE_HIDDEN (__init_array_end = .); + PROVIDE(__ctors_end__ = .); + + + . = ALIGN(4); + /* finit data */ + PROVIDE(__dtors_start__ = .); + PROVIDE_HIDDEN (__fini_array_start = .); + + KEEP(*(SORT(.dtors.*))) + KEEP(*(.dtors)) + + KEEP(*(SORT(.fini_array.*))) + KEEP(*(.fini_array)) + PROVIDE_HIDDEN (__fini_array_end = .); + PROVIDE(__dtors_end__ = .); + +#ifdef ZBT +#include "zbt_data.lds" +#endif + + KEEP(*(.jcr*)) + . = ALIGN(4); + /* All data end */ + __data_end__ = .; + __RW_IRAM1_end__ = .; + _edata = ABSOLUTE(.); + } > RAM AT > ROM + + /* + * Secondary data section, optional + * + * Remember to add each additional data section + * to the .copy.table above to asure proper + * initialization during startup. + */ + + __etext2 = ALIGN (4); + +#ifdef BSP_USING_PSRAM + .RW_PSRAM1 : + { + . = ALIGN(4); + __rw_psram1_start__ = .; + *(.*l2_ret_data_*) + *(.*l2_ret_bss_*) + *(.*l2_cache_ret_data_*) + *(.*l2_cache_ret_bss_*) + . = ALIGN(4); + __rw_psram1_end__ = .; + + } > PSRAM + + .RW_PSRAM_NON_RET : + { + /* aligned to cache line size */ + . = ALIGN(32); + __RW_PSRAM_NON_RET_start__ = .; + *(.nand_cache) + *(.*l2_non_ret_data_*) + *(.*l2_non_ret_bss_*) + *(.*l2_cache_non_ret_data_*) + *(.*l2_cache_non_ret_bss_*) + . = ALIGN(4); + __RW_PSRAM_NON_RET_end__ = .; + + } > PSRAM +#endif /* BSP_USING_PSRAM */ + + .bss : + { + _sbss = ABSOLUTE(.); + . = ALIGN(4); + __bss_start__ = .; + *(.bss) + *(.bss.*) + *(COMMON) + *(.l1_ret_bss_*) + . = ALIGN(4); + __bss_end__ = .; + __bss_end = .; + _ebss = ABSOLUTE(.); + __end__ = .; + PROVIDE(end = .); + } > RAM AT > RAM + + /* + * Secondary bss section, optional + * + * Remember to add each additional bss section + * to the .zero.table above to asure proper + * initialization during startup. + */ +/* + .bss2 : + { + . = ALIGN(4); + __bss2_start__ = .; + *(.bss2) + *(.bss2.*) + . = ALIGN(4); + __bss2_end__ = .; + } > RAM2 AT > RAM2 +*/ + + /* Check if data + heap + stack exceeds RAM limit */ + /* ASSERT(__StackLimit >= __HeapLimit, "region RAM overflowed with stack") */ + + + +#endif + +} + diff --git a/epdiy-epub/project/sf32-oed-epd_v12_hcpu/link.sct b/epdiy-epub/project/sf32-oed-epd_v12_hcpu/link.sct new file mode 100644 index 0000000..6f8b4bc --- /dev/null +++ b/epdiy-epub/project/sf32-oed-epd_v12_hcpu/link.sct @@ -0,0 +1,157 @@ +#! armclang -E --target=arm-arm-none-eabi -mcpu=cortex-m33 -xc -I $SDK_ROOT/drivers/cmsis/sf32lb52x +#include "rtconfig.h" +#include "mem_map.h" + + +; ************************************************************* +; *** Scatter-Loading Description File generated by uVision *** +; ************************************************************* + +LR_IROM1 CODE_START_ADDR CODE_SIZE { ; load region size_region + ER_IROM1 CODE_START_ADDR CODE_SIZE { ; load address = execution address + *.o (RESET, +First) + *(InRoot$$Sections) + .ANY (+RO) + *(FSymTab) + *.o (.rodata.*) + } + ER_IROM1_EX HCPU_RO_DATA_START_ADDR HCPU_RO_DATA_SIZE { ; load address = execution address + *.o (.l1_non_ret_text_*) + *.o (.l1_non_ret_rodata_*) + } + +#ifdef BSP_USING_PSRAM + RW_PSRAM1 PSRAM_DATA_START_ADDR { +#ifdef PKG_USING_FFMPEG + mpeg*.o (.bss.*) + h264*.o (.bss.*) +#endif + } + RW_PSRAM_RET +0 UNINIT{ ; ZI data, retained + *.o (.l2_ret_data_*) + *.o (.l2_ret_bss_*) + *.o (.l2_cache_ret_data_*) + *.o (.l2_cache_ret_bss_*) + } + RW_PSRAM_NON_RET +0 UNINIT{ ; ZI data, not retained and reused by SRAM retention + *.o (.l2_non_ret_data_*) + *.o (.l2_non_ret_bss_*) + *.o (.l2_cache_non_ret_data_*) + *.o (.l2_cache_non_ret_bss_*) + } + ScatterAssert((ImageLength(RW_PSRAM1)+ ImageLength(RW_PSRAM_RET) + ImageLength(RW_PSRAM_NON_RET))wave_table[0][0]; - reflesh_times++; return wave_table->frame_count; } @@ -114,7 +111,7 @@ void epd_wave_table_fill_lut(uint32_t *p_epic_lut, uint32_t frame_num) uint16_t epd_get_vcom_voltage(void) { -#if defined(LCD_USING_EPD_YZC085_V100) || defined(LCD_USING_EPD_YZC146_V100) +#if defined(LCD_USING_EPD_YZC085_V100) || defined(LCD_USING_EPD_YZC146_V100) || defined(LCD_USING_EPD_YZC085_V100_V12) return 1050; #else return 2100; @@ -142,4 +139,4 @@ const EPD_TimingConfig *epd_get_timing_config(void) return &timing_config; } -#endif /*LCD_USING_EPD_YZC085_V100 || LCD_USING_EPD_YZC146_V100*/ \ No newline at end of file +#endif /*LCD_USING_EPD_YZC085_V100 || LCD_USING_EPD_YZC146_V100 || LCD_USING_EPD_YZC085_V100_V12*/ \ No newline at end of file diff --git a/epdiy-epub/src/boards/touch/gt967/SConscript b/epdiy-epub/src/boards/touch/gt967/SConscript new file mode 100644 index 0000000..6eb93f8 --- /dev/null +++ b/epdiy-epub/src/boards/touch/gt967/SConscript @@ -0,0 +1,8 @@ +from building import * + +cwd = GetCurrentDir() +src = Glob('*.c') +CPPPATH = [cwd + '/../common', cwd] +group = DefineGroup('Drivers', src, depend = ['TSC_USING_GT967'], CPPPATH = CPPPATH) + +Return('group') diff --git a/epdiy-epub/src/boards/touch/gt967/gt967.c b/epdiy-epub/src/boards/touch/gt967/gt967.c new file mode 100644 index 0000000..1f7672a --- /dev/null +++ b/epdiy-epub/src/boards/touch/gt967/gt967.c @@ -0,0 +1,262 @@ +/* + * SPDX-FileCopyrightText: 2019-2022 SiFli Technologies(Nanjing) Co., Ltd + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#include +#include "board.h" +#include "gt967.h" +#include "drv_touch.h" + +/* Define -------------------------------------------------------------------*/ + +#define DBG_LEVEL DBG_INFO // DBG_ERROR // +#define LOG_TAG "drv.gt967" +#include +#define TP_DEV_ADDR (0x14) +#define TP_TD_STATUS (0x814e) +#define TP_P1_XL (0x8150) +#define TP_P1_XH (0x8151) +#define TP_P1_YL (0x8152) +#define TP_P1_YH (0x8153) + +#define TP_ID_CONTROL (0x8040) + +// rotate to left with 90, 180, 270 +// rotate to left with 360 for mirror +//#define TP_ROTATE_LEFT (90) + +/* function and value-----------------------------------------------------------*/ + +static void correct_pos(touch_msg_t ppos); +static rt_err_t write_reg(uint16_t reg, rt_uint8_t data); +static rt_err_t read_regs(rt_uint16_t reg, rt_uint8_t len, rt_uint8_t *buf); + +static struct rt_i2c_bus_device *ft_bus = NULL; + +static struct touch_drivers driver; + +static rt_err_t write_reg(uint16_t reg, rt_uint8_t data) +{ + rt_int8_t res = 0; + struct rt_i2c_msg msgs; + rt_uint8_t buf[3] = {(uint8_t)(reg >> 8), (uint8_t)reg, data}; + + msgs.addr = TP_DEV_ADDR; /* slave address */ + msgs.flags = RT_I2C_WR; /* write flag */ + msgs.buf = buf; /* Send data pointer */ + msgs.len = 3; + + if (rt_i2c_transfer(ft_bus, &msgs, 1) == 1) + { + res = RT_EOK; + } + else + { + res = -RT_ERROR; + } + return res; +} + +static rt_err_t read_regs(rt_uint16_t reg, rt_uint8_t len, rt_uint8_t *buf) +{ + rt_int8_t res = 0; + struct rt_i2c_msg msgs[2]; + rt_uint8_t reg_w[2] = {(uint8_t)(reg >> 8), (uint8_t)reg}; + + msgs[0].addr = TP_DEV_ADDR; /* Slave address */ + msgs[0].flags = RT_I2C_WR; /* Write flag */ + msgs[0].buf = reg_w; /* Slave register address */ + msgs[0].len = 2; /* Number of bytes sent */ + + msgs[1].addr = TP_DEV_ADDR; /* Slave address */ + msgs[1].flags = RT_I2C_RD; /* Read flag */ + msgs[1].buf = buf; /* Read data pointer */ + msgs[1].len = len; /* Number of bytes read */ + + if (rt_i2c_transfer(ft_bus, msgs, 2) == 2) + { + res = RT_EOK; + } + else + { + res = -RT_ERROR; + } + return res; +} + +static void correct_pos(touch_msg_t ppos) +{ + int temp_x = ppos->x; + ppos->x = ppos->y; + ppos->y = LCD_VER_RES_MAX - (temp_x ) - 1; + + return; +} + +static rt_err_t read_point(touch_msg_t p_msg) +{ + uint8_t buf[80] = {0}; + uint8_t point_num = 0, touch_down = 0; + int ret = 0, retry = 2; + uint8_t reg_value[8] = {0}; + reg_value[0] = 0x81; + reg_value[1] = 0x40; + // reg_value[2] = 0x00; + // reg_value[3] = 0x00; +// rt_kprintf("tp read_point\n"); + read_regs(0x814e, 1, buf); + if ((buf[0] & 0x80) != 0x80) + { + rt_thread_delay(1); //delay 1ms if buffer status is not relay; + LOG_D("tp\n"); + read_regs(0x814e, 1, buf); + } + rt_touch_irq_pin_enable(1); + + point_num = buf[0] & 0x0f; + if (point_num) // the number of touch points + { + p_msg->event = TOUCH_EVENT_DOWN; + } + else + { + p_msg->event = TOUCH_EVENT_UP; + } + read_regs(0x8150, 6, buf); + p_msg->x = buf[0] + ((uint16_t)(buf[1] & 0xff) << 8); + p_msg->y = buf[2] + ((uint16_t)(buf[3] & 0xff) << 8); + correct_pos(p_msg); + LOG_D("piont:%d, x:%d, y:%d,event:%d,byte:%d\n", point_num, p_msg->x, p_msg->y, p_msg->event, buf[4]); + + write_reg(0x814e, 0); //clear tp interrupt + + return RT_EEMPTY; +} + +static void irq_handler(void *arg) +{ + rt_err_t ret = RT_ERROR; + + int value = (int)arg; + LOG_D("gt967 touch_irq_handler\n"); + + rt_touch_irq_pin_enable(0); + + ret = rt_sem_release(driver.isr_sem); + RT_ASSERT(RT_EOK == ret); +} +static rt_err_t init(void) +{ + rt_err_t err; + struct touch_message msg; + + LOG_D("gt967 init"); + + rt_pin_mode(TOUCH_IRQ_PIN, PIN_MODE_OUTPUT); //上电复位I2C地址选择(通过RESET/INT时序选择0x28/0x29的I2C地址) + rt_pin_write(TOUCH_IRQ_PIN, 0); + BSP_TP_Reset(0); + rt_thread_delay(1); + rt_pin_write(TOUCH_IRQ_PIN, 1); + rt_thread_delay(1); + BSP_TP_Reset(1); + rt_thread_delay(8); + rt_pin_write(TOUCH_IRQ_PIN, 0); + rt_thread_delay(60); + + rt_touch_irq_pin_attach(PIN_IRQ_MODE_FALLING, irq_handler, NULL); + rt_touch_irq_pin_enable(1); //Must enable before read I2C + + uint8_t buf[6] = {0}; + read_regs(0x8144, 4, buf); + uint16_t firmware_version; + firmware_version = buf[0] + ((uint16_t)(buf[1] & 0xff) << 8); + + LOG_I("Firmware version = 0x%x(%d)", firmware_version, firmware_version); + + //Soft reset + err = write_reg(TP_ID_CONTROL, 2); + if (RT_EOK != err) + { + LOG_E("SoftReset fail\n"); + return RT_FALSE; + } + err = write_reg(TP_ID_CONTROL, 0); + if (RT_EOK != err) + { + LOG_E("SoftReset stop fail\n"); + return RT_FALSE; + } + + LOG_D("gt967 init OK"); + return RT_EOK; + +} + +static rt_err_t deinit(void) +{ + LOG_D("gt967 deinit"); + + rt_touch_irq_pin_enable(0); + return RT_EOK; + +} + +static rt_bool_t probe(void) +{ + + ft_bus = (struct rt_i2c_bus_device *)rt_device_find(TOUCH_DEVICE_NAME); + if (RT_Device_Class_I2CBUS != ft_bus->parent.type) + { + ft_bus = NULL; + } + if (ft_bus) + { + rt_device_open((rt_device_t)ft_bus, RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_TX | RT_DEVICE_FLAG_INT_RX); + } + else + { + LOG_I("bus not find\n"); + return RT_FALSE; + } + + { + struct rt_i2c_configuration configuration = + { + .mode = 0, + .addr = 0, + .timeout = 500, + .max_hz = 400000, + }; + + rt_i2c_configure(ft_bus, &configuration); + } + + LOG_I("probe OK"); + + return RT_TRUE; +} + +static struct touch_ops ops = +{ + read_point, + init, + deinit +}; + +static int rt_tp_device_init(void) +{ + + driver.probe = probe; + driver.ops = &ops; + driver.user_data = RT_NULL; + driver.isr_sem = rt_sem_create("gt967", 0, RT_IPC_FLAG_FIFO); + + rt_touch_drivers_register(&driver); + + return 0; + +} +INIT_COMPONENT_EXPORT(rt_tp_device_init); + diff --git a/epdiy-epub/src/boards/touch/gt967/gt967.h b/epdiy-epub/src/boards/touch/gt967/gt967.h new file mode 100644 index 0000000..17dd8f0 --- /dev/null +++ b/epdiy-epub/src/boards/touch/gt967/gt967.h @@ -0,0 +1,25 @@ +/* + * SPDX-FileCopyrightText: 2019-2022 SiFli Technologies(Nanjing) Co., Ltd + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#ifndef __GT967_H +#define __GT967_H + +#ifdef __cplusplus +extern "C" { +#endif + +/* Includes ------------------------------------------------------------------*/ + +/* type ------------------------------------------------------------------*/ + +/* function ------------------------------------------------------------------*/ + +#ifdef __cplusplus +} +#endif + +#endif /* __GT911_H */ +