Lab-8/lab8.asm.rpt at master · MrCaiting/Lab-8 · GitHub

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Assembler report for lab8
Wed Mar 14 09:24:13 2018
Quartus II 64-Bit Version 15.0.2 Build 153 07/15/2015 SJ Full Version


---------------------
; Table of Contents ;
---------------------
  1. Legal Notice
  2. Assembler Summary
  3. Assembler Settings
  4. Assembler Encrypted IP Cores Summary
  5. Assembler Generated Files
  6. Assembler Device Options: I:/Lab-8/lab8.sof
  7. Assembler Messages


----------------
; Legal Notice ;
----------------
Copyright (C) 1991-2015 Altera Corporation. All rights reserved.
Your use of Altera Corporation's design tools, logic functions
and other software and tools, and its AMPP partner logic
functions, and any output files from any of the foregoing
(including device programming or simulation files), and any
associated documentation or information are expressly subject
to the terms and conditions of the Altera Program License
Subscription Agreement, the Altera Quartus II License Agreement,
the Altera MegaCore Function License Agreement, or other
applicable license agreement, including, without limitation,
that your use is for the sole purpose of programming logic
devices manufactured by Altera and sold by Altera or its
authorized distributors.  Please refer to the applicable
agreement for further details.


+---------------------------------------------------------------+
; Assembler Summary                                             ;
+-----------------------+---------------------------------------+
; Assembler Status      ; Successful - Wed Mar 14 09:24:13 2018 ;
; Revision Name         ; lab8                                  ;
; Top-level Entity Name ; lab8                                  ;
; Family                ; Cyclone IV E                          ;
; Device                ; EP4CE115F29C7                         ;
+-----------------------+---------------------------------------+


+----------------------------------+
; Assembler Settings               ;
+--------+---------+---------------+
; Option ; Setting ; Default Value ;
+--------+---------+---------------+


+------------------------------------------------+
; Assembler Encrypted IP Cores Summary           ;
+--------+------------------------+--------------+
; Vendor ; IP Core Name           ; License Type ;
+--------+------------------------+--------------+
; Altera ; Signal Tap (6AF7 BCE1) ; Licensed     ;
; Altera ; Signal Tap (6AF7 BCEC) ; Licensed     ;
+--------+------------------------+--------------+


+---------------------------+
; Assembler Generated Files ;
+---------------------------+
; File Name                 ;
+---------------------------+
; I:/Lab-8/lab8.sof         ;
+---------------------------+


+---------------------------------------------+
; Assembler Device Options: I:/Lab-8/lab8.sof ;
+----------------+----------------------------+
; Option         ; Setting                    ;
+----------------+----------------------------+
; Device         ; EP4CE115F29C7              ;
; JTAG usercode  ; 0x0079E441                 ;
; Checksum       ; 0x0079E441                 ;
+----------------+----------------------------+


+--------------------+
; Assembler Messages ;
+--------------------+
Info: *******************************************************************
Info: Running Quartus II 64-Bit Assembler
    Info: Version 15.0.2 Build 153 07/15/2015 SJ Full Version
    Info: Processing started: Wed Mar 14 09:24:06 2018
Info: Command: quartus_asm --read_settings_files=off --write_settings_files=off lab8 -c lab8
Info (115031): Writing out detailed assembly data for power analysis
Info (115030): Assembler is generating device programming files
Info: Quartus II 64-Bit Assembler was successful. 0 errors, 0 warnings
    Info: Peak virtual memory: 630 megabytes
    Info: Processing ended: Wed Mar 14 09:24:13 2018
    Info: Elapsed time: 00:00:07
    Info: Total CPU time (on all processors): 00:00:04