All SystemVerilog code in this repository must adhere to the SystemVerilog Coding Style Guide by lowRISC and the following rules:
-
All module names must start with
axi_. -
User-facing modules must have SystemVerilog
structs as AXI ports. The concretestructtype must be defined asparameterto the module. The fields of thestructmust correspond to those defined by ourtypedefmacros. -
User-facing modules may come with a variant that has SystemVerilog interfaces as AXI ports.
- Such an interface variant module must not implement any functionality except wiring its
interfaces to the
structports of the original module. - The name of an interface variant must be the name of the original module suffixed by
_intf. - The parameters of an interface variant must be formatted
ALL_CAPS.
- Such an interface variant module must not implement any functionality except wiring its
interfaces to the
We follow pulp-platform's Collaboration
Guidelines.