Generic CPU instantiation

[LiamSkirrow]

We need the ability to pass a command line argument in the call to Verilator (in the Makefile), which will hopefully turn up in argv of in main(). This way we can pass on some compile time parameter to the debug_harness to tell it which module/dut to instantiate. This way we can arbitrarily switch between different RTL projects from the command line without having to comment out things internally in the RTL.

[LiamSkirrow]

I'm changing the scope of this ticket a little, to encapsulate the work required to easily instantiate a different CPU that could be RISC-V or any other architecture (mips, 6502 etc...). This will require the use of a different compiler/assembler too.

Perhaps a Makefile argument like arch=riscv32 or arch=6502, that can be used to select the relevant compiler (and compiler flags) and instantiate the relevant CPU to be simulated.