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updated xcelium and add_tests function. testing_workflow #152: Commit a88f6f4 pushed by benoitdenkinger
1m 38s flows
flows
1m 38s
fixed xcelium function. testing_workflow #151: Commit 0c08faf pushed by benoitdenkinger
1m 35s flows
flows
1m 35s
xcelium log file name updated for each step. testing_workflow #150: Commit 9383b8b pushed by benoitdenkinger
1m 43s flows
flows
1m 43s
updated xcelium log file name and path. testing_workflow #149: Commit 4630d18 pushed by benoitdenkinger
5m 27s flows
flows
5m 27s
added top option generator expression based on NO_RUN_TARGET argument… testing_workflow #148: Commit 3b2a616 pushed by benoitdenkinger
1m 50s flows
flows
1m 50s
added xmlibdirpath to xrun run command. testing_workflow #147: Commit da34908 pushed by benoitdenkinger
2m 18s flows
flows
2m 18s
delete accidentaly added files testing_workflow #146: Commit 5e21dbf pushed by Risto97
1m 34s consolidate_sc_sv
consolidate_sc_sv
1m 34s
re-added remove unset for verilator SED_WOR function option. testing_workflow #145: Commit d21ad88 pushed by benoitdenkinger
1m 29s flows
flows
1m 29s
fix minor merge errors. testing_workflow #144: Commit d91218f pushed by benoitdenkinger
1m 41s flows
flows
1m 41s
Merge branch 'develop' into flows testing_workflow #143: Commit f00d988 pushed by benoitdenkinger
1m 32s flows
flows
1m 32s
Generate Xcelium SystemC and Verilog shells for mixed language sc sv … testing_workflow #142: Commit 5b296ff pushed by Risto97
1m 41s consolidate_sc_sv
consolidate_sc_sv
1m 41s
Modelsim uses sccom only at language boundaries and top level systemc… testing_workflow #141: Commit 46eb4ca pushed by Risto97
1m 29s consolidate_sc_sv
consolidate_sc_sv
1m 29s
SoCgen props (#127) docs_pages_workflow #111: Commit 283bd65 pushed by benoitdenkinger
24s master
master
24s
Add support for VCS SystemC-Verilog mixed simulations #126 testing_workflow #140: Commit 6a88744 pushed by Risto97
1m 48s vcs_sc_sv
vcs_sc_sv
1m 48s
Add xcelium SystemC support issue #126 testing_workflow #139: Commit 4d85dbc pushed by Risto97
1m 25s xcelium_sc_sv
xcelium_sc_sv
1m 25s
Add modelsim 32BIT argument, add rpath to sccom -link solves issue in… testing_workflow #138: Commit 14b3503 pushed by Risto97
1m 40s modelsim_sc_sv
modelsim_sc_sv
1m 40s
Add visualizer support for modelsim #126 testing_workflow #137: Commit 4ae4234 pushed by Risto97
1m 51s modelsim_sc_sv
modelsim_sc_sv
1m 51s
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