Branch offsets

[kayvan61]

branch type is determined pre packetization. Packetization then pushes the instruction too far for the 13 bit imm that the branch supports. Moving the branch offsets to use instruction offset instead of byte offset should fix.

Files to look at:
arch-gen: llvm/lib/Target/Primate/MCTargetDesc/PrimateAsmBackend.cpp

[kayvan61]

It's reasonable to branch a single VLIW instruction. Since instruction memory is addressable by the VLIW Instruction size, it's reasonable to jump 1 address.

• primate-uarch/templates/decode.scala Branch offsets no longer have implicit offset[0] = 0
• primate-arch-gen/llvm/lib/Target/Primate/MCTargetDesc/PrimateAsmBackend.cpp offset value should be divided by the VLIW instruction size