diff --git a/configs/config.lenovo_m900_tiny b/configs/config.lenovo_m900_tiny new file mode 100644 index 00000000000..95b7739ccb3 --- /dev/null +++ b/configs/config.lenovo_m900_tiny @@ -0,0 +1,50 @@ +CONFIG_LOCALVERSION="v0.1.0-rc1" +CONFIG_OPTION_BACKEND_NONE=y +CONFIG_VENDOR_LENOVO=y +# CONFIG_POST_DEVICE is not set +# CONFIG_POST_IO is not set +CONFIG_VBOOT=y +CONFIG_CONSOLE_POST=y +CONFIG_VBOOT_SLOTS_RW_A=y +CONFIG_EDK2_CPU_THROTTLING_THRESHOLD_DEFAULT=5 +CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY=y +CONFIG_TPM_MEASURED_BOOT=y +CONFIG_EDK2_BOOTSPLASH_FILE="3rdparty/dasharo-blobs/dasharo/bootsplash.bmp" +CONFIG_INTEL_ME_DISABLED_HECI=y +CONFIG_CBFS_VERIFICATION=y +CONFIG_VBOOT_CBFS_INTEGRATION=y +CONFIG_TPM2=y +CONFIG_BOOTMEDIA_LOCK_CONTROLLER=y +CONFIG_BOOTMEDIA_LOCK_WPRO_VBOOT_RO=y +CONFIG_BOOTMEDIA_SMM_BWP=y +CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0=y +CONFIG_PAYLOAD_EDK2=y +CONFIG_EDK2_USE_EDK2_PLATFORMS=y +CONFIG_EDK2_PLATFORMS_REPOSITORY="https://github.com/Dasharo/edk2-platforms" +CONFIG_EDK2_PLATFORMS_TAG_OR_REV="1002a59639f111a2f8178b77d1f5fde0ea8d976f" +CONFIG_EDK2_CBMEM_LOGGING=y +CONFIG_EDK2_FOLLOW_BGRT_SPEC=y +CONFIG_EDK2_SERIAL_SUPPORT=y +CONFIG_DASHARO=y +CONFIG_EDK2_ENABLE_IPXE=y +# CONFIG_EDK2_SECURE_BOOT_DEFAULT_ENABLE is not set +CONFIG_EDK2_SATA_PASSWORD=y +CONFIG_EDK2_OPAL_PASSWORD=y +CONFIG_EDK2_SETUP_PASSWORD=y +CONFIG_EDK2_PERFORMANCE_MEASUREMENT_ENABLE=y +CONFIG_EDK2_DASHARO_SYSTEM_FEATURES=y +CONFIG_EDK2_DASHARO_SECURITY_OPTIONS=y +CONFIG_EDK2_SHOW_WIFI_BT_OPTION=y +CONFIG_EDK2_DASHARO_INTEL_ME_OPTIONS=y +CONFIG_EDK2_DASHARO_USB_CONFIG=y +CONFIG_EDK2_DASHARO_NETWORK_CONFIG=y +CONFIG_EDK2_DASHARO_CHIPSET_CONFIG=y +CONFIG_EDK2_DASHARO_POWER_CONFIG=y +CONFIG_EDK2_CPU_THROTTLING_THRESHOLD_OPTION=y +CONFIG_EDK2_DASHARO_PCI_CONFIG=y +CONFIG_EDK2_DASHARO_NETWORK_BOOT_DEFAULT_ENABLE=y +CONFIG_EDK2_DASHARO_SERIAL_REDIRECTION_DEFAULT_ENABLE=y +CONFIG_EDK2_RAM_DISK_ENABLE=y +CONFIG_EDK2_CREATE_PREINSTALLED_BOOT_OPTIONS=y +CONFIG_EDK2_ENABLE_FAST_BOOT_FEATURE=y +CONFIG_EDK2_ENABLE_QUIET_BOOT_FEATURE=y diff --git a/configs/config.lenovo_m920q b/configs/config.lenovo_m920q new file mode 100644 index 00000000000..022159bacc1 --- /dev/null +++ b/configs/config.lenovo_m920q @@ -0,0 +1,45 @@ +CONFIG_VENDOR_LENOVO=y +CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x100000 +CONFIG_HAVE_IFD_BIN=y +CONFIG_BOARD_LENOVO_M920Q=y +CONFIG_EDK2_BOOTSPLASH_FILE="3rdparty/dasharo-blobs/dasharo/bootsplash.bmp" +CONFIG_TPM_MEASURED_BOOT=y +CONFIG_HAVE_ME_BIN=y +CONFIG_HAVE_GBE_BIN=y +CONFIG_DASHARO_PREFER_S3_SLEEP=y +CONFIG_PCIEXP_SUPPORT_RESIZABLE_BARS=y +CONFIG_DRIVERS_EFI_VARIABLE_STORE=y +CONFIG_DRIVERS_GENERIC_CBFS_SERIAL=y +CONFIG_DRIVERS_GENERIC_CBFS_UUID=y +CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0=y +CONFIG_PAYLOAD_EDK2=y +CONFIG_EDK2_REPO_CUSTOM=y +CONFIG_EDK2_REPOSITORY="https://github.com/Dasharo/edk2" +CONFIG_EDK2_TAG_OR_REV="04af20830d1108571f3ed35341ecadbcb310f48d" +CONFIG_EDK2_USE_EDK2_PLATFORMS=y +CONFIG_EDK2_PLATFORMS_REPOSITORY="https://github.com/dasharo/edk2-platforms" +CONFIG_EDK2_PLATFORMS_TAG_OR_REV="1002a59639f111a2f8178b77d1f5fde0ea8d976f" +CONFIG_EDK2_CBMEM_LOGGING=y +CONFIG_EDK2_SERIAL_SUPPORT=y +CONFIG_BUILD_IPXE=y +CONFIG_IPXE_NO_PROMPT=y +CONFIG_IPXE_ADD_SCRIPT=y +CONFIG_IPXE_SCRIPT="3rdparty/dasharo-blobs/dasharo/dasharo.ipxe" +CONFIG_IPXE_CUSTOM_BUILD_ID="0123456789" +CONFIG_EDK2_SKIP_PS2_DETECT=y +CONFIG_EDK2_ENABLE_IPXE=y +CONFIG_EDK2_SATA_PASSWORD=y +CONFIG_EDK2_OPAL_PASSWORD=y +CONFIG_EDK2_SETUP_PASSWORD=y +CONFIG_EDK2_DASHARO_SYSTEM_FEATURES=y +CONFIG_EDK2_DASHARO_SECURITY_OPTIONS=y +CONFIG_EDK2_DASHARO_INTEL_ME_OPTIONS=y +CONFIG_EDK2_DASHARO_USB_CONFIG=y +CONFIG_EDK2_DASHARO_NETWORK_CONFIG=y +CONFIG_EDK2_DASHARO_NETWORK_BOOT_DEFAULT_ENABLE=y +CONFIG_EDK2_DASHARO_SERIAL_REDIRECTION_DEFAULT_ENABLE=y +CONFIG_EDK2_BOOT_MENU_KEY=0x0015 +CONFIG_EDK2_SETUP_MENU_KEY=0x0008 +CONFIG_EDK2_CREATE_PREINSTALLED_BOOT_OPTIONS=y +CONFIG_DISPLAY_FSP_CALLS_AND_STATUS=y +CONFIG_DISPLAY_FSP_HEADER=y diff --git a/src/cpu/x86/mp_init.c b/src/cpu/x86/mp_init.c index 3dcda4fa9ba..b19a8a8a45a 100644 --- a/src/cpu/x86/mp_init.c +++ b/src/cpu/x86/mp_init.c @@ -1055,17 +1055,17 @@ enum cb_err mp_park_aps(void) enum cb_err ret; long duration_msecs; - stopwatch_init(&sw); - atomic_set(&parked_ap_count, 0); ret = mp_run_on_aps(park_this_cpu, NULL, MP_RUN_ON_ALL_CPUS, 1000 * USECS_PER_MSEC); + stopwatch_init_msecs_expire(&sw, 500); + while (atomic_read(&parked_ap_count) < global_num_aps) { - if ((duration_msecs = stopwatch_duration_msecs(&sw)) > 500) { - printk(BIOS_DEBUG, "%s failed, %d / %d CPUs parked after %ld msecs\n", - __func__, atomic_read(&parked_ap_count), global_num_aps, duration_msecs); + if (stopwatch_expired(&sw)) { + printk(BIOS_DEBUG, "%s failed, %d / %d CPUs parked after 500 msecs\n", + __func__, atomic_read(&parked_ap_count), global_num_aps); return CB_ERR; } diff --git a/src/include/cpu/x86/lapic.h b/src/include/cpu/x86/lapic.h index a5812fde046..bd448e3df15 100644 --- a/src/include/cpu/x86/lapic.h +++ b/src/include/cpu/x86/lapic.h @@ -175,6 +175,7 @@ static __always_inline void lapic_send_ipi_others(uint32_t icrlow) */ static __always_inline void stop_this_cpu(void) { + atomic_inc(&parked_ap_count); /* Called by an AP when it is ready to halt and wait for a new task */ halt(); } diff --git a/src/mainboard/lenovo/m900_tiny/Kconfig b/src/mainboard/lenovo/m900_tiny/Kconfig index 8ad36e0014a..a95188f3eb7 100644 --- a/src/mainboard/lenovo/m900_tiny/Kconfig +++ b/src/mainboard/lenovo/m900_tiny/Kconfig @@ -6,6 +6,7 @@ if BOARD_LENOVO_THINKCENTRE_M900_TINY config BOARD_SPECIFIC_OPTIONS def_bool y select BOARD_ROMSIZE_KB_16384 + select DRIVERS_EFI_VARIABLE_STORE select DRIVERS_UART_8250IO select HAVE_ACPI_RESUME select HAVE_ACPI_TABLES @@ -38,4 +39,16 @@ config PRERAM_CBMEM_CONSOLE_SIZE config DIMM_SPD_SIZE default 512 #DDR4 +config VBOOT + select GBB_FLAG_DISABLE_EC_SOFTWARE_SYNC + select GBB_FLAG_DISABLE_FWMP + select GBB_FLAG_DISABLE_LID_SHUTDOWN + select GBB_FLAG_DISABLE_PD_SOFTWARE_SYNC + select HAS_RECOVERY_MRC_CACHE + select VBOOT_VBNV_FLASH + select VBOOT_NO_BOARD_SUPPORT + +config FMDFILE + default "src/mainboard/\$(CONFIG_MAINBOARD_DIR)/vboot-rwa.fmd" if VBOOT + endif diff --git a/src/mainboard/lenovo/m900_tiny/Makefile.mk b/src/mainboard/lenovo/m900_tiny/Makefile.mk index 44db0910ed2..d016e93f49a 100644 --- a/src/mainboard/lenovo/m900_tiny/Makefile.mk +++ b/src/mainboard/lenovo/m900_tiny/Makefile.mk @@ -7,7 +7,10 @@ bootblock-y += gpio_early.c romstage-y += romstage.c +ramstage-$(CONFIG_DRIVERS_OPTION_CFR) += cfr.c ramstage-y += gpio.c ramstage-y += hda_verb.c ramstage-y += ramstage.c ramstage-$(CONFIG_MAINBOARD_USE_LIBGFXINIT) += gma-mainboard.ads + +smm-y += smihandler.c diff --git a/src/mainboard/lenovo/m900_tiny/cfr.c b/src/mainboard/lenovo/m900_tiny/cfr.c new file mode 100644 index 00000000000..0bd2f8f56e5 --- /dev/null +++ b/src/mainboard/lenovo/m900_tiny/cfr.c @@ -0,0 +1,79 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#include +#include + +struct sm_object wifi_slot_enable = SM_DECLARE_BOOL({ + .flags = CFR_OPTFLAG_RUNTIME, + .opt_name = "wifi_slot_enable", + .ui_name = "Enable Wi-Fi card slot", + .ui_helptext = "Enable or disable detection of devices in the Wi-Fi card slot", + .default_value = true, +}); + +struct sm_object ssd_slot_enable = SM_DECLARE_BOOL({ + .flags = CFR_OPTFLAG_RUNTIME, + .opt_name = "ssd_slot_enable", + .ui_name = "Enable SSD slot", + .ui_helptext = "Enable or disable detection of devices in the SSD slot", + .default_value = true, +}); + +struct sm_object hdd_slot_enable = SM_DECLARE_BOOL({ + .flags = CFR_OPTFLAG_RUNTIME, + .opt_name = "hdd_slot_enable", + .ui_name = "Enable 2.5 inch disk slot", + .ui_helptext = "Enable or disable detection of devices in the 2.5 inch disk slot", + .default_value = true, +}); + +static struct sm_obj_form devices = { + .ui_name = "Devices", + .obj_list = (const struct sm_object *[]) { + &wifi_slot_enable, + &ssd_slot_enable, + &hdd_slot_enable, + NULL + }, +}; + +struct sm_object ps2_enable = SM_DECLARE_BOOL({ + .flags = CFR_OPTFLAG_RUNTIME, + .opt_name = "ps2_enable", + .ui_name = "PS/2 controller", + .ui_helptext = "Enable or disable the PS/2 controller", + .default_value = true, +}); + +struct sm_object power_on_after_fail = SM_DECLARE_ENUM({ + .flags = CFR_OPTFLAG_RUNTIME, + .opt_name = "power_on_after_fail", + .ui_name = "Power state after fail", + .ui_helptext = "State of the platform after external power is restored", + .default_value = CONFIG_MAINBOARD_POWER_FAILURE_STATE, + .values = (const struct sm_enum_value[]) { + { "Off", 0 }, + { "On", 1 }, + { "Previous", 2 }, + SM_ENUM_VALUE_END }, +}); + +static struct sm_obj_form superio = { + .ui_name = "Super I/O", + .obj_list = (const struct sm_object *[]) { + &ps2_enable, + &power_on_after_fail, + NULL + }, +}; + +static struct sm_obj_form *sm_root[] = { + &devices, + &superio, + NULL +}; + +void mb_cfr_setup_menu(struct lb_cfr *cfr_root) +{ + cfr_write_setup_menu(cfr_root, sm_root); +} diff --git a/src/mainboard/lenovo/m900_tiny/data.vbt b/src/mainboard/lenovo/m900_tiny/data.vbt index 7e6fe3dc139..4c26ae512bd 100644 Binary files a/src/mainboard/lenovo/m900_tiny/data.vbt and b/src/mainboard/lenovo/m900_tiny/data.vbt differ diff --git a/src/mainboard/lenovo/m900_tiny/devicetree.cb b/src/mainboard/lenovo/m900_tiny/devicetree.cb index 51d3b26798d..269d8b001f9 100644 --- a/src/mainboard/lenovo/m900_tiny/devicetree.cb +++ b/src/mainboard/lenovo/m900_tiny/devicetree.cb @@ -162,8 +162,6 @@ chip soc/intel/skylake end device ref pcie_rp17 on # M.2 2280 / 2242 - SSD register "PcieRpEnable[16]" = "1" - register "PcieRpClkReqSupport[16]" = "1" - register "PcieRpClkReqNumber[16]" = "1" register "PcieRpAdvancedErrorReporting[16]" = "1" register "PcieRpLtrEnable[16]" = "1" register "PcieRpClkSrcNumber[16]" = "7" @@ -171,8 +169,6 @@ chip soc/intel/skylake end device ref pcie_rp7 on # M.2 2230 - WLAN register "PcieRpEnable[6]" = "1" - register "PcieRpClkReqSupport[6]" = "1" - register "PcieRpClkReqNumber[6]" = "11" register "PcieRpAdvancedErrorReporting[6]" = "1" register "PcieRpLtrEnable[6]" = "1" register "PcieRpClkSrcNumber[6]" = "1" diff --git a/src/mainboard/lenovo/m900_tiny/gpio.c b/src/mainboard/lenovo/m900_tiny/gpio.c index aecea414a28..101f47b6731 100644 --- a/src/mainboard/lenovo/m900_tiny/gpio.c +++ b/src/mainboard/lenovo/m900_tiny/gpio.c @@ -42,7 +42,7 @@ static const struct pad_config gpio_table[] = { PAD_CFG_GPI_TRIG_OWN(GPP_B3, NONE, PLTRST, OFF, ACPI), PAD_CFG_GPI_TRIG_OWN(GPP_B4, NONE, PLTRST, OFF, ACPI), PAD_NC(GPP_B5, NONE), - PAD_CFG_NF(GPP_B6, NONE, DEEP, NF1), + PAD_CFG_GPI_TRIG_OWN(GPP_B6, NONE, PLTRST, OFF, ACPI), PAD_NC(GPP_B7, NONE), PAD_NC(GPP_B8, NONE), PAD_NC(GPP_B9, NONE), @@ -91,7 +91,7 @@ static const struct pad_config gpio_table[] = { /* ------- GPIO Group GPP_D ------- */ PAD_NC(GPP_D0, NONE), - PAD_NC(GPP_D1, NONE), + PAD_CFG_NF(GPP_D1, NONE, DEEP, NF4), /* PW_LED# (blink mode)*/ PAD_NC(GPP_D2, NONE), PAD_NC(GPP_D3, NONE), PAD_NC(GPP_D4, NONE), @@ -192,7 +192,7 @@ static const struct pad_config gpio_table[] = { PAD_NC(GPP_H2, NONE), PAD_NC(GPP_H3, NONE), PAD_CFG_GPI_TRIG_OWN(GPP_H4, NONE, PLTRST, OFF, ACPI), - PAD_CFG_NF(GPP_H5, NONE, DEEP, NF1), + PAD_NC(GPP_H5, NONE), PAD_CFG_GPI_TRIG_OWN(GPP_H6, NONE, PLTRST, OFF, ACPI), PAD_NC(GPP_H7, NONE), PAD_NC(GPP_H8, NONE), diff --git a/src/mainboard/lenovo/m900_tiny/ramstage.c b/src/mainboard/lenovo/m900_tiny/ramstage.c index 6e66f3a7cc7..7498babff4d 100644 --- a/src/mainboard/lenovo/m900_tiny/ramstage.c +++ b/src/mainboard/lenovo/m900_tiny/ramstage.c @@ -1,11 +1,18 @@ /* SPDX-License-Identifier: GPL-2.0-only */ #include +#include #include +#include #include #include +#include #include +#include +#include #include +#include +#include static void print_board_id(void) { @@ -32,20 +39,49 @@ static void print_board_id(void) } printk(BIOS_INFO, "Serial header %spopulated\n", !gpio_get(GPP_A22) ? "" : "un"); - printk(BIOS_INFO, "PS/2 header %spopulated\n", !gpio_get(GPP_D14) ? "" : "un"); - printk(BIOS_INFO, "USB header %spopulated\n", !gpio_get(GPP_C19) ? "" : "un"); - printk(BIOS_INFO, "DisplayPort header %spopulated\n", !gpio_get(GPP_B15) ? "" : "un"); - printk(BIOS_INFO, "PCIe / SATA header %spopulated\n", !gpio_get(GPP_B21) ? "" : "un"); } +static void devtree_update(void) +{ + config_t *cfg = config_of_soc(); + struct device *wifi_dev = DEV_PTR(pcie_rp7); + struct device *ssd_dev = DEV_PTR(pcie_rp17); + struct device *ps2_dev = dev_find_slot_pnp(0x2e, NCT6687D_KBC); + + if (get_uint_option("wifi_slot_enable", get_wireless_option()) == 0) { + cfg->usb2_ports[8].enable = 0; + wifi_dev->enabled = 0; + } + + if (get_uint_option("ssd_slot_enable", 1) == 0) { + cfg->SataPortsEnable[4] = 0; + ssd_dev->enabled = 0; + } + + if (get_uint_option("hdd_slot_enable", 1) == 0) { + cfg->SataPortsEnable[0] = 0; + cfg->SataPortsEnable[1] = 0; + } + + if (get_uint_option("ps2_enable", get_ps2_option()) == 0) + ps2_dev->enabled = 0; +} + static void mainboard_enable(struct device *dev) { mainboard_configure_gpios(); + devtree_update(); print_board_id(); + /* Configure GPIO community 1 PWM frequency to 0.5Hz, 0% duty cycle */ + pcr_write32(PID_GPIOCOM1, 0x204, (1 << 14)); + /* Set the software update flag */ + pcr_or32(PID_GPIOCOM1, 0x204, (1 << 30)); + /* Enable PWM */ + pcr_or32(PID_GPIOCOM1, 0x204, (1 << 31)); } struct chip_operations mainboard_ops = { diff --git a/src/mainboard/lenovo/m900_tiny/smihandler.c b/src/mainboard/lenovo/m900_tiny/smihandler.c new file mode 100644 index 00000000000..6ae0b36a257 --- /dev/null +++ b/src/mainboard/lenovo/m900_tiny/smihandler.c @@ -0,0 +1,22 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#include +#include +#include +#include + +void mainboard_smi_sleep(u8 slp_typ) +{ + /* Enable blinking power LED when entering S3 or S4 */ + switch (slp_typ) { + case ACPI_S3: + case ACPI_S4: + /* Configure GPIO community 1 PWM duty cycle to 50% */ + pcr_rmw32(PID_GPIOCOM1, 0x204, 0xffffff00, 0x7f); + /* Set the software update flag */ + pcr_or32(PID_GPIOCOM1, 0x204, (1 << 30)); + break; + default: + break; + } +} diff --git a/src/mainboard/lenovo/m900_tiny/vboot-ro.fmd b/src/mainboard/lenovo/m900_tiny/vboot-ro.fmd new file mode 100644 index 00000000000..2d40edd4392 --- /dev/null +++ b/src/mainboard/lenovo/m900_tiny/vboot-ro.fmd @@ -0,0 +1,31 @@ +FLASH 16M { + SI_ALL 8M { + SI_DESC 4K + SI_GBE 8K + SI_ME + } + SI_BIOS 8M { + RW_MISC 2M { + UNIFIED_MRC_CACHE(PRESERVE) 128K { + RECOVERY_MRC_CACHE 64K + RW_MRC_CACHE 64K + } + SMMSTORE(PRESERVE) 256K + RW_ELOG(PRESERVE) 16K + RW_SHARED 16K { + SHARED_DATA 8K + VBLOCK_DEV 8K + } + RW_NVRAM(PRESERVE) 24K + BOOTSPLASH(CBFS) 1M + } + + WP_RO { + FMAP 2K + RO_FRID 128 + RO_PADDING 1920 + GBB 120K + COREBOOT(CBFS) + } + } +} diff --git a/src/mainboard/lenovo/m900_tiny/vboot-rwa.fmd b/src/mainboard/lenovo/m900_tiny/vboot-rwa.fmd new file mode 100644 index 00000000000..863f0ec1385 --- /dev/null +++ b/src/mainboard/lenovo/m900_tiny/vboot-rwa.fmd @@ -0,0 +1,37 @@ +FLASH 16M { + SI_ALL 8M { + SI_DESC 4K + SI_GBE 8K + SI_ME + } + SI_BIOS 8M { + RW_MISC 2M { + UNIFIED_MRC_CACHE(PRESERVE) 128K { + RECOVERY_MRC_CACHE 64K + RW_MRC_CACHE 64K + } + SMMSTORE(PRESERVE) 256K + RW_ELOG(PRESERVE) 16K + RW_SHARED 16K { + SHARED_DATA 8K + VBLOCK_DEV 8K + } + RW_NVRAM(PRESERVE) 24K + BOOTSPLASH(CBFS) 1M + } + + RW_SECTION_A 3M { + VBLOCK_A 8K + FW_MAIN_A(CBFS) + RW_FWID_A 128 + } + + WP_RO 3M { + FMAP 2K + RO_FRID 128 + RO_PADDING 1920 + GBB 120K + COREBOOT(CBFS) + } + } +}