Implement I2S transmitter

[akberg]

The FPGA transmits wave samples to the DAC through I²S.

Interface

• output bit clk - serial clock
• output bit ws - select left or right channel
• output bit sd - serial data

[LarsAur]

Parameter

WORD_SIZE - The number of bits in the input data fields

Interface

• Input clk - serial clock. Required frequency is 2 * WORD_SIZE * 44.1KHz.
• Input nReset
• Input left_data
• Input right_data
• Output sclk - Serial clock
• Output lrclk - Left right clock (Word select)
• Output sd - Serial data

[LarsAur]

Change the protocol to use the default of the DAC