From aaac64e0877b04ee37da6a3448280b48954bba5a Mon Sep 17 00:00:00 2001 From: Rob Taylor Date: Wed, 17 Dec 2025 00:57:27 +0000 Subject: [PATCH 1/5] Remove backward compatibility shims from chipflow package MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit - Move PACKAGE_DEFINITIONS from chipflow/platforms/_packages.py to chipflow/packages.py - Move _json_compare.py from chipflow/steps/ to chipflow/common/ - Remove chipflow/platforms/ directory (shims that re-exported from chipflow.platform) - Remove chipflow/steps/ directory (shims that re-exported from chipflow.platform) - Remove chipflow/config.py and chipflow/config_models.py shims - Update chipflow_lib/ backward compat shims to import from chipflow.platform directly - Update all internal imports to use chipflow.config instead of chipflow.config_models - Update all internal imports to use chipflow.platform instead of chipflow.platforms - Update tests and docs to use new import paths The backward compatibility shims for the old chipflow_lib package name are now only in the chipflow_lib/ directory, making the chipflow package cleaner with no internal shim redirects. 🤖 Generated with [Claude Code](https://claude.com/claude-code) Co-Authored-By: Claude Opus 4.5 --- chipflow/{steps => common}/_json_compare.py | 0 chipflow/config.py | 20 ------ chipflow/config_models.py | 34 --------- .../{platforms/_packages.py => packages.py} | 9 ++- chipflow/packaging/base.py | 2 +- chipflow/packaging/lockfile.py | 2 +- chipflow/packaging/openframe.py | 2 +- chipflow/packaging/pins.py | 2 +- chipflow/packaging/utils.py | 2 +- chipflow/platform/sim_step.py | 2 +- chipflow/platforms/.__init__.py.swp | Bin 12288 -> 0 bytes chipflow/platforms/__init__.py | 66 ------------------ chipflow/platforms/silicon.py | 25 ------- chipflow/steps/__init__.py | 30 -------- chipflow/steps/board.py | 15 ---- chipflow/steps/silicon.py | 23 ------ chipflow/steps/sim.py | 17 ----- chipflow/steps/software.py | 17 ----- chipflow_lib/platforms/__init__.py | 11 +-- chipflow_lib/steps/__init__.py | 2 +- chipflow_lib/steps/board.py | 8 +-- chipflow_lib/steps/sim.py | 8 +-- chipflow_lib/steps/software.py | 8 +-- docs/conf.py | 2 +- docs/contributor-pin-signature-internals.rst | 4 +- docs/simulation-guide.rst | 2 +- docs/using-pin-signatures.rst | 12 ++-- tests/fixtures/mock_top.py | 2 +- tests/test_cli.py | 2 +- tests/test_init.py | 2 +- tests/test_package_pins.py | 2 +- tests/test_pin_lock.py | 2 +- tests/test_silicon_platform_port.py | 2 +- tests/test_utils.py | 2 +- tests/test_utils_additional.py | 7 +- 35 files changed, 53 insertions(+), 293 deletions(-) rename chipflow/{steps => common}/_json_compare.py (100%) delete mode 100644 chipflow/config.py delete mode 100644 chipflow/config_models.py rename chipflow/{platforms/_packages.py => packages.py} (57%) delete mode 100644 chipflow/platforms/.__init__.py.swp delete mode 100644 chipflow/platforms/__init__.py delete mode 100644 chipflow/platforms/silicon.py delete mode 100644 chipflow/steps/__init__.py delete mode 100644 chipflow/steps/board.py delete mode 100644 chipflow/steps/silicon.py delete mode 100644 chipflow/steps/sim.py delete mode 100644 chipflow/steps/software.py diff --git a/chipflow/steps/_json_compare.py b/chipflow/common/_json_compare.py similarity index 100% rename from chipflow/steps/_json_compare.py rename to chipflow/common/_json_compare.py diff --git a/chipflow/config.py b/chipflow/config.py deleted file mode 100644 index a12af22a..00000000 --- a/chipflow/config.py +++ /dev/null @@ -1,20 +0,0 @@ -# SPDX-License-Identifier: BSD-2-Clause -""" -Backward compatibility shim for config parsing. - -This module re-exports config parsing utilities from the config module. -New code should import directly from chipflow.config instead. -""" - -# Re-export from config.parser module for backward compatibility -from .config.parser import ( # noqa: F401 - get_dir_models, - get_dir_software, - _parse_config_file, -) - -__all__ = [ - 'get_dir_models', - 'get_dir_software', - '_parse_config_file', -] diff --git a/chipflow/config_models.py b/chipflow/config_models.py deleted file mode 100644 index 6717351b..00000000 --- a/chipflow/config_models.py +++ /dev/null @@ -1,34 +0,0 @@ -# SPDX-License-Identifier: BSD-2-Clause -""" -Backward compatibility shim for config models. - -This module re-exports configuration models from the config module. -New code should import directly from chipflow.config instead. -""" - -# Re-export from config module for backward compatibility -from .config import ( # noqa: F401 - Process, - Voltage, - VoltageRange, - SiliconConfig, - SimulationConfig, - CompilerConfig, - SoftwareConfig, - TestConfig, - ChipFlowConfig, - Config, -) - -__all__ = [ - 'Process', - 'Voltage', - 'VoltageRange', - 'SiliconConfig', - 'SimulationConfig', - 'CompilerConfig', - 'SoftwareConfig', - 'TestConfig', - 'ChipFlowConfig', - 'Config', -] diff --git a/chipflow/platforms/_packages.py b/chipflow/packages.py similarity index 57% rename from chipflow/platforms/_packages.py rename to chipflow/packages.py index 0fb093cd..961dd94a 100644 --- a/chipflow/platforms/_packages.py +++ b/chipflow/packages.py @@ -1,4 +1,11 @@ -from ..packaging import QuadPackageDef, BareDiePackageDef, GAPackageDef, Package, OpenframePackageDef +# SPDX-License-Identifier: BSD-2-Clause +""" +Package definitions for ChipFlow platforms. + +This module contains package type definitions for supported IC packages. +""" + +from .packaging import QuadPackageDef, BareDiePackageDef, GAPackageDef, Package, OpenframePackageDef # Add any new package types to both PACKAGE_DEFINITIONS and the PackageDef union PACKAGE_DEFINITIONS = { diff --git a/chipflow/packaging/base.py b/chipflow/packaging/base.py index 65d7c529..dfebcbb3 100644 --- a/chipflow/packaging/base.py +++ b/chipflow/packaging/base.py @@ -22,7 +22,7 @@ from .allocation import _linear_allocate_components if TYPE_CHECKING: - from ..config_models import Config, Process + from ..config import Config, Process # Type variable for pin types (int for linear allocation, GAPin for grid arrays, etc.) PinType = TypeVar('PinType') diff --git a/chipflow/packaging/lockfile.py b/chipflow/packaging/lockfile.py index c5986500..38caf919 100644 --- a/chipflow/packaging/lockfile.py +++ b/chipflow/packaging/lockfile.py @@ -19,7 +19,7 @@ from .openframe import OpenframePackageDef # Import Process directly for pydantic to work properly -from ..config_models import Process +from ..config import Process # Union of all package definition types diff --git a/chipflow/packaging/openframe.py b/chipflow/packaging/openframe.py index 8dae4fa0..d6eeab9f 100644 --- a/chipflow/packaging/openframe.py +++ b/chipflow/packaging/openframe.py @@ -10,7 +10,7 @@ from .base import LinearAllocPackageDef from .pins import PowerPins, BringupPins -from ..config_models import Voltage +from ..config import Voltage class OFPin(NamedTuple): diff --git a/chipflow/packaging/pins.py b/chipflow/packaging/pins.py index 7562ffb1..34e33e3b 100644 --- a/chipflow/packaging/pins.py +++ b/chipflow/packaging/pins.py @@ -10,7 +10,7 @@ from enum import StrEnum, auto from typing import Set, List, Union, Optional, TypeVar, Generic -from ..config_models import Voltage, VoltageRange +from ..config import Voltage, VoltageRange # Type aliases for pin collections diff --git a/chipflow/packaging/utils.py b/chipflow/packaging/utils.py index 0630a1ad..68a30847 100644 --- a/chipflow/packaging/utils.py +++ b/chipflow/packaging/utils.py @@ -60,7 +60,7 @@ def lock_pins(config: Optional['Config'] = None) -> None: ChipFlowError: If configuration is invalid or pin allocation fails """ # Import here to avoid circular dependency - from ..platforms._packages import PACKAGE_DEFINITIONS + from ..packages import PACKAGE_DEFINITIONS from ..utils import top_components if config is None: diff --git a/chipflow/platform/sim_step.py b/chipflow/platform/sim_step.py index 7b338d66..3c3b1641 100644 --- a/chipflow/platform/sim_step.py +++ b/chipflow/platform/sim_step.py @@ -158,7 +158,7 @@ def check(self, *args): self.run(args) # Import here to avoid circular import - from ..steps._json_compare import compare_events + from ..common._json_compare import compare_events compare_events(self._config.chipflow.test.event_reference, self.sim_dir / "events.json") print("Integration test passed sucessfully") diff --git a/chipflow/platforms/.__init__.py.swp b/chipflow/platforms/.__init__.py.swp deleted file mode 100644 index 1cf8293de7f90a35805c01e769f908a0a016071a..0000000000000000000000000000000000000000 GIT binary patch literal 0 HcmV?d00001 literal 12288 zcmeI2J&YSg9K|OPArv?ck_M+|TwJIn4Y zhZ`b_RDASEbV!s4QbeLeG(Z6b1syc$s3?(A@b+W&>|LX)iDsprcIWNPc>iynEv-D0 z=1r?dUv2CX98VK+=Pu!@dH-zZM?yk5@j|88LdY<={a?pH+Apg2nA4W>s6Gs3Lr8~- z(tr<_C*0{s*W2mLc+eH{c*nuT6c=^DCq=_f8i8PHD#LlSW82*4%C;N9qBOH<8V8I6 zr#rAgu3X-2CjGW*7wLubH%=d7dKd?c1I7X4fN{V$U>q6|ys$v9vfFb)_8j0462p##h%Njwku4cr4?g3rJw;A1cX&x7Z{2Kf64LjC~1g73gr;8PHTTc8bI0?z^h z{z9FrX z#OGB>a7X&5$U_+_JxQCpJX}+T;uQqqd79D0|sOwFW9lOc1(MWM2s6c`!_i3@I_v8Zzc`*%JDQj5*^$Mj) zTa`*V%Wf{EEEB33%k-6mWztH%GHE$onX;U%Oj$`*CY6^ypRBa-nOa%)yz|NmYpn=^ z7Sb5#MzP#ls4jMPN4u)ioU13P*TPEX*NREvFXfqO=+)Jkd7+Y!1F!CVkmf0kSutQP z-B@@O`@QJ|A;OP~OC326nBo&IxWdNoTCGOLGak{rZyGY>Q_V0g_MIedEa^%YGNy5q z<_(u2CUQNhBvmXt^i(=P?>{dBNl1OoL9|25k;V(JcbrWc&15WGT`s=wo} Date: Wed, 17 Dec 2025 01:08:59 +0000 Subject: [PATCH 2/5] Add __init__.py to common package and update platform-api.rst MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit - Add chipflow/common/__init__.py to make it a proper Python package - Update platform-api.rst to use autoapi toctree with quick links 🤖 Generated with [Claude Code](https://claude.com/claude-code) Co-Authored-By: Claude Opus 4.5 --- chipflow/common/__init__.py | 4 + docs/platform-api.rst | 184 ++++++++---------------------------- 2 files changed, 42 insertions(+), 146 deletions(-) create mode 100644 chipflow/common/__init__.py diff --git a/chipflow/common/__init__.py b/chipflow/common/__init__.py new file mode 100644 index 00000000..6bbff3ea --- /dev/null +++ b/chipflow/common/__init__.py @@ -0,0 +1,4 @@ +# SPDX-License-Identifier: BSD-2-Clause +""" +Common utilities for ChipFlow. +""" diff --git a/docs/platform-api.rst b/docs/platform-api.rst index 4bf1d4e1..fddfed68 100644 --- a/docs/platform-api.rst +++ b/docs/platform-api.rst @@ -1,167 +1,59 @@ Platform API Reference ====================== -This page documents the complete public API of the ``chipflow.platform`` module. +This page provides the API reference for the ``chipflow.platform`` module. All symbols listed here are re-exported from submodules for convenience and can be imported directly from ``chipflow.platform``. -Platforms ---------- +.. note:: -.. autoclass:: chipflow.platform.sim.SimPlatform - :members: - :undoc-members: - :show-inheritance: + For detailed auto-generated API documentation, see the full API reference linked below. -.. autoclass:: chipflow.platform.silicon.SiliconPlatform - :members: - :undoc-members: - :show-inheritance: +.. toctree:: + :maxdepth: 2 + :caption: API Reference -.. autoclass:: chipflow.platform.silicon.SiliconPlatformPort - :members: - :undoc-members: - :show-inheritance: + /chipflow-lib/autoapi/chipflow/platform/index -.. autoclass:: chipflow.platform.software.SoftwarePlatform - :members: - :undoc-members: - :show-inheritance: - -Build Steps +Quick Links ----------- -.. autoclass:: chipflow.platform.base.StepBase - :members: - :undoc-members: - :show-inheritance: - -.. autoclass:: chipflow.platform.sim_step.SimStep - :members: - :undoc-members: - :show-inheritance: - -.. autoclass:: chipflow.platform.silicon_step.SiliconStep - :members: - :undoc-members: - :show-inheritance: - -.. autoclass:: chipflow.platform.software_step.SoftwareStep - :members: - :undoc-members: - :show-inheritance: - -.. autoclass:: chipflow.platform.board_step.BoardStep - :members: - :undoc-members: - :show-inheritance: - -IO Signatures -------------- - -Base IO Signatures -~~~~~~~~~~~~~~~~~~ - -.. autoclass:: chipflow.platform.io.iosignature.IOSignature - :members: - :undoc-members: - :show-inheritance: - -.. autoclass:: chipflow.platform.io.iosignature.OutputIOSignature - :members: - :undoc-members: - :show-inheritance: - -.. autoclass:: chipflow.platform.io.iosignature.InputIOSignature - :members: - :undoc-members: - :show-inheritance: - -.. autoclass:: chipflow.platform.io.iosignature.BidirIOSignature - :members: - :undoc-members: - :show-inheritance: - -Protocol-Specific Signatures -~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ - -.. autoclass:: chipflow.platform.io.signatures.UARTSignature - :members: - :undoc-members: - :show-inheritance: - -.. autoclass:: chipflow.platform.io.signatures.GPIOSignature - :members: - :undoc-members: - :show-inheritance: - -.. autoclass:: chipflow.platform.io.signatures.SPISignature - :members: - :undoc-members: - :show-inheritance: - -.. autoclass:: chipflow.platform.io.signatures.I2CSignature - :members: - :undoc-members: - :show-inheritance: - -.. autoclass:: chipflow.platform.io.signatures.QSPIFlashSignature - :members: - :undoc-members: - :show-inheritance: - -.. autoclass:: chipflow.platform.io.signatures.JTAGSignature - :members: - :undoc-members: - :show-inheritance: - -Software Integration -~~~~~~~~~~~~~~~~~~~~ - -.. autoclass:: chipflow.platform.io.signatures.SoftwareDriverSignature - :members: - :undoc-members: - :show-inheritance: - -.. autoclass:: chipflow.platform.io.signatures.SoftwareBuild - :members: - :undoc-members: - :show-inheritance: - -.. autofunction:: chipflow.platform.io.signatures.attach_data +**Platforms:** -IO Configuration ----------------- - -.. autoclass:: chipflow.platform.io.iosignature.IOModel - :members: - :undoc-members: - -.. autoclass:: chipflow.platform.io.iosignature.IOModelOptions - :members: - :undoc-members: +- :py:class:`chipflow.platform.SimPlatform` - Simulation platform +- :py:class:`chipflow.platform.SiliconPlatform` - Silicon/ASIC platform +- :py:class:`chipflow.platform.SoftwarePlatform` - Software build platform -.. autoclass:: chipflow.platform.io.iosignature.IOTripPoint - :members: - :undoc-members: - :show-inheritance: +**Build Steps:** -.. autoclass:: chipflow.platform.io.sky130.Sky130DriveMode - :members: - :undoc-members: - :show-inheritance: +- :py:class:`chipflow.platform.StepBase` - Base class for build steps +- :py:class:`chipflow.platform.SimStep` - Simulation step +- :py:class:`chipflow.platform.SiliconStep` - Silicon build step +- :py:class:`chipflow.platform.SoftwareStep` - Software build step +- :py:class:`chipflow.platform.BoardStep` - Board programming step -Utility Functions ------------------ +**IO Signatures:** -.. autofunction:: chipflow.platform.base.setup_amaranth_tools +- :py:class:`chipflow.platform.IOSignature` - Base IO signature class +- :py:class:`chipflow.platform.OutputIOSignature` - Output-only signature +- :py:class:`chipflow.platform.InputIOSignature` - Input-only signature +- :py:class:`chipflow.platform.BidirIOSignature` - Bidirectional signature +- :py:class:`chipflow.platform.UARTSignature` - UART interface signature +- :py:class:`chipflow.platform.GPIOSignature` - GPIO interface signature +- :py:class:`chipflow.platform.SPISignature` - SPI interface signature +- :py:class:`chipflow.platform.I2CSignature` - I2C interface signature +- :py:class:`chipflow.platform.QSPIFlashSignature` - QSPI Flash signature +- :py:class:`chipflow.platform.JTAGSignature` - JTAG interface signature -.. autofunction:: chipflow.utils.top_components +**Software Integration:** -.. autofunction:: chipflow.utils.get_software_builds +- :py:class:`chipflow.platform.SoftwareDriverSignature` - Signature with driver code +- :py:class:`chipflow.platform.SoftwareBuild` - Software build configuration +- :py:func:`chipflow.platform.attach_data` - Attach software to flash memory -Constants ---------- +**IO Configuration:** -.. autodata:: chipflow.platform.io.iosignature.IO_ANNOTATION_SCHEMA - :annotation: +- :py:class:`chipflow.platform.IOModel` - IO model data +- :py:class:`chipflow.platform.IOModelOptions` - IO model options +- :py:class:`chipflow.platform.IOTripPoint` - Input buffer trip point +- :py:class:`chipflow.platform.Sky130DriveMode` - Sky130 drive mode configuration From 48891372cabff24749a33713a62d7b76b1a8c05d Mon Sep 17 00:00:00 2001 From: Rob Taylor Date: Wed, 17 Dec 2025 01:17:16 +0000 Subject: [PATCH 3/5] Fix DEFAULT_STEPS to use new module paths MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Update the default step references in cli.py to use the new chipflow.platform module paths instead of the removed chipflow.steps paths. 🤖 Generated with [Claude Code](https://claude.com/claude-code) Co-Authored-By: Claude Opus 4.5 --- chipflow/cli.py | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/chipflow/cli.py b/chipflow/cli.py index 6bcc0a3f..ef1b3b76 100644 --- a/chipflow/cli.py +++ b/chipflow/cli.py @@ -24,9 +24,9 @@ class UnexpectedError(ChipFlowError): DEFAULT_STEPS = { - "silicon": "chipflow.steps.silicon:SiliconStep", - "sim": "chipflow.steps.sim:SimStep", - "software": "chipflow.steps.software:SoftwareStep" + "silicon": "chipflow.platform.silicon_step:SiliconStep", + "sim": "chipflow.platform.sim_step:SimStep", + "software": "chipflow.platform.software_step:SoftwareStep" } From 2445df2709d9a0a1dab7e1beb28bf5c70db5db3d Mon Sep 17 00:00:00 2001 From: Rob Taylor Date: Wed, 17 Dec 2025 01:22:56 +0000 Subject: [PATCH 4/5] Enable autoapi for documentation generation MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit - Enable autoapi.extension in Sphinx config - Configure autoapi settings matching chipflow-docs - Update platform-api.rst to link to autoapi-generated index - Add suppress_warnings for expected warnings from re-exports - Add docs/chipflow-lib to .gitignore for generated autoapi files 🤖 Generated with [Claude Code](https://claude.com/claude-code) Co-Authored-By: Claude Opus 4.5 --- .gitignore | 1 + docs/conf.py | 55 +++++++++++++++++++++---------------------- docs/platform-api.rst | 2 +- 3 files changed, 29 insertions(+), 29 deletions(-) diff --git a/.gitignore b/.gitignore index 26a4d23b..4fbbeb5c 100644 --- a/.gitignore +++ b/.gitignore @@ -19,4 +19,5 @@ __pycache__/ docs/_build docs/autoapi +docs/chipflow-lib .cache diff --git a/docs/conf.py b/docs/conf.py index f149ccb3..722a36b5 100644 --- a/docs/conf.py +++ b/docs/conf.py @@ -33,7 +33,7 @@ 'sphinx.ext.duration', 'sphinx.ext.intersphinx', 'sphinx.ext.napoleon', - # 'autoapi.extension', # Temporarily disabled due to CI import issues + 'autoapi.extension', 'sphinxcontrib.autoprogram', 'sphinxcontrib.autodoc_pydantic', 'sphinx_design', @@ -55,33 +55,22 @@ autodoc_typehints = 'description' -# AutoAPI configuration - temporarily disabled due to CI import issues -# -# AutoAPI is encountering "Unable to read file" errors for ALL Python modules -# in the CI environment, preventing it from generating any API documentation. -# This appears to be related to import-time issues during the refactoring work. -# -# Root cause investigation needed: -# - Possible circular imports preventing module loading -# - Import-time side effects that fail in CI but not locally -# - Python path or module resolution differences in CI -# -# Workaround: Using manual sphinx.ext.autodoc directives in platform-api.rst -# TODO: Re-enable AutoAPI once import issues are resolved -# -# autoapi_dirs = [ -# "../chipflow", -# ] -# autoapi_generate_api_docs = False -# autoapi_template_dir = "_templates/autoapi" -# # autoapi_verbose_visibility = 2 -# autoapi_keep_files = True -# autoapi_options = [ -# 'members', -# 'show-inheritance', -# 'show-module-summary', -# 'imported-members', -# ] +# AutoAPI configuration +autoapi_dirs = ["../chipflow"] +autoapi_generate_api_docs = True +autoapi_template_dir = "_templates/autoapi" +autoapi_keep_files = True +autoapi_options = [ + 'members', + 'show-inheritance', + 'show-module-summary', + 'imported-members', +] +autoapi_root = "chipflow-lib/autoapi" +autoapi_add_toctree_entry = False # Don't auto-add to toctree (we link manually) +autoapi_ignore = [ + "*/chipflow_lib/*", # Backward compatibility shim +] # Exclude in-progress stuff and template files exclude_patterns = [ @@ -155,5 +144,15 @@ .. |optional| replace:: :bdg-secondary-line:`Optional` """ +# Suppress warnings from autoapi-generated docs due to re-exports +# - ref.python: "more than one target found for cross-reference" (re-exported symbols) +# - toc.not_readable: documents not in toctree (autoapi index pages we don't link directly) +# - autodoc.duplicate_object: duplicate object descriptions (re-exports) +suppress_warnings = [ + "ref.python", + "toc.not_readable", + "autodoc.duplicate_object", +] + # -- Options for EPUB output epub_show_urls = 'footnote' diff --git a/docs/platform-api.rst b/docs/platform-api.rst index fddfed68..de404f26 100644 --- a/docs/platform-api.rst +++ b/docs/platform-api.rst @@ -13,7 +13,7 @@ All symbols listed here are re-exported from submodules for convenience and can :maxdepth: 2 :caption: API Reference - /chipflow-lib/autoapi/chipflow/platform/index + /chipflow-lib/autoapi/chipflow/index Quick Links ----------- From 2195759ba80a3fa29a5bcf06e88664d8d403779e Mon Sep 17 00:00:00 2001 From: Rob Taylor Date: Wed, 17 Dec 2025 01:27:50 +0000 Subject: [PATCH 5/5] Require Python >=3.12 and sphinx-autoapi >=3.6.1 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit - Update Python requirement from >=3.11 to >=3.12 - Update sphinx-autoapi to >=3.6.1 to fix "Unable to read file" bug 🤖 Generated with [Claude Code](https://claude.com/claude-code) Co-Authored-By: Claude Opus 4.5 --- pdm.lock | 23 ++++++++++++----------- pyproject.toml | 4 ++-- 2 files changed, 14 insertions(+), 13 deletions(-) diff --git a/pdm.lock b/pdm.lock index 0e14bb08..7f9edd05 100644 --- a/pdm.lock +++ b/pdm.lock @@ -5,10 +5,10 @@ groups = ["default", "dev"] strategy = ["inherit_metadata"] lock_version = "4.5.0" -content_hash = "sha256:177489a4de81171e46607258cf0a63c85875fadf70d820c9701eb3a4056465db" +content_hash = "sha256:9bb1c68b824dbff4e6a18c37cbb1b9b9fe10cafabbe5a71d0178af21f1503c50" [[metadata.targets]] -requires_python = ">=3.11,<3.14" +requires_python = ">=3.12,<3.14" [[package]] name = "accessible-pygments" @@ -136,16 +136,17 @@ files = [ [[package]] name = "astroid" -version = "3.3.11" -requires_python = ">=3.9.0" +version = "4.0.2" +requires_python = ">=3.10.0" summary = "An abstract syntax tree for Python with inference support." groups = ["dev"] +marker = "python_version >= \"3.12\"" dependencies = [ "typing-extensions>=4; python_version < \"3.11\"", ] files = [ - {file = "astroid-3.3.11-py3-none-any.whl", hash = "sha256:54c760ae8322ece1abd213057c4b5bba7c49818853fc901ef09719a60dbf9dec"}, - {file = "astroid-3.3.11.tar.gz", hash = "sha256:1e5a5011af2920c7c67a53f65d536d65bfa7116feeaf2354d8b94f29573bb0ce"}, + {file = "astroid-4.0.2-py3-none-any.whl", hash = "sha256:d7546c00a12efc32650b19a2bb66a153883185d3179ab0d4868086f807338b9b"}, + {file = "astroid-4.0.2.tar.gz", hash = "sha256:ac8fb7ca1c08eb9afec91ccc23edbd8ac73bb22cbdd7da1d488d9fb8d6579070"}, ] [[package]] @@ -1243,21 +1244,21 @@ files = [ [[package]] name = "sphinx-autoapi" -version = "3.6.0" +version = "3.6.1" requires_python = ">=3.9" summary = "Sphinx API documentation generator" groups = ["dev"] dependencies = [ "Jinja2", "PyYAML", - "astroid>=2.7; python_version < \"3.12\"", - "astroid>=3; python_version >= \"3.12\"", + "astroid~=3.0; python_version < \"3.12\"", + "astroid~=4.0; python_version >= \"3.12\"", "sphinx>=7.4.0", "stdlib-list; python_version < \"3.10\"", ] files = [ - {file = "sphinx_autoapi-3.6.0-py3-none-any.whl", hash = "sha256:f3b66714493cab140b0e896d33ce7137654a16ac1edb6563edcbd47bf975f711"}, - {file = "sphinx_autoapi-3.6.0.tar.gz", hash = "sha256:c685f274e41d0842ae7e199460c322c4bd7fec816ccc2da8d806094b4f64af06"}, + {file = "sphinx_autoapi-3.6.1-py3-none-any.whl", hash = "sha256:6b7af0d5650f6eac1f4b85c1eb9f9a4911160ec7138bdc4451c77a5e94d5832c"}, + {file = "sphinx_autoapi-3.6.1.tar.gz", hash = "sha256:1ff2992b7d5e39ccf92413098a376e0f91e7b4ca532c4f3e71298dbc8a4a9900"}, ] [[package]] diff --git a/pyproject.toml b/pyproject.toml index d54fc84f..7c2642e3 100644 --- a/pyproject.toml +++ b/pyproject.toml @@ -13,7 +13,7 @@ authors = [ ] license = {file = "LICENSE.md"} -requires-python = ">=3.11,<3.14" +requires-python = ">=3.12,<3.14" dependencies = [ "amaranth[builtin-yosys]>=0.5,<0.7", "amaranth-soc @ git+https://github.com/amaranth-lang/amaranth-soc", @@ -79,7 +79,7 @@ dev = [ "ruff>=0.9.2", "pytest>=7.2.0", "pytest-cov>=6.0.0", - "sphinx-autoapi>=3.5.0", + "sphinx-autoapi>=3.6.1", "sphinx~=7.4.7", "furo>=2024.04.27", "tomli-w>=1.2.0",